TWI537916B - Display device and repairing method thereof - Google Patents
Display device and repairing method thereof Download PDFInfo
- Publication number
- TWI537916B TWI537916B TW103145306A TW103145306A TWI537916B TW I537916 B TWI537916 B TW I537916B TW 103145306 A TW103145306 A TW 103145306A TW 103145306 A TW103145306 A TW 103145306A TW I537916 B TWI537916 B TW I537916B
- Authority
- TW
- Taiwan
- Prior art keywords
- transmission path
- coupled
- switch
- pull
- gate line
- Prior art date
Links
Landscapes
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
Description
本發明有關於一種顯示裝置及其補救方法，特別指一種改良顯示裝置內部閘極驅動電路的線路佈局，以達到在閘極驅動電路發生異常時，可以補救顯示裝置的方法。 The present invention relates to a display device and a remedy thereof, and more particularly to a circuit layout for improving the internal gate drive circuit of a display device to achieve a method of remedying the display device when an abnormality occurs in the gate drive circuit.
現行的顯示裝置大多採用雙邊驅動的方式來驅動顯示裝置中的列畫素。雙邊驅動主要係在列(row)畫素耦接的閘極線兩端分別耦接一個閘極驅動電路，由閘極驅動電路產生閘極驅動電壓來驅動列畫素。 Most current display devices use a bilateral drive to drive the column pixels in the display device. The bilateral driving is mainly coupled to a gate driving circuit at both ends of the gate pixel coupled to the row pixel, and the gate driving voltage is generated by the gate driving circuit to drive the column pixels.
然而，組成閘極驅動電路的電晶體中，有一些電晶體的面積較大。在顯示裝置製程時，容易有一些雜質掉入電晶體內，而造成電晶體的短路。此時，短路的電晶體就會造成閘極驅動電路異常。而當閘極線兩端中一端耦接的閘極驅動電路異常時，就會影響另一端閘極驅動電路的輸出，造成顯示裝置的線缺陷(line defect)。 However, among the transistors constituting the gate driving circuit, some of the transistors have a large area. During the display device process, some impurities are likely to fall into the transistor, causing a short circuit of the transistor. At this time, the short-circuited transistor causes the gate drive circuit to be abnormal. When the gate driving circuit coupled to one end of the two ends of the gate line is abnormal, the output of the other end gate driving circuit is affected, resulting in a line defect of the display device.
有鑒於閘極驅動電路容易造成異常的問題，實有必要發展出一種改良閘極驅動電路佈線設計的顯示裝置，使顯示裝置在發生異常時，可以透過閘極驅動電路改良的佈線，改善顯示裝置的線缺陷，進而提升顯示裝置的製造良率。 In view of the fact that the gate driving circuit is prone to abnormality, it is necessary to develop a display device for improving the wiring design of the gate driving circuit, so that the display device can improve the wiring through the improved wiring of the gate driving circuit when an abnormality occurs. Line defects, which in turn increase the manufacturing yield of the display device.
本發明提供一種顯示裝置，透過改變其閘極驅動電路的線路佈局，使得顯示裝置的閘極驅動電路發生異常時，可以透過截斷閘極驅動電路內部的部分線路，而補救發生異常的閘極驅動電路所耦接的列畫素，使得顯示裝置可以恢復正常的顯示效果。 The present invention provides a display device that can correct an abnormal gate drive by intercepting a part of the circuit inside the gate drive circuit by changing the circuit layout of the gate drive circuit to cause an abnormality in the gate drive circuit of the display device. The column pixels coupled to the circuit enable the display device to restore normal display effects.
為達上述目的，本發明一種顯示裝置及其補救方法。所述顯示裝置具有多個列畫素和多個閘極驅動電路，每一個列畫素中的多個畫素耦接於閘極線，而閘極線耦接於至少兩個閘極驅動電路。多個閘極驅動電路中至少有一個閘極驅動電路具有訊號產生模組及穩壓模組。訊號產生模組經由第一傳輸路徑耦接於閘極線，用以輸出閘極驅動控制訊號至畫素。穩壓模組經由第二傳輸路徑耦接於閘極線，用以穩定閘極線上的電壓位準。 To achieve the above object, a display device and a remedy thereof are provided. The display device has a plurality of column pixels and a plurality of gate driving circuits, wherein a plurality of pixels in each column pixel are coupled to the gate line, and the gate lines are coupled to the at least two gate driving circuits. . At least one of the plurality of gate driving circuits has a signal generating module and a voltage stabilizing module. The signal generating module is coupled to the gate line via the first transmission path for outputting the gate driving control signal to the pixel. The voltage regulator module is coupled to the gate line via the second transmission path for stabilizing the voltage level on the gate line.
顯示裝置的補救方法包含判斷閘極驅動電路是否出現異常。當閘極驅動電路出現異常時，截斷異常側閘極驅動電路的第一傳輸路徑，而由閘極驅動電路的第二傳輸路徑，穩定閘極線的電壓位準。 A remedy for the display device includes determining if an abnormality has occurred in the gate drive circuit. When an abnormality occurs in the gate driving circuit, the first transmission path of the abnormal side gate driving circuit is cut off, and the second transmission path of the gate driving circuit stabilizes the voltage level of the gate line.
綜上所述，本發明顯示裝置中的閘極驅動電路，透過第一傳輸路徑及第二傳輸路徑的線路佈局，將訊號產生模組及穩壓模組分別經由第一傳輸路徑及第二傳輸路徑耦接至閘極線。藉由第一傳輸路徑及第二傳輸路徑的線路佈局，本發明顯示裝置在閘極線上的其中一個閘極驅動電路異常時，可以截斷閘極驅動 電路的第一傳輸路徑，去除訊號產生模組所造成的電壓異常，並保留閘極驅動電路的第二傳輸路徑，以閘極驅動電路的穩壓模組繼續穩定閘極線上的電壓位準，使得閘極線上的電壓位準不會因為截斷整個異常的閘極驅動電路，而造成閘極線的電壓位準過高，進而補救了異常的閘極驅動電路所耦接的列畫素。 In summary, the gate driving circuit of the display device of the present invention transmits the signal generating module and the voltage stabilizing module via the first transmission path and the second transmission respectively through the line layout of the first transmission path and the second transmission path. The path is coupled to the gate line. By the line layout of the first transmission path and the second transmission path, the display device of the present invention can cut off the gate driving when one of the gate driving circuits on the gate line is abnormal The first transmission path of the circuit removes the voltage abnormality caused by the signal generating module, and retains the second transmission path of the gate driving circuit, and continues to stabilize the voltage level on the gate line by the voltage regulator module of the gate driving circuit. The voltage level on the gate line is not caused by cutting off the entire abnormal gate driving circuit, and the voltage level of the gate line is too high, thereby remedying the column pixels coupled by the abnormal gate driving circuit.
以上之關於本揭露內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理，並且提供本發明之專利申請範圍更進一步之解釋。 The above description of the disclosure and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.
10‧‧‧訊號產生模組 10‧‧‧Signal Generation Module
11‧‧‧上拉單元 11‧‧‧Upper unit
111‧‧‧第一開關 111‧‧‧First switch
113‧‧‧第一端 113‧‧‧ first end
115‧‧‧第二端 115‧‧‧ second end
117‧‧‧控制端 117‧‧‧Control end
13‧‧‧下拉單元 13‧‧‧ Pulldown unit
131‧‧‧第二開關 131‧‧‧Second switch
133‧‧‧第一端 133‧‧‧ first end
135‧‧‧第二端 135‧‧‧ second end
137‧‧‧控制端 137‧‧‧Control end
15‧‧‧控制單元 15‧‧‧Control unit
151‧‧‧控制開關 151‧‧‧Control switch
153‧‧‧第一端 153‧‧‧ first end
155‧‧‧第二端 155‧‧‧ second end
157‧‧‧控制端 157‧‧‧Control end
30‧‧‧穩壓模組 30‧‧‧voltage regulator
31、32‧‧‧穩壓開關 31, 32‧‧ ‧ voltage switch
50、50a‧‧‧第一傳輸路徑 50, 50a‧‧‧ first transmission path
50b‧‧‧第三傳輸路徑 50b‧‧‧ third transmission path
50c‧‧‧第四傳輸路徑 50c‧‧‧fourth transmission path
50d‧‧‧第五傳輸路徑 50d‧‧‧ fifth transmission path
70‧‧‧第二傳輸路徑 70‧‧‧second transmission path
PXr1、PXr2、PXrn‧‧‧列畫素 PXr1, PXr2, PXrn‧‧‧ column pixels
GOA1、GOA2、GOAn、GOAn+2‧‧‧閘極驅動電路 GOA1, GOA2, GOAn, GOAn+2‧‧‧ gate drive circuit
PX‧‧‧畫素 PX‧‧ ‧ pixels
G(1)、G(2)、G(n-2)、G(n)、G(n+4)‧‧‧閘極線 G(1), G(2), G(n-2), G(n), G(n+4) ‧‧ ‧ gate line
HC‧‧‧高電位端 HC‧‧‧high potential
RC1‧‧‧第一參考訊號端 RC1‧‧‧ first reference signal end
RC2‧‧‧第二參考訊號端 RC2‧‧‧second reference signal end
ST‧‧‧掃描訊號端 ST‧‧‧ scan signal end
LC1、LC2‧‧‧穩壓訊號端 LC1, LC2‧‧‧ voltage signal terminal
VSS‧‧‧低電位端 VSS‧‧‧low potential
A、B、C、D、E、F、G、H、I、J‧‧‧節點 A, B, C, D, E, F, G, H, I, J‧‧‧ nodes
第1圖係為根據本發明第一實施例所繪製的顯示裝置的示意圖。 Fig. 1 is a schematic view of a display device drawn in accordance with a first embodiment of the present invention.
第2圖係為根據本發明第一實施例所繪製的閘極驅動電路的示意圖。 Fig. 2 is a schematic view showing a gate driving circuit drawn in accordance with a first embodiment of the present invention.
第3圖係為根據本發明第一實施例所繪製的顯示裝置補救方法的流程圖。 Figure 3 is a flow chart showing a remedy of a display device according to a first embodiment of the present invention.
第4A圖係為根據本發明第二實施例所繪製的閘極驅動電路的示意圖。 Fig. 4A is a schematic view of a gate driving circuit drawn in accordance with a second embodiment of the present invention.
第4B圖係為根據本發明第三實施例所繪製的閘極驅動電路的示意圖。 Fig. 4B is a schematic diagram of a gate driving circuit drawn in accordance with a third embodiment of the present invention.
第4C圖係為根據本發明第四實施例所繪製的閘極驅動電路的示意圖。 Fig. 4C is a schematic diagram of a gate driving circuit drawn in accordance with a fourth embodiment of the present invention.
第4D圖係為根據本發明第五實施例所繪製的閘極驅動電路的示意圖。 4D is a schematic diagram of a gate driving circuit drawn in accordance with a fifth embodiment of the present invention.
第5圖係為根據本發明第六實施例所繪製的閘極驅動電路的示意圖。 Fig. 5 is a schematic view showing a gate driving circuit drawn in accordance with a sixth embodiment of the present invention.
以下在實施方式中詳細敘述本發明之詳細特徵以及優點，其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施，且根據本說明書所揭露之內容、申請專利範圍及圖式，任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。以下之實施例係進一步詳細說明本發明之觀點，但非以任何觀點限制本發明之範疇。 The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to describe the present invention in further detail, but are not intended to limit the scope of the invention.
請一併參照第1圖至第3圖，第1圖係為根據本發明第一實施例所繪製的顯示裝置的示意圖，第2圖係為根據本發明第一實施例所繪製的閘極驅動電路的示意圖，第3圖係為根據本發明第一實施例所繪製的顯示裝置補救方法的流程圖，如圖所示，本發明顯示裝置具有多個列(row)畫素PXr1、PXr2、...、PXrn及多個閘極驅動電路GOA1、GOA2、...、GOAn。每一個列畫素PXr1、PXr2、...、PXrn中分別具有多個畫素PX，且每一個列畫素PXr1、PXr2、...、PXrn的畫素PX分別耦接於閘極線G(1)、G(2)、...、G(n)上。以閘極線G(n)為例來說，閘極線G(n)耦接於至少兩個閘極驅動電路GOAn，例如閘極線G(n)的兩端分別耦接於一個閘極驅動電路GOAn或更多閘極驅動電路GOAn。於本實 施例中，畫素PX亦可分別耦接於其他的電路上，例如源極驅動電路(圖未示)、閘極補償電路(圖未示)或其他用以驅動或傳輸資料訊號給畫素PX的電路。畫素PX耦接的其他電路為相關技術具有通常知識者所熟知的技術內容，因此不加以贅述。 Referring to FIG. 1 to FIG. 3 together, FIG. 1 is a schematic diagram of a display device according to a first embodiment of the present invention, and FIG. 2 is a gate drive according to a first embodiment of the present invention. A schematic diagram of a circuit, and FIG. 3 is a flow chart of a method for remedying a display device according to a first embodiment of the present invention. As shown, the display device of the present invention has a plurality of row pixels PXr1, PXr2. .., PXrn and multiple gate drive circuits GOA1, GOA2, ..., GOAn. Each of the column pixels PXr1, PXr2, ..., PXrn has a plurality of pixels PX, and the pixels PX of each of the column pixels PXr1, PXr2, ..., PXrn are respectively coupled to the gate line G. (1), G(2), ..., G(n). For example, the gate line G(n) is coupled to at least two gate driving circuits GOAn. For example, the two ends of the gate line G(n) are respectively coupled to one gate. The drive circuit GOAn or more gate drive circuits GOAn. Yu Shishi In the embodiment, the pixels PX can also be respectively coupled to other circuits, such as a source driving circuit (not shown), a gate compensation circuit (not shown), or the like for driving or transmitting data signals to pixels. PX circuit. Other circuits in which the pixel PX is coupled are related to the related art and are well known to those skilled in the art, and thus will not be described.
本實施例中，G(1)、G(2)、...、G(n)上耦接的閘極驅動電路GOA1、GOA2、...、GOAn具有訊號產生模組10及穩壓模組30。以閘極驅動電路GOAn為例來說，如第2圖所示，訊號產生模組10經由第一傳輸路徑50耦接於閘極線G(n)，用以輸出閘極驅動控制訊號至畫素PX。穩壓模組30經由第二傳輸路徑70耦接於閘極線G(n)，用以穩定閘極線G(n)上的電壓位準。 In this embodiment, the gate driving circuits GOA1, GOA2, ..., GOAn coupled to G(1), G(2), ..., G(n) have a signal generating module 10 and a voltage stabilizing mode. Group 30. Taking the gate driving circuit GOAn as an example, as shown in FIG. 2, the signal generating module 10 is coupled to the gate line G(n) via the first transmission path 50 for outputting the gate driving control signal to the drawing. Prime PX. The voltage regulator module 30 is coupled to the gate line G(n) via the second transmission path 70 for stabilizing the voltage level on the gate line G(n).
訊號產生模組10可包含上拉單元11、下拉單元13及控制單元15。以第1圖所示的實施例來說，上拉單元11可具有第一開關111，第一開關111的第一端113耦接於高電位端HC，第二端115經由第一傳輸路徑50耦接於閘極線G(n)，控制端117接收第一參考訊號RC1，提升閘極線G(n)的電壓位準。舉例來說，假設第一開關111為N型電晶體時，當控制端117接收到高電壓位準的第一參考訊號RC1，第一開關111導通，第一開關111將閘極線G(n)的電壓位準提升至高電位端HC的電壓位準。 The signal generating module 10 can include a pull-up unit 11, a pull-down unit 13, and a control unit 15. In the embodiment shown in FIG. 1 , the pull-up unit 11 can have a first switch 111 , the first end 113 of the first switch 111 is coupled to the high-potential terminal HC, and the second end 115 is coupled to the first transmission path 50. The gate terminal G(n) is coupled to the gate line G(n), and the control terminal 117 receives the first reference signal RC1 to raise the voltage level of the gate line G(n). For example, if the first switch 111 is an N-type transistor, when the control terminal 117 receives the first reference signal RC1 of the high voltage level, the first switch 111 is turned on, and the first switch 111 turns the gate line G(n). The voltage level is raised to the voltage level of the high potential terminal HC.
下拉單元13可具有第二開關131，第二開關131的第一端133同樣經由第一傳輸路徑50耦接於閘極線G(n)，第二端135耦接於低電位端VSS，控制端137耦接於第二參考訊號端，用以接收第二參考訊號RC2，據以下拉閘極線G(n)的電壓位準， 其中，第二開關131的第一端133也會連接第一開關111的第二端115。以實際操作的情形來說，當第二開關131為N型電晶體時，第二開關131的控制端137接收到高電壓位準的第二參考訊號RC2時，第二開關131導通，閘極線G(n)的電壓位準被下拉至低電壓端VSS的電壓位準。 The pull-down unit 13 can have a second switch 131. The first end 133 of the second switch 131 is also coupled to the gate line G(n) via the first transmission path 50, and the second end 135 is coupled to the low-potential terminal VSS. The terminal 137 is coupled to the second reference signal terminal for receiving the second reference signal RC2 according to the voltage level of the gate line G(n). The first end 133 of the second switch 131 is also connected to the second end 115 of the first switch 111. In the actual operation, when the second switch 131 is an N-type transistor, when the control terminal 137 of the second switch 131 receives the second reference signal RC2 of the high voltage level, the second switch 131 is turned on, the gate The voltage level of line G(n) is pulled down to the voltage level of the low voltage terminal VSS.
上拉單元11和下拉單元13分別受控於第一參考訊號RC1及第二參考訊號RC2，決定閘極線G(n)的電壓位準。第一參考訊號RC1可以是閘極線G(n-2)的電壓位準，而第二參考訊號RC2可以是閘極線G(n+4)的電壓位準。 The pull-up unit 11 and the pull-down unit 13 are controlled by the first reference signal RC1 and the second reference signal RC2, respectively, to determine the voltage level of the gate line G(n). The first reference signal RC1 may be the voltage level of the gate line G(n-2), and the second reference signal RC2 may be the voltage level of the gate line G(n+4).
控制單元15可具有控制開關151，控制開關151的第一端153經由第一傳輸路徑50耦接於閘極線G(n)。換言之，控制開關151的第一端153會連接第一開關111的第二端115、第二開關131的第一端133，以及經由第二傳輸路徑70連接穩壓模組30。控制開關151的控制端157耦接於掃描訊號端ST，用以依據掃描訊號，輸出閘極驅動控制訊號至其他的閘極驅動電路，例如以控制開關151的第二端155耦接至閘極驅動電路GOAn+2，提供閘極驅動電路GOAn+2的第一參考訊號。 The control unit 15 can have a control switch 151 that is coupled to the gate line G(n) via the first transmission path 50. In other words, the first end 153 of the control switch 151 is connected to the second end 115 of the first switch 111, the first end 133 of the second switch 131, and the voltage regulator module 30 via the second transmission path 70. The control terminal 157 of the control switch 151 is coupled to the scan signal terminal ST for outputting the gate drive control signal to the other gate drive circuit according to the scan signal, for example, the second end 155 of the control switch 151 is coupled to the gate. The driving circuit GOAn+2 provides a first reference signal of the gate driving circuit GOAn+2.
穩壓模組30可具有多個穩壓開關，如第2圖所示的穩壓開關31、32。以穩壓開關31來說，穩壓開關31的第一端經由第二傳輸路徑70耦接於閘極線G(n)，穩壓開關31的第二端耦接於低電位端VSS，其中，穩壓開關31的第二端也會連接第二開關131的第二端135。穩壓開關31耦接於穩壓訊號端LC1，用 以依據穩壓訊號，穩定閘極線G(n)上的電壓位準。其中，多個穩壓開關中穩壓開關32的第一端經由第二傳輸路徑70耦接於閘極線G(n)，穩壓開關32的第二端耦接於低電位端VSS，其中，穩壓開關32的第二端也會連接第二開關131的第二端135與穩壓開關31的第二端。穩壓開關32耦接於穩壓訊號端LC2，用.以依據穩壓訊號，穩定閘極線G(n)上的電壓位準。本實施例中，穩壓開關31與穩壓開關32可以分別依據穩壓訊號端LC1和穩壓訊號端LC2不同時序的穩壓訊號來穩定閘極線G(n)上的電壓位準，但並非用以限制本實施例。於其他實施例中，穩壓開關31和穩壓開關32亦可以依據同一個穩壓訊號端的穩壓訊號來穩定閘極線G(n)上的電壓位準。 The voltage regulator module 30 can have a plurality of voltage regulator switches, such as the voltage regulator switches 31, 32 shown in FIG. The first end of the voltage regulator switch 31 is coupled to the gate line G(n) via the second transmission path 70, and the second end of the voltage regulator switch 31 is coupled to the low potential terminal VSS. The second end of the voltage regulator switch 31 is also connected to the second end 135 of the second switch 131. The voltage regulator switch 31 is coupled to the voltage regulator signal terminal LC1, According to the voltage stabilization signal, the voltage level on the gate line G(n) is stabilized. The first end of the voltage regulator switch 32 is coupled to the gate line G(n) via the second transmission path 70, and the second end of the voltage regulator switch 32 is coupled to the low potential terminal VSS. The second end of the voltage regulator switch 32 is also connected to the second end 135 of the second switch 131 and the second end of the voltage regulator switch 31. The voltage regulator switch 32 is coupled to the voltage regulator signal terminal LC2 for stabilizing the voltage level on the gate line G(n) according to the voltage stabilization signal. In this embodiment, the voltage regulator switch 31 and the voltage regulator switch 32 can stabilize the voltage level on the gate line G(n) according to the voltage stabilization signals of the voltage regulation terminal LC1 and the voltage regulation terminal LC2, respectively. It is not intended to limit the embodiment. In other embodiments, the voltage regulator switch 31 and the voltage regulator switch 32 can also stabilize the voltage level on the gate line G(n) according to the voltage stabilization signal of the same voltage regulator signal terminal.
於實務上來說，由於閘極驅動電路GOAn中的元件，如第一開關111、第二開關131、控制開關151和穩壓開關31、32，其中組成訊號產生模組10的元件，如第一開關111、第二開關131及控制開關151，因為其元件的體積較大，在製程中容易掉入雜質，使得第一開關111、第二開關131或控制開關151發生短路，使得閘極驅動電路GOAn異常，無法輸出正確的閘極驅動控制訊號來驅動列畫素PXrn，造成顯示裝置的線缺陷(line defect)，並且使得顯示裝置上會顯示出灰階較深的線條。因此，將訊號產生模組10與穩壓模組30分成兩個傳輸路徑來耦接於閘極線G(n)。當閘極驅動電路GOAn發生異常時，可以截斷第一傳輸路徑50，去除訊號產生模組10造成的異常，而由穩壓模組30 經第二傳輸路徑70繼續穩定閘極線G(n)上的電壓位準。 In practice, due to components in the gate drive circuit GOAn, such as the first switch 111, the second switch 131, the control switch 151, and the voltage regulator switches 31, 32, the components constituting the signal generating module 10, such as the first The switch 111, the second switch 131, and the control switch 151 are easy to drop impurities in the process because of the large volume of the components, so that the first switch 111, the second switch 131 or the control switch 151 is short-circuited, so that the gate drive circuit The GOAn is abnormal, and the correct gate drive control signal cannot be output to drive the column pixels PXrn, causing line defects of the display device, and the gray lines are displayed on the display device. Therefore, the signal generating module 10 and the voltage stabilizing module 30 are divided into two transmission paths to be coupled to the gate line G(n). When an abnormality occurs in the gate driving circuit GOAn, the first transmission path 50 can be cut off to remove the abnormality caused by the signal generating module 10, and the voltage regulator module 30 is removed. The voltage level on the gate line G(n) is stabilized via the second transmission path 70.
以實際的例子來說，當閘極驅動電路GOAn正常時，閘極線G(n)上的電壓位準約為16.6V。當顯示裝置上出現灰階異常的線缺陷(損)時，表示列畫素耦接的閘極驅動電路GOAn可能異常。此時，就能以雷射切割的方式，截斷列畫素耦接的閘極驅動電路GOAn的第一傳輸路徑50。截斷第一傳輸路徑50後，穩壓模組30仍經由第二傳輸路徑70耦接於閘極線G(n)穩定閘極線G(n)上的電壓位準，因此閘極線G(n)上的電壓位準約為16.8V，與閘極驅動電路GOAn於正常時約為16.6V的電壓位準相差不多，進而補救了顯示裝置線缺陷的問題。透過本實施例所述的結構，使得本實施例在顯示裝置在進行線缺陷的補救時，閘極線上的電壓位準不會因為截斷整個異常的閘極驅動電路，而造成閘極線的電壓位準過高，從而使得異常的顯示裝置可以正常運作。 In a practical example, when the gate drive circuit GOAn is normal, the voltage level on the gate line G(n) is about 16.6V. When a line defect (loss) of gray scale abnormality appears on the display device, the gate driving circuit GOAn indicating that the column pixel is coupled may be abnormal. At this time, the first transmission path 50 of the gate driving circuit GOAn of the column pixel can be cut off by laser cutting. After the first transmission path 50 is cut off, the voltage regulator module 30 is still coupled to the voltage level on the gate line G(n) of the gate line G(n) via the second transmission path 70, and thus the gate line G ( The voltage level on n) is about 16.8V, which is similar to the voltage level of the gate drive circuit GOAn at about 16.6V during normal operation, thereby remedying the problem of line defects in the display device. Through the structure described in this embodiment, when the display device performs the remediation of the line defect, the voltage level on the gate line does not cause the voltage of the gate line due to the interruption of the entire abnormal gate driving circuit. The level is too high, so that the abnormal display device can operate normally.
為了說明本發明顯示裝置的補救方法，以下將說明第一個實施例的步驟流程。於步驟S20中，判斷閘極線G(n)耦接的閘極驅動電路GOAn是否出現異常。判斷是否出現異常的方式，例如觀察顯示裝置上是否有出現灰階異常的線缺陷、判斷閘極線G(n)上的電壓位準是否為正常驅動應有的電壓位準或其他適當的方式。當閘極線G(n)耦接的閘極驅動電路GOAn出現異常時，於步驟S22中，截斷出現異常的閘極驅動電路GOAn的第一傳輸路徑50。於實務上可以雷射切割或其他合適的方式來截斷第一傳輸路徑50。於步驟S24中，已截斷第一傳輸路徑50的閘極 驅動電路GOAn經由第二傳輸路徑70，穩定閘極線G(n)的電壓位準。換言之，截斷第一傳輸路徑50的閘極驅動電路GOAn可繼續以穩壓模組30經由第二傳輸路徑70，來穩定閘極線G(n)上的電壓位準，避免閘極線G(n)的電壓位準突然提升，無法改善顯示裝置的線缺陷。 In order to explain the remedy of the display device of the present invention, the flow of the steps of the first embodiment will be described below. In step S20, it is determined whether or not an abnormality occurs in the gate driving circuit GOAn to which the gate line G(n) is coupled. A method for judging whether an abnormality occurs, such as observing whether there is a line defect on the display device where a gray scale abnormality occurs, determining whether the voltage level on the gate line G(n) is a voltage level that is normally driven, or other appropriate manner . When an abnormality occurs in the gate driving circuit GOAn to which the gate line G(n) is coupled, in step S22, the first transmission path 50 of the abnormal gate driving circuit GOAn is cut off. In practice, the first transmission path 50 can be cut by laser cutting or other suitable means. In step S24, the gate of the first transmission path 50 has been cut off The drive circuit GOAn stabilizes the voltage level of the gate line G(n) via the second transmission path 70. In other words, the gate driving circuit GOAn that cuts off the first transmission path 50 can continue to stabilize the voltage level on the gate line G(n) via the second transmission path 70 by the voltage regulator module 30, thereby avoiding the gate line G ( The voltage level of n) is suddenly increased, and the line defect of the display device cannot be improved.
於本發明的變化實施例中，第一傳輸路徑可更進一步具有一個截斷區域。當閘極驅動電路GOAn發生異常時，以雷射切割的方式來截斷第一傳輸路徑上的截斷區域，進而補救顯示裝置。 In a variant embodiment of the invention, the first transmission path may further have a truncation area. When an abnormality occurs in the gate driving circuit GOAn, the cut-off area on the first transmission path is cut off by laser cutting, thereby remedying the display device.
請一併參照第1圖及第4A圖至第4D圖，第4A圖係為根據本發明第二實施例所繪製的閘極驅動電路的示意圖，第4B圖係為根據本發明第三實施例所繪製的閘極驅動電路的示意圖，第4C圖係為根據本發明第四實施例所繪製的閘極驅動電路的示意圖。第4D圖係為根據本發明第五實施例所繪製的閘極驅動電路的示意圖。第4A圖至第4D圖所示的實施例與第一實施例相同之處，請參閱第一實施例，於此不再贅言。如第4A圖所示，第二實施例與第一個實施例不同的是，訊號產生模組10更經由第一傳輸路徑50a與第三傳輸路徑50b耦接於閘極線G(n)。更詳細地來說，上拉單元11經由第三傳輸路徑50a耦接於閘極線G(n)，下拉單元13和控制單元15係經由第三傳輸路徑50b耦接於閘極線G(n)。舉例而言，上拉單元11可以第一開關111的第二端115經由第一傳輸路徑50a耦接閘極線G(n)。下拉單元13可以第二 開關131的第一端133經由第三傳輸路徑50b耦接閘極線G(n)。控制單元15可以控制開關151的第一端153經由第三傳輸路徑50b耦接閘極線G(n)。第二開關131的第一端133與控制開關151的第一端153會合於節點A，構成第三傳輸路徑50b耦接至閘極線G(n)。而穩壓模組30中的多個穩壓開關31與32的第一端經由第二傳輸路徑70耦接閘極線G(n)。更詳細地來說，第一傳輸路徑50a、第二傳輸路徑70與第三傳輸路徑50b會合於一個節點B，且前述三個傳輸路徑經由節點B連接至閘極線G(n)。因此，所述顯示裝置的補救方法可更進一步在上拉單元11出線異常時，截斷該第一傳輸路徑50a，在下拉單元13及控制單元15其中之一出現異常時，截斷第三傳輸路徑50b。於本實施例中，第一傳輸路徑50a、第二傳輸路徑70與第三傳輸路徑50b會合於一個節點B並非用以限制本實施例的實施方式，於其他實施例中，第一傳輸路徑50a與第二傳輸路徑70亦可分別於節點C、D連接至閘極線G(n)，如第4B圖所示。 Please refer to FIG. 1 and FIG. 4A to FIG. 4D together. FIG. 4A is a schematic diagram of a gate driving circuit according to a second embodiment of the present invention, and FIG. 4B is a third embodiment according to the present invention. A schematic diagram of the gate drive circuit drawn, and FIG. 4C is a schematic diagram of the gate drive circuit drawn in accordance with the fourth embodiment of the present invention. 4D is a schematic diagram of a gate driving circuit drawn in accordance with a fifth embodiment of the present invention. The embodiment shown in FIGS. 4A to 4D is the same as the first embodiment, please refer to the first embodiment, and it goes without saying. As shown in FIG. 4A, the second embodiment is different from the first embodiment in that the signal generating module 10 is further coupled to the gate line G(n) via the first transmission path 50a and the third transmission path 50b. In more detail, the pull-up unit 11 is coupled to the gate line G(n) via the third transmission path 50a, and the pull-down unit 13 and the control unit 15 are coupled to the gate line G via the third transmission path 50b. ). For example, the pull-up unit 11 can be coupled to the gate line G(n) via the first transmission path 50a at the second end 115 of the first switch 111. The pull down unit 13 can be second The first end 133 of the switch 131 is coupled to the gate line G(n) via the third transmission path 50b. The control unit 15 can control the first end 153 of the switch 151 to be coupled to the gate line G(n) via the third transmission path 50b. The first end 133 of the second switch 131 and the first end 153 of the control switch 151 are coupled to the node A, and the third transmission path 50b is coupled to the gate line G(n). The first ends of the plurality of voltage regulators 31 and 32 in the voltage regulator module 30 are coupled to the gate line G(n) via the second transmission path 70. In more detail, the first transmission path 50a, the second transmission path 70, and the third transmission path 50b meet at one node B, and the aforementioned three transmission paths are connected to the gate line G(n) via the node B. Therefore, the remedy method of the display device can further cut off the first transmission path 50a when the line-up abnormality of the pull-up unit 11 is abnormal, and cut off the third transmission path when an abnormality occurs in one of the pull-down unit 13 and the control unit 15 50b. In this embodiment, the first transmission path 50a, the second transmission path 70, and the third transmission path 50b are combined with one node B, which is not used to limit the embodiment of the embodiment. In other embodiments, the first transmission path 50a The second transmission path 70 can also be connected to the gate line G(n) at nodes C, D, respectively, as shown in FIG. 4B.
本實施例在實際的應用上，亦可以係將上拉單元11和下拉單元13經由第三傳輸路徑50a耦接於閘極線G(n)，如第4C圖所示的第四實施例，第四實施例與第二個實施例不同的是，第一開關111的第二端115與第二開關131的第一端133會合於節點E，構成第一傳輸路徑50a耦接至閘極線G(n)。控制開關151的第一端153經由第三傳輸路徑50b耦接於閘極線G(n)。第一傳輸路徑50a、第二傳輸路徑70與第三傳輸路徑50b會合於節點F， 藉由節點F耦接閘極線G(n)。又如第4D圖所示的第五實施例，第五實施例與第二實施例不同的是，上拉單元11和控制單元15會合於節點G，構成第三傳輸路徑50a耦接於閘極線G(n)，而下拉單元13經由第三傳輸路徑50b耦接於閘極線G(n)。第一傳輸路徑50a、第二傳輸路徑70與第三傳輸路徑50b會合於節點H，藉由節點H耦接閘極線G(n)。 In the practical application, the pull-up unit 11 and the pull-down unit 13 may be coupled to the gate line G(n) via the third transmission path 50a, as in the fourth embodiment shown in FIG. 4C. The fourth embodiment is different from the second embodiment in that the second end 115 of the first switch 111 and the first end 133 of the second switch 131 meet the node E, and the first transmission path 50a is coupled to the gate line. G(n). The first end 153 of the control switch 151 is coupled to the gate line G(n) via the third transmission path 50b. The first transmission path 50a, the second transmission path 70, and the third transmission path 50b meet at the node F, The gate line G(n) is coupled by the node F. In another embodiment, as shown in FIG. 4D, the fifth embodiment is different from the second embodiment in that the pull-up unit 11 and the control unit 15 are coupled to the node G, and the third transmission path 50a is coupled to the gate. The line G(n), and the pull-down unit 13 is coupled to the gate line G(n) via the third transmission path 50b. The first transmission path 50a, the second transmission path 70 and the third transmission path 50b meet with the node H, and the node H is coupled to the gate line G(n).
請一併參照第1圖及第5圖，第5圖係為根據本發明第六實施例所繪製的閘極驅動電路的示意圖。第六實施例與第一實施例相同之處，請參閱第一實施例，於第三實施例中不再贅言。第三實施例與第一實施例不同的是，訊號產生模組10更經由第一傳輸路徑50a、第四傳輸路徑50c與第五傳輸路徑50d耦接於閘極線G(n)。於第六個實施例中，上拉單元11經由第三傳輸路徑50a耦接於閘極線G(n)，下拉單元13經由第四傳輸路徑50c耦接於閘極線G(n)，控制單元15經由第五傳輸路徑50d耦接於閘極線G(n)。舉例而言，上拉單元11可以第一開關111的第二端115經由第一傳輸路徑50a耦接閘極線G(n)。下拉單元13可以第二開關131的第一端133經由第四傳輸路徑50c耦接閘極線G(n)。控制單元15可以控制開關151的第一端經由第五傳輸路徑50d耦接閘極線G(n)。而穩壓模組30中的多個穩壓開關31與32的第一端經由第二傳輸路徑70耦接閘極線G(n)。其中，第一傳輸路徑50a與第四傳輸路徑50c會合於節點I，第二傳輸路徑70與第五傳輸路徑50d會合於節點J，而節點1與節點J相連後，再 連接至閘極線G(n)。因此，前述四個傳輸路徑經由節點I與節點J，連接至閘極線G(n)。所述顯示裝置的補救方法可更進一步在上拉單元11出現異常時，截斷該第一傳輸路徑50a，在下拉單元13出線異常時，截斷該第四傳輸路徑50c，在控制單元15出現異常時，截斷該第五傳輸路徑50d，進而讓補救顯示裝置時，只移除發生異常的元件，而不會移除到其他仍正常運作的元件。 Please refer to FIG. 1 and FIG. 5 together. FIG. 5 is a schematic diagram of a gate driving circuit according to a sixth embodiment of the present invention. The sixth embodiment is the same as the first embodiment, please refer to the first embodiment, and the third embodiment is not to be used. The third embodiment is different from the first embodiment in that the signal generating module 10 is further coupled to the gate line G(n) via the first transmission path 50a, the fourth transmission path 50c, and the fifth transmission path 50d. In the sixth embodiment, the pull-up unit 11 is coupled to the gate line G(n) via the third transmission path 50a, and the pull-down unit 13 is coupled to the gate line G(n) via the fourth transmission path 50c, and is controlled. The unit 15 is coupled to the gate line G(n) via the fifth transmission path 50d. For example, the pull-up unit 11 can be coupled to the gate line G(n) via the first transmission path 50a at the second end 115 of the first switch 111. The pull-down unit 13 can be coupled to the gate line G(n) via the fourth transmission path 50c at the first end 133 of the second switch 131. The control unit 15 can control the first end of the switch 151 to be coupled to the gate line G(n) via the fifth transmission path 50d. The first ends of the plurality of voltage regulators 31 and 32 in the voltage regulator module 30 are coupled to the gate line G(n) via the second transmission path 70. The first transmission path 50a and the fourth transmission path 50c meet the node I, the second transmission path 70 and the fifth transmission path 50d meet the node J, and the node 1 is connected to the node J, and then Connect to the gate line G(n). Therefore, the aforementioned four transmission paths are connected to the gate line G(n) via the node I and the node J. The remedy method of the display device may further cut off the first transmission path 50a when an abnormality occurs in the pull-up unit 11, and cut off the fourth transmission path 50c when the output unit of the pull-down unit 13 is abnormal, and an abnormality occurs in the control unit 15 At this time, the fifth transmission path 50d is cut off, so that when the display device is remediated, only the components in which the abnormality occurs are removed, and the components that are still functioning normally are not removed.
綜合以上所述，本發明顯示裝置利用改變閘極驅動電路中的佈局，將訊號產生模組及穩壓模組分別經由第一傳輸路徑及第二傳輸路徑耦接至閘極線。本發明顯示裝置在閘極線上的其中一個閘極驅動電路異常時，可以截斷閘極驅動電路的第一傳輸路徑，去除訊號產生模組所造成的電壓異常，並保留閘極驅動電路的第二傳輸路徑，以閘極驅動電路的穩壓模組繼續穩定閘極線上的電壓位準。於其他實施例中，本發明更可以將訊號產生模組中的上拉單元、下拉單元及控制單元分組或個別設置在不同的傳輸路徑上，進而在任何一個電路發生異常時，截斷發生異常的電路與閘極線之間的耦接。因此，本發明在顯示裝置在進行線缺陷的補救時，閘極線上的電壓位準不會因為截斷整個異常的閘極驅動電路，而造成閘極線的電壓位準過高。據此，補救了有顯示異常的顯示裝置。 In summary, the display device of the present invention couples the signal generating module and the voltage stabilizing module to the gate line via the first transmission path and the second transmission path, respectively, by changing the layout in the gate driving circuit. When the display device of the present invention is abnormal in one of the gate driving circuits on the gate line, the first transmission path of the gate driving circuit can be cut off, the voltage abnormality caused by the signal generating module is removed, and the second gate driving circuit is retained. The transmission path continues to stabilize the voltage level on the gate line with the voltage regulator module of the gate drive circuit. In other embodiments, the pull-up unit, the pull-down unit, and the control unit in the signal generating module may be grouped or individually set on different transmission paths, thereby interrupting an abnormality when an abnormality occurs in any one of the circuits. The coupling between the circuit and the gate line. Therefore, in the present invention, when the display device performs the remediation of the line defect, the voltage level on the gate line does not cause the voltage level of the gate line to be too high due to the interruption of the entire abnormal gate driving circuit. According to this, the display device having the display abnormality is remedied.
雖然本發明以上述之實施例揭露如上，然其並非用以限定本發明。在不脫離本發明之精神和範圍內，所為之更動與潤飾，均屬本發明之專利保護範圍。關於本發明所界定之保護範 圍請參考所附之申請專利範圍。 Although the present invention has been disclosed above in the above embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Regarding the protection scope defined by the present invention Please refer to the attached patent application scope.
10‧‧‧訊號產生模組 10‧‧‧Signal Generation Module
11‧‧‧上拉單元 11‧‧‧Upper unit
111‧‧‧第一開關 111‧‧‧First switch
113‧‧‧第一端 113‧‧‧ first end
115‧‧‧第二端 115‧‧‧ second end
117‧‧‧控制端 117‧‧‧Control end
13‧‧‧下拉單元 13‧‧‧ Pulldown unit
131‧‧‧第二開關 131‧‧‧Second switch
133‧‧‧第一端 133‧‧‧ first end
135‧‧‧第二端 135‧‧‧ second end
137‧‧‧控制端 137‧‧‧Control end
15‧‧‧控制單元 15‧‧‧Control unit
151‧‧‧控制開關 151‧‧‧Control switch
153‧‧‧第一端 153‧‧‧ first end
155‧‧‧第二端 155‧‧‧ second end
157‧‧‧控制端 157‧‧‧Control end
30‧‧‧穩壓模組 30‧‧‧voltage regulator
31、32‧‧‧穩壓開關 31, 32‧‧ ‧ voltage switch
50‧‧‧第一傳輸路徑 50‧‧‧First transmission path
70‧‧‧第二傳輸路徑 70‧‧‧second transmission path
GOAn‧‧‧閘極驅動電路 GOAn‧‧‧ gate drive circuit
G(n)‧‧‧閘極線 G(n)‧‧‧ gate line
HC‧‧‧高電位端 HC‧‧‧high potential
RC1‧‧‧第一參考訊號端 RC1‧‧‧ first reference signal end
RC2‧‧‧第二參考訊號端 RC2‧‧‧second reference signal end
ST‧‧‧掃描訊號端 ST‧‧‧ scan signal end
LC1、LC2‧‧‧穩壓訊號端 LC1, LC2‧‧‧ voltage signal terminal
VSS‧‧‧低電位端 VSS‧‧‧low potential
Claims (9)
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103145306A TWI537916B (en) | 2014-12-24 | 2014-12-24 | Display device and repairing method thereof |
| CN201510060530.XA CN104658467B (en) | 2014-12-24 | 2015-02-05 | display device and repairing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW103145306A TWI537916B (en) | 2014-12-24 | 2014-12-24 | Display device and repairing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI537916B true TWI537916B (en) | 2016-06-11 |
| TW201624444A TW201624444A (en) | 2016-07-01 |
Family
ID=53249521
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW103145306A TWI537916B (en) | 2014-12-24 | 2014-12-24 | Display device and repairing method thereof |
Country Status (2)
| Country | Link |
|---|---|
| CN (1) | CN104658467B (en) |
| TW (1) | TWI537916B (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI567710B (en) * | 2015-11-16 | 2017-01-21 | 友達光電股份有限公司 | Display device and gate driver on array |
| US20180335879A1 (en) * | 2017-05-17 | 2018-11-22 | Himax Technologies Limited | In-cell touch and display apparatus, common voltage provider, and providing method thereof |
| CN107146564B (en) * | 2017-07-03 | 2020-11-17 | 京东方科技集团股份有限公司 | Testing device and method for GOA circuit and display |
| CN109147690A (en) * | 2018-08-24 | 2019-01-04 | 惠科股份有限公司 | Control method and device, controller |
| CN109192159A (en) * | 2018-09-27 | 2019-01-11 | 惠科股份有限公司 | Display control unit, display, self-test interrupt method and device |
| US10832607B2 (en) | 2018-09-27 | 2020-11-10 | HKC Corporation Limited | Display control device, display, and self-test interrupt method |
| CN110164346A (en) * | 2019-06-27 | 2019-08-23 | 惠科股份有限公司 | The repair system and restorative procedure of driving circuit |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI399728B (en) * | 2008-04-11 | 2013-06-21 | Au Optronics Corp | Display apparatus and circuit repairing method thereof |
| US8537094B2 (en) * | 2010-03-24 | 2013-09-17 | Au Optronics Corporation | Shift register with low power consumption and liquid crystal display having the same |
| CN102237034B (en) * | 2011-07-11 | 2013-05-08 | 北京大学深圳研究生院 | Grid driving circuit and display device |
| TWI520493B (en) * | 2013-02-07 | 2016-02-01 | 友達光電股份有限公司 | Shift register circuit and shading waveform generating method |
| TWI522978B (en) * | 2014-02-20 | 2016-02-21 | 友達光電股份有限公司 | Inspection and repairing method of display panel |
-
2014
- 2014-12-24 TW TW103145306A patent/TWI537916B/en active
-
2015
- 2015-02-05 CN CN201510060530.XA patent/CN104658467B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| TW201624444A (en) | 2016-07-01 |
| CN104658467A (en) | 2015-05-27 |
| CN104658467B (en) | 2017-10-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI537916B (en) | Display device and repairing method thereof | |
| US8411221B2 (en) | Display device and repairing method for the same | |
| TWI522978B (en) | Inspection and repairing method of display panel | |
| US8471800B2 (en) | Display device, liquid crystal display device, and method for manufacturing display device | |
| KR102082408B1 (en) | Display device able to prevent abnormal display caused by soft fail and driving method of the same | |
| US20170052416A1 (en) | Liquid crystal display panel | |
| US10255854B2 (en) | Organic light emitting display device with auxiliary pixels to repair defective display pixels | |
| TWI567710B (en) | Display device and gate driver on array | |
| TWI512380B (en) | Display apparatus and method for operating that | |
| WO2017041445A1 (en) | Repair circuit, display substrate and corresponding display panel and repair method | |
| US10372001B2 (en) | Display apparatus and method of manufacturing display apparatus | |
| EA031911B1 (en) | Display device and test line repair method therefor | |
| JP2007212433A (en) | Signal processor, liquid crystal display, and test system for liquid crystal display | |
| KR102268461B1 (en) | Display device and timing controller | |
| KR20160032757A (en) | Organic light emitting display device | |
| CN111403311B (en) | GOA circuit, display panel and repairing method | |
| CN103247245B (en) | display panel circuit structure | |
| CN101510411A (en) | Display device and renovation method thereof | |
| CN110928091A (en) | Display panel, repairing method thereof and display device | |
| US9287838B2 (en) | High slew rate operational amplifier and operating method thereof | |
| TWI537903B (en) | Display panel and testing method of display panel | |
| CN103579257B (en) | Array base palte and preparation method thereof, display device | |
| CN107768387B (en) | A kind of array substrate and its restorative procedure | |
| TWI402595B (en) | Liquid crystal display device and repairing method thereof | |
| CN105280632A (en) | Electrostatic protection circuit and display apparatus |