TWI528859B - The offset voltage cancellation circuit structure of the dimming device protection mechanism - Google Patents

The offset voltage cancellation circuit structure of the dimming device protection mechanism Download PDF

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TWI528859B
TWI528859B TW103139094A TW103139094A TWI528859B TW I528859 B TWI528859 B TW I528859B TW 103139094 A TW103139094 A TW 103139094A TW 103139094 A TW103139094 A TW 103139094A TW I528859 B TWI528859 B TW I528859B
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operational amplifier
resistor
output
inverting input
voltage
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TW103139094A
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TW201538031A (en
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Sen-Tai Yang
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
    • Y02B20/30—Semiconductor lamps, e.g. solid state lamps [SSL] light emitting diodes [LED] or organic LED [OLED]

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Description

調光裝置保護機制的偏移電壓消除電路結構 Offset voltage cancellation circuit structure of dimming device protection mechanism

本發明是有關一種調光裝置保護機制的偏移電壓消除電路結構，尤指一種可於連結外部電阻型調光器時提供電流輸出，並有效消除保護電路用外部限流電阻所產生電壓差(偏移)的電路結構。 The invention relates to an offset voltage eliminating circuit structure related to a protection mechanism of a dimming device, in particular to providing a current output when connecting an external resistance type dimmer, and effectively eliminating a voltage difference generated by an external current limiting resistor of the protection circuit ( Offset) circuit structure.

發光二極體LED具有低耗能、使用壽命長等特點，因此已逐漸被成熟且廣泛的應用於各種照明需求場合；但由於LED光源元件與傳統光源元件(如：鎢絲燈泡)具有極大的物理特性差異，而適用於傳統光源元件的調光電路並無法直接控制LED光源元件產生亮度的變化，故而利用一轉換電路連結於該LED光源元件與傳統調光電路之間，以將傳統調光電路的控制機制轉換為可控制LED光源元件的控制電壓乃為一可行的實施方式。 Light-emitting diode LEDs have low energy consumption and long service life, so they have been gradually matured and widely used in various lighting requirements; however, LED light source components and traditional light source components (such as tungsten light bulbs) have great The difference in physical characteristics, and the dimming circuit applied to the conventional light source component cannot directly control the change of the brightness of the LED light source component, so a conversion circuit is used to connect between the LED light source component and the conventional dimming circuit to perform conventional dimming. It is a feasible implementation to convert the control mechanism of the circuit into a control voltage that can control the LED light source components.

一般傳統照明的調光器約略可分為電壓型、電阻型及PWM型，但不管是哪一種形式，大多係導出一個0到10V的類比調光訊號，此電壓代表0%~100%的亮度；而該轉換電路則必須接受上述傳統調光裝置輸出的0~10V的類比調光信號，並轉化成具有0%~100%變化的控制信號，以驅動一附加的電源供應電路提供不同電壓至LED光源元件，使LED光源元件產生不同的亮度變化。 Generally, the dimmers of traditional illumination can be roughly divided into voltage type, resistance type and PWM type, but in either form, most of them derive a 0 to 10V analog dimming signal, which represents 0%~100% brightness. The conversion circuit must accept the analog dimming signal of 0~10V output by the above conventional dimming device, and convert it into a control signal having a variation of 0%~100% to drive an additional power supply circuit to provide different voltages to The LED light source element causes the LED light source elements to produce different brightness variations.

如第1圖所示，其係一可與傳統調光器相連結的轉換電路，主要 包括：一定電流源A及一磁滯比較器CMP1等部份，其中該定電流源A係由相互對稱的P型晶體MP1、MP2、MP3、MP4及一N型晶體MN1組成的一串疊式電流鏡電路，另配合一運算放大器OPA、一電阻R所組成，於該運算放大器OPA的非反相輸入端可供輸入一電壓V1，該運算放大器OPA的反相輸入端係連接至N型晶體MN1的S極，並經由該電阻R接地，該P型晶體MP4的D極則連結一輸出端Pout，該輸出端Pout另連接一調光信號輸入端Adj_in。 As shown in Figure 1, it is a conversion circuit that can be connected to a conventional dimmer. The method includes: a constant current source A and a hysteresis comparator CMP1, wherein the constant current source A is a series of stacked P-type crystals MP1, MP2, MP3, MP4 and an N-type crystal MN1. The current mirror circuit is further composed of an operational amplifier OPA and a resistor R. A non-inverting input terminal of the operational amplifier OPA can be input with a voltage V1, and an inverting input terminal of the operational amplifier OPA is connected to the N-type crystal. The S pole of the MN1 is grounded via the resistor R. The D pole of the P-type crystal MP4 is coupled to an output terminal Pout, and the output terminal Pout is further connected to a dimming signal input terminal Adj_in.

該磁滯比較器CMP1係以非反相輸入端連接至該輸出端Pout(即調光信號輸入端Adj_in)，而磁滯比較器CMP1的反相輸入端則係可供輸入一鋸齒波。 The hysteresis comparator CMP1 is connected to the output terminal Pout (ie, the dimming signal input terminal Adj_in) with a non-inverting input terminal, and the inverting input terminal of the hysteresis comparator CMP1 is adapted to input a sawtooth wave.

請參第2圖所示，上述電路結構於實際應用時，若於該調光信號輸入端Adj_in連結一電阻型傳統調光器的輸出(可視為一可變電阻RT)，則該定電流源A可受控制而輸出一電流I=V1/R，該電流I流經可變電阻RT可產生一電壓VT=RT*V1/R，且該電壓VT係可以經由調整可變電阻RT的電阻值來改變；而該電壓VT可經由輸出端Pout被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的閘極驅動(Gate Driver簡稱GD)脈衝輸出，該GD輸出脈衝的duty cycle大小與VT成正比。 Referring to FIG. 2, in the actual application, if the dimming signal input terminal Adj_in is connected to the output of a resistive conventional dimmer (which can be regarded as a variable resistor RT), the constant current source is used. A can be controlled to output a current I=V1/R, and the current I flows through the variable resistor RT to generate a voltage VT=RT*V1/R, and the voltage VT can be adjusted by adjusting the resistance of the variable resistor RT. The voltage VT can be input to the hysteresis comparator CMP1 via the output terminal Pout, and compared with the sawtooth wave, and the hysteresis comparator CMP1 outputs a gate driver capable of adjusting the brightness of the light (Gate Driver Referred to as GD) pulse output, the duty cycle of the GD output pulse is proportional to VT.

請參第3圖所示，上述電路結構於實際應用時，若於該調光信號輸入端Adj_in連結一電壓型傳統調光器的輸出(可視為一直流電壓VA)，則該直流電壓VA可經由輸出端Pout被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的GD 脈衝輸出。 Referring to FIG. 3, in the actual application, if the dimming signal input terminal Adj_in is connected to the output of a voltage type conventional dimmer (which can be regarded as a DC voltage VA), the DC voltage VA can be The output terminal Pout is input to the hysteresis comparator CMP1, and compared with the sawtooth wave, and the hysteresis comparator CMP1 outputs a GD capable of adjusting the brightness of the light. Pulse output.

請參第4圖所示，上述電路結構於實際應用時，若於該調光信號輸入端Adj_in連結一PWM型傳統調光器的輸出，則於調光信號輸入端Adj_in與該輸出端Pout之間可增設一電阻Rf，另由該輸出端Pout經一電容C接地，利用該電阻Rf與電容C形成一RC振盪電路，使該該PWM信號可經該電容C充放電而於該輸出端Pout上產生一有效的直流電壓VA1，該電壓VA1可經由輸出端Pout被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的GD脈衝輸出。 Referring to FIG. 4, in the actual application, if the output of the PWM type traditional dimmer is connected to the input signal terminal Adj_in of the dimming signal input terminal, the dimming signal input terminal Adj_in and the output terminal Pout are A resistor Rf can be added, and the output terminal Pout is grounded via a capacitor C. The resistor Rf and the capacitor C form an RC oscillator circuit, so that the PWM signal can be charged and discharged through the capacitor C at the output terminal Pout. An effective DC voltage VA1 is generated, and the voltage VA1 can be input to the hysteresis comparator CMP1 via the output terminal Pout, and compared with the sawtooth wave, and the hysteresis comparator CMP1 outputs a GD capable of adjusting the brightness of the light. Pulse output.

然而，在實際應用時，通常會於上述調光信號輸入端Adj_in設置一個限流電阻，以保護該定電流源A及相關電路避免過高電壓或電壓極性反接而造成的損壞；因此，在正常使用狀況下(尤其是電阻式調光器，其由調光信號輸入端Adj_in輸入的調光信號電壓是由定電流源A輸出一電流在一可變電阻RT上所形成的)，任何電流流經該限流電阻必然會產生一個限流電阻電壓降，此限流電阻電壓降與調光信號輸入端Adj_in所導入或產生的電壓相加，會產生一電壓偏移(offset)，此種電壓偏移會影響後續的磁滯比較器CMP1所輸出的GD脈衝輸出(調光控制電壓)，因此必須予以消除，才能得到真正所需的調光信號電壓輸入。 However, in practical applications, a current limiting resistor is usually provided at the above-mentioned dimming signal input terminal Adj_in to protect the constant current source A and the related circuit from damage caused by excessive voltage or reverse polarity of the voltage; therefore, Under normal use conditions (especially a resistive dimmer, the dimming signal voltage input from the dimming signal input terminal Adj_in is formed by a constant current source A outputting a current on a variable resistor RT), any current Flowing through the current limiting resistor will inevitably generate a current limiting resistor voltage drop. The current limiting resistor voltage drop is added to the voltage introduced or generated by the dimming signal input terminal Adj_in, and a voltage offset is generated. The voltage offset affects the GD pulse output (dimming control voltage) output by the subsequent hysteresis comparator CMP1 and must be eliminated to obtain the true dimming signal voltage input required.

有鑑於習見的轉換電路於應用時有上述缺點，發明人乃針對該些缺點研究改進之道，終於有本發明產生。 In view of the above-mentioned shortcomings of the conventional conversion circuit, the inventors have studied the improvement of these disadvantages, and finally the present invention has been produced.

本發明之主要目的在於提供一種調光裝置保護機制的偏移電壓 消除電路結構，其於電路內部設有一個減法器，利用該減法器可消除電路保護機制的外加限流電阻所產生之電壓偏移(Offset)，以取得正確的調光信號電壓。 The main object of the present invention is to provide an offset voltage of a dimming device protection mechanism The circuit structure is eliminated, and a subtractor is disposed inside the circuit, and the subtractor can be used to eliminate the voltage offset generated by the external current limiting resistor of the circuit protection mechanism to obtain the correct dimming signal voltage.

本發明之另一目的在於提供一種調光裝置保護機制的偏移電壓消除電路結構，其可將主要電路封裝於單一積體電路中，以增進使用的獨立與便利性，且可有效減少整體的體積，提昇空間利用效率。 Another object of the present invention is to provide an offset voltage canceling circuit structure for a dimming device protection mechanism, which can package a main circuit in a single integrated circuit to improve the independence and convenience of use, and can effectively reduce the overall Volume, improve space utilization efficiency.

為使本發明的上述目的、功效及特徵可獲致更具體的瞭解，茲依下列附圖說明如下： In order to achieve a more specific understanding of the above objects, effects and features of the present invention, the following figures are illustrated as follows:

A‧‧‧定電流源 A‧‧‧ constant current source

Adj_in‧‧‧調光信號輸入端 Adj_in‧‧‧ dimming signal input

B‧‧‧減法器 B‧‧‧Subtractor

C‧‧‧電容 C‧‧‧ capacitor

CMP1‧‧‧磁滯比較器 CMP1‧‧‧ Hysteresis comparator

MN1‧‧‧N型晶體 MN1‧‧‧N type crystal

MP1、MP2、MP3、MP4‧‧‧P型晶體 MP1, MP2, MP3, MP4‧‧‧P crystal

Pout‧‧‧輸出端 Pout‧‧‧ output

RT‧‧‧可變電阻 RT‧‧‧Variable resistor

OPA‧‧‧運算放大器 OPA‧‧‧Operational Amplifier

OPA1‧‧‧第一運算放大器 OPA1‧‧‧First Operational Amplifier

OPA2‧‧‧第二運算放大器 OPA2‧‧‧Second Operational Amplifier

OPA3‧‧‧第三運算放大器 OPA3‧‧‧ Third Operational Amplifier

OPA4‧‧‧第四運算放大器 OPA4‧‧‧4th operational amplifier

R‧‧‧電阻 R‧‧‧resistance

R1‧‧‧第一電阻 R1‧‧‧first resistance

R2‧‧‧第二電阻 R2‧‧‧second resistance

R3‧‧‧第三電阻 R3‧‧‧ third resistor

R4‧‧‧第四電阻 R4‧‧‧fourth resistor

R5‧‧‧第五電阻 R5‧‧‧ fifth resistor

Rf‧‧‧電阻 Rf‧‧‧resistance

RL‧‧‧限流電阻 RL‧‧‧ current limiting resistor

Voffset‧‧‧偏移參考電壓 Voffset‧‧‧ offset reference voltage

第1圖係一可與傳統調光器相連結的LED調光轉換電路圖。 Figure 1 is a diagram of an LED dimming conversion circuit that can be coupled to a conventional dimmer.

第2圖係第1圖之轉換電路連結電阻式傳統調光器的主要電路圖。 Fig. 2 is a main circuit diagram of the conventional circuit breaker in which the conversion circuit of Fig. 1 is connected to the resistance type conventional dimmer.

第3圖係第1圖之轉換電路連結電壓式傳統調光器的主要電路圖。 Fig. 3 is a main circuit diagram of the conversion type circuit type conventional dimmer of the conversion circuit of Fig. 1.

第4圖係第1圖之轉換電路連結PWM式傳統調光器的主要電路圖。 Fig. 4 is a main circuit diagram of the conversion circuit of Fig. 1 connected to a PWM conventional dimmer.

第5圖係本發明之主要電路結構圖。 Fig. 5 is a view showing the main circuit configuration of the present invention.

第6圖係本發明連結電阻式傳統調光器的主要電路圖。 Fig. 6 is a main circuit diagram of a conventional connection type dimmer of the present invention.

第7圖係本發明連結電壓式傳統調光器的主要電路圖。 Fig. 7 is a main circuit diagram of a conventional voltage dimming device of the present invention.

第8圖係本發明連結PWM式傳統調光器的主要電路圖。 Fig. 8 is a main circuit diagram of a conventional PWM-connected dimmer according to the present invention.

請參第5圖所示，可知本發明之電路結構主要包括：一定電流源A、一減法器B及一磁滯比較器CMP1等部份，其中該定電流源A係由相互對稱的P型晶體MP1、MP2、MP3、MP4及一N型晶體MN1組成的一串 疊式電流鏡電路，另配合一第三運算放大器OPA3、一第五電阻R5所組成，於該第三運算放大器OPA3的非反相輸入端可供輸入一電壓V1，該第三運算放大器OPA3的反相輸入端係連接至N型晶體MN1的S極，並經由該第五電阻R5接地，該P型晶體MP4的D極則連結一輸出端Pout，該輸出端Pout另經由一限流電阻RL連接一調光信號輸入端Adj_in。 Referring to FIG. 5, it can be seen that the circuit structure of the present invention mainly includes: a constant current source A, a subtractor B, and a hysteresis comparator CMP1, wherein the constant current source A is symmetrically P-type. a string consisting of crystals MP1, MP2, MP3, MP4 and an N-type crystal MN1 The stacked current mirror circuit is further composed of a third operational amplifier OPA3 and a fifth resistor R5. The non-inverting input terminal of the third operational amplifier OPA3 can be input with a voltage V1, and the third operational amplifier OPA3 The inverting input terminal is connected to the S pole of the N-type crystal MN1, and is grounded via the fifth resistor R5. The D pole of the P-type crystal MP4 is coupled to an output terminal Pout, and the output terminal Pout is further connected via a current limiting resistor RL. Connect a dimming signal input terminal Adj_in.

該減法器B係由一第一運算放大器OPA1及電阻值相同的第一、二、三、四電阻R1、R2、R3、R4組成，該第二、三電阻R2、R3係相互串接，並以串接部位連結於第一運算放大器OPA1的非反相輸入端，該第二電阻R2的另一端係連通於該輸出端Pout，該第三電阻R3的另一端係接地，該第四、一電阻R4、R1係相互串接，並以串接部位連結於第一運算放大器OPA1的反相輸入端，該第四電阻R4的另一端係連結於該第一運算放大器OPA1的輸出端，該第一電阻R1的另一端係供導入一偏移參考電壓Voffset。 The subtractor B is composed of a first operational amplifier OPA1 and first, second, third and fourth resistors R1, R2, R3 and R4 having the same resistance value, and the second and third resistors R2 and R3 are connected in series with each other. The other end of the second resistor R2 is connected to the output terminal Pout, and the other end of the third resistor R3 is grounded. The fourth and the other ends are connected to the non-inverting input terminal of the first operational amplifier OPA1. The resistors R4 and R1 are connected in series with each other, and are connected in series to the inverting input end of the first operational amplifier OPA1. The other end of the fourth resistor R4 is coupled to the output end of the first operational amplifier OPA1. The other end of a resistor R1 is for introducing an offset reference voltage Voffset.

在一個可行的實施例中，在該第一電阻R1遠離第四電阻R4的一端可依需要連接一第四運算放大器OPA4，該第四運算放大器OPA4係以非反相輸入端導入該偏移參考電壓Voffset，而第四運算放大器OPA4的輸出端及反相輸入端係同時連接至該第一電阻R1；另於該定電流源A的輸出端Pout與減法器B的第二電阻R2之間設有一第二運算放大器OPA2，該第二運算放大器OPA2的非反相輸入端係連接該定電流源A的輸出端Pout，而第二運算放大器OPA2的反相輸入端係同時連接第二運算放大器OPA2的輸出端及第二電阻R2。 In a possible embodiment, a fourth operational amplifier OPA4 can be connected to the end of the first resistor R1 away from the fourth resistor R4, and the fourth operational amplifier OPA4 is introduced with the non-inverting input terminal. The voltage Voffset, and the output terminal and the inverting input terminal of the fourth operational amplifier OPA4 are simultaneously connected to the first resistor R1; and between the output terminal Pout of the constant current source A and the second resistor R2 of the subtractor B. There is a second operational amplifier OPA2, the non-inverting input terminal of the second operational amplifier OPA2 is connected to the output terminal Pout of the constant current source A, and the inverting input terminal of the second operational amplifier OPA2 is simultaneously connected to the second operational amplifier OPA2. The output terminal and the second resistor R2.

該磁滯比較器CMP1，具有一非反相輸入端及一反相輸入端，其 非反相輸入端係連接至第一運算放大器OPA1的輸出端，該反相輸入端則係供輸入一鋸齒波，該磁滯比較器CMP1另具有一輸出端。 The hysteresis comparator CMP1 has a non-inverting input terminal and an inverting input terminal. The non-inverting input is coupled to the output of the first operational amplifier OPA1, the inverting input is for inputting a sawtooth wave, and the hysteresis comparator CMP1 further has an output.

請參第6圖所示，可知當本發明連結一電阻式傳統調光器時，可視為於調光信號輸入端Adj_in連結一可變電阻RT，則該定電流源A可受控制輸出一穩定的電流I1(該電流I1係可為固定不可調整，亦可以透過該第五電阻R5設定)；該電流I1流經該限流電阻RL及可變電阻RT後，可分別產生一限流電阻電壓VL=I1*RL，及一可變電阻電壓VT1=I1*RT(該電壓VT1係可以經由調整可變電阻RT的電阻值來改變)，因此，由該輸出端Pout導出的電壓V2=VL+VT1，其中真正所需的調光信號電壓係為可變電阻電壓VT1，而該限流電阻電壓VL則為一偏移(Offset)電壓。 Referring to FIG. 6, it can be seen that when the present invention is coupled to a resistive conventional dimmer, it can be regarded as a variable resistance RT connected to the dimming signal input terminal Adj_in, and the constant current source A can be controlled to be stable. The current I1 (the current I1 can be fixed and unadjustable, and can also be set through the fifth resistor R5); after the current I1 flows through the current limiting resistor RL and the variable resistor RT, a current limiting resistor voltage can be generated respectively. VL=I1*RL, and a variable resistance voltage VT1=I1*RT (the voltage VT1 can be changed by adjusting the resistance value of the variable resistor RT), and therefore, the voltage V2=VL+ derived from the output terminal Pout VT1, wherein the voltage signal required to be truly required is the variable resistance voltage VT1, and the current limiting resistor voltage VL is an offset voltage.

假設該電壓V2輸入緩衝用的第二運算放大器OPA2並輸出一電壓V3(V2=V3)；而第四運算放大器OPA4係可輸出該偏移參考電壓Voffset；且該減法器B中第一運算放大器OPA1的反相及非反相輸入端係分別輸入一電壓V5及一電壓V4，而第一運算放大器OPA1的輸出端具有一輸出電壓Vout；在該第一、二、四運算放大器OPA2、OPA4皆為理想運算放大器的條件下，則有Vout=[(1+R4/R1)*V4]-(R4/R1)*Voffset=2V4-Voffset，且V4=[R3/(R2+R3)]*V3=0.5*V3，所以Vout=V3-Voffset又因為V2=V3=VL+VT1，所以，Vout=VL+VT1-Voffset若令該Voffset=VL，則可使Vout=VT1 It is assumed that the voltage V2 is input to the second operational amplifier OPA2 for buffering and outputs a voltage V3 (V2=V3); and the fourth operational amplifier OPA4 can output the offset reference voltage Voffset; and the first operational amplifier of the subtractor B The inverting and non-inverting input terminals of the OPA1 respectively input a voltage V5 and a voltage V4, and the output terminal of the first operational amplifier OPA1 has an output voltage Vout; in the first, second and fourth operational amplifiers OPA2 and OPA4 Under the condition of an ideal operational amplifier, there is Vout=[(1+R4/R1)*V4]-(R4/R1)*Voffset=2V4-Voffset, and V4=[R3/(R2+R3)]*V3 =0.5*V3, so Vout=V3-Voffset and V2=V3=VL+VT1, so Vout=VL+VT1-Voffset, if Voffset=VL, Vout=VT1

因此，若在第四運算放大器OPA4的非反相輸入端導入一相等於該限流電阻電壓VL(即I1*RL)大小的偏移參考電壓Voffset，則可有 效消除該偏移(Offset)電壓(由於該電流I1及限流電阻RL皆為已知，因此得知該限流電阻電壓VL的數值係為簡單可行的)，使得最終的輸出電壓Vout=由調光信號輸入端Adj_in所輸入的調光信號電壓VT1；然後，該輸出電壓Vout可被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的GD脈衝輸出，該GD脈衝輸出的duty cycle大小與VT1成正比。 Therefore, if an offset reference voltage Voffset equal to the magnitude of the current limiting resistor voltage VL (ie, I1*RL) is introduced at the non-inverting input terminal of the fourth operational amplifier OPA4, there may be Effectively eliminate the offset (offset) voltage (since the current I1 and the current limiting resistor RL are known, it is known that the value of the current limiting resistor voltage VL is simple and feasible), so that the final output voltage Vout = The dimming signal voltage VT1 input by the dimming signal input terminal Adj_in; then, the output voltage Vout can be input to the hysteresis comparator CMP1, and compared with the sawtooth wave, and then outputted by the hysteresis comparator CMP1 Adjusting the GD pulse output of the light intensity, the duty cycle of the GD pulse output is proportional to VT1.

請參第7圖所示，可知當本發明連結一電壓式傳統調光器時，可視為於調光信號輸入端Adj_in導入一直流電壓VA2；當電路導通時，會有一電流通過限流電阻RL以產生一限流電阻電壓VL1，該限流電阻電壓VL1即為偏移(Offset)電壓。 Referring to FIG. 7, it can be seen that when the present invention is connected to a voltage type conventional dimmer, it can be regarded as introducing a DC voltage VA2 to the dimming signal input terminal Adj_in; when the circuit is turned on, a current is passed through the current limiting resistor RL. To generate a current limiting resistor voltage VL1, the current limiting resistor voltage VL1 is an offset voltage.

因此，可藉由相同的方式，若在第四運算放大器OPA4的非反相輸入端導入一相等於該限流電阻電壓VL1的偏移參考電壓Voffset，則可有效消除該偏移(Offset)電壓(即該限流電阻電壓VL1)，使得最終的輸出電壓Vout=由調光信號輸入端Adj_in所輸入的調光信號電壓VA2；然後，該輸出電壓Vout可被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的GD脈衝輸出。 Therefore, in the same manner, if an offset reference voltage Voffset equal to the current limiting resistor voltage VL1 is introduced at the non-inverting input terminal of the fourth operational amplifier OPA4, the offset voltage can be effectively eliminated. (ie, the current limiting resistor voltage VL1), such that the final output voltage Vout = the dimming signal voltage VA2 input by the dimming signal input terminal Adj_in; then, the output voltage Vout can be input to the hysteresis comparator CMP1, and In comparison with the sawtooth wave, a hysteresis comparator CMP1 outputs a GD pulse output that adjusts the brightness of the light.

請參第8圖所示，可知當本發明連結一PWM式傳統調光器時，則於該輸出端Pout可另經由一電容C接地，利用該限流電阻RL與電容C形成一RC振盪電路，使該PWM信號可經該電容C充放電而於該輸出端Pout上產生一有效的直流電壓VA3，當電路導通時，電流通過限流電阻RL即產生一限流電阻電壓VL3，該限流電阻電壓VL3即為偏移(Offset)電壓。 Referring to FIG. 8, it can be seen that when the present invention is coupled to a PWM conventional dimmer, the output terminal Pout can be grounded via a capacitor C, and the current limiting resistor RL and the capacitor C form an RC oscillator circuit. The PWM signal can be charged and discharged through the capacitor C to generate an effective DC voltage VA3 at the output terminal Pout. When the circuit is turned on, the current is passed through the current limiting resistor RL to generate a current limiting resistor voltage VL3. The resistance voltage VL3 is the offset voltage.

因此，可藉由相同的方式，若在第四運算放大器OPA4的非反相輸入端導入一相等於該限流電阻電壓VL3的偏移參考電壓Voffset，則可有效消除該偏移(Offset)電壓(即該限流電阻電壓VL3)，使得最終輸出的電壓Vout=由調光信號輸入端Adj_in所輸入的調光信號電壓VA3；然後，該輸出電壓Vout可被輸入至磁滯比較器CMP1，並與該鋸齒波相比較，進而由該磁滯比較器CMP1輸出一可調整光線亮度的GD脈衝輸出。 Therefore, in the same manner, if an offset reference voltage Voffset equal to the current limiting resistor voltage VL3 is introduced at the non-inverting input terminal of the fourth operational amplifier OPA4, the offset voltage can be effectively eliminated. (ie, the current limiting resistor voltage VL3), such that the final output voltage Vout = the dimming signal voltage VA3 input by the dimming signal input terminal Adj_in; then, the output voltage Vout can be input to the hysteresis comparator CMP1, and In comparison with the sawtooth wave, a hysteresis comparator CMP1 outputs a GD pulse output that adjusts the brightness of the light.

綜合以上所述，本發明調光裝置保護機制的偏移電壓消除電路結構確可達成有效消除外部限流電阻所產生電壓差(偏移)之功效，實為一具新穎性及進步性之發明，爰依法提出申請發明專利；惟上述說明之內容，僅為本發明之較佳實施例說明，舉凡依本發明之技術手段與範疇所延伸之變化、修飾、改變或等效置換者，亦皆應落入本發明之專利申請範圍內。 In summary, the offset voltage canceling circuit structure of the dimming device protection mechanism of the present invention can achieve the effect of effectively eliminating the voltage difference (offset) generated by the external current limiting resistor, and is a novel and progressive invention. , 爰 提出 提出 申请 ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; ; It is intended to fall within the scope of the patent application of the present invention.

A‧‧‧定電流源 A‧‧‧ constant current source

Adj_in‧‧‧調光信號輸入端 Adj_in‧‧‧ dimming signal input

B‧‧‧減法器 B‧‧‧Subtractor

CMP1‧‧‧磁滯比較器 CMP1‧‧‧ Hysteresis comparator

MN1‧‧‧N型晶體 MN1‧‧‧N type crystal

MP1、MP2、MP3、MP4‧‧‧P型晶體 MP1, MP2, MP3, MP4‧‧‧P crystal

Pout‧‧‧輸出端 Pout‧‧‧ output

OPA1‧‧‧第一運算放大器 OPA1‧‧‧First Operational Amplifier

OPA2‧‧‧第二運算放大器 OPA2‧‧‧Second Operational Amplifier

OPA3‧‧‧第三運算放大器 OPA3‧‧‧ Third Operational Amplifier

OPA4‧‧‧第四運算放大器 OPA4‧‧‧4th operational amplifier

R1‧‧‧第一電阻 R1‧‧‧first resistance

R2‧‧‧第二電阻 R2‧‧‧second resistance

R3‧‧‧第三電阻 R3‧‧‧ third resistor

R4‧‧‧第四電阻 R4‧‧‧fourth resistor

R5‧‧‧第五電阻 R5‧‧‧ fifth resistor

RL‧‧‧限流電阻 RL‧‧‧ current limiting resistor

Voffset‧‧‧偏移參考電壓 Voffset‧‧‧ offset reference voltage

Claims (4)

一種調光裝置保護機制的偏移電壓消除電路結構，其至少包括：一定電流源，具有一能輸出穩定電流的輸出端，該輸出端經由一限流電阻連接一調光信號輸入端，該調光信號輸入端係與一外部傳統的調光器輸出端相連結；一減法器，係由一第一運算放大器及相同的第一、二、三、四電阻所組成，該第二、三電阻係相互串接，並以串接部位連結於該第一運算放大器的非反相輸入端，該第二電阻的另一端係連通於該輸出端，該第三電阻的另一端係接地，該第四、一電阻係相互串接，並以串接部位連結於該第一運算放大器的反相輸入端，該第四電阻的另一端係連結於該第一運算放大器的輸出端，該第一電阻的另一端係供導入一偏移參考電壓；一磁滯比較器，具有一非反相輸入端及一反相輸入端，該非反相輸入端係連接至第一運算放大器的輸出端，該反相輸入端則係供輸入一鋸齒波，而該磁滯比較器另具有一能輸出閘極驅動脈衝信號之輸出端。 An offset voltage canceling circuit structure for a dimming device protection mechanism, comprising at least: a constant current source having an output end capable of outputting a stable current, wherein the output end is connected to a dimming signal input end via a current limiting resistor, the adjusting The optical signal input end is coupled to an external conventional dimmer output; a subtractor is composed of a first operational amplifier and the same first, second, third, and fourth resistors, the second and third resistors Connected to each other in series, and connected to the non-inverting input end of the first operational amplifier by a serial connection portion, the other end of the second resistor is connected to the output end, and the other end of the third resistor is grounded. 4. The resistors are connected in series with each other, and are connected to the inverting input end of the first operational amplifier by a series connection portion, and the other end of the fourth resistor is coupled to the output end of the first operational amplifier, the first resistor The other end is for introducing an offset reference voltage; a hysteresis comparator having a non-inverting input and an inverting input connected to the output of the first operational amplifier, the inverse phase The end of the line for inputting a sawtooth wave, and the hysteresis comparator has a further enable output pulse gate drive output signals. 如申請專利範圍第1項所述之調光裝置保護機制的偏移電壓消除電路結構，其中該定電流源係由四個P型晶體分成二組相互對稱串接，其中一組P型晶體分再串接一N型晶體組成的一串疊式電流鏡電路，且該N型晶體另連結一運算放大器及一電阻所組成，該運算放大器的反相輸入端係經由該電阻接地，而另一組P型晶體則連結一輸出端。 The offset voltage canceling circuit structure of the dimming device protection mechanism according to claim 1, wherein the constant current source is divided into two groups by four P-type crystals, and one set of P-type crystals is divided into two groups. a series of stacked current mirror circuits consisting of an N-type crystal is further connected, and the N-type crystal is further connected with an operational amplifier and a resistor. The inverting input terminal of the operational amplifier is grounded via the resistor, and the other The group P-type crystal is connected to an output end. 如申請專利範圍第1項所述之調光裝置保護機制的偏移電壓消除電路結構，其中該第一電阻於遠離第四電阻的一端連接一第四運算放大器，該第四運算放大器係以非反相輸入端導入該偏移參考電壓，而第四運算放 大器的輸出端及反相輸入端係同時連接至該第一電阻。 The offset voltage canceling circuit structure of the dimming device protection mechanism of claim 1, wherein the first resistor is connected to a fourth operational amplifier at an end remote from the fourth resistor, and the fourth operational amplifier is non- The inverting input terminal introduces the offset reference voltage, and the fourth operational amplifier The output of the amplifier and the inverting input are simultaneously connected to the first resistor. 如申請專利範圍第1項所述之調光裝置保護機制的偏移電壓消除電路結構，其中該定電流源的輸出端與減法器的第二電阻之間設有一第二運算放大器，該第二運算放大器非反相輸入端係連接該定電流源的輸出端，而第二運算放大器的反相輸入端係同時連接第二運算放大器的輸出端及第二電阻。 The offset voltage canceling circuit structure of the dimming device protection mechanism of claim 1, wherein a second operational amplifier is disposed between the output end of the constant current source and the second resistor of the subtractor, the second The non-inverting input terminal of the operational amplifier is connected to the output end of the constant current source, and the inverting input end of the second operational amplifier is simultaneously connected to the output end of the second operational amplifier and the second resistor.
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