TWI524272B - Microprocessor and dynamically reconfigurable method and detection method, and computer program product thereof - Google Patents

Description

微處理器及其動態重設方法及偵測方法、及電腦程式產品 Microprocessor and its dynamic reset method and detection method, and computer program product

本發明係關於一種微處理器，特別關係一種可動態重設的微處理器及用於微處理器之動態重設方法及偵測方法。 The present invention relates to a microprocessor, and more particularly to a dynamically resettable microprocessor and a dynamic reset method and method for the same.

微處理器之設計者會花費許多努力在效能分析上在依據先前幾代微處理器為基礎並利用特徵及效能目標之基準集合來架構一微處理器時，設計者會執行軟體應用程式中與其顧客最相關之代表性樣本，並擷取軟體應用程式的指令執行記錄。設計者接著使用所擷取之記錄以模擬正在設計微處理器的運作。為了在所有目標軟體應用程式中達成最高的聚集效能(aggregate performance)，設計者可設定被模擬微處理器之不同特性。一般而言，某個一目標應用程式之特性對一特別組態設定是需要的，但其他應用程式則不需要。在這些例子中，設計者可決定那個軟體應用程式較為重要，或是尋找其他方法來嘗試平衡多個軟體應用程式的需求。上述選擇通常無法達到最佳化目標軟體應用程式效能之目的，因為在嘗試最佳化其中一個軟體應用程式的效能時也會損害另一個軟體應用程式之效能。 The designer of the microprocessor will spend a lot of effort on performance analysis to build a microprocessor based on a set of benchmarks based on previous generations of microprocessors and utilizing features and performance targets. The designer will execute the software application and its customers. The most relevant representative sample, and capture the instruction execution record of the software application. The designer then uses the captured records to simulate the operation of the microprocessor being designed. To achieve the highest aggregate performance across all target software applications, designers can set different characteristics of the simulated microprocessor. In general, the characteristics of a particular target application are needed for a particular configuration setting, but not for other applications. In these examples, the designer can decide which software application is important, or look for other ways to try to balance the needs of multiple software applications. These choices are often not designed to optimize the performance of the target software application, as trying to optimize the performance of one of the software applications can also compromise the performance of another software application.

當辨識出組態設定之最佳平均集合時，舉例來說，微處理器設計者可將其寫為VHDL或Verilog程式碼。其他微處理器可藉由包含在微處理器中的一組熔絲來修改其硬編碼設定，這些熔絲可在微處理器製造時選擇性地熔斷，藉以改變其硬編碼值(hardcoded values)之組態設定。上述方式可讓微處理器在製造時有限度的最佳化，且或許可對在微處理器設計後所發表的新軟體應用程式或是作業系統所需的系統組態做回應。 然而，此解決方式仍無法達到使目標軟體應用程式的效能最佳化的目的，因其需要設計者/製造者選擇用於最佳化某些應用程式但且同時犧牲其他應用程式效能的組態設定、或是選擇通常不會對任何應用程式進行最佳化的平衡組態設定。 When the best average set of configuration settings is identified, for example, the microprocessor designer can write it as a VHDL or Verilog code. Other microprocessors can modify their hardcoded settings by a set of fuses included in the microprocessor that can be selectively blown during microprocessor manufacture to change hardcoded values. Configuration settings. This approach allows the microprocessor to be optimized for a limited degree of manufacturing and may be responsive to new software applications or system configurations required by the operating system after the microprocessor is designed. However, this solution still does not achieve the goal of optimizing the performance of the target software application because it requires the designer/manufacturer to choose a configuration that optimizes some applications while sacrificing the performance of other applications. Set or select a balanced configuration setting that does not usually optimize for any application.

為了陳述此問題，於2008年7月10日申請之美國專利申請號12/170,591已揭示一微處理器可基於目前正在運作之應用程式的一裝置驅動器以動態設定至多個操作模式，該美國專利已經公告為第8,566,565號，且整份專利提供於此作為參考之用。然而，更佳的效能最佳化效果之需求依然存在。 In order to clarify this problem, U.S. Patent Application Serial No. 12/170,591, filed on Jul. 10, 2008, the disclosure of which is incorporated herein to It is hereby incorporated by reference. However, the need for better performance optimization still exists.

本發明係提供一種微處理器，包括：複數個動態重設功能單元；一指紋；一指紋單元，其中當該複數個動態重設功能單元依據一第一組態設定以執行複數個指令時，該指紋單元係依據一數學運算以累計關於該複數個指令之一指令資訊，藉以產生一結果；以及一重設單元，用以依據一第二組態設定重設該複數個動態重設功能單元以執行該複數個指令，藉以回應該結果與該指紋相符。 The present invention provides a microprocessor comprising: a plurality of dynamic reset function units; a fingerprint; a fingerprint unit, wherein when the plurality of dynamic reset function units are configured according to a first configuration to execute a plurality of instructions, The fingerprint unit is configured to accumulate information about one of the plurality of instructions to generate a result, and a reset unit to reset the plurality of dynamic reset function units according to a second configuration setting. Execute the plurality of instructions, so that the result is consistent with the fingerprint.

本發明更提供一種用於一微處理器的動態重設方法，該微處理器包括一指紋及複數個動態重設功能單元，該方法包括：當該複數個動態重設功能單元依據一第一組態設定執行複數個指令時，依據一數學運算累計該複數個指令之一指令資訊以產生一結果；以及依據回應表示該結果與一指紋相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 The present invention further provides a dynamic reset method for a microprocessor, the microprocessor comprising a fingerprint and a plurality of dynamic reset function units, the method comprising: when the plurality of dynamic reset function units are based on a first When the configuration setting executes a plurality of instructions, the information of one of the plurality of instructions is accumulated according to a mathematical operation to generate a result; and the second configuration setting is performed according to the response indicating that the result matches a fingerprint to reset the plurality of The functional unit is dynamically reset to execute the plurality of instructions.

本發明更提供一種微處理器，包括：複數個動態重設功能單元；一靜態計數值；一指令計數器，其中當該複數個動態重設功能單元依據一第一組態設定以執行複數個指令時，該指令計數器係依據一準則計數該複數個指令以產生一動態計數值；以及一重設單元，用以依據回應該動態計數值與該靜態計數值相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 The invention further provides a microprocessor comprising: a plurality of dynamic reset function units; a static count value; an instruction counter, wherein when the plurality of dynamic reset function units are configured according to a first configuration to execute a plurality of instructions The instruction counter counts the plurality of instructions to generate a dynamic count value according to a criterion; and a reset unit for resetting according to the second configuration setting corresponding to the dynamic count value and the static count value The plurality of dynamic reset functional units execute the plurality of instructions.

本發明更提供一種用於一微處理器的動態重設方法，該微處理器包括一靜態計數值及複數個動態重設功能單元，該方法包括：當該複數個動態重設功能單元依據一第一組態設定執行複數個指令時，依據一準則以計數該複數個指令以產生一動態計數值；以及依據回應該動態計數值與該靜態計數值相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 The present invention further provides a dynamic reset method for a microprocessor, the microprocessor comprising a static count value and a plurality of dynamic reset function units, the method comprising: when the plurality of dynamic reset function units are based on a When the first configuration setting executes a plurality of instructions, the plurality of instructions are counted according to a criterion to generate a dynamic count value; and the second configuration setting is reset according to the response of the dynamic count value to the static count value. The plurality of dynamic reset functional units execute the plurality of instructions.

本發明提供一種微處理器，包括：一指令快取；一硬體狀態機，用以偵測在由該指令快取所擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之連續序列， 其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，該微處理器暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。一種微處理器，包括：一指令快取；一硬體狀態機，用以偵測在由該指令快取擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之一連續序列，其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，該微處理器係用以暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 The present invention provides a microprocessor comprising: an instruction cache; a hardware state machine for detecting N of an unmodified data stream of one of the instruction byte groups captured by the instruction cache a continuous sequence of no action (NOP) instructions, Where N is greater than 1, and wherein the unmodified data stream means that no additional instructions are received when the hardware state machine detects the contiguous sequence of N non-action commands and the time at which the instruction byte is captured. Inserting the unmodified data stream; and wherein when the contiguous sequence of N NOP instructions is detected, the microprocessor suspends fetching and executing instructions by the instruction cache, including a plurality of non-action instructions. A microprocessor includes: an instruction cache; a hardware state machine for detecting N inactions in an unmodified data stream of one of the instruction bytes of the instruction cache being fetched (NOP a continuous sequence of instructions, wherein N is greater than 1, and wherein the unmodified data stream is that the hardware state machine detects the contiguous sequence of N non-action commands and the instruction byte is captured No additional instructions are inserted into the unmodified data stream in time; and wherein when the consecutive sequence of N NOP instructions is detected, the microprocessor is configured to suspend the instruction fetching and executing instructions. It includes a plurality of non-action instructions.

本發明更提供一種用於一微處理器的偵測方法，該微處理器包括一指令快取及一硬體狀態機，該方法包括：利用該硬體狀態機偵測在由該指令快取所擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之連續序列，其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 The invention further provides a method for detecting a microprocessor, the microprocessor comprising an instruction cache and a hardware state machine, the method comprising: detecting, by the hardware state machine, by the instruction cache A sequential sequence of N non-action (NOP) instructions in an unmodified data stream of one of the instruction byte groups, wherein N is greater than 1, and wherein the unmodified data stream is in the hardware state machine detect Detecting the contiguous sequence of N non-action instructions and no additional instructions inserted into the unmodified data stream at the time the instruction byte is retrieved; and wherein the continuation of N NOP instructions is detected In the sequence, the instruction is cached and executed by the instruction cache, which includes a plurality of non-action instructions.

本發明更提供一種電腦程式產品，編碼於至少一電腦可讀媒體中以供一運算裝置使用，該運算裝置包括一微處 理器，該電腦程式產品包括：一第一程式碼，用以指出該微處理器之一指令快取；以及一第二程式嗎，用以指出該微處理器之一硬體狀態機，用以偵測在由該指令快取所擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之連續序列其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，該微處理器暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 The invention further provides a computer program product encoded in at least one computer readable medium for use by an computing device, the computing device comprising a micro The computer program product includes: a first code for indicating a command cache of the microprocessor; and a second program for indicating a hardware state machine of the microprocessor, Detecting a contiguous sequence of N no-action (NOP) instructions in an unmodified data stream of one of the instruction bytes retrieved by the instruction cache, wherein N is greater than 1, and wherein the unmodified data stream is Means that no additional instructions are inserted into the unmodified data stream when the hardware state machine detects the continuous sequence of N non-action commands and the instruction byte is captured; and wherein Upon the contiguous sequence of N NOP instructions, the microprocessor suspends fetching and executing instructions by the instruction cache, which includes a plurality of non-action instructions.

100‧‧‧微處理器 100‧‧‧Microprocessor

102‧‧‧指紋單元 102‧‧‧Finger unit

104‧‧‧重設單元 104‧‧‧Reset unit

124‧‧‧組態暫存器 124‧‧‧Configuration register

126‧‧‧指紋設定準則表 126‧‧‧Finger setting criteria table

128‧‧‧動態重設功能單元 128‧‧‧Dynamic reset function unit

132‧‧‧指紋程式化暫存器 132‧‧‧Finger stylized register

142‧‧‧指令資訊 142‧‧‧Directive Information

144‧‧‧控制信號 144‧‧‧Control signal

202‧‧‧指令指標 202‧‧‧ directive indicators

204‧‧‧位移欄位 204‧‧‧Displacement field

206‧‧‧運算碼欄位 206‧‧‧Operator field

208‧‧‧ModRM欄位 208‧‧‧ModRM field

212‧‧‧SIB欄位 212‧‧‧SIB field

214‧‧‧字首 214‧‧‧ prefix

222‧‧‧數學運算電路 222‧‧‧Mathematical circuit

224‧‧‧結果(動態指紋) 224‧‧‧ Results (dynamic fingerprint)

226‧‧‧比較器 226‧‧‧ comparator

228‧‧‧相符信號 228‧‧‧ coincidence signal

232‧‧‧靜態指紋 232‧‧‧static fingerprint

234‧‧‧控制邏輯 234‧‧‧Control logic

238‧‧‧指紋產生準則 238‧‧‧ Fingerprint generation guidelines

242‧‧‧衰減計數器 242‧‧‧Attenuation counter

244‧‧‧串接信號 244‧‧‧Serial signal

822‧‧‧指令計數器 822‧‧‧ instruction counter

826‧‧‧比較器 826‧‧‧ comparator

832‧‧‧靜態指令計數值 832‧‧‧Static instruction count value

302-314、402-412、514-522、602-608、702-708、902-912、1002-1008‧‧‧方塊 302-314, 402-412, 514-522, 602-608, 702-708, 902-912, 1002-1008‧‧‧

第1圖顯示一微處理器100之功能方塊圖。 Figure 1 shows a functional block diagram of a microprocessor 100.

第2圖顯示依據本發明一實施例中之指紋單元102的詳細功能方塊圖。 Figure 2 shows a detailed functional block diagram of fingerprint unit 102 in accordance with an embodiment of the present invention.

第3圖顯示依據本發明一實施例中用以產生已知目標程式部分及其有關的靜態指紋、組態設定及指紋產生準則的資料庫的流程圖。 Figure 3 is a flow diagram showing a database for generating known target program portions and their associated static fingerprints, configuration settings, and fingerprint generation criteria in accordance with an embodiment of the present invention.

第4圖顯示依據本發明一實施例中微處理器100動態自我重新配置的運作流程圖。 Figure 4 is a flow chart showing the operation of the microprocessor 100 in dynamic self-reconfiguration in accordance with an embodiment of the present invention.

第5圖顯示依據本發明一實施例中微處理器110動態自我重新配置之更進一步運作流程圖。 Figure 5 is a flow chart showing further operation of the microprocessor 110 dynamically self-reconfiguring in accordance with an embodiment of the present invention.

第6圖顯示依據本發明又一實施例中微處理器100動態自我重新配置的運作流程圖。 Figure 6 is a flow chart showing the operation of the microprocessor 100 in dynamic self-reconfiguration in accordance with yet another embodiment of the present invention.

第7圖顯示依據本發明又一實施例中微處理器100動態自我 重新配置的運作流程圖。 Figure 7 is a diagram showing the dynamic self of the microprocessor 100 in accordance with still another embodiment of the present invention. Reconfigured operational flow chart.

第8圖顯示依據本發明另一實施例中第1圖之指紋單元102的方塊圖。 Figure 8 is a block diagram showing the fingerprint unit 102 of Figure 1 in accordance with another embodiment of the present invention.

第9圖顯示依據本發明一實施例中之微處理器100動態自我重新配置之運作流程圖。 Figure 9 is a flow chart showing the operation of the microprocessor 100 in dynamic self-reconfiguration in accordance with an embodiment of the present invention.

第10圖顯示依據本發明一實施例中微處理器100偵測NOP滑動之運作流程圖。 Figure 10 is a flow chart showing the operation of the microprocessor 100 to detect NOP slip in accordance with an embodiment of the present invention.

為使本發明之上述目的、特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式，作詳細說明如下。 The above described objects, features and advantages of the present invention will become more apparent from the aspects of the appended claims.

詞彙(Glossary)Glossary

「指紋(fingerprint)」為可辨識一程式指令序列的一數值，指紋值之產生係依據一數學運算而得到之關於指令序列的資訊累積結果。該資訊可包括，舉例來說，該指令之指令指標值的多個組合(例如指令的位址)、指令的操作碼(opcode)、指令的位移(displacement)、指令的字首(prefix)、及/或指令的部分位址模式，例如是x86架構指令(或是其一部分的)的SIB或modRM位元。累積指令資訊之數學運算，舉例來說，可包括連續地計算與序列中各指令有關的循環冗餘檢查碼(cyclic redundancy code)。此外，該數學運算亦可包括在一多輸入位移暫存器(multiple input shift register)中使用最大計數多項式來累計指令資訊。再者，該數學運算更可包括依據一雜湊函式(hash function)，例如是一可變長度資料雜湊函式以累計指令資訊。當然，該數學運算更可包括對一佇列，例如固定長度佇 列(fixed-length queue)，之連續指令資訊進行累計。 A "fingerprint" is a value that identifies a sequence of program instructions. The generation of a fingerprint value is based on a mathematical operation to obtain an accumulated result of the information about the sequence of instructions. The information may include, for example, multiple combinations of instruction index values of the instruction (eg, an address of the instruction), an opcode of the instruction, a displacement of the instruction, a prefix of the instruction, And/or a partial address pattern of the instruction, such as an SIB or modRM bit of an x86 architecture instruction (or a portion thereof). The mathematical operations of the accumulated instruction information, for example, may include continuously calculating a cyclic redundancy code associated with each instruction in the sequence. In addition, the mathematical operation may also include using a maximum count polynomial to accumulate instruction information in a multiple input shift register. Furthermore, the mathematical operation may further comprise accumulating instruction information according to a hash function, such as a variable length data hash function. Of course, the mathematical operation can include a pair of columns, such as a fixed length. A fixed-length queue, in which continuous instruction information is accumulated.

依據兩個不同的產生時間點，指紋值可分為兩種類型：靜態及動態。當微處理器執行一程式之指令時，微處理器之指紋單元產生一動態指紋，而靜態指紋則由工程師所預先產生。靜態指紋會提供至指紋單元，使得指紋單元可對其產生的動態指紋及其所接收的靜態指紋進行比較。指紋單元更可接收指紋產生準則(fingerprint generation criteria)，例如起始條件、停止條件、及重置條件，其可控制指紋單元累計指令資訊以產生動態指紋。指紋產生準則亦可指定為指令資訊之部分組合以讓指紋單元進行累計以產生動態指紋。 According to two different generation time points, the fingerprint values can be divided into two types: static and dynamic. When the microprocessor executes a program command, the fingerprint unit of the microprocessor generates a dynamic fingerprint, and the static fingerprint is pre-generated by the engineer. The static fingerprint is provided to the fingerprint unit so that the fingerprint unit can compare the dynamic fingerprint it produces with the static fingerprint it receives. The fingerprint unit can further receive fingerprint generation criteria, such as a start condition, a stop condition, and a reset condition, which can control the fingerprint unit to accumulate instruction information to generate a dynamic fingerprint. The fingerprint generation criteria can also be specified as a partial combination of instruction information to allow the fingerprint unit to accumulate to produce a dynamic fingerprint.

當各指令執行後(以擷取者為佳)，指紋單元接收指令資訊。若指紋單元偵測到一起始條件，其會依據數學運算來累計指令資訊而產生結果，其即為動態指紋。當各指令執行後，指紋單元會持續接收指令資訊，並依據數學運算以累計指令資訊而產生結果，直到指紋單元偵測到一停止條件或一重置條件為止。在重置條件的一例子中，指紋單元清除累計狀態，並依據數學運算再開始累計指令資訊以產生結果。更適宜而言，每當指紋單元產生介於一起始條件及一停止條件的一新結果，其會比較該結果(動態指紋)與該靜態指紋，並在它們相符時指出兩者相符。起始條件之例子包括啟動分支的指令、返回指令、自中斷指令的返回、陷阱情況、例外情況、系統呼叫或返回指令(例如x86架構中的SYSENTER或SYSEXIT指令)、子程序呼叫、功能單元控制指令(例如x86架構中的FINIT指令)、或是來自另一指紋單元之表示符，表示其已偵測到指紋相符。停止條件之 例子包括類似於起始條件的各種情況，且亦可包括指紋相符、以及在一起始條件後所執行之指令計數值到期(expiration)。重置條件的例子包括類似於起始條件的各種情況，且亦可包括一硬體重置及非不動作指令的一指令。 After each instruction is executed (preferably as a picker), the fingerprint unit receives the instruction information. If the fingerprint unit detects a start condition, it will accumulate the instruction information according to the mathematical operation to produce a result, which is a dynamic fingerprint. After each instruction is executed, the fingerprint unit continuously receives the instruction information, and generates a result according to the mathematical operation to accumulate the instruction information until the fingerprint unit detects a stop condition or a reset condition. In an example of a reset condition, the fingerprint unit clears the accumulated state and resumes accumulating instruction information based on mathematical operations to produce a result. More suitably, each time the fingerprint unit produces a new result between a start condition and a stop condition, it compares the result (dynamic fingerprint) with the static fingerprint and, when they match, indicates that the two match. Examples of start conditions include instructions to start a branch, return instructions, return from interrupt instructions, trap conditions, exceptions, system calls or return instructions (such as SYSENTER or SYSEXIT instructions in x86 architecture), subroutine calls, functional unit control An instruction (such as a FINIT instruction in an x86 architecture) or an indicator from another fingerprint unit indicates that it has detected a fingerprint match. Stop condition Examples include various conditions similar to the starting conditions, and may also include fingerprint matching, and expiration of instruction count values executed after the start condition. Examples of reset conditions include various conditions similar to the start condition, and may also include an instruction for a hardware reset and a non-action command.

產生靜態指紋的流程揭露於下述實施例。工程師對可用來增進效能、降低功耗及/或修正錯誤的程式部分之目標集合進行辨識。接著，對於各目標程式部分，工程師會在程式執行時辨識指令序列(往後稱之為“指令串(strand)”)，並表示該目標程式部分正在執行或是即將執行。工程師接著在該指令串，亦即指令資訊，之上依據數學運算(與在指紋單元中用於產生動態指紋之數學運算相同)進行累計以產生一結果。當該程式部分相關於靜態指紋時，該結果儲存於一資料庫或一檔案中。產生靜態指紋可藉由多種方式來運作。舉例來說，工程師可提供與該指令串相關的指紋收集準則至一軟體程式，例如是微處理器之功能模擬器，接著於該功能模擬器上執行該程式，且在其遇到停止條件時，指示該功能模擬器輸出該功能模擬器之指紋引擎部分的結果，其中該結果用於該指令串之靜態指紋。 另一方面，工程師可使用微處理器本身以執行類似的運算，在一實驗室環境中，該微處理器可特別設定於偵錯/測試設定以輸出靜態指紋，及/或該微處理器連接至測試設備的一部分，其用以提供測試向量(test vectors)至該微處理器並接收測試結果。在工程師已收集目標靜態指紋之後，工程師可創建一表單，其係將靜態指紋與下列條件進行聯結，例如(1)可最佳化微處理器之功能單元的組態設定，其用於處理與指令串相關的程式部 分；及(2)指紋收集準則。 The process of generating a static fingerprint is disclosed in the following embodiments. Engineers identify target sets of programs that can be used to improve performance, reduce power consumption, and/or correct errors. Then, for each target program part, the engineer recognizes the sequence of instructions (hereinafter referred to as "strand") when the program is executed, and indicates that the target program part is being executed or is about to be executed. The engineer then accumulates the instruction string, i.e., the instruction information, based on mathematical operations (the same mathematical operations used to generate the dynamic fingerprint in the fingerprint unit) to produce a result. When the program is partially related to a static fingerprint, the result is stored in a database or a file. Producing static fingerprints can be done in a variety of ways. For example, an engineer can provide fingerprint collection criteria associated with the instruction string to a software program, such as a functional simulator of a microprocessor, and then execute the program on the function simulator, and when it encounters a stop condition Instructing the function simulator to output the result of the fingerprint engine portion of the function simulator, wherein the result is for the static fingerprint of the command string. Engineers, on the other hand, can use the microprocessor itself to perform similar operations. In a lab environment, the microprocessor can be specifically set to debug/test settings to output a static fingerprint, and/or the microprocessor can be connected. To a portion of the test equipment, which is used to provide test vectors to the microprocessor and receive test results. After the engineer has collected the target static fingerprint, the engineer can create a form that associates the static fingerprint with the following conditions, such as (1) optimizing the configuration settings of the functional unit of the microprocessor for processing and Command line related program department And; (2) fingerprint collection criteria.

需了解的是偵測一靜態指紋與一動態指紋之相符並不會唯一肯定地辨識與該程式部分有關的指令串，反而是表示該指令序列已經被執行的機率相當高，這種方式有點類似於人的指紋並無法唯一肯定地辨識一個人。意即，在一相對少數的情況中，指紋單元仍會對由靜態指紋所產生的指紋序列之外的指令串(稱為別名(alias)指令串)指示相符的情形。 What is needed is to detect that a static fingerprint matches a dynamic fingerprint and does not uniquely identify the instruction string associated with the program portion. Instead, it indicates that the instruction sequence has been executed with a high probability. This is somewhat similar. A person's fingerprint does not uniquely identify a person. That is, in a relatively small number of cases, the fingerprint unit will still indicate a match to a sequence of instructions (referred to as an alias command string) other than the fingerprint sequence generated by the static fingerprint.

功能單元為硬體或是在微處理器中的軟體及硬體之組合，其可執行與處理與指令相關的函式。功能單元之例子包括，但非限定於，指令擷取單元、分支預測單元、指令格式單元、指令轉譯單元、暫存器更名單元、指令排程單元、執行單元(例如是整數單元、浮點單元、分支單元、單一指令多重資料(single instruction multiple data)單元、多媒體單元、讀取單元、儲存單元)、重新排序單元、引退單元、快取記憶體、資料預擷取單元、電源管理單元、記憶體管理單元、以及儲存衝突偵測單元。 A functional unit is a hardware or a combination of software and hardware in a microprocessor that performs functions associated with processing instructions. Examples of functional units include, but are not limited to, an instruction fetch unit, a branch prediction unit, an instruction format unit, an instruction translation unit, a register rename unit, an instruction scheduling unit, an execution unit (eg, an integer unit, a floating point unit) Branch unit, single instruction multiple data unit, multimedia unit, reading unit, storage unit, reorder unit, retirement unit, cache memory, data prefetch unit, power management unit, memory The body management unit and the storage conflict detection unit.

若一功能單元之設定可在微處理器運作時改變，則表示該功能單元係動態可重設。需注意的是，為了改變動態可重設的功能單元之設定，當正要改變組態設定時，微處理器需先藉由該動態重設功能單元及/或整個微處理器以暫停指令之處理。舉例來說，在一實施例中，微程式碼可藉由寫入一數值至設定暫存器以改變組態設定。該微程式碼程序可在新組態設定寫入之前且直到新組態設定生效時，序列化指令之執行。 If the setting of a functional unit can be changed while the microprocessor is operating, it indicates that the functional unit is dynamically resettable. It should be noted that in order to change the setting of the dynamically resettable functional unit, when the configuration setting is to be changed, the microprocessor needs to suspend the instruction by the dynamic reset function unit and/or the entire microprocessor. deal with. For example, in one embodiment, the microcode can change configuration settings by writing a value to the setting register. The microcode program serializes the execution of the instructions before the new configuration settings are written and until the new configuration settings take effect.

功能單元的組態設定，其為一狀態，可在狀態具 有不同數值時使得該功能單元以不同方式執行其功能，而不同的方式會影響功能單元所執行功能的效能、功耗及/或正確度。 Configuration setting of the functional unit, which is a state, which can be in the state When there are different values, the functional unit performs its functions in different ways, and different ways affect the performance, power consumption and/or accuracy of the functions performed by the functional unit.

請參考第1圖，第1圖顯示一微處理器100之功能方塊圖。微處理器100包括動態重設功能單元128、組態暫存器124、重設單元104、一或多個指紋單元102、指紋程式化暫存器132(例如特定模型暫存器(model specific register，MSR))、以及指紋設定準則表126，其中該指紋設定準則表126係記錄靜態指紋，以及相關的組態設定與指紋產生準則。儘管於第1圖中未繪示，微處理器100還可包括無法動態重設之功能單元。在一實施例中，微處理器100包括一超純量非循序執行微架構(superscalar out-of-order execution microarchitecture)，儘管在此所介紹之動態重設之處理可由包括不同微架構之微處理器所執行。在一實施例中，微處理器100包括一x86指令集架構，儘管在此所介紹之動態重設之處理可由包括不同指令集架構之微處理器所執行。 Please refer to FIG. 1. FIG. 1 shows a functional block diagram of a microprocessor 100. The microprocessor 100 includes a dynamic reset function unit 128, a configuration register 124, a reset unit 104, one or more fingerprint units 102, and a fingerprint staging register 132 (eg, a model specific register). , MSR)), and a fingerprint setting criteria table 126, wherein the fingerprint setting criteria table 126 records static fingerprints, and associated configuration settings and fingerprint generation criteria. Although not shown in FIG. 1, the microprocessor 100 may also include functional units that cannot be dynamically reset. In one embodiment, the microprocessor 100 includes a superscalar out-of-order execution microarchitecture, although the dynamic reset processing described herein may be by microprocessing including different microarchitectures. Executed by the device. In one embodiment, microprocessor 100 includes an x86 instruction set architecture, although the dynamic reset processing described herein can be performed by a microprocessor including a different instruction set architecture.

組態暫存器124，其係保存組態設定，並提供組態設定至動態重設功能單元128以控制其特定方面的運作。可由該組態設定以進行動態重設處理在不同運作方面之例子係介紹於下列實施例，但非限定於此。 A register 124 is configured that saves configuration settings and provides configuration settings to the dynamic reset function unit 128 to control the operation of its particular aspect. Examples of different operational aspects that can be set by the configuration for dynamic reset processing are described in the following embodiments, but are not limited thereto.

資料擷取組態設定，係設定資料如何由系統記憶體中預先擷取(prefetch)至微處理器100之不同快取記憶體中。 舉例來說，微處理器100可直接預先擷取高可能性之預測資料至L1資料快取中，及/或預先擷取較低可能性之預測資料至一 專用預先擷取緩衝器，其中該專用預先擷取緩衝器係與L1及L2資料快取分開。在另一實施例中，對於持續觸發不需要預先擷取之應用程式，可關閉由資料預先擷取器所執行之資料擷取。 在又一實施例中，可關閉資料預先擷取器而不處理在一軟體應用程式中預先擷取指令所請求之預先擷取動作，因為他們可能與在微處理器100內部啟動之預先擷取產生負面互動的情形。 The data retrieval configuration setting is how the data is prefetched from the system memory into the different cache memories of the microprocessor 100. For example, the microprocessor 100 can directly extract high-predicted prediction data into the L1 data cache, and/or pre-fetch the prediction data of the lower probability to one. A dedicated prefetch buffer, wherein the dedicated prefetch buffer is separate from the L1 and L2 data caches. In another embodiment, data capture performed by the data prefetcher may be turned off for applications that are not pre-fetched. In yet another embodiment, the data prefetcher can be turned off without processing the prefetching actions requested by the prefetching instructions in a software application, as they may be pre-fetched with the internal startup of the microprocessor 100. A situation that creates a negative interaction.

分支預設組態設定，係用以設定微處理器100預測分支指令之方式。舉例來說，可由分支預測器由指令快取之各資料線所預測之分支指令之數目是可以設定的。除此之外，由分支預測器所使用之獨特分支預測機制的數目亦是可以設定的。更進一步，分支預測器可設定為一反向零值跳躍(jump on zero，JZ)分支指令會被經常採取或是不採取。又，用於索引至位於分支預測器中的一分支目標位址快取(branch target address cache，BTAC)的雜湊演算法亦是可以設定的。最後，若在該預定列表中之一或多個目前運行的軟體應用程式傾向於執行高度無法預測的分支指令時，分支預測器可被設定至暫時整個關閉分支預測、或是設定至暫時關閉部分分支預測機制，例如在分支預測器中之一分支目標位址快取。 The branch preset configuration setting is used to set the manner in which the microprocessor 100 predicts branch instructions. For example, the number of branch instructions that can be predicted by the branch predictor from each data line of the instruction cache can be set. In addition to this, the number of unique branch prediction mechanisms used by the branch predictor can also be set. Further, the branch predictor can be set to a reverse on-jump (JZ) branch instruction that is often taken or not taken. Also, a hash algorithm for indexing to a branch target address cache (BTAC) located in the branch predictor is also configurable. Finally, if one or more currently running software applications in the predetermined list tend to execute highly unpredictable branch instructions, the branch predictor can be set to temporarily turn off the branch prediction or set to the temporary shutdown portion. A branch prediction mechanism, such as one branch target address cache in a branch predictor.

指令快取逐出(eviction)設定，係設定微處理器100將指令由指令快取逐出所使用之演算法。 The instruction cache eviction setting sets the algorithm used by the microprocessor 100 to evict instructions from the instruction cache.

暫停執行(suspend execution)組態設定，係用以設定微處理器100是否要暫時暫停執行程式指令。舉例來說，微處理器100可被設定為暫時暫停執行指令，做為作業系統之空閒程序已經確定被執行一預定時間之回應。 The suspend execution configuration setting is used to set whether the microprocessor 100 temporarily suspends execution of program instructions. For example, the microprocessor 100 can be configured to temporarily suspend execution of instructions as an idle routine of the operating system that has been determined to be executed for a predetermined time.

L1指令快取記憶體大小組態設定、L1資料快取記憶體大小組態設定、及L2指令快取記憶體大小組態設定，係分別用以設定L1指令快取、L1資料快取、及L2快取記憶體之大小。 舉例來說，快取記憶體大小可依據目前運行之一或多個軟體應用程式之工作資料集合的大小來進行設定。 L1 instruction cache memory size configuration setting, L1 data cache memory size configuration setting, and L2 instruction cache memory size configuration setting are used to set L1 instruction cache, L1 data cache, and L2 caches the size of the memory. For example, the size of the cache memory can be set according to the size of the work data set of one or more software applications currently running.

轉譯/格式化組態設定，係用以設定指令轉譯器/格式化器如何轉譯及/或格式化指令。舉例來說，可以設定在各時鐘週期由指令轉譯器/格式化器所轉譯及/或格式化之指令的數目。舉例來說，指令轉譯器/格式化器可設定為在每個時鐘週期僅轉譯及/或格式化單一指令以降低微處理器100之功耗，當此方式可滿足正在運行應用程式的需求時。此外，指令轉譯器/格式化器可經由合併指令而關閉降低功耗。 The translation/format configuration settings are used to set how the instruction translator/formatter translates and/or formats instructions. For example, the number of instructions translated and/or formatted by the instruction translator/formatter at each clock cycle can be set. For example, the instruction translator/formatter can be configured to translate and/or format a single instruction per clock cycle to reduce the power consumption of the microprocessor 100 when it is sufficient for the needs of the running application. In addition, the instruction translator/formatter can be turned off to reduce power consumption via a merge instruction.

推測尋訪(speculative tablewalk)組態設定，係用以設定微處理器100之一記憶體管理單元是否回應一轉譯側視緩衝器(translation lookaside buffer，TLB)之失誤(miss)以執行推測頁面尋訪。舉例來說，該記憶體管理單元可對一推測持續不正確的應用程式關閉其推測尋訪之功能，因為這種情況會逐出在轉譯側視緩衝器中之其他有用的項目(entry)。在一實施例中，可設定尋訪之推測強度。舉例來說，該記憶體管理單元可設定為在所有較舊的儲存動作已引退後、或在所有較舊的儲存動作之位址已解析、或是不管較舊的儲存動作時，僅進行一推測頁面尋訪。此外，記憶體管理單元可設定為同時獨立控制資料與程式碼之推測尋訪。更進一步，記憶體管理單元可設定為可執行推測尋訪，但並不推測地更新轉譯側視緩衝器。最後，記憶 體管理單元可設定為辨識那些類型的微執行碼或硬體功能可對例如不同的軟體或硬體預先擷取進行推測尋訪。 The speculative tablewalk configuration setting is used to set whether a memory management unit of the microprocessor 100 responds to a translation lookaside buffer (TLB) miss to perform a speculative page search. For example, the memory management unit can turn off its speculative search function for an application that is speculatively inaccurate because it would evict other useful entries in the translation side view buffer. In an embodiment, the speculative strength of the search can be set. For example, the memory management unit can be configured to perform only one after all older storage actions have been retired, or when all older storage actions have been resolved, or regardless of older storage actions. Speculative page search. In addition, the memory management unit can be set to simultaneously control the speculative search of data and code independently. Still further, the memory management unit can be configured to perform speculative seeks, but does not speculatively update the translation side view buffer. Finally, memory The volume management unit can be configured to recognize those types of micro-execution codes or hardware functions for pre-fetching, for example, different software or hardware pre-fetching.

L1快取失誤行為組態設定，係用以設定記憶體管理單元是否回應在L1指令快取之失誤時，以序列或平行方式由L2快取及處理器匯流排請求資料。 The L1 cache error behavior configuration setting is used to set whether the memory management unit responds to the L2 cache and the processor bus request data in sequence or in parallel when the L1 instruction cache error occurs.

轉送雜湊(forwarding hash)組態設定，係用以設定微處理器100於位址比較時用來雜湊虛擬位址位元的演算法，其係用以偵測微處理器100是否應執行一資料轉送動作，例如對一較舊之未引退儲存指令之讀取指令的傳送操作、或是在一讀取佇列及一填充佇列之間的傳送操作。舉例來說，下列情況可被設定：在虛擬位址之頁面索引位元之外會被進行比較的位元數目、哪些非頁面索引位元會被雜湊以產生這些位元、以及所選擇的位元如何被雜湊。 The forwarding hash configuration setting is used to set the algorithm used by the microprocessor 100 to hash the virtual address bit in the address comparison, which is used to detect whether the microprocessor 100 should execute a data. The forwarding action, such as a transfer operation of an older read command that does not retire a store instruction, or a transfer operation between a read queue and a fill queue. For example, the following can be set: the number of bits to be compared outside the page index bits of the virtual address, which non-page index bits are hashed to produce these bits, and the selected bits. How the yuan is hashed.

佇列大小組態設定，係設定在微處理器100中不同佇列的可用大小，例如是儲存佇列、讀取佇列、及快取線填充佇列。舉例來說，不同的佇列可被設定至較小的尺寸，當其可滿足目前正在運行的應用程式時藉以降低功耗量。 The queue size configuration setting sets the available sizes of different queues in the microprocessor 100, such as a storage queue, a read queue, and a cache line fill queue. For example, different queues can be set to smaller sizes to reduce power consumption when it meets the currently running application.

發送(issue)尺寸組態設定，係設定微處理器110在單一時鐘週期中發送至不同執行單元之指令數量。例如，當在每個時鐘週期所發送較小數量的指令可滿足正在運行的應用程式時，發送尺寸組態設定可設定至相對較小的數值以降低功耗。 The issue size configuration setting sets the number of instructions that the microprocessor 110 sends to different execution units in a single clock cycle. For example, when a smaller number of instructions are sent per clock cycle to satisfy a running application, the send size configuration setting can be set to a relatively small value to reduce power consumption.

重新排列緩衝器大小組態設定，係設定在重新排列緩衝器中可用項目之數量。舉例來說，裝置驅動程式可設定 重新排列緩衝器項目之數量至一相對較小的數量，當其可滿足正在運作的應用程式時藉以降低功耗量。 Rearranging the buffer size configuration settings sets the number of items available in the rearrangement buffer. For example, the device driver can be set The number of buffer items is rearranged to a relatively small amount to reduce power consumption when it satisfies the running application.

非循序(out-of-orderness)組態設定，係設定微處理器100如何利用非循序執行之指令。舉例來說，微處理器100可被設定為以一嚴謹程式順序以執行指令(亦即沒有非循序執行)。 除此之外，微處理器100可對深入至指令視窗的程度，以讓指令發送器尋找獨立指令以發送至執行單元執行。 The out-of-orderness configuration setting sets how the microprocessor 100 utilizes instructions that are not executed sequentially. For example, microprocessor 100 can be configured to execute instructions in a rigorous program sequence (ie, without non-sequential execution). In addition, the microprocessor 100 can drill down to the extent of the instruction window to cause the instruction transmitter to find independent instructions for transmission to the execution unit for execution.

讀取延遲組態設定，係設定微處理器100之讀取延遲機制為關閉或開啟。在一實施例中，當微處理器100推測地發送一讀取指令時，且若此讀取指令與一較舊的儲存指令相關且其資料尚無法取得時，表示其可能是有害於效能，此時微處理器100需重新執行該讀取指令。為了降低重新執行之可能性，該讀取延遲機制會依據重新執行一讀取指令的過去歷史以選擇性地延遲該讀取指令之發送。然而，當該讀取延遲機制開啟時，某些軟體應用程式會具有較差效能的傾向。因此，舉例來說，對於具有上述傾向之軟體應用程式來說，可關閉該讀取延遲機制。 The read delay configuration setting sets the read latency mechanism of the microprocessor 100 to be off or on. In one embodiment, when the microprocessor 100 speculatively sends a read command, and if the read command is associated with an older store command and its data is not yet available, it may be detrimental to performance. At this time, the microprocessor 100 needs to re-execute the read command. To reduce the likelihood of re-execution, the read latency mechanism selectively delays the transmission of the read instruction based on re-executing the past history of a read instruction. However, some software applications tend to have poor performance when the read latency mechanism is turned on. Thus, for example, for a software application having the above-described propensity, the read latency mechanism can be turned off.

非時間讀取/儲存組態設定，係設定微處理器100之讀取/儲存指令的行為，其包括一非時間資料暗示以防止微處理器100快取其資料。在假設微處理器100中的資料快取小於微處理器100之實際資料快取大小且若該資料被快取則會加速執行時，某些軟體應用程式會被寫入以利用非時間讀取/儲存指令。因此，舉例來說，微處理器100會被設定為快取由包括一非時間資料暗示之讀取/儲存指令所指定的資料。除此之外， 在微處理器100中可被包括非時間資料暗示之讀取/儲存指令所讀取緩衝器的數量亦是可設定的。 The non-time read/store configuration setting sets the behavior of the read/store instructions of the microprocessor 100, including a non-time data hint to prevent the microprocessor 100 from fetching its data. It is assumed that the data cache in the microprocessor 100 is smaller than the actual data cache size of the microprocessor 100 and that if the data is cached, the software application will be written to utilize non-time reading. /Save instructions. Thus, for example, microprocessor 100 will be configured to cache data specified by a read/store instruction that includes a non-time data hint. Other than that, The number of buffers that can be read by the read/store instructions that can be included in the microprocessor 100 by non-time data is also configurable.

另一組態設定可選擇性地設定微處理器100之硬體分頁目錄快取(hardware page directory cache，PDC)以包含分頁目錄項目(page directory entries，PDE)或第4階的分頁表項目(fourth-level page table entries，PML4)。 Another configuration setting can selectively set the hardware page directory cache (PDC) of the microprocessor 100 to include page directory entries (PDE) or page 4 table entries ( Fourth-level page table entries, PML4).

另一組態設定可選擇性地設定資料及程式碼轉譯側視緩衝器(TLB)項目之兩者、一者或兩者皆不會，被放置至微處理器100之L2轉譯側視緩衝器。另一組態設定可設定L2轉譯側視緩衝器的大小。 Another configuration setting can optionally set either the data and the code translation side view buffer (TLB) item, one or both, to be placed in the L2 translation side view buffer of the microprocessor 100. . Another configuration setting sets the size of the L2 translation side view buffer.

另一組態設定可選擇性地設定是否已確保一軟體預先擷取記憶線之配置。意即，記憶體管理單元可被設定為等待完成，直到擊中(hit)或已為該軟體預先擷取記憶線推送一請求為止、或已完成但繼續在喚醒時嘗試配置該軟體預先擷取記憶線。 Another configuration setting can optionally set whether a software pre-fetch memory configuration is ensured. That is, the memory management unit can be set to wait for completion until a hit or a pre-fetch memory request is initiated for the software, or has completed but continues to attempt to configure the software pre-fetching upon waking up. Memory line.

另一組態設定可設定自我調整碼偵測是否開啟或關閉。除此之外，若自我調整碼偵測開啟，微處理器100可被設定為先更正或後更正，以及執行或不執行完整機器清除。 Another configuration setting can set whether the self-adjusting code detection is turned on or off. In addition, if self-adjusting code detection is turned on, the microprocessor 100 can be set to correct or correct later, and perform or not perform a full machine clear.

另一組態設定係設定微處理器100之載入及/或儲存管線中的不同平行仲裁是否開啟或關閉。舉例來說，在儲存管線中之一載入有效位址(load effective address，LEA)的產生並不需要對整個管線進行仲裁(因為其會先產生結果)，因此微處理器100可被設定為允許需要完整管線的另一操作在同時間進行仲裁。更進一步，載入管線可被選擇性地設定為允許不需 要讀取快取的仲裁器與需要讀取快取之仲裁器平行地進行仲裁的情形。 Another configuration setting sets whether different parallel arbitrations in the load and/or storage pipeline of microprocessor 100 are turned "on" or "off". For example, the generation of a load effective address (LEA) in one of the storage pipelines does not require arbitration of the entire pipeline (because it will produce a result first), so the microprocessor 100 can be set to Allowing another operation that requires a complete pipeline to arbitrate at the same time. Further, the load pipeline can be selectively set to allow no need The case where the arbitrator to read the cache is arbitrated in parallel with the arbitrator that needs to read the cache.

另一組態設定係設定關於寫入合併之載入(write-combine loads)的推測程度。舉例來說，寫入合併之載入可為完整推測、推測但仍然依照順序、或是非推測。可對與x86 MONVNTDQA指令有關的載入進行類似的組態設定。 Another configuration setting sets the degree of speculation about write-combine loads. For example, the load of a write merge can be a full guess, a speculation, but still in order, or non-speculative. Similar configuration settings can be made for loads related to the x86 MONVNTDQA instruction.

另一組態設定係設定記憶體管理單元是否要開啟或關閉由記憶體管理單元指示微處理器100之指令排程器在一載入失誤需要用新的微操作重新執行之後，應該要完成載入操作的功能。上述方式允許該排程器以推測地安排相依的微操作以與載入結果轉送階段一同排隊，而不是在排程前等待提供該結果。此為推測該載入現在具有一有效結果，但若沒有有效結果，則需要另一重新執行的操作。 Another configuration setting is to set whether the memory management unit is to be turned on or off. The instruction scheduler of the microprocessor 100 is instructed by the memory management unit to complete the reloading after a new micro-operation is performed. The function of the operation. The above approach allows the scheduler to speculatively schedule dependent micro-ops to queue with the load result transfer phase instead of waiting to provide the result before scheduling. This assumes that the load now has a valid result, but if there is no valid result, then another re-execution is required.

另一組態設定係設定微處理器100之轉送路徑以選擇性地關閉轉送。此組態設定在微處理器後續設計時用以避開所測得的設計缺失特別有效，而且當一特定程式部分由微處理器100執行時該設計缺失本身可能會顯露出來。轉送之例子可為選擇性地關閉，其包括但非限定，暫存器結果轉送及載入-儲存轉送之情形。 Another configuration setting sets the forwarding path of the microprocessor 100 to selectively turn off the transfer. This configuration setting is particularly effective in avoiding the measured design flaws in subsequent design of the microprocessor, and the design loss itself may be revealed when a particular program portion is executed by the microprocessor 100. Examples of forwarding may be selectively closed, including but not limited to, a temporary transfer of results and a load-storage transfer.

另一個動態重設功能單元128之動態重設實例，係導致暫存器更名單元清除用以維持載入-儲存依存性之佇列，該佇列係由暫存器更名單元所使用以影響載入指令排程，用以降低由載入-儲存衝突所造成的載入重新執行。一般而言，功能單元128係動態重設以清除累計的效能特徵狀態，其係相關 於一特定程式部分而言為已知或懷疑為假或變形者。 Another dynamic reset instance of the dynamic reset function unit 128 causes the register rename unit to clear the queue for maintaining load-store dependencies, which is used by the register rename unit to affect the load. Incoming instruction scheduling to reduce load re-execution caused by load-store conflicts. In general, functional unit 128 is dynamically reset to remove accumulated performance feature states, which are related It is known or suspected to be false or deformed in a particular program.

另一個動態重設功能單元128之動態重設實例，係導致一或多條快取線、或整個快取記憶體被清除以避免潛在的資料一致性之問題。此方式對於避開當一特定程式部分由微處理器100所執行時會顯露其本身之設計缺失特別有用。 Another dynamic reset instance of dynamic reset function unit 128 results in one or more cache lines, or the entire cache memory being erased to avoid potential data consistency issues. This approach is particularly useful for avoiding design flaws that may manifest themselves when a particular program portion is executed by microprocessor 100.

另一個動態重設功能單元128之動態重設實例，係為了一架構性指令之特定例子暫時改變該架構性指令的微程式碼之行為。舉例來說，微程式碼對該架構性指令之特定例子執行一代碼路徑(alternate code path)，其包含於該架構性指令之一特定程式部分中，並在該架構性指令中的其他例子執行一正常碼路徑。再次重申，此方式對於避開設計缺失特別有用。 Another example of a dynamic reset of dynamic reset function unit 128 is to temporarily change the behavior of the microcode of the architectural instruction for a particular example of an architectural instruction. For example, the microcode executes an alternate code path for a particular instance of the architectural instruction, which is included in a particular program portion of the architectural instruction and is executed in other examples in the architectural instruction. A normal code path. Again, this approach is especially useful for avoiding design flaws.

重設單元104係讀取與一相符靜態指紋有關的組態設定126，並將組態設定126寫入組態暫存器124以重設微處理器100之動態重設功能單元128。在一實施例中，重設單元104包括由微處理器100所執行之微程式碼，其執行讀取與該相符靜態指紋有關之組態設定126以及寫入組態設定126至組態暫存器124。更適宜地，當指紋單元102偵測到指紋相符，其會引發將控制權透過陷阱以轉往微程式碼之操作。在另一實施例中，重設單元104包括硬體控制邏輯，其可回應指紋單元102通知指紋相符以讀取與相符靜態指紋有關的組態設定126，並將該相符靜態指紋有關的組態設定126寫入組態暫存器124。重設單元104及指紋單元102係利用控制信號144進行溝通。 The reset unit 104 reads the configuration settings 126 associated with a matching static fingerprint and writes the configuration settings 126 to the configuration register 124 to reset the dynamic reset function unit 128 of the microprocessor 100. In one embodiment, the reset unit 104 includes a microcode executed by the microprocessor 100 that performs reading configuration settings 126 associated with the matching static fingerprint and writing configuration settings 126 to the configuration staging 124. Preferably, when fingerprint unit 102 detects a fingerprint match, it triggers the operation of passing control through the trap to the microcode. In another embodiment, the reset unit 104 includes hardware control logic that can respond to the fingerprint unit 102 informing that the fingerprint matches to read the configuration settings 126 associated with the matching static fingerprint and to configure the static fingerprint-related configuration. Setting 126 is written to configuration register 124. The reset unit 104 and the fingerprint unit 102 communicate using the control signal 144.

需了解的是，在微處理器100中並非所有功能單元均是動態可重設。亦需了解的是，當重設單元104重設動態重 設功能單元128時，可能不會寫入各個組態暫存器124，且不會各個動態重設功能單元128均被重設，儘管會有至少一組態暫存器124被寫入，也會有至少一動態重設功能單元128被重設。 It is to be understood that not all of the functional units in the microprocessor 100 are dynamically resettable. It should also be understood that when the reset unit 104 resets the dynamic weight When the function unit 128 is set, the individual configuration registers 124 may not be written, and not the respective dynamic reset function units 128 are reset, although at least one configuration register 124 is written, At least one dynamic reset function unit 128 is reset.

當微處理器100之動態重設功能單元128執行指令並累計指令資訊142時，指紋單元102依據可產生動態指紋之數學運算以接收來自微處理器100之動態重設功能單元128的指令資訊142，其中動態指紋係與靜態指紋進行比較。更適宜地，指紋單元102包括複數個指紋單元102，各指紋單元102係依據不同的指紋產生準測以產生一動態指紋，並將其與一靜態指紋進行比較。在一實施例中，有4個分開的指紋單元102，且它們會被邏輯性地鏈接在一起以完成相對複雜的指令序列的偵測。指紋單元102之一實施例會在第2圖中進一步詳述。 When the dynamic reset function unit 128 of the microprocessor 100 executes the command and accumulates the command information 142, the fingerprint unit 102 receives the command information 142 from the dynamic reset function unit 128 of the microprocessor 100 in accordance with a mathematical operation that can generate a dynamic fingerprint. , where the dynamic fingerprint is compared to the static fingerprint. Preferably, the fingerprint unit 102 includes a plurality of fingerprint units 102. Each fingerprint unit 102 generates a dynamic fingerprint according to different fingerprints to generate a dynamic fingerprint and compares it with a static fingerprint. In one embodiment, there are four separate fingerprint units 102, and they are logically linked together to complete the detection of relatively complex sequences of instructions. An embodiment of fingerprint unit 102 will be described in further detail in FIG.

指紋程式化暫存器132可由軟體(例如裝置驅動程式或基本輸入輸出系統)進行寫入以控制指紋單元102，以及填寫靜態指紋及其有關組態設定及指紋產生準則126的表單。 The fingerprint stylized register 132 can be written by a software (eg, a device driver or a basic input/output system) to control the fingerprint unit 102, and to fill in a static fingerprint and its form regarding configuration settings and fingerprint generation criteria 126.

在此處所介紹之微處理器100動態重設的一個使用實例係為了增加效能及/或降低微處理器100之功耗，例如當執行程式的已知部分，其效能及功耗會顯著地受到動態重設該微處理器100至已知組態的影響。 One use case for the dynamic reset of the microprocessor 100 described herein is to increase performance and/or reduce the power consumption of the microprocessor 100, such as when performing a known portion of the program, its performance and power consumption are significantly affected. The effect of the microprocessor 100 to the known configuration is dynamically reset.

在此所介紹之微處理器100之動態重設處理之使用方式的另一例子係為了防止微處理器100不正確地運作，例如當微處理器100處理一程式的一部分時，若該程式部分係由微處理器100以一第一已知組態執行時會導致一功能性錯誤，但若由微處理器100以一第二已知組態執行時會產生一正確結 果。舉例來說，當資料預先擷取器執行資料預先擷取的一特別積極模式(particularly aggressive mode)時，若微處理器100執行該程式部分，微處理器100會產生一功能性錯誤。相反地，當資料預先擷取器執行資料預先擷取的一較不積極模式(less aggressive mode)或是資料預先擷取已完全關閉時，微處理器100不會產生功能性錯誤。功能性錯誤，例如但非限定為，資料損毀、停止條件(例如死結或活結(livelock))、不正常的效能緩慢、以及作業系統未準備好補救的例外情況。引發微處理器100產生功能性錯誤之設計缺失，可能直到微處理器100大量製造及/或已出貨給顧客後仍未被發現。在這種情況下，藉由動態重設微處理器100以修正此問題是有幫助的，而不用透過重新設計微處理器100、及/或召回或不販售有錯誤元件的方式來處理。 Another example of the manner in which the dynamic reset processing of the microprocessor 100 is described herein is to prevent the microprocessor 100 from operating incorrectly, such as when the microprocessor 100 processes a portion of a program, if the program portion A functional error is caused by the microprocessor 100 executing in a first known configuration, but a correct result is produced if executed by the microprocessor 100 in a second known configuration. fruit. For example, when the data pre-fetcher performs a particular aggressive mode in which the data is pre-fetched, if the microprocessor 100 executes the program portion, the microprocessor 100 generates a functional error. Conversely, the microprocessor 100 does not generate a functional error when the data pre-fetcher performs a less aggressive mode in which the data is pre-fetched or when the pre-fetching of the data has been completely turned off. Functional errors, such as, but not limited to, data corruption, cessation conditions (such as deadlocks or livelocks), abnormally slow performance, and exceptions where the operating system is not ready for remediation. The lack of design that causes the microprocessor 100 to generate a functional error may not be discovered until the microprocessor 100 is mass produced and/or shipped to the customer. In this case, it may be helpful to dynamically reset the microprocessor 100 to correct this problem without reprocessing the microprocessor 100, and/or recalling or not selling the wrong component.

在此介紹之動態重設實施例之潛在好處是微處理器100可以相對較佳的尺度(granularity)來辨識軟體應用程式之部分。此方式對於包括不同部分的軟體應用程式來說特別有用，因為軟體應用程式之不同部分可依據不同組態而動態重設微處理器100之功能單元而得到好處。舉例來說，一電玩遊戲可包括一程式載入部分、一初始化部分、一圖形計算部分、一使用者輸入接收部分、以及一策略計算部分，各個程式部分可在微處理器100功能單元的不同組態下有較佳的效能。需了解的是，若微處理器100較快地執行該程式部分、使用較少功耗以執行該程式部分、及/或正確地執行該程式部分，表示微處理器100之效能較佳。 A potential benefit of the dynamic reset embodiment described herein is that the microprocessor 100 can identify portions of the software application with respect to a relatively good granularity. This approach is particularly useful for software applications that include different parts, as different parts of the software application can benefit from dynamically resetting the functional units of the microprocessor 100 depending on the configuration. For example, a video game may include a program loading portion, an initialization portion, a graphics computing portion, a user input receiving portion, and a policy computing portion, each of which may be different in the functional unit of the microprocessor 100. Better performance under configuration. It is to be understood that if the microprocessor 100 executes the program portion faster, uses less power to execute the program portion, and/or executes the program portion correctly, it indicates that the performance of the microprocessor 100 is better.

請參考第2圖，第2圖顯示依據本發明一實施例中之指紋單元102的詳細功能方塊圖。指紋單元102包括一數學運算單元222、比較邏輯226、一靜態指紋232、一衰退(decay)計數器242、以及控制邏輯234。 Please refer to FIG. 2, which shows a detailed functional block diagram of the fingerprint unit 102 in accordance with an embodiment of the present invention. The fingerprint unit 102 includes a mathematical operation unit 222, comparison logic 226, a static fingerprint 232, a decay counter 242, and control logic 234.

數學運算單元222接收來自第1圖動態重設功能單元128的指令資訊142，並依據一數學運算累計指令資訊以產生一結果224，該結果為動態指紋，其中數學運算可參考上述實施例。在第2圖之實施例中，指令資訊142包括該指令之指令指標202(亦即指令位址)，一位移欄位204、運算碼欄位206、modRM欄位208、SIB欄位212、及來自該指令之字首214。在其他實施例中，其他指令欄位包括指令資訊142，特別是在使用不同於x86架構之不同指令集架構的實施例。更適宜地，指令集架構具有可變長度指令(例如x86指令即為可變長度)，且微處理器100之擷取單元包括一指令格式化單元，當由指令快取擷取指令位元之區塊並將其格式化至個別指令時，數學運算電路222將在微處理器100之指令格式化單元格式化指令時接收指令資訊142。在一實施例中，指令格式化單元係可在每個時鐘週期格式化至多三個指令，並在每個時鐘週期為該至多三個指令提供指令資訊142至數學運算電路222。在指令集架構具有固定長度指令的另一實施例中，當由指令快取擷取指令時，指令資訊142可由擷取單元所提供。 The mathematical operation unit 222 receives the instruction information 142 from the dynamic reset function unit 128 of the first image, and accumulates the instruction information according to a mathematical operation to generate a result 224, which is a dynamic fingerprint, wherein the mathematical operation can refer to the above embodiment. In the embodiment of FIG. 2, the instruction information 142 includes the instruction indicator 202 (ie, the instruction address) of the instruction, a displacement field 204, an operation code field 206, a modRM field 208, an SIB field 212, and The prefix 214 from the instruction. In other embodiments, other instruction fields include instruction information 142, particularly in embodiments that use different instruction set architectures than the x86 architecture. Preferably, the instruction set architecture has a variable length instruction (for example, the x86 instruction is a variable length), and the capture unit of the microprocessor 100 includes an instruction formatting unit, when the instruction bit is fetched by the instruction cache When the block is formatted into an individual instruction, the mathematical operation circuit 222 will receive the instruction information 142 when the instruction formatting unit of the microprocessor 100 formats the instruction. In one embodiment, the instruction formatting unit can format up to three instructions per clock cycle and provide instruction information 142 to the mathematical operation circuit 222 for the at most three instructions per clock cycle. In another embodiment in which the instruction set architecture has fixed length instructions, the instruction information 142 may be provided by the capture unit when the instruction is fetched by the instruction cache.

更適宜地，數學運算電路222包括一多輸入位移暫移器(multiple input shift register，MISR)，其使用一最大計數多項式(maximum count polynomial)。更適宜地，當各指令被格 式化時，該(選擇性過濾的)指令資訊142係與MISR階數輸出(taps)與最左輸入位元的布林互斥或(Boolean XOR)結果再右移一位元的現階段狀態進行互斥或運算。在一實施例中，MISR為50位元寬，且MISR之階數為49、9及0以完成該最大計數多項式。在一實施例中，產生一誤合(false match)之別名指令串(alias strand)的可能性大約是1：2⁵⁰(2⁵⁰次中會產生一次)。如上所述，雖然指令串辨識(strand identification)可能不絕對是唯一的，在多數用途上，該辨識可為充份唯一的(sufficiently unique)，例如是增進效能及改善設計缺失的影響。在一少見的別名指令串誤合的例子中，其結果可能為較低的效能、較高的功耗、及/或無法修正在微處理器100設計中的缺失。如上所述，指紋單元102可在每個時鐘週期接收用於多個指令的指令資訊142，且數學運算電路222係執行數學運算以在單一時鐘週期中累計所有的指令資訊142。進一步而言，在MISR實施例中，數學運算電路222係在單一時鐘週期中執行所有指令資訊142的互斥或運算。 More suitably, the mathematical operation circuit 222 includes a multiple input shift register (MISR) that uses a maximum count polynomial. Preferably, when each instruction is formatted, the (selectively filtered) instruction information 142 is mutually exclusive with the MISR order output (taps) and the leftmost input bit, or the Boolean XOR result is right. Move the current state of a bit to perform a mutual exclusion or operation. In one embodiment, the MISR is 50 bits wide and the orders of the MISR are 49, 9 and 0 to complete the maximum count polynomial. In one embodiment, the probability of generating a false match alias strand is approximately 1:2 ⁵⁰ (2 out of ⁵⁰ times). As noted above, although the strand identification may not be absolutely unique, in most applications, the identification may be sufficiently unique, such as to enhance performance and improve the impact of design deficiencies. In the case of a rare alias command string mismatch, the result may be lower performance, higher power consumption, and/or the inability to correct for lack of design in the microprocessor 100. As described above, fingerprint unit 102 can receive instruction information 142 for multiple instructions at each clock cycle, and mathematical operation circuit 222 performs mathematical operations to accumulate all of the instruction information 142 in a single clock cycle. Further, in the MISR embodiment, the mathematical operation circuit 222 performs mutual exclusion or operation of all the instruction information 142 in a single clock cycle.

數學運算電路222依據來自控制邏輯234所接收的資訊(其包括指紋產生準則238)以產生結果。指紋產生準則238包括起始條件、停止條件及重置條件，其係在數學運算電路222累計指令資訊142以產生動態指紋224時作為控制之用。指紋產生準則238亦指定數學運算電路在累計以產生動態指紋224時之指令資訊142的部分(202,204,206,208,212,214)，並暗示會被過濾的部分。更適宜地，與被過濾部分有關的位元會被***二進位的0值。 Math operation circuit 222 is based on information received from control logic 234 (which includes fingerprint generation criteria 238) to produce a result. The fingerprint generation criteria 238 includes a start condition, a stop condition, and a reset condition for control when the mathematical operation circuit 222 accumulates the instruction information 142 to generate the dynamic fingerprint 224. The fingerprint generation criteria 238 also specifies the portion (202, 204, 206, 208, 212, 214) of the instruction information 142 that is accumulated by the mathematical operation circuit to generate the dynamic fingerprint 224, and implies portions that are to be filtered. More suitably, the bit associated with the filtered portion is inserted into the binary zero value.

比較器224係將數學運算電路222所產生的動態指紋與靜態指紋232進行比較，並在兩個指紋相符時產生一真值於一相符信號228上並提供至控制邏輯234。在一實施例中，當達到一停止條件時，比較器226僅執行比較運算。更適宜地，一裝置驅動器及/或微程式碼載入該靜態指紋232及指紋產生準則238。當控制邏輯234偵測到在該相符信號228上的真值時，控制邏輯234會利用控制信號144以將該相符情況與重設單元104進行溝通。除此之外，控制邏輯234利用一串接信號(chain signal)244將該相符情況與另一指紋單元102進行溝通，其細節將於後述之第6圖及第7圖詳述之。控制邏輯234亦接收來自其他指紋單元102的串接信號244。更進一步，控制邏輯234可載入一衰減計數器242以回應該相符情況，而衰減計數器之運算將於第5圖之實施例中詳述之。 The comparator 224 compares the dynamic fingerprint generated by the mathematical operation circuit 222 with the static fingerprint 232 and generates a true value on the coincidence signal 228 and provides it to the control logic 234 when the two fingerprints match. In an embodiment, when a stop condition is reached, comparator 226 performs only the comparison operation. Preferably, a device driver and/or microcode loads the static fingerprint 232 and fingerprint generation criteria 238. When control logic 234 detects a true value on the coincidence signal 228, control logic 234 utilizes control signal 144 to communicate the match condition with reset unit 104. In addition, control logic 234 communicates the match with another fingerprint unit 102 using a chain signal 244, the details of which will be detailed in Figures 6 and 7 which will be described later. Control logic 234 also receives serial signal 244 from other fingerprint units 102. Still further, control logic 234 can load an attenuation counter 242 to respond to the match, and the operation of the decay counter will be detailed in the embodiment of FIG.

請參考第3圖，第3圖顯示在本發明一實施例中用以產生已知目標程式部分及其有關的靜態指紋、組態設定及指紋產生準則的資料庫的流程圖。該流程開始於方塊302。 Please refer to FIG. 3, which shows a flow chart of a database for generating known target program portions and their associated static fingerprints, configuration settings, and fingerprint generation criteria in an embodiment of the present invention. The process begins at block 302.

在方塊302，由工程師辨識程式部分的列表，其係用於最佳化微處理器100之動態重設功能單元128之組態，例如增進其效能(較快的程式部分執行或較低的功耗)及/或修正錯誤。流程前進至方塊304。 At block 302, a list of program portions is identified by the engineer for optimizing the configuration of the dynamic reset function unit 128 of the microprocessor 100, such as to improve its performance (faster program execution or lower work) Consumption) and / or correction errors. Flow proceeds to block 304.

在方塊304，工程師對在方塊302中所辨識的程式部分之一者，決定動態重設功能單元128的最佳化組態設定。流程前進至方塊306。 At block 304, the engineer determines the optimized configuration settings for the dynamic reset function unit 128 for one of the program portions identified in block 302. Flow proceeds to block 306.

在方塊306，工程師辨識與在方塊304中所辨識之 程式部分有關的指令串(strand)，並設計指紋產生準則，其可用以產生用於該指令串的一指紋。流程前進至方塊308。 At block 306, the engineer identifies and is identified in block 304. A portion of the program-related strand and a fingerprint generation criterion that can be used to generate a fingerprint for the string. Flow proceeds to block 308.

在方塊308，工程師利用在方塊306所設計的指紋產生準則，以產生用於與該程式部分有關之該指令串的一靜態指紋。流程前進至方塊312。 At block 308, the engineer utilizes the fingerprint generation criteria designed at block 306 to generate a static fingerprint for the string of instructions associated with the program portion. Flow proceeds to block 312.

在方塊312，工程師儲存與該程式部分有關的靜態指紋、組態設定、以及指紋產生準則。流程前進至方塊314。 At block 312, the engineer stores static fingerprints, configuration settings, and fingerprint generation criteria associated with the program portion. Flow proceeds to block 314.

在方塊314，工程師針對在方塊302中所指出的各個其他程式部分重複方塊304、306、308及312以編譯一資料庫。流程結束於方塊314。 At block 314, the engineer repeats blocks 304, 306, 308, and 312 for each of the other program portions indicated in block 302 to compile a database. Flow ends at block 314.

請參考第4圖，第4圖顯示本發明一實施例中微處理器100動態重設其本身的操作流程圖。流程開始於方塊402。在方塊402，微處理器100接收第1圖的指紋設定準則表126以及相關的組態設定與指紋產生準則。更適宜地，指紋設定準則表126包括依據第3圖流程所編譯的資料庫的一部分。指紋設定準則表126是可程式化的。更適宜地，一裝置驅動器係將該指紋設定準則表126提供至該微處理器100。舉例來說，該裝置驅動器可對作業系統之一或多個正在運作的軟體應用程式判斷是否為編譯於資料庫者，且回應上述動作而提供與該正在運作的軟體應用程式之程式部分有關的靜態指紋、組態設定及指紋產生準則126表。選擇性地，系統韌體，例如BIOS，提供指紋設定準則表126至微處理器100，特別是在動態重設用於修正錯誤的情況。又，選擇性地，指紋設定準則表126可透過微程式碼的一更新(patch)而載入微處理器100。更適宜地，在微處理器 100重置後且指紋產生準則仍不確定地、或至少在微處理器100再度重置為止，微程式碼更新會被載入，這個方式在某些情況下會特別有幫助，例如動態重設係用於修正錯誤時，其會在微處理器100重置後之軟體執行過程的早期就顯露出來。該指紋設定準則表126可包括數量遠大於指紋單元102的程式部分之資訊，且當程式執行時，微處理器100之微程式碼可動態地載入靜態指紋及指紋產生準則至指紋單元102而不需要裝置驅動器的介入。更適宜地，指紋設定準則表126被存放至微處理器100的一私有記憶體，其無法被架構程式所存取，但可由微處理器100的微程式碼所存取。流程前進至方塊404。 Please refer to FIG. 4, which shows a flow chart of the operation of the microprocessor 100 to dynamically reset itself in an embodiment of the present invention. The flow begins at block 402. At block 402, the microprocessor 100 receives the fingerprint setting criteria table 126 of Figure 1 and associated configuration settings and fingerprint generation criteria. Preferably, the fingerprint setting criteria table 126 includes a portion of a database compiled in accordance with the flow of Figure 3. The fingerprint setting criteria table 126 is programmable. Preferably, a device driver provides the fingerprint setting criteria table 126 to the microprocessor 100. For example, the device driver can determine whether one of the operating system or one of the operating software applications is compiled by the database, and in response to the action, provide a program part related to the operating software application. Static fingerprint, configuration settings and fingerprint generation criteria 126 table. Optionally, a system firmware, such as a BIOS, provides fingerprint setting criteria table 126 to microprocessor 100, particularly in the case of dynamic resets for correcting errors. Also, optionally, the fingerprint setting criteria table 126 can be loaded into the microprocessor 100 via a patch of the microcode. More suitably, in a microprocessor After the reset of 100 and the fingerprint generation criteria are still indeterminate, or at least until the microprocessor 100 is reset again, the microcode update will be loaded. This method may be particularly helpful in some cases, such as dynamic reset. When used to correct an error, it will be revealed early in the software execution process after the microprocessor 100 is reset. The fingerprint setting criteria table 126 can include information that is much larger than the program portion of the fingerprint unit 102, and when executed, the microcode of the microprocessor 100 can dynamically load the static fingerprint and fingerprint generation criteria to the fingerprint unit 102. No intervention by the device driver is required. Preferably, the fingerprint setting criteria table 126 is stored in a private memory of the microprocessor 100 that is not accessible by the architectural program but is accessible by the microcode of the microprocessor 100. Flow proceeds to block 404.

在方塊404，指紋單元102載入靜態指紋及指紋產生準則。如上所述，其會發生在裝置驅動器寫入指紋設定準則表126及/或當微程式碼偵測到事件，例如是指紋單元102已偵測到指紋相符時(例如第7圖的方塊703)。流程前進至方塊406。 At block 404, fingerprint unit 102 loads the static fingerprint and fingerprint generation criteria. As described above, it may occur when the device driver writes the fingerprint setting criteria table 126 and/or when the microcode detects an event, such as when the fingerprint unit 102 has detected a fingerprint match (e.g., block 703 of Figure 7). . Flow proceeds to block 406.

在方塊406，當動態重設功能單元128正依據組態暫存器124中的目前組態設定而執行指令時，指紋單元102會依據在方塊404所載入之指紋產生準則，並基於數學運算累計指令資訊142藉以產生動態指紋224，再將其與在方塊404中所載入的靜態指紋232進行比較。流程前進至決定方塊408。 At block 406, when the dynamic reset function unit 128 is executing instructions in accordance with the current configuration settings in the configuration register 124, the fingerprint unit 102 generates criteria based on the fingerprints loaded at block 404 and is based on mathematical operations. The cumulative command information 142 is used to generate a dynamic fingerprint 224 which is then compared to the static fingerprint 232 loaded in block 404. Flow proceeds to decision block 408.

在決定方塊408，指紋單元102(例如比較器226及控制邏輯234)判斷靜態指紋及動態指紋是否相符。若相符則流程前進至方塊412；否則流程前進至方塊406。 At decision block 408, fingerprint unit 102 (e.g., comparator 226 and control logic 234) determines if the static fingerprint and the dynamic fingerprint match. If so, the flow proceeds to block 412; otherwise the flow proceeds to block 406.

在方塊412，控制邏輯234利用控制信號144通知重設單元104該相符情況，且重設單元104會回應地利用與在方塊 408中與動態指紋224相符之靜態指紋232有關的組態設定來重設動態重設功能單元128(例如藉由寫入組態暫存器124)。流程結束於方塊412。 At block 412, the control logic 234 notifies the reset unit 104 of the match using the control signal 144, and the reset unit 104 responds to the use and the block. The configuration settings associated with the static fingerprint 232 in 408 that coincide with the dynamic fingerprint 224 reset the dynamic reset function unit 128 (e.g., by writing to the configuration register 124). Flow ends at block 412.

請參考第5圖，第5圖顯示依據本發明一實施例中微處理器110動態重設其本身之更進一步運作的流程圖。該流程由方塊514開始，特別是由第4圖的方塊412開始。 Please refer to FIG. 5, which shows a flow chart for further operation of the microprocessor 110 dynamically resetting itself in accordance with an embodiment of the present invention. The flow begins with block 514, and particularly begins with block 412 of FIG.

在方塊514，控制邏輯234係將相關於在方塊408中相符的靜態指紋之衰減計數值載入至衰減計數器242。更適宜地，該衰減計數值係包括於第1圖中之指紋設定準則表126。流程前進至方塊516。 At block 514, control logic 234 loads the decay count value associated with the static fingerprint that matches in block 408 to decay counter 242. More suitably, the decay count value is included in the fingerprint setting criteria table 126 in FIG. Flow proceeds to block 516.

在方塊516，週期性地-特別是每時鐘週期中-該衰減計數器242會減少計數。流程前進至決定方塊518。 At block 516, the decay counter 242 will reduce the count periodically, particularly per clock cycle. Flow proceeds to decision block 518.

在決定方塊518，控制邏輯234判斷衰減計數值是否已過期(expired)。若是，則該流程前進至方塊522；否則，該流程回到方塊516。 At decision block 518, control logic 234 determines if the decay count value has expired. If so, the flow proceeds to block 522; otherwise, the flow returns to block 516.

在方塊522，控制邏輯234利用控制信號144通知重設單元104該衰減計數器242已過期，且該重設單元104回應地以指紋設定準則表126中的預設組態設定來重設動態重設功能單元128。在一實施例中，預設組態設定被程式化至微程式碼中。在一實施例中，預設組態設定包括於指紋設定準則表126中。在一實施例中，預設組態設定為在方塊412中之動態重設動作執行前之先前組態設定(亦即在方塊406中微處理器100正在執行指令的目前組態設定)。在一實施例中，該複數個組態設定的一子集合會回到其預設值，同時該複數個組態設定的另 一子集合會維持在方塊412所寫入的數值。更適宜地，這些子集合均定義於指紋設定準則表126中。流程結束於方塊522。 At block 522, the control logic 234 notifies the reset unit 104 that the decay counter 242 has expired using the control signal 144, and the reset unit 104 responsively resets the dynamic reset with the preset configuration settings in the fingerprint setting criteria table 126. Functional unit 128. In one embodiment, the preset configuration settings are programmed into the microcode. In an embodiment, the preset configuration settings are included in the fingerprint setting criteria table 126. In one embodiment, the preset configuration is set to the previous configuration settings prior to execution of the dynamic reset action in block 412 (ie, in block 406 the microprocessor 100 is executing the current configuration settings of the instructions). In an embodiment, a subset of the plurality of configuration settings is returned to its preset value, and the plurality of configuration settings are A subset will maintain the value written at block 412. Preferably, these subsets are all defined in the fingerprint setting criteria table 126. Flow ends at block 522.

請參考第6圖，第6圖顯示依據本發明又一實施例中微處理器100動態重設其本身的運作流程圖。該流程係開始於方塊602。 Please refer to FIG. 6. FIG. 6 is a flow chart showing the operation of the microprocessor 100 dynamically resetting itself according to still another embodiment of the present invention. The process begins at block 602.

在方塊602，指紋單元102中之一者(用第一指紋單元表示)偵測到其動態指紋224及其靜態指紋232相符，並表示該相符情況，例如藉由一串表示符(chain indicator)244。流程前進至方塊604。 At block 602, one of the fingerprint units 102 (represented by the first fingerprint unit) detects that its dynamic fingerprint 224 and its static fingerprint 232 match, and indicates the match, for example by a string indicator 244. Flow proceeds to block 604.

在方塊604，不同的指紋單元102(用第二指紋單元表示)接收在方塊602由第一指紋單元所產生的表示符，並回應地開始依據基於指紋產生準則之數學運算以累計指令資訊142，藉以產生動態指紋224並將其與靜態指紋232進行比較。流程前進至方塊606。 At block 604, the different fingerprint unit 102 (represented by the second fingerprint unit) receives the indicator generated by the first fingerprint unit at block 602 and, in response, begins to accumulate instruction information 142 in accordance with mathematical operations based on fingerprint generation criteria. The dynamic fingerprint 224 is generated and compared to the static fingerprint 232. Flow proceeds to block 606.

在方塊606，第二指紋單元偵測其動態指紋224及其靜態指紋232之相符情況。流程前進至方塊608。 At block 606, the second fingerprint unit detects the coincidence of its dynamic fingerprint 224 and its static fingerprint 232. Flow proceeds to block 608.

在方塊608，控制邏輯234以控制信號144通知重設單元104相符情況已找到，且重設單元104回應地以在方塊606中與動態指紋224相符之靜態指紋232有關的組態設定126，以重設動態重設功能單元128。流程結束於方塊608。 At block 608, the control logic 234 notifies the reset unit 104 that the match condition has been found with the control signal 144, and the reset unit 104 responsively sets the configuration 126 associated with the static fingerprint 232 that corresponds to the dynamic fingerprint 224 in block 606 to The dynamic reset function unit 128 is reset. Flow ends at block 608.

請參考第7圖，第7圖顯示依據本發明又一實施例中微處理器100動態重設其本身的運作流程圖。流程開始於方塊702。 Please refer to FIG. 7. FIG. 7 is a flow chart showing the operation of the microprocessor 100 dynamically resetting itself according to still another embodiment of the present invention. Flow begins at block 702.

在方塊702，指紋單元102之一者偵測到其動態指 紋224及其靜態指紋232相符，並表示該相符情況，例如透過控制信號144。流程前進至方塊703。 At block 702, one of the fingerprint units 102 detects its dynamic finger The rib 224 and its static fingerprint 232 coincide and represent the coincidence, such as by the control signal 144. Flow proceeds to block 703.

在方塊703，重設單元104載入具有一新靜態指紋232及其相關的指紋產生準則至指紋單元102，藉以回應在方塊702中已找到該相符情況之表示。流程前進至方塊704。 At block 703, the reset unit 104 loads with a new static fingerprint 232 and its associated fingerprint generation criteria to the fingerprint unit 102 in response to a representation of the match condition found in block 702. Flow proceeds to block 704.

在方塊704，指紋單元102依據基於在方塊703中所載入的新指紋產生準則之數學運算以累計指令資訊142，藉以產生動態指紋224，並將其與靜態指紋232進行比較。流程前進至方塊706。 At block 704, the fingerprint unit 102 accumulates the instruction information 142 in accordance with a mathematical operation based on the new fingerprint generation criteria loaded in block 703, thereby generating a dynamic fingerprint 224 and comparing it to the static fingerprint 232. Flow proceeds to block 706.

在方塊706，指紋單元102偵測到其動態指紋224及其靜態指紋232之一相符情況。流程前進至方塊708。 At block 706, fingerprint unit 102 detects a match between one of its dynamic fingerprint 224 and its static fingerprint 232. Flow proceeds to block 708.

在方塊708，控制邏輯234以控制信號144通知重設單元104已找到新的相符情況，且重設單元104係回應地以在方塊706中與動態指紋224相符的新靜態指紋232有關的組態設定以重設動態重設功能單元128。流程結束於方塊708。 At block 708, the control logic 234 notifies the reset unit 104 that a new match condition has been found with the control signal 144, and the reset unit 104 responsively configures the new static fingerprint 232 that corresponds to the dynamic fingerprint 224 in block 706. The setting is to reset the dynamic reset function unit 128. Flow ends at block 708.

雖然第7圖描述指紋單元102僅一次有效地串接(chain)至其本身，更適宜地，指紋單元102可串接至其本身更多次。更進一步，雖然第6圖中僅描述兩個指紋單元102的串接，更適宜地，所有的指紋單元102可依同樣的方式進行串接。更進一步，第6圖之實施例可與第7圖之實施例合併，使得用於正在搜尋的相符情況之目前載入至指紋單元102之靜態指紋的集合會動態地變化，使得具有長於指紋單元102之數量的程式部分之鏈結的數量可被偵測到，且動態重設功能單元128亦可依據需求被動態重設。 Although FIG. 7 depicts fingerprint unit 102 effectively chained to itself only once, it is preferred that fingerprint unit 102 can be cascaded to itself more times. Further, although only the concatenation of the two fingerprint units 102 is described in FIG. 6, it is preferable that all the fingerprint units 102 can be serially connected in the same manner. Furthermore, the embodiment of FIG. 6 can be combined with the embodiment of FIG. 7 such that the set of static fingerprints currently loaded into the fingerprint unit 102 for the matching situation being searched dynamically changes so as to be longer than the fingerprint unit. The number of links of the program portion of 102 can be detected, and the dynamic reset function unit 128 can also be dynamically reset according to requirements.

請參考第8圖，第8圖顯示依據本發明另一實施例中第1圖之指紋單元102的方塊圖。第8圖之指紋單元102與第2圖中的指紋單元102類似，然而其包括了一指令計數器822、一第二比較器826、以及一靜態指令計數值832。 Please refer to FIG. 8. FIG. 8 is a block diagram showing the fingerprint unit 102 of FIG. 1 according to another embodiment of the present invention. The fingerprint unit 102 of FIG. 8 is similar to the fingerprint unit 102 of FIG. 2, however it includes an instruction counter 822, a second comparator 826, and a static instruction count value 832.

指令計數器822接收來自第1圖之動態重設功能單元128之指令資訊142，其為一動態計數值，並在每次遇到由控制邏輯234所接收的指令計數產生準則838所指定類型之指令時產生一結果824。更適宜地，指令計數產生準則838指定要計數的指令類型。在一實施例中，要計數的指令類型包括所有指令、副程式呼叫類型指令、回傳類型指令、NOP類型指令、以及經陷阱至微程式碼的指令(意即用微程式碼實現)。在一實施例中，數學運算電路222僅累計特定類型且由指令計數器所計數的指令資訊142，而所排除之指令類型的指令資訊142不會被數學運算電路222所累計。在一實施例中，NOP指令包括除了單位元組x86 NOP指令之外的指令，例如是多位元組指令，其可有效地做為一NOP指令(0x90)，其細節將於第10圖中詳述。 The instruction counter 822 receives the instruction information 142 from the dynamic reset function unit 128 of FIG. 1, which is a dynamic count value, and each time it encounters an instruction of the type specified by the instruction count generation criteria 838 received by the control logic 234. A result 824 is produced. Preferably, the instruction count generation criteria 838 specifies the type of instruction to count. In one embodiment, the types of instructions to be counted include all instructions, subroutine call type instructions, return type instructions, NOP type instructions, and instructions that are trapped to the microcode (ie, implemented using microcode). In one embodiment, the math operation circuit 222 accumulates only the instruction information 142 of a particular type and counted by the instruction counter, and the instruction information 142 of the excluded instruction type is not accumulated by the math operation circuit 222. In an embodiment, the NOP instruction includes instructions other than the unit tuple x86 NOP instruction, such as a multi-byte instruction, which can effectively be used as a NOP instruction (0x90), the details of which will be in FIG. Detailed.

比較器826係比較由指令計數器822所產生的比較動態指令計數值824及靜態指令計數值832，若兩個指令計數值相符，則產生一真值於提供至控制邏輯234的一第二相符信號。 在一實施例中，當達到一停止條件時，比較器826僅進行比較動作。更適宜地，一裝置驅動器及/或微程式碼係載入靜態指令計數值832及指令計數產生準則838。當控制邏輯234偵測到在相符信號828的一真值時，控制邏輯234利用控制信號144通知重設單元104該相符情況。除此之外，控制邏輯234利用一串 接信號244通知其他的指紋單元102該相符情況。控制邏輯234可載入衰減計數值242以回應該相符情況。更適宜地，可採用類似於第3圖所述之方式將靜態指令計數值832及指令計數產生準則838編譯至已知目標程式部分的資料庫中。 The comparator 826 compares the comparison dynamic command count value 824 and the static command count value 832 generated by the instruction counter 822. If the two instruction count values match, a true value is generated for a second coincidence signal supplied to the control logic 234. . In an embodiment, comparator 826 performs only the comparison action when a stop condition is reached. Preferably, a device driver and/or microcode system loads static instruction count value 832 and instruction count generation criteria 838. When the control logic 234 detects a true value of the coincidence signal 828, the control logic 234 notifies the reset unit 104 of the match condition using the control signal 144. In addition, control logic 234 utilizes a string The signal 244 notifies the other fingerprint unit 102 of the match. Control logic 234 can load decay count value 242 to reflect the match. Preferably, the static instruction count value 832 and the instruction count generation criteria 838 can be compiled into a database of known target program portions in a manner similar to that described in FIG.

請參考第9圖，第9圖顯示依據本發明一實施例中之微處理器100動態重設其本身之運作流程圖。第9圖在某些方面與第4圖類似；然而，第9圖描述指紋單元102動態重設微處理器100之操作係回應偵測到一靜態指令計數值而不是一靜態指紋，其細節係如下所述。然而，需注意的是指紋單元102可用以同時偵測指紋及指令計數值。除此之外，指紋單元102可用串接的方式運作(例如第6圖及第7圖之實施例所述)，讓指紋單元102載入以同時偵測所需的指紋及指令計數值以動態重設微處理器100。該流程開始於方塊902。 Please refer to FIG. 9. FIG. 9 is a flow chart showing the operation of the microprocessor 100 dynamically resetting itself according to an embodiment of the invention. Figure 9 is similar in some respects to Figure 4; however, Figure 9 depicts the fingerprint unit 102 dynamically resetting the operation of the microprocessor 100 in response to detecting a static command count value rather than a static fingerprint, the details of which are As described below. However, it should be noted that the fingerprint unit 102 can be used to simultaneously detect fingerprints and command count values. In addition, the fingerprint unit 102 can be operated in a serial manner (for example, as described in the embodiments of FIGS. 6 and 7), and the fingerprint unit 102 is loaded to simultaneously detect the required fingerprint and the instruction count value to be dynamic. The microprocessor 100 is reset. The process begins at block 902.

在方塊902，微處理器100接收包括靜態指令計數值及第1圖中有關的組態設定及指令計數產生準則之指紋設定準則表126。流程前進至方塊904。 At block 902, the microprocessor 100 receives a fingerprint setting criteria table 126 that includes a static command count value and associated configuration settings and command count generation criteria in FIG. Flow proceeds to block 904.

在方塊904，指紋單元102載入靜態指令計數值及指令計數產生準則。流程前進至方塊906。 At block 904, fingerprint unit 102 loads the static instruction count value and the instruction count generation criteria. Flow proceeds to block 906.

在方塊906，當動態重設功能單元128正依據在組態暫存器124中的目前組態設定執行指令時，指紋單元102依據在方塊904中所載入的指令計數產生準則以計數指令，藉以產生動態指令計數值824，並將其與在方塊904中所載入的靜態指令計數值832進行比較。流程前進至決定方塊908。 At block 906, when the dynamic reset function unit 128 is executing an instruction in accordance with the current configuration settings in the configuration register 124, the fingerprint unit 102 counts the generation criteria in accordance with the instruction count loaded in block 904 to count the instructions. The dynamic instruction count value 824 is generated and compared to the static instruction count value 832 loaded in block 904. Flow proceeds to decision block 908.

在決定方塊908，指紋單元102(例如比較器826及控 制邏輯234)決定在靜態指令計數值及動態指令計數值之間是否相符。若是，則該流程前進至方塊912；否則，流程回到方塊906。 At decision block 908, fingerprint unit 102 (eg, comparator 826 and control) The logic 234) determines whether there is a match between the static instruction count value and the dynamic instruction count value. If so, the flow proceeds to block 912; otherwise, the flow returns to block 906.

在方塊912，控制邏輯234利用控制信號144通知重設單元104該相符情況，且重設單元104回應地利用在方塊908中與動態指令計數值相符之靜態指令計數值有關的組態設定以重設動態重設功能單元128(例如，對組態暫存器124進行寫入操作)。流程結束於方塊912。 At block 912, control logic 234 notifies reset unit 104 of the match condition using control signal 144, and reset unit 104 responsively utilizes the configuration settings associated with the static instruction count value in block 908 that corresponds to the dynamic instruction count value. A dynamic reset function unit 128 is provided (eg, a write operation to the configuration register 124). Flow ends at block 912.

上述所介紹的動態重設之實施例包含成本取捨的議題。首先，指紋單元的硬體晶片實際面積及功耗會有成本。 第二，改變組態設定亦會有成本，其係來自暫時停止(suspend)指令處理以改變組態設定。此成本亦可來自所辨識別名指令串為少數實例而改變的組態設定所導致較低的效能。 The embodiment of the dynamic reset described above includes the issue of cost trade-offs. First, there is a cost to the actual area and power consumption of the hard disk of the fingerprint unit. Second, there are costs associated with changing configuration settings, which are caused by suspend instruction processing to change configuration settings. This cost can also result from lower performance resulting from configuration settings that are changed for a few instances of the identified alias command string.

整合NOP滑動偵測器Integrated NOP sliding detector

在此所介紹的指紋單元之另一個用處是偵測一NOP滑動(可稱為NOP slide或NOP sled)。 Another use of the fingerprint unit described herein is to detect a NOP slip (which may be referred to as NOP slide or NOP sled).

NOP滑動係指來自一處理器擷取並執行指令之一記憶體之連續NOP指令序列。NOP滑動通常是入侵者未經許可存取電腦系統的途徑。NOP指令係指可執行一運作的指令，但它並不影響處理器的架構狀態、或是在入侵者試圖未經許可存取電腦系統，包括處理器所接受的情形下，一部分影響架構狀態。NOP滑動的使用在電腦安全之領域為習知技術，但在此會簡短介紹。 A NOP slide is a sequence of consecutive NOP instructions from a processor that fetches and executes one of the instructions. NOP slipping is usually the way an intruder gains unauthorized access to a computer system. A NOP instruction is an instruction that can perform an operation, but it does not affect the architectural state of the processor, or it affects the state of the architecture in the event that an intruder attempts to access the computer system without permission, including the processor. The use of NOP slip is a well-known technique in the field of computer security, but it will be briefly introduced here.

入侵者會試圖發掘在電腦系統上運作的具有執行 權限(executive privileges)軟體之弱點。藉由發現弱點，入侵者可讓「殼碼(shellcode)」寫入至電腦系統的記憶體中。殼碼會執行對入侵者有利的動作，例如提供系統的存取執行權限，其目的是讓控制權轉移到殼碼。然而，某些已發現弱點的性質是讓在記憶體中的目標位址不知不覺地轉移，因此目標位址是無法準確得知的。當然，在一些例子中根本不知道目標位址，而入侵者依賴少量的相似性統計將目標位址視為殼碼。第一種方式是入侵者試圖以寫入許多殼碼的拷貝至記憶體來增強少量相似度統計。第二種方式是用許多不同次數來嘗試攻擊。第三種方式是使用NOP滑動。 The intruder will try to discover the execution of the computer system The weakness of the executive privileges software. By finding weaknesses, an intruder can write "shellcode" into the memory of a computer system. The shell code performs actions that are beneficial to the intruder, such as providing access to the system, the purpose of which is to transfer control to the shell code. However, some of the weaknesses that have been found are that the target address in the memory is unknowingly transferred, so the target address cannot be accurately known. Of course, in some cases, the target address is not known at all, and the intruder relies on a small amount of similarity statistics to treat the target address as a shell code. The first way is that an intruder attempts to enhance a small amount of similarity statistics by writing a copy of many shell codes to the memory. The second way is to try the attack in many different times. The third way is to use NOP sliding.

入侵者會將NOP滑動寫入在殼碼之前，亦即，其可為轉移控制權提供一安全降落點。NOP滑動可能非常大，舉例來說，可以是數十萬位元組大小，只要目標位址之控制權轉移到NOP滑動之內的某處，處理器會僅執行NOP指令，直到其達到並執行殼碼為止。執行(一可能大數量)的NOP指令對於入侵者來說是可接受的，因為除非是入侵者所不關心的方式，NOP指令不會改變處理器的架構狀態。入侵者可能會寫入NOP滑動的許多拷貝及殼碼，且可能嘗試許多次使用這種方式進行入侵，而上述全部方式之合併可增進取得已執行殼碼的相似度。 The intruder will write the NOP slip before the shell code, that is, it can provide a safe landing point for the transfer control. The NOP slip can be very large. For example, it can be hundreds of thousands of bytes. As long as the control of the target address moves somewhere within the NOP slip, the processor will only execute the NOP command until it reaches and executes. The shell code is up. Execution (a possibly large number) of NOP instructions is acceptable to the intruder because the NOP instruction does not change the architectural state of the processor unless it is a way that the intruder does not care. The intruder may write many copies of the NOP slip and the shell code, and may attempt to invade this way many times, and the combination of all of the above methods may improve the similarity of the executed shell code.

因為NOP滑動常常會包含於在入侵者之攻擊中，電腦系統可分析在網路上傳輸至一電腦系統的封包以搜尋一NOP滑動。若在一封包中偵測到NOP滑動，該封包會被丟棄(discard)。該技巧常常用於網路攻擊偵測系統(network intrusion detection system，NIDS)。NIDS的缺點是封包可能被 加密，因此會更難偵測NOP滑動。更進一步，攻擊者之輸入包括NOP滑動及殼碼亦可能被加密。在此處所介紹的NOP滑動偵測器實施例的優點，是其可在當處理器中的NOP指令序列將要被執行時偵測該序列，也因此可保證在當時一定會被解碼且被NOP滑動偵測器所檢查。 Because NOP slips are often included in an attack by an intruder, the computer system can analyze packets transmitted over the network to a computer system to search for a NOP slip. If a NOP slip is detected in a packet, the packet will be discarded. This technique is often used in network intrusion detection systems (NIDS). The disadvantage of NIDS is that the packet may be Encrypted, so it is more difficult to detect NOP slips. Further, the attacker's input including NOP slip and shell code may also be encrypted. An advantage of the NOP slip detector embodiment described herein is that it can detect the sequence when a sequence of NOP instructions in the processor is to be executed, and thus can be guaranteed to be decoded and slipped by the NOP at that time. Checked by the detector.

請參考第10圖，第10圖顯示依據本發明一實施例中微處理器100偵測NOP滑動之運作流程圖，特別是指紋單元102被使用為一NOP滑動偵測器。NOP指令為可執行一動作之指令，其不會影響到處理器之架構狀態(除了更新指令指標)或是僅以一預定方式影響架構狀態。微處理器100之設計者在設計預定方式時，需了解對入侵者而言有哪些未經許可而得到電腦系統，包括微處理器100，之存取權的方式是可接受的，且此方式會隨著殼碼所採取的動作而變化。依據不同實施例，在方塊1004由指令計數器822所計數的NOP指令之列表，其係為了重置條件之目的而用於判斷非NOP指令，如下所述-包括下面多種組合：微處理器100之指令集中的架構性定義的NOP指令(例如x86架構NOP指令，0x90)；分支(branch)指令，其係分支至下一循序指令；除了架構狀態之一預定集合之外，例如是一或兩個條件旗標暫存器(例如x86 EFLAGS)，及堆疊指標暫存器，不會改變微處理器100之架構狀態的指令。例如下列x86架構指令：PUSH ES(0x06)、PUSH CS(0x0E)、PUSH SS(0x16)、PUSH DS(0x1E)、PUSH register(0x50-0x57)、PUSH SP(0x5C)、PUSHA(0x60)、WAIT(0x9B)、SAHF(0x9E)、REPNE prefix(0xF2)、CLD(0xFC)、STD(0xFD)、CLC(0xF8)、STC(0xF9)、CMC(0xF5)。 除此之外，在微處理器100之指令集架構具有變長度指令的一實施例中，NOP指令的列表會被包含於包括多位元組NOP指令的多種組合中，其中個別所取得的指令之各位元組為一NOP指令。換個方式來說，一多位元組NOP指令具有一種特性，使得若控制權轉移至指令的任何位元組，剩下的位元組或指令的位元組會構成微處理器100之指令集架構所定義的一有效指令(例如不會產生一無效指令例外)，否則具有與一單位元組NOP指令相同的特性。下列例子為x86架構之多位元組NOP指令：2位元組CMP指令，其中modRM位元具有一單位元組NOP指令(ox38-0x3B)的數值；2位元組CMP指令，其中的直接位元組具有一單元位組NOP指令(0x3C)之數值；3位元組CMP指，其中的modRM位元組及直接位元組具有一單位元組NOP指令(0x80,0x83)的數值；2位元組TST指令，其中modRM位元組具有一單位元組NOP指令(0x84-0x85)的數值；2位元組TST指令，其中的直接位元組具有一單一位元組NOP指令(0xA8)的數值；2位元組包裝指令，其中modRM位元組具有一單一位元組NOP指令的數值，例如是PMADDWD(0xF5)、PSUBB(0xF8)、PSUBW(0xF9)、PADDB(0xFC)、PADDW(0xFD)。流程開始於方塊1002。 Please refer to FIG. 10. FIG. 10 is a flow chart showing the operation of the microprocessor 100 for detecting NOP slip according to an embodiment of the present invention. In particular, the fingerprint unit 102 is used as a NOP slip detector. The NOP instruction is an instruction that can perform an action that does not affect the architectural state of the processor (except for updating the instruction metrics) or affects the architectural state only in a predetermined manner. When designing the predetermined mode, the designer of the microprocessor 100 needs to know which of the intruders have access to the computer system, including the microprocessor 100, and the access method is acceptable, and this way It will change with the action taken by the shell code. In accordance with various embodiments, a list of NOP instructions counted by instruction counter 822 at block 1004 is used to determine non-NOP instructions for resetting conditions, as described below - including the following combinations: microprocessor 100 An architecturally defined NOP instruction in the instruction set (eg, x86 architecture NOP instruction, 0x90); a branch instruction that branches to the next sequential instruction; in addition to a predetermined set of architectural states, such as one or two The conditional flag register (eg, x86 EFLAGS), and the stacked indicator register, do not change the instruction of the microprocessor 100's architectural state. For example, the following x86 architecture instructions: PUSH ES (0x06), PUSH CS (0x0E), PUSH SS (0x16), PUSH DS (0x1E), PUSH register (0x50-0x57), PUSH SP (0x5C), PUSHA (0x60), WAIT (0x9B), SAHF (0x9E), REPNE prefix (0xF2), CLD (0xFC), STD (0xFD), CLC (0xF8), STC (0xF9), CMC (0xF5). In addition, in an embodiment in which the instruction set architecture of the microprocessor 100 has a variable length instruction, the list of NOP instructions is included in a plurality of combinations including a multi-byte NOP instruction, wherein the individual acquired instructions Each tuple is a NOP instruction. In another way, a multi-byte NOP instruction has a property such that if control is transferred to any byte of the instruction, the remaining byte or instruction byte constitutes the instruction set of the microprocessor 100. A valid instruction defined by the architecture (for example, does not produce an invalid instruction exception), otherwise it has the same characteristics as an unary NOP instruction. The following example is a multi-byte NOP instruction for the x86 architecture: a 2-bit CMP instruction, where the modRM bit has a value of one unit tuple NOP instruction (ox38-0x3B); a 2-byte CMP instruction, where the direct bit The tuple has a value of a unit group NOP instruction (0x3C); the 3-bit tuple CMP refers to a modRM byte and a direct byte having a value of a unit tuple NOP instruction (0x80, 0x83); a tuple TST instruction, wherein the modRM byte has a value of a unit tuple NOP instruction (0x84-0x85); a 2-byte TST instruction, wherein the direct byte has a single byte NOP instruction (0xA8) Numeric; 2-byte packed instruction, where the modRM byte has the value of a single byte NOP instruction, such as PMADDWD(0xF5), PSUBB(0xF8), PSUBW(0xF9), PADDB(0xFC), PADDW(0xFD ). The flow begins at block 1002.

在方塊1002，指紋單元102載入靜態指令計數值822及指令計數產生準則838，如同第8圖及第9圖之實施例所述的方式。更適宜地，靜態指令計數值832可讓使用者或系統軟體藉由指紋程式化暫存器132而可程式化。在一實施例中，靜態指令計數值832係透過微處理器100之熔絲而可程式化。在一實施例中，起始條件為偵測一回傳指令，重置條件為偵測到不 是NOP指令的指令(即為非NOP指令)，且沒有指定停止條件。其他實施例亦考量於本發明中，例如其起始條件為偵測到一副程式呼叫指令、由中斷指令回傳、或是一系統呼叫或回傳指令。流程前進至方塊1004。 At block 1002, fingerprint unit 102 loads static instruction count value 822 and instruction count generation criteria 838, as described in the embodiments of Figures 8 and 9. Preferably, the static command count value 832 allows the user or system software to be stylized by the fingerprint staging buffer 132. In one embodiment, the static command count value 832 is programmable by the fuse of the microprocessor 100. In an embodiment, the starting condition is detecting a backhaul instruction, and the reset condition is detecting no It is an instruction of the NOP instruction (that is, a non-NOP instruction), and no stop condition is specified. Other embodiments are also contemplated in the present invention, such as starting conditions for detecting a program call instruction, returning by an interrupt command, or a system call or return command. Flow proceeds to block 1004.

在方塊1004，當微處理器100正擷取並執行指令，指紋單元102依據在方塊1002所指出的指令計數產生準則838以計算連續NOP指令，藉以產生一動態指令計數值824，並以所產生的動態指令計數值824與在方塊1002所載入的靜態指令計數值832進行比較。流程前進至決定方塊1006。 At block 1004, when the microprocessor 100 is fetching and executing an instruction, the fingerprint unit 102 generates a continuous NOP instruction in accordance with the instruction count generation criteria 838 indicated at block 1002, thereby generating a dynamic instruction count value 824, and The dynamic instruction count value 824 is compared to the static instruction count value 832 loaded at block 1002. Flow proceeds to decision block 1006.

在決定方塊1006，指紋單元102判斷動態指令計數值824是否與靜態指令計數值832相符。若是，則流程前進至方塊1008；否則，流程回到方塊1004。 At decision block 1006, fingerprint unit 102 determines whether dynamic command count value 824 matches static command count value 832. If so, the flow proceeds to block 1008; otherwise, the flow returns to block 1004.

在方塊1008，指紋單元102回應微處理器100暫停(suspend)架構指令的執行以表示該相符情況。更適宜地，指紋單元102係造成微程式碼的陷阱(trap)以回應偵測到該相符情況(例如，回應偵測到NOP滑動)。在一實施例中，微程式碼產生一無效運算碼錯誤(例如x86架構的INT 6)。在一實施例中，微程式碼產生一機器檢查例外(machine check exception，例如是x86架構的#MC,vector編號18)。在一實施例中，若微處理器100處於一虛擬機器模式(例如是x86的VMX mode)，該微程式碼離開該虛擬機器模式。在一實施例中，若微處理器處於一信任執行模式(trusted execution mode)，微程式碼係採取一安全例外動作(security exception)。流程結束於方塊1008。 At block 1008, the fingerprint unit 102 responds to the microprocessor 100 suspending execution of the architectural instructions to indicate the match. Preferably, fingerprint unit 102 causes a trap of the microcode in response to detecting the match (e.g., in response to detecting a NOP slip). In one embodiment, the microcode generates an invalid opcode error (e.g., INT 6 of the x86 architecture). In one embodiment, the microcode generates a machine check exception (for example, #MC, vector number 18 for x86 architecture). In one embodiment, if the microprocessor 100 is in a virtual machine mode (eg, a VMX mode of x86), the microcode leaves the virtual machine mode. In one embodiment, if the microprocessor is in a trusted execution mode, the microcode takes a security exception. Flow ends at block 1008.

雖然指紋單元及數學運算電路之特定實施例已被 揭露，需了解的是其他實施例可用於產生動態指紋及指令計數值，並偵測靜態指紋及指令計數值之相符情況。 Although specific embodiments of fingerprint units and mathematical operations circuits have been It should be understood that other embodiments may be used to generate dynamic fingerprints and command count values, and to detect the coincidence of static fingerprints and instruction count values.

雖然以上敘述本發明多種實施方式，必須聲明的是，上述內容乃本技術的部分應用例子，並非用來限定本發明的範圍。熟知電腦技術領域者可依循本發明特徵，以現有技術另外發展出許多變形。例如，可以軟體方式實現本案所揭露的內容，例如，所揭露之設備或方法之功能、製作、模型化、模擬、說明以及/或測試。上述軟體可採用常見的程式語言(例如，C、C++)、硬體描述語言(hardware description language，HDL)包括Verilog HDL、VHDL…等或其他可用的程式語言。上述軟體可載於現有的任何電腦儲存媒體，例如，磁記錄裝置(magnetic tape)、半導體(semiconductor)、磁碟(magnetic disk)、或光碟(optical disc、如CD-ROM、DVD-ROM等)，也可載於網路、有線系統、或其他通訊媒體。本發明所揭露的各種裝置與方法可由一半導體智慧財產權核心-例如一微處理器核心，可由硬體描述語言實現-保護，且可被轉換為硬體型式，以積體電路方式製作。此外，所揭露之裝置與方法也可由硬體與軟體共同設計實現。因此，本發明不應受上述任何實施方式所限定，應當根據申請專利範圍的內容作解讀。特別是，本發明可被實現於一微處理器中，實現一般常用的電腦。本發明技術領域人員有可能基於本發明，以所揭露的概念以及所述之特殊實施方式為基礎，設計或調整其他結構，以在不偏離申請專利範圍所界定之內容的前提下，發展與本發明具有同樣目的的技術。 While the various embodiments of the present invention have been described above, it is to be understood that the foregoing is a part of the application of the present invention and is not intended to limit the scope of the invention. Those skilled in the art of computer technology can follow the features of the present invention and additionally develop many variations in the prior art. For example, the disclosure of the present invention can be implemented in software, for example, the functionality, fabrication, modeling, simulation, illustration, and/or testing of the disclosed device or method. The above software can use common programming languages (for example, C, C++), hardware description language (HDL) including Verilog HDL, VHDL, etc. or other available programming languages. The above software may be carried on any existing computer storage medium, such as a magnetic tape, a semiconductor, a magnetic disk, or an optical disc such as a CD-ROM or a DVD-ROM. It can also be stored on a network, cable system, or other communication medium. The various apparatus and methods disclosed herein may be implemented by a semiconductor intellectual property core, such as a microprocessor core, which may be implemented and protected by a hardware description language, and may be converted to a hard type and fabricated in an integrated circuit. In addition, the disclosed apparatus and method can also be implemented by a combination of a hardware and a software. Therefore, the present invention should not be limited by any of the above embodiments, and should be construed in accordance with the scope of the claims. In particular, the present invention can be implemented in a microprocessor to implement a commonly used computer. It is possible to design or adjust other structures based on the disclosed concepts and the specific embodiments described above, based on the present invention, to develop and align without departing from the scope defined by the scope of the patent application. Inventions have the same purpose.

100‧‧‧微處理器 100‧‧‧Microprocessor

102‧‧‧指紋單元 102‧‧‧Finger unit

104‧‧‧重設單元 104‧‧‧Reset unit

124‧‧‧組態暫存器 124‧‧‧Configuration register

126‧‧‧指紋設定準則表 126‧‧‧Finger setting criteria table

128‧‧‧動態重設功能單元 128‧‧‧Dynamic reset function unit

132‧‧‧指紋程式化暫存器 132‧‧‧Finger stylized register

142‧‧‧指令資訊 142‧‧‧Directive Information

144‧‧‧控制信號 144‧‧‧Control signal

Claims (48)

一種微處理器，包括：複數個動態重設功能單元；一指紋；一指紋單元，其中當該複數個動態重設功能單元依據一第一組態設定以執行複數個指令時，該指紋單元係依據一數學運算以累計關於該複數個指令之一指令資訊，藉以產生一結果；以及一重設單元，用以依據一第二組態設定重設該複數個動態重設功能單元以執行該複數個指令，藉以回應該結果與該指紋相符。 A microprocessor includes: a plurality of dynamic reset function units; a fingerprint; a fingerprint unit, wherein when the plurality of dynamic reset function units are configured according to a first configuration to execute a plurality of instructions, the fingerprint unit is And generating a result according to a mathematical operation to accumulate information about one of the plurality of instructions; and a resetting unit for resetting the plurality of dynamic reset function units according to a second configuration setting to execute the plurality of The instruction, by which the result is matched with the fingerprint. 如申請專利範圍第1項所述之微處理器，其中該指紋單元包括一多輸入位移暫存器，用以累計該指令資訊。 The microprocessor of claim 1, wherein the fingerprint unit comprises a multi-input displacement register for accumulating the instruction information. 如申請專利範圍第2項所述之微處理器，其中該多輸入位移暫存器係依據使用一最大計數多項式的一數學運算以累計該指令資訊。 The microprocessor of claim 2, wherein the multi-input displacement register is based on a mathematical operation using a maximum count polynomial to accumulate the instruction information. 如申請專利範圍第1項所述之微處理器，其中該指紋及該第二組態設定係透過一微程式碼更新而可程式化。 The microprocessor of claim 1, wherein the fingerprint and the second configuration setting are programmable by a microcode update. 如申請專利範圍第1項所述之微處理器，其中該指令資訊包括一指令位址及各指令的複數個指令部分。 The microprocessor of claim 1, wherein the instruction information comprises an instruction address and a plurality of instruction parts of each instruction. 如申請專利範圍第5項所述之微處理器，其中該指紋單元係動態可重設以累計該指令位址及該複數個指令部分的複數個不同組合。 The microprocessor of claim 5, wherein the fingerprint unit is dynamically resettable to accumulate the instruction address and a plurality of different combinations of the plurality of instruction portions. 如申請專利範圍第1項所述之微處理器，其中該指紋單元接 收一或多個起始條件，其中當該指紋單元偵測到該一或多個起始條件之一者時，該指紋單元僅依據產生該結果之該數學運算以開始累計該指令資訊。 The microprocessor of claim 1, wherein the fingerprint unit is connected Receiving one or more start conditions, wherein when the fingerprint unit detects one of the one or more start conditions, the fingerprint unit begins to accumulate the instruction information only according to the mathematical operation that produces the result. 如申請專利範圍第1項所述之微處理器，其中該指紋單元接收一或多個停止條件，其中當該指紋單元偵測到該一或多個停止條件之一者時，該指紋單元依據產生該結果之該數學運算以停止累計該指令資訊。 The microprocessor of claim 1, wherein the fingerprint unit receives one or more stop conditions, wherein when the fingerprint unit detects one of the one or more stop conditions, the fingerprint unit is based on The mathematical operation of the result is generated to stop accumulating the instruction information. 如申請專利範圍第8項所述之微處理器，其中當該指紋單元偵測到該一或多個該停止條件時，該指紋單元將該結果與該指紋進行比較。 The microprocessor of claim 8, wherein the fingerprint unit compares the result with the fingerprint when the fingerprint unit detects the one or more of the stop conditions. 如申請專利範圍第1項所述之微處理器，其中該指紋單元接收一或多個重置條件，其中當該指紋單元偵測到該一或多個重置條件之一者時，該指紋單元依據產生該結果之該數學運算以清除該結果並重新累計該指令資訊。 The microprocessor of claim 1, wherein the fingerprint unit receives one or more reset conditions, wherein when the fingerprint unit detects one of the one or more reset conditions, the fingerprint The unit relies on the mathematical operation that produces the result to clear the result and re-accumulate the instruction information. 如申請專利範圍第1項所述之微處理器，其中該指紋及該第二組態設定係透過在該微處理器上所執行的一系統軟體而可程式化。 The microprocessor of claim 1, wherein the fingerprint and the second configuration are programmable by a system software executed on the microprocessor. 如申請專利範圍第1項所述之微處理器，更包括：一計數器，其係可被載入以回應該結果與該指紋相符，其中該重設單元係依據回應該計數器已過期的該第一組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 The microprocessor of claim 1, further comprising: a counter that can be loaded to match the fingerprint with the result, wherein the reset unit is based on the response counter having expired A configuration setting to reset the plurality of dynamic reset function units to execute the plurality of instructions. 如申請專利範圍第1項所述之微處理器，更包括：複數個第二組態設定，其與複數個指紋有關； 複數個指紋單元，其中當該複數個動態重設功能單元依據該第一組態設定以執行該複數個指令時，各指紋單元係依據產生一結果之一數學運算以累計各指令之該指令資訊；以及其中該重設單元係依據該複數個第二組態設定之一者以重設該複數個動態重設功能單元以執行該複數個指令，其中該複數個第二組態設定之該者係回應該複數個指紋單元之一者的該結果與相關的該複數個指紋之一者相符。 The microprocessor of claim 1, further comprising: a plurality of second configuration settings, which are related to the plurality of fingerprints; a plurality of fingerprint units, wherein when the plurality of dynamic reset function units are configured to execute the plurality of instructions according to the first configuration, each fingerprint unit is based on a mathematical operation of generating a result to accumulate the instruction information of each instruction And wherein the reset unit is responsive to one of the plurality of second configuration settings to reset the plurality of dynamic reset function units to execute the plurality of instructions, wherein the plurality of second configuration settings are The result of returning to one of the plurality of fingerprint units corresponds to one of the associated plurality of fingerprints. 如申請專利範圍第1項所述之微處理器，更包括：一第二指紋；一第二指紋單元，其中當該複數個動態重設功能單元依據該第一組態設定執行該複數個指令時，該第二指紋單元依據產生一第二結果之一數學運算以累計該複數個指令之一指令資訊；以及其中該第一指紋單元係依據產生該第一結果之該數學運算以累計該指令資訊，藉以回應該第二指紋單元表示該第二結果與該第二指紋相符。 The microprocessor of claim 1, further comprising: a second fingerprint; a second fingerprint unit, wherein the plurality of dynamic reset function units execute the plurality of instructions according to the first configuration setting And the second fingerprint unit is configured to accumulate one of the plurality of instructions according to a mathematical operation for generating a second result; and wherein the first fingerprint unit is based on the mathematical operation for generating the first result to accumulate the instruction Information, by which the second fingerprint unit is returned to indicate that the second result matches the second fingerprint. 如申請專利範圍第1項所述之微處理器，更包括：一第二指紋；其中在依據產生該第一結果之該數學運算以累計該指令資訊之前，該指紋單元係依據產生一第二結果之該數學運算以累計該指令資訊；以及其中在該指紋單元偵測到該第二結果與該第二指紋相符之後，該指紋單元係依據產生該第一結果之該數學運算以累 計該指令資訊。 The microprocessor of claim 1, further comprising: a second fingerprint; wherein the fingerprint unit generates a second according to the mathematical operation for generating the first result to accumulate the instruction information The mathematical operation of the result is to accumulate the instruction information; and wherein after the fingerprint unit detects that the second result matches the second fingerprint, the fingerprint unit is tired according to the mathematical operation for generating the first result Calculate the instruction information. 一種用於一微處理器的動態重設方法，該微處理器包括一指紋及複數個動態重設功能單元，該方法包括：當該複數個動態重設功能單元依據一第一組態設定執行複數個指令時，依據一數學運算累計該複數個指令之一指令資訊以產生一結果；以及依據回應表示該結果與一指紋相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 A dynamic reset method for a microprocessor, the microprocessor comprising a fingerprint and a plurality of dynamic reset function units, the method comprising: when the plurality of dynamic reset function units are executed according to a first configuration setting a plurality of instructions, accumulating one of the plurality of instructions according to a mathematical operation to generate a result; and, according to the response, indicating that the result matches a fingerprint, the second configuration setting to reset the plurality of dynamic reset functions The unit executes the plurality of instructions. 如申請專利範圍第16項所述之方法，其中一多輸入位移暫存器係執行該累計該指令資訊之步驟。 The method of claim 16, wherein a multi-input displacement register performs the step of accumulating the instruction information. 如申請專利範圍第17項所述之方法，其中該多輸入位移暫存器係依據使用一最大計數多項式的一數學運算以執行該累計該指令資訊之步驟。 The method of claim 17, wherein the multi-input displacement register is based on a mathematical operation using a maximum count polynomial to perform the step of accumulating the instruction information. 如申請專利範圍第16項所述之方法，其中該指令資訊包括一指令位址及各指令之複數個指令部分。 The method of claim 16, wherein the instruction information comprises an instruction address and a plurality of instruction parts of each instruction. 如申請專利範圍第16項所述之方法，更包括：接收一或多個起始條件，其中當偵測到該一或多個起始條件之一者時，該微處理器僅依據產生該結果之該數學運算以開始累計該指令資訊。 The method of claim 16, further comprising: receiving one or more start conditions, wherein when detecting one of the one or more start conditions, the microprocessor only generates the The mathematical operation of the result begins to accumulate the instruction information. 如申請專利範圍第16項所述之方法，更包括：接收一或多個停止條件，其中當偵測到該一或多個停止條件之一者時，該微處理器係依據產生該結果之該數學運算以停止累計該指令資訊。 The method of claim 16, further comprising: receiving one or more stop conditions, wherein when one of the one or more stop conditions is detected, the microprocessor is based on the result This mathematical operation stops the accumulation of the instruction information. 如申請專利範圍第21項所述之方法，更包括： 當偵測到該一或多個停止條件中之一者時，比較該結果及該指紋。 For example, the method described in claim 21 of the patent scope further includes: When one of the one or more stop conditions is detected, the result and the fingerprint are compared. 如申請專利範圍第16項所述之方法，更包括：接收一或多個重置條件，其中當偵測到該一或多個重置條件之一者時，該微處理器係清除該結果並重新開始累計該指令資訊。 The method of claim 16, further comprising: receiving one or more reset conditions, wherein the microprocessor clears the result when one of the one or more reset conditions is detected And restart the accumulation of the instruction information. 一種微處理器，包括：複數個動態重設功能單元；一靜態計數值；一指令計數器，其中當該複數個動態重設功能單元依據一第一組態設定以執行複數個指令時，該指令計數器係依據一準則計數該複數個指令以產生一動態計數值；以及一重設單元，用以依據回應該動態計數值與該靜態計數值相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指令。 A microprocessor includes: a plurality of dynamic reset function units; a static count value; an instruction counter, wherein when the plurality of dynamic reset function units are configured according to a first configuration to execute a plurality of instructions, the instruction The counter counts the plurality of instructions according to a criterion to generate a dynamic count value; and a reset unit configured to reset the plurality of dynamics according to a second configuration setting corresponding to the dynamic count value and the static count value The functional unit is reset to execute the plurality of instructions. 如申請專利範圍第24項所述之微處理器，其中該準則係指示該指令計數器僅計數一特定類型之指令。 A microprocessor as claimed in claim 24, wherein the criterion is that the instruction counter only counts a particular type of instruction. 一種用於一微處理器的動態重設方法，該微處理器包括一靜態計數值及複數個動態重設功能性單元，該方法包括：當該複數個動態重設功能單元依據一第一組態設定執行複數個指令時，依據一準則以計數該複數個指令以產生一動態計數值；以及依據回應該動態計數值與該靜態計數值相符之一第二組態設定以重設該複數個動態重設功能單元以執行該複數個指 令。 A dynamic reset method for a microprocessor, the microprocessor comprising a static count value and a plurality of dynamic reset functional units, the method comprising: when the plurality of dynamic reset function units are according to a first group When a plurality of instructions are executed, the plurality of instructions are counted according to a criterion to generate a dynamic count value; and the second configuration is reset according to a second configuration setting corresponding to the static count value and the static count value to reset the plurality of Dynamically resetting functional units to perform the plural fingers make. 如申請專利範圍第26項所述之方法，其中該準則係指示該微處理器僅計數一特徵類型之指令。 The method of claim 26, wherein the criterion is an instruction to the microprocessor to count only one feature type. 一種微處理器，包括：一指令快取；一硬體狀態機，用以偵測在由該指令快取擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之一連續序列，其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，該微處理器係用以暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 A microprocessor includes: an instruction cache; a hardware state machine for detecting N inactions in an unmodified data stream of one of the instruction bytes of the instruction cache being fetched (NOP a continuous sequence of instructions, wherein N is greater than 1, and wherein the unmodified data stream is that the hardware state machine detects the contiguous sequence of N non-action commands and the instruction byte is captured No additional instructions are inserted into the unmodified data stream in time; and wherein when the consecutive sequence of N NOP instructions is detected, the microprocessor is configured to suspend the instruction fetching and executing instructions. It includes a plurality of non-action instructions. 如申請專利範圍第28項所述之微處理器，其中N之數值係透過在該微處理器所執行之一軟體而可程式化。 The microprocessor of claim 28, wherein the value of N is programmable by a software executed by the microprocessor. 如申請專利範圍第28項所述之微處理器，其中該硬體狀態機係回應偵測到一副程式回傳指令而開始計數該複數個NOP指令。 The microprocessor of claim 28, wherein the hardware state machine starts counting the plurality of NOP commands in response to detecting a program return command. 如申請專利範圍第28項所述之微處理器，其中該硬體狀態機係回應偵測到一非不動作(non-NOP)指令以開始計數該複數個NOP指令。 The microprocessor of claim 28, wherein the hardware state machine is responsive to detecting a non-NOP command to begin counting the plurality of NOP commands. 如申請專利範圍第28項所述之微處理器，其中當偵測到該複數個NOP指令之該連續序列時，該微處理器係經由陷阱而 進入該微處理器之一微程式碼。 The microprocessor of claim 28, wherein when the continuous sequence of the plurality of NOP instructions is detected, the microprocessor is via a trap Enter one of the microprocessor's microcode. 如申請專利範圍第28項所述之微處理器，其中當未偵測到該複數個NOP指令之該連續序列時，該微處理器係用以繼續由該指令快取擷取並執行指令。 The microprocessor of claim 28, wherein when the contiguous sequence of the plurality of NOP instructions is not detected, the microprocessor is operative to continue fetching and executing instructions by the instruction cache. 如申請專利範圍第28項所述之微處理器，更包括：一條件旗標暫存器；一堆疊指標暫存器；其中該複數個NOP指令包括除了該條件旗標暫存器及該堆疊指標暫存器之一或兩者之外，不改變該微處理器之一架構狀態的指令。 The microprocessor of claim 28, further comprising: a conditional flag register; a stack indicator register; wherein the plurality of NOP instructions includes the condition flag register and the stack An instruction that does not change the architectural state of one of the microprocessors, in addition to one or both of the indicator registers. 如申請專利範圍第28項所述之微處理器，其中該複數個NOP指令包括下列x86架構指令中的一或多者：PUSH ES、PUSH CS、PUSH SS、PUSH DS、PUSH register、PUSH SP、PUSHA、WAIT、SAHF、REPNE prefix、CLD、STD、CLC、STC、CMC。 The microprocessor of claim 28, wherein the plurality of NOP instructions comprise one or more of the following x86 architecture instructions: PUSH ES, PUSH CS, PUSH SS, PUSH DS, PUSH register, PUSH SP, PUSHA, WAIT, SAHF, REPNE prefix, CLD, STD, CLC, STC, CMC. 如申請專利範圍第28項所述之微處理器，其中該複數個NOP指令包括一或多個x86架構之複數個多位元組指令，其中該複數個多位元組指令之一直接位元組為一單位元組NOP指令。 The microprocessor of claim 28, wherein the plurality of NOP instructions comprise one or more x86 architecture plurality of multi-byte instructions, wherein the plurality of multi-byte instructions are directly directed The group is a unit tuple NOP instruction. 如申請專利範圍第28項所述之微處理器，其中該複數個NOP指令包括一或多個x86架構之複數個多位元組指令，其中該複數個多位元組指令之一modRM位元組為一單位元組NOP指令。 The microprocessor of claim 28, wherein the plurality of NOP instructions comprise one or more x86 architecture plurality of multi-byte instructions, wherein one of the plurality of multi-byte instructions is a modRM bit The group is a unit tuple NOP instruction. 一種用於一微處理器的偵測方法，該微處理器包括一指令 快取及一硬體狀態機，該方法包括：利用該硬體狀態機偵測在由該指令快取擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之一連續序列，其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及當偵測到N個NOP指令之該連續序列時，暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 A method for detecting a microprocessor, the microprocessor including an instruction The cache and a hardware state machine, the method comprising: detecting, by the hardware state machine, N non-actions (NOPs) in an unmodified data stream of one of the instruction byte groups captured by the instruction cache a contiguous sequence of instructions, wherein N is greater than 1, and wherein the unmodified data stream is when the hardware state machine detects the contiguous sequence of N non-action commands and the time at which the instruction byte is captured No additional instructions are inserted into the unmodified data stream; and when the consecutive sequence of N NOP instructions is detected, the instruction fetches and executes the instruction, including a plurality of non-action instructions. 如申請專利範圍第38項所述之方法，其中N之數值係透過在該微處理器所執行之一軟體而可程式化。 The method of claim 38, wherein the value of N is programmable by a software executed by the microprocessor. 如申請專利範圍第38項所述之方法，其中該硬體狀態機係回應偵測到一副程式回傳指令而開始計數該複數個NOP指令。 The method of claim 38, wherein the hardware state machine starts counting the plurality of NOP commands in response to detecting a program return command. 如申請專利範圍第38項所述之方法，其中該硬體狀態機係回應偵測到一非不動作(non-NOP)指令以開始計數該複數個NOP指令。 The method of claim 38, wherein the hardware state machine is responsive to detecting a non-NOP command to begin counting the plurality of NOP commands. 如申請專利範圍第38項所述之方法，更包括：當偵測到該複數個NOP指令之該連續序列時，經由陷阱而進入該微處理器之一微程式碼。 The method of claim 38, further comprising: entering the microcode of the microprocessor via the trap when the continuous sequence of the plurality of NOP instructions is detected. 如申請專利範圍第38項所述之方法，其中該複數個NOP指令包括除了一條件旗標暫存器及一堆疊指標暫存器之一或兩者之外，不改變該微處理器之一架構狀態的指令。 The method of claim 38, wherein the plurality of NOP instructions includes one of the microprocessors other than a condition flag register and a stack indicator register Instruction for the state of the architecture. 如申請專利範圍第38項所述之方法，其中該複數個NOP指令 包括下列x86架構指令中的一或多者：PUSH ES、PUSH CS、PUSH SS、PUSH DS、PUSH register、PUSH SP、PUSHA、WAIT、SAHF、REPNE prefix、CLD、STD、CLC、STC、CMC。 The method of claim 38, wherein the plurality of NOP instructions It includes one or more of the following x86 architecture instructions: PUSH ES, PUSH CS, PUSH SS, PUSH DS, PUSH register, PUSH SP, PUSHA, WAIT, SAHF, REPNE prefix, CLD, STD, CLC, STC, CMC. 如申請專利範圍第38項所述之方法，其中該複數個NOP指令包括一或多個x86架構之複數個多位元組指令，其中該複數個多位元組指令之一直接位元組為一單位元組NOP指令。 The method of claim 38, wherein the plurality of NOP instructions comprise one or more x86 architecture plurality of multi-byte instructions, wherein the one of the plurality of multi-byte instructions is a direct byte One unit tuple NOP instruction. 如申請專利範圍第38項所述之方法，其中該複數個NOP指令包括一或多個x86架構之複數個多位元組指令，其中該複數個多位元組指令之一modRM位元組為一單位元組NOP指令。 The method of claim 38, wherein the plurality of NOP instructions comprise one or more x86 architecture plurality of multi-byte instructions, wherein one of the plurality of multi-byte instructions is a modRM byte One unit tuple NOP instruction. 一種電腦程式產品，編碼於至少一電腦可讀媒體中以供一運算裝置使用，該運算裝置包括一微處理器，該電腦程式產品包括：一第一程式碼，用以指出該微處理器之一指令快取；以及一第二程式嗎，用以指出該微處理器之一硬體狀態機，用以偵測在由該指令快取擷取之一指令位元組之一未修改資料流中的N個不動作(NOP)指令之一連續序列，其中N大於1，且其中該未修改資料流係指在該硬體狀態機偵測具有N個不動作指令之該連續序列及該等指令位元組被擷取之時間上沒有額外的指令被***該未修改資料流中；以及其中當偵測到N個NOP指令之該連續序列時，該微處理器係用以暫停由該指令快取擷取及執行指令，其包括複數個不動作指令。 A computer program product encoded in at least one computer readable medium for use by an computing device, the computing device comprising a microprocessor, the computer program product comprising: a first code for indicating the microprocessor An instruction cache; and a second program for indicating a hardware state machine of the microprocessor for detecting an unmodified data stream of one of the instruction bytes in the instruction cache a contiguous sequence of N non-action (NOP) instructions, wherein N is greater than 1, and wherein the unmodified data stream is a contiguous sequence that detects N non-action commands at the hardware state machine and the contiguous sequence No additional instructions are inserted into the unmodified data stream at the time the instruction byte is retrieved; and wherein the microprocessor is used to suspend the instruction when the consecutive sequence of N NOP instructions is detected The cache fetches and executes the instruction, which includes a plurality of non-action instructions. 如申請專利範圍第47項所述之電腦程式產品，其中該至少一電腦可讀媒體係由一磁片、一磁帶、一磁性儲存裝置、一光學儲存裝置及一電性儲存裝置中所選擇。 The computer program product of claim 47, wherein the at least one computer readable medium is selected from the group consisting of a magnetic sheet, a magnetic tape, a magnetic storage device, an optical storage device, and an electrical storage device.