TWI506808B - Method for manufacturing solar cell and solar cell - Google Patents
Method for manufacturing solar cell and solar cell Download PDFInfo
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- TWI506808B TWI506808B TW102116373A TW102116373A TWI506808B TW I506808 B TWI506808 B TW I506808B TW 102116373 A TW102116373 A TW 102116373A TW 102116373 A TW102116373 A TW 102116373A TW I506808 B TWI506808 B TW I506808B
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Description
本發明是有關於一種矽基太陽能電池及其製造方法。The present invention relates to a bismuth based solar cell and a method of fabricating the same.
太陽能電池是一種環保能源，可直接將太陽能轉換為電能。由於在發電過程中不產生二氧化碳等溫室氣體，因此不會對環境造成污染。當光照射在太陽能電池上時，利用其光電半導體的特性，使光子與導體或半導體中的自由電子作用而產生電流。目前現有的太陽能電池依據主體材料的不同可分為矽基半導體太陽能電池、染料敏化太陽能電池及有機材料太陽能電池。其中又以矽基半導體太陽能電池的光電轉換效率較佳，但仍有改善的空間。Solar cells are an environmentally friendly source of energy that converts solar energy directly into electricity. Since no greenhouse gases such as carbon dioxide are generated during power generation, there is no environmental pollution. When light is irradiated on a solar cell, the characteristics of its optoelectronic semiconductor are utilized to cause photons to interact with free electrons in the conductor or semiconductor to generate a current. At present, existing solar cells can be classified into germanium-based semiconductor solar cells, dye-sensitized solar cells, and organic material solar cells depending on the main material. Among them, the photoelectric conversion efficiency of the germanium-based semiconductor solar cell is better, but there is still room for improvement.
基本的矽基半導體太陽能電池結構可包含第一導電型層和第二導電型層。第一導電型層與第二導電型層可分別例如為P型基板與N型半導體層。通常是將多片P型基板置入高溫爐管中，再通入三氯氧磷(POCl3 )與氧氣，以於P型基板表面的下方形成一層N型半導體層。但由於多 片P型基板是在緊密排列的情況下進行熱擴散製程，故P型基板上的某些區域無法有效接觸POCl3 與氧氣。如此將會造成這些區域的摻質濃度較低，電阻較高，使N型半導體層整體的橫向阻抗偏高。有鑑於此，目前亟需一種新穎的太陽能電池的製造方法，以期能夠改善上述問題。The basic germanium-based semiconductor solar cell structure can include a first conductive type layer and a second conductive type layer. The first conductive type layer and the second conductive type layer may be, for example, a P-type substrate and an N-type semiconductor layer, respectively. Usually, a plurality of P-type substrates are placed in a high-temperature furnace tube, and phosphorus oxychloride (POCl 3 ) and oxygen are introduced to form an N-type semiconductor layer under the surface of the P-type substrate. However, since a plurality of P-type substrates are thermally diffused in a tightly arranged arrangement, certain regions on the P-type substrate are ineffective in contact with POCl 3 and oxygen. This will result in a lower dopant concentration in these regions and a higher resistance, which makes the overall lateral impedance of the N-type semiconductor layer higher. In view of this, there is a need for a novel method of manufacturing a solar cell in order to improve the above problems.
本發明之一態樣提供一種製造太陽能電池的方法，其包括下列步驟。提供一第一導電型層，第一導電型層具有一上表面。摻雜一摻質至第一導電型層中，以於第一導電型層之上表面之下方形成一第二導電型層，其中第二導電型層具有一輕摻雜區。利用一雷射摻雜製程摻雜摻質至第二導電型層之輕摻雜區中，以於第二導電型層之輕摻雜區中形成一半導體圖案層，其中半導體圖案層之摻質濃度大於第二導電型層之輕摻雜區之摻質濃度。One aspect of the present invention provides a method of fabricating a solar cell comprising the following steps. A first conductive type layer is provided, and the first conductive type layer has an upper surface. Doping a dopant into the first conductive type layer to form a second conductive type layer under the upper surface of the first conductive type layer, wherein the second conductive type layer has a lightly doped region. Doping a dopant into the lightly doped region of the second conductive type layer by a laser doping process to form a semiconductor pattern layer in the lightly doped region of the second conductive type layer, wherein the semiconductor pattern layer is doped The concentration is greater than the dopant concentration of the lightly doped region of the second conductivity type layer.
根據本發明一實施方式，第二導電型層之輕摻雜區之電阻大於或等於約130歐姆/平方。According to an embodiment of the invention, the lightly doped region of the second conductivity type layer has a resistance greater than or equal to about 130 ohms/square.
根據本發明一實施方式，半導體圖案層之電阻介於約50歐姆/平方至約90歐姆/平方。According to an embodiment of the invention, the semiconductor pattern layer has a resistance of between about 50 ohms/square and about 90 ohms/square.
根據本發明一實施方式，半導體圖案層之深度大於第二導電型層之深度。According to an embodiment of the invention, the depth of the semiconductor pattern layer is greater than the depth of the second conductivity type layer.
根據本發明一實施方式，製造方法更包括於形成半導體圖案層後，形成多個指狀電極接觸第一導電型層之上表面。According to an embodiment of the present invention, the manufacturing method further includes forming a plurality of finger electrodes to contact an upper surface of the first conductive type layer after forming the semiconductor pattern layer.
根據本發明一實施方式，製造方法更包括利用另一雷射摻雜製程形成一選擇性射極於第二導電型層中，其中選擇性射極之摻質濃度大於半導體圖案層之摻質濃度。According to an embodiment of the invention, the manufacturing method further comprises forming a selective emitter in the second conductivity type layer by using another laser doping process, wherein the dopant concentration of the selective emitter is greater than the dopant concentration of the semiconductor pattern layer .
根據本發明一實施方式，雷射摻雜製程之雷射功率小於另一雷射摻雜製程之雷射功率。According to an embodiment of the invention, the laser power of the laser doping process is less than the laser power of another laser doping process.
本發明之另一態樣提供一種太陽能電池，其包括第一導電型層、第二導電型層與半導體圖案層。第一導電型層具有一上表面。第二導電型層位於第一導電型層之上表面之下方，其中第二導電型層具有一輕摻雜區。半導體圖案層位於第二導電型層之輕摻雜區中，其中半導體圖案層之摻質濃度大於第二導電型層之輕摻雜區之摻質濃度，且半導體圖案層係利用雷射摻雜製程而形成。Another aspect of the present invention provides a solar cell including a first conductive type layer, a second conductive type layer, and a semiconductor pattern layer. The first conductive type layer has an upper surface. The second conductive type layer is located below the upper surface of the first conductive type layer, wherein the second conductive type layer has a lightly doped area. The semiconductor pattern layer is located in the lightly doped region of the second conductive type layer, wherein the dopant concentration of the semiconductor pattern layer is greater than the dopant concentration of the lightly doped region of the second conductive type layer, and the semiconductor pattern layer is doped by laser The process is formed.
根據本發明一實施方式，第二導電型層之輕摻雜區之電阻大於或等於約130歐姆/平方。According to an embodiment of the invention, the lightly doped region of the second conductivity type layer has a resistance greater than or equal to about 130 ohms/square.
根據本發明一實施方式，半導體圖案層之電阻介於約50歐姆/平方至約90歐姆/平方。According to an embodiment of the invention, the semiconductor pattern layer has a resistance of between about 50 ohms/square and about 90 ohms/square.
根據本發明一實施方式，半導體圖案層之深度大於第二導電型層之深度。According to an embodiment of the invention, the depth of the semiconductor pattern layer is greater than the depth of the second conductivity type layer.
根據本發明一實施方式，多個指狀電極接觸第一導電型層之上表面。According to an embodiment of the invention, the plurality of finger electrodes contact the upper surface of the first conductivity type layer.
根據本發明一實施方式，太陽能電池更包括多個選擇性射極設置於第二導電型層中，其中選擇性射極之摻質濃度大於半導體圖案層之摻質濃度。According to an embodiment of the invention, the solar cell further includes a plurality of selective emitters disposed in the second conductivity type layer, wherein the dopant concentration of the selective emitter is greater than the dopant concentration of the semiconductor pattern layer.
根據上述，藉由形成半導體圖案層於第二導電型層 的輕摻雜區中，以降低第二導電型層之輕摻雜區的電阻。如此一來，可降低第二導電型層整體的橫向阻抗，增加載子的傳輸路徑，進而提昇電池的光電轉換效率。According to the above, the semiconductor pattern layer is formed on the second conductive type layer In the lightly doped region, the resistance of the lightly doped region of the second conductivity type layer is lowered. In this way, the lateral impedance of the entire second conductivity type layer can be reduced, the transmission path of the carrier can be increased, and the photoelectric conversion efficiency of the battery can be improved.
3B-3B’、4B-4B’、5B-5B’‧‧‧線段3B-3B’, 4B-4B’, 5B-5B’‧‧‧ segments
100‧‧‧方法100‧‧‧ method
10、20、30‧‧‧步驟10, 20, 30‧ ‧ steps
110‧‧‧第一導電型層110‧‧‧First Conductive Layer
110a‧‧‧上表面110a‧‧‧ upper surface
110b‧‧‧下表面110b‧‧‧ lower surface
120‧‧‧第二導電型層120‧‧‧Second conductive layer
120a‧‧‧輕摻雜區120a‧‧‧lightly doped area
130‧‧‧半導體圖案層130‧‧‧Semiconductor pattern layer
140‧‧‧指狀電極140‧‧‧ finger electrode
150‧‧‧選擇性射極150‧‧‧Selective emitter
d1‧‧‧第二導電型層之深度D1‧‧‧Depth of the second conductivity type layer
d2‧‧‧半導體圖案層之深度D2‧‧‧Depth of semiconductor pattern layer
d3‧‧‧選擇性射極之深度D3‧‧‧Depth of selective emitter
第1圖係繪示依照本發明一實施方式之一種太陽能電池之製造方法的流程圖。1 is a flow chart showing a method of manufacturing a solar cell according to an embodiment of the present invention.
第2、3A-3B、4A-4B、5A-5B圖係繪示依照本發明一實施方式之一種太陽能電池之製造方法之各製程階段的示意圖。2, 3A-3B, 4A-4B, and 5A-5B are schematic views showing respective process stages of a method of manufacturing a solar cell according to an embodiment of the present invention.
第6、7圖係繪示依照本發明另一實施方式之一種太陽能電池之製造方法之製程階段的剖面示意圖。6 and 7 are schematic cross-sectional views showing a manufacturing process of a solar cell manufacturing method according to another embodiment of the present invention.
為了使本揭示內容的敘述更加詳盡與完備，下文針對了本發明的實施態樣與具體實施例提出了說明性的描述；但這並非實施或運用本發明具體實施例的唯一形式。以下所揭露的各實施例，在有益的情形下可相互組合或取代，也可在一實施例中附加其他的實施例，而無須進一步的記載或說明。The description of the embodiments of the present invention is intended to be illustrative and not restrictive. The embodiments disclosed herein may be combined or substituted with each other in an advantageous manner, and other embodiments may be added to an embodiment without further description or description.
在以下描述中，將詳細敘述許多特定細節以使讀者能夠充分理解以下的實施例。然而，可在無此等特定細節之情況下實踐本發明之實施例。在其他情況下，為簡化圖 式，熟知的結構與裝置僅示意性地繪示於圖中。In the following description, numerous specific details are set forth However, embodiments of the invention may be practiced without these specific details. In other cases, to simplify the diagram The well-known structures and devices are only schematically shown in the drawings.
本發明之一態樣提供一種製造太陽能電池的方法。第1圖係繪示依照本發明一實施方式之一種太陽能電池之製造方法100的流程圖。第2、3A-3B、4A-4B圖係繪示太陽能電池之製造方法100之各製程階段的示意圖。One aspect of the present invention provides a method of fabricating a solar cell. 1 is a flow chart showing a method 100 of fabricating a solar cell according to an embodiment of the present invention. 2, 3A-3B, and 4A-4B are schematic views showing respective process stages of the method 100 for manufacturing a solar cell.
在步驟10中，提供一第一導電型層110，如第2圖所示。第一導電型層110具有相對之上表面110a及下表面110b。第一導電型層110可為矽基板，例如單晶矽基板、多晶矽基板或非晶矽基板。在不同的實施例中，第一導電型層110可以是P型或N型的基板。在一實施例中，對第一導電型層110的上表面110a進行粗化製程，以降低入射光的反射率。例如可使用化學酸性蝕刻製程(蝕刻溶劑例如為氫氟酸或硝酸)或化學鹼性蝕刻製程(蝕刻溶劑例如為氫氧化鉀或異丙醇)對第一導電型層110的上表面110a進行粗化製程。In step 10, a first conductivity type layer 110 is provided, as shown in FIG. The first conductive type layer 110 has a relatively upper surface 110a and a lower surface 110b. The first conductive type layer 110 may be a germanium substrate such as a single crystal germanium substrate, a polycrystalline germanium substrate, or an amorphous germanium substrate. In various embodiments, the first conductive type layer 110 may be a P-type or N-type substrate. In one embodiment, the upper surface 110a of the first conductive type layer 110 is subjected to a roughening process to reduce the reflectance of incident light. For example, the upper surface 110a of the first conductive type layer 110 may be roughened using a chemical acid etching process (the etching solvent is, for example, hydrofluoric acid or nitric acid) or a chemical alkaline etching process (the etching solvent is, for example, potassium hydroxide or isopropyl alcohol). Process.
在步驟20中，如第3A-3B圖所示，摻雜摻質至第一導電型層110中，以於第一導電型層110之上表面110a之下方形成一第二導電型層120。第二導電型層120具有一輕摻雜區120a。第3A圖係繪示輕摻雜區120a的上視示意圖。第3B圖係繪示沿第3A圖中3B-3B’線段的剖面示意圖。例如可將摻質熱擴散至第一導電型層110中，以於第一導電型層110中靠近上表面110a的部分形成第二導電型層120。但在此步驟中可能發生先前技術所提及的問題，使第二導電型層120中形成摻質濃度較低的輕摻雜區120a， 導致第二導電型層120整體的橫向阻抗偏高(均勻性不佳)。因此，本發明之實施方式利用雷射摻雜製程形成半導體圖案層於輕摻雜區120a中(即下述步驟30)，以降低輕摻雜區120a的電阻，進而降低第二導電型層120整體的橫向阻抗。在一實施例中，第一導電型層110為P型基板，摻質為N型摻質，如磷基酸(HPOx )。在另一實施例中，第一導電型層110為N型基板，摻質為P型摻質，如硼酸(H3 PO3 )。在一實施例中，輕摻雜區120a的摻質濃度為小於約1016 原子/cm3 ，輕摻雜區120a以外的區域的摻質濃度為約1016 至約1017 原子/cm3 。在一實施例中，輕摻雜區120a的電阻大於或等於約130歐姆/平方(Ω/□)，輕摻雜區120a以外的區域的電阻介於約90至約130歐姆/平方。本說明書中，「電阻」一詞係指薄層電阻或薄膜電阻(Sheet Resistance,Rs)。In step 20, as shown in FIGS. 3A-3B, the doping is doped into the first conductive type layer 110 to form a second conductive type layer 120 under the upper surface 110a of the first conductive type layer 110. The second conductive type layer 120 has a lightly doped region 120a. FIG. 3A is a top view showing the lightly doped region 120a. Figure 3B is a schematic cross-sectional view taken along line 3B-3B' of Figure 3A. For example, the dopant heat may be diffused into the first conductive type layer 110 to form the second conductive type layer 120 in a portion of the first conductive type layer 110 near the upper surface 110a. However, the problem mentioned in the prior art may occur in this step, so that the lightly doped region 120a having a lower dopant concentration is formed in the second conductive type layer 120, resulting in a higher lateral impedance of the second conductive type layer 120 as a whole ( Poor uniformity). Therefore, the embodiment of the present invention forms a semiconductor pattern layer in the lightly doped region 120a (ie, step 30 below) by using a laser doping process to reduce the resistance of the lightly doped region 120a, thereby reducing the second conductive type layer 120. Overall lateral impedance. In one embodiment, the first conductive type layer 110 is a P-type substrate, and the dopant is an N-type dopant such as phosphorus acid (HPO x ). In another embodiment, the first conductive type layer 110 is an N-type substrate, and the dopant is a P-type dopant such as boric acid (H 3 PO 3 ). In one embodiment, the lightly doped region 120a has a dopant concentration of less than about 10 16 atoms/cm 3 and a region other than the lightly doped region 120a has a dopant concentration of from about 10 16 to about 10 17 atoms/cm 3 . In one embodiment, the lightly doped region 120a has a resistance greater than or equal to about 130 ohms/square (Ω/□), and the region other than the lightly doped region 120a has a resistance of between about 90 and about 130 ohms/square. In this specification, the term "resistance" means a sheet resistance or a sheet resistance (Rs).
在步驟30中，如第4A-4B圖所示，利用雷射摻雜製程摻雜摻質至第二導電型層120之輕摻雜區120a中，以於第二導電型層120之輕摻雜區120a中形成一半導體圖案層130。第4A圖係繪示半導體圖案層130的上視示意圖。第4B圖係繪示沿第4A圖中4B-4B’線段的剖面示意圖。半導體圖案層130的摻質濃度大於第二導電型層120之輕摻雜區120a的摻質濃度。故形成半導體圖案層130於輕摻雜區120a中能夠降低輕摻雜區120a的電阻，進而有效降低第二導電型層120整體的橫向阻抗。在一實施例中，半導體圖案層130的摻質濃度為約1017 至約1018 原子/cm3 ，電 阻介於約50歐姆/平方至約90歐姆/平方。在一實施例中，半導體圖案層130的深度d2大於第二導電型層120的深度d1，如第4B圖所示。在一實施例中，半導體圖案層130的深度d2為320nm，第二導電型層120的深度d1為125nm。至於半導體圖案層130的形狀及雷射製程參數，可依照第二導電型層120中摻質濃度或電阻值的分佈而決定，在此不加以限制。舉例來說，半導體圖案層130的上視輪廓可為格子形狀，如第4A圖所示。在一實施例中，雷射摻雜製程的雷射功率小於或等於130μJ。In step 30, as shown in FIG. 4A-4B, the dopant is doped into the lightly doped region 120a of the second conductive type layer 120 by a laser doping process to lightly mix the second conductive type layer 120. A semiconductor pattern layer 130 is formed in the impurity region 120a. FIG. 4A is a top view showing the semiconductor pattern layer 130. Figure 4B is a schematic cross-sectional view taken along line 4B-4B' of Figure 4A. The dopant concentration of the semiconductor pattern layer 130 is greater than the dopant concentration of the lightly doped region 120a of the second conductivity type layer 120. Therefore, the formation of the semiconductor pattern layer 130 in the lightly doped region 120a can reduce the resistance of the lightly doped region 120a, thereby effectively reducing the lateral impedance of the entire second conductive type layer 120. In one embodiment, the semiconductor pattern layer 130 has a dopant concentration of from about 10 17 to about 10 18 atoms/cm 3 and a resistance of from about 50 ohms/square to about 90 ohms/square. In an embodiment, the depth d2 of the semiconductor pattern layer 130 is greater than the depth d1 of the second conductive type layer 120, as shown in FIG. 4B. In one embodiment, the depth d2 of the semiconductor pattern layer 130 is 320 nm, and the depth d1 of the second conductive type layer 120 is 125 nm. The shape of the semiconductor pattern layer 130 and the laser process parameters may be determined according to the distribution of the dopant concentration or the resistance value in the second conductive type layer 120, which is not limited herein. For example, the top view profile of the semiconductor pattern layer 130 can be a lattice shape as shown in FIG. 4A. In one embodiment, the laser power of the laser doping process is less than or equal to 130 μJ.
以下針對摻質為磷摻質的實施例作進一步的具體說明。在步驟20中，如第3B圖所示，可將磷摻質熱擴散至P型的第一導電型層110中，以形成第二導電型層120。此時會同時形成磷矽玻璃(Phosphorous Silicate Glass,PSG)層(未繪示)覆蓋第一導電型層110的上表面110a。然後在步驟30中，如第4B圖所示，進行雷射摻雜製程，直接將磷矽玻璃層中的磷摻質摻雜至第二導電型層120之輕摻雜區120a中，以形成半導體圖案層130。故相較於形成圖案材料層後再進行熱擴散製程以形成半導體圖案層的過程，利用雷射摻雜製程直接形成半導體圖案層130較為簡便快速。The following is a further detailed description of the examples in which the dopant is a phosphorus dopant. In step 20, as shown in FIG. 3B, the phosphorus dopant may be thermally diffused into the P-type first conductivity type layer 110 to form the second conductivity type layer 120. At this time, a Phosphorous Silicate Glass (PSG) layer (not shown) is formed to cover the upper surface 110a of the first conductive type layer 110. Then, in step 30, as shown in FIG. 4B, a laser doping process is performed to directly dope the phosphorus dopant in the phosphorous-glass layer into the lightly doped region 120a of the second conductive type layer 120 to form Semiconductor pattern layer 130. Therefore, the semiconductor pattern layer 130 is directly formed by the laser doping process in comparison with the process of forming the pattern material layer and then performing the thermal diffusion process to form the semiconductor pattern layer.
另一方面，設置於輕摻雜區120a中的半導體圖案層130能夠提供經過此區域的載子更多傳輸路徑，而可提高電池的光電轉換效率。故在其它實施方式中，可利用雷射摻雜製程形成半導體圖案層130於輕摻雜區120a以外的 區域，以進一步增加電池的光電轉換效率。On the other hand, the semiconductor pattern layer 130 disposed in the lightly doped region 120a can provide more transport paths for carriers passing through this region, and can improve the photoelectric conversion efficiency of the battery. Therefore, in other embodiments, the semiconductor pattern layer 130 can be formed by using a laser doping process other than the lightly doped region 120a. Zone to further increase the photoelectric conversion efficiency of the battery.
在步驟30後，形成多個指狀電極140接觸第一導電型層110的上表面110a，如第5A-5B圖所示。如第5A-5B圖所示，半導體圖案層130未對準或未大致對準指狀電極140。指狀電極140可利用任何習知的製程方法製得。在一實施例中，第一導電型層110的上表面110a的上方有一層磷矽玻璃層，故於形成指狀電極140前，需先去除掉磷矽玻璃層。在一實施例中，在形成指狀電極140前，先形成抗反射層(未繪示)接觸第一導電型層110的上表面110a。例如可利用電漿化學氣相沉積法形成抗反射層，再利用銀膠網印與高溫製程形成指狀電極140於第一導電型層110的上表面110a的上方。當然，在形成多個指狀電極140時，可同時形成匯流電極(未繪示)。後續可形成背電極(未繪示)於第一導電型層110的下表面110b上。背電極可利用任何習知的製程方法製得，故在此不贅述。After step 30, a plurality of finger electrodes 140 are formed to contact the upper surface 110a of the first conductive type layer 110 as shown in FIGS. 5A-5B. As shown in FIGS. 5A-5B, the semiconductor pattern layer 130 is misaligned or not substantially aligned with the finger electrodes 140. Finger electrodes 140 can be made using any conventional processing method. In one embodiment, the upper surface 110a of the first conductive type layer 110 has a layer of phosphorous glass above it. Therefore, the phosphorous glass layer needs to be removed before the finger electrodes 140 are formed. In an embodiment, an anti-reflective layer (not shown) is formed to contact the upper surface 110a of the first conductive type layer 110 before forming the finger electrodes 140. For example, the anti-reflective layer can be formed by plasma chemical vapor deposition, and the finger electrode 140 can be formed over the upper surface 110a of the first conductive type layer 110 by using a silver paste screen and a high temperature process. Of course, when a plurality of finger electrodes 140 are formed, a bus electrode (not shown) can be simultaneously formed. A back electrode (not shown) may be formed on the lower surface 110b of the first conductive type layer 110. The back electrode can be fabricated by any conventional process method and will not be described herein.
第6、7圖係繪示依照本發明另一實施方式之一種太陽能電池之製造方法之製程階段的剖面示意圖。在本實施方式中，接續步驟20，在步驟30(即形成半導體圖案層130)之前或之後，利用另一雷射摻雜製程形成選擇性射極150於第二導電型層120中，如第6圖所示。選擇性射極150可形成於欲形成指狀電極的位置的正下方。之後再形成多個指狀電極140對應選擇性射極150，如第7圖所示。由於指狀電極140的下表面接觸選擇性射極150，故指狀電極140與選擇性射極150之間具有極低的接觸電阻，有助於進 一步提昇電池的光電轉換效率。上述選擇性射極150的摻質濃度大於半導體圖案層130的摻質濃度。故步驟30中的雷射摻雜製程的雷射功率小於形成選擇性射極150的雷射摻雜製程的雷射功率。在一實施例中，選擇性射極150的摻質濃度為大於約1018 原子/cm3 ，電阻介於約10歐姆/平方至約50歐姆/平方。在一實施例中，形成選擇性射極150的雷射摻雜製程的雷射功率大於180μJ。在一實施例中，選擇性射極150的深度d3大於第二導電型層120的深度d1及半導體圖案層130的深度d2。在一實施例中，選擇性射極150的深度d3為450nm，半導體圖案層130的深度d2為320nm，第二導電型層120的深度d1為125nm。6 and 7 are schematic cross-sectional views showing a manufacturing process of a solar cell manufacturing method according to another embodiment of the present invention. In this embodiment, following step 20, before or after step 30 (ie, forming the semiconductor pattern layer 130), the selective emitter 150 is formed in the second conductive type layer 120 by another laser doping process, such as Figure 6 shows. The selective emitter 150 can be formed directly below the location where the finger electrodes are to be formed. A plurality of finger electrodes 140 are then formed to correspond to the selective emitter 150, as shown in FIG. Since the lower surface of the finger electrode 140 contacts the selective emitter 150, the finger electrode 140 has a very low contact resistance with the selective emitter 150, which contributes to further improving the photoelectric conversion efficiency of the battery. The doping concentration of the selective emitter 150 is greater than the dopant concentration of the semiconductor pattern layer 130. Therefore, the laser power of the laser doping process in step 30 is less than the laser power of the laser doping process that forms the selective emitter 150. In one embodiment, the selective emitter 150 has a dopant concentration of greater than about 10 18 atoms/cm 3 and a resistance of between about 10 ohms/square to about 50 ohms/square. In one embodiment, the laser power of the laser doping process that forms the selective emitter 150 is greater than 180 μJ. In an embodiment, the depth d3 of the selective emitter 150 is greater than the depth d1 of the second conductivity type layer 120 and the depth d2 of the semiconductor pattern layer 130. In one embodiment, the depth d3 of the selective emitter 150 is 450 nm, the depth d2 of the semiconductor pattern layer 130 is 320 nm, and the depth d1 of the second conductivity type layer 120 is 125 nm.
綜合上述，本發明之實施方式藉由雷射摻雜製程形成半導體圖案層於第二導電型層的輕摻雜區中，以降低第二導電型層之輕摻雜區的電阻。如此一來，可降低第二導電型層整體的橫向阻抗，增加載子的傳輸路徑，進而提昇電池的光電轉換效率。In summary, the embodiment of the present invention forms a semiconductor pattern layer in a lightly doped region of the second conductivity type layer by a laser doping process to reduce the resistance of the lightly doped region of the second conductivity type layer. In this way, the lateral impedance of the entire second conductivity type layer can be reduced, the transmission path of the carrier can be increased, and the photoelectric conversion efficiency of the battery can be improved.
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.
4B-4B’‧‧‧線段4B-4B’‧‧‧ Segment
110‧‧‧第一導電型層110‧‧‧First Conductive Layer
120‧‧‧第二導電型層120‧‧‧Second conductive layer
120a‧‧‧輕摻雜區120a‧‧‧lightly doped area
130‧‧‧半導體圖案層130‧‧‧Semiconductor pattern layer
d1‧‧‧第二導電型層之深度D1‧‧‧Depth of the second conductivity type layer
d2‧‧‧半導體圖案層之深度D2‧‧‧Depth of semiconductor pattern layer
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