TWI506689B - 半導體裝置之製造方法 - Google Patents
半導體裝置之製造方法 Download PDFInfo
- Publication number
- TWI506689B TWI506689B TW101142147A TW101142147A TWI506689B TW I506689 B TWI506689 B TW I506689B TW 101142147 A TW101142147 A TW 101142147A TW 101142147 A TW101142147 A TW 101142147A TW I506689 B TWI506689 B TW I506689B
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- Taiwan
- Prior art keywords
- wafer
- carrier
- heat sink
- trenches
- semiconductor device
- Prior art date
Links
- 238000004806 packaging method and process Methods 0.000 title description 2
- 239000000758 substrate Substances 0.000 claims description 39
- 239000004065 semiconductor Substances 0.000 claims description 36
- 239000000853 adhesive Substances 0.000 claims description 25
- 230000001070 adhesive effect Effects 0.000 claims description 25
- 238000004519 manufacturing process Methods 0.000 claims description 19
- 238000005520 cutting process Methods 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 7
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 claims description 4
- 235000012431 wafers Nutrition 0.000 description 46
- 239000010410 layer Substances 0.000 description 16
- 239000012778 molding material Substances 0.000 description 15
- 238000000034 method Methods 0.000 description 14
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 6
- 239000002826 coolant Substances 0.000 description 6
- NFFIWVVINABMKP-UHFFFAOYSA-N methylidynetantalum Chemical compound [Ta]#C NFFIWVVINABMKP-UHFFFAOYSA-N 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- 229910000679 solder Inorganic materials 0.000 description 4
- 229910003468 tantalcarbide Inorganic materials 0.000 description 4
- 239000002918 waste heat Substances 0.000 description 4
- 239000012790 adhesive layer Substances 0.000 description 3
- 239000012876 carrier material Substances 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 229910052715 tantalum Inorganic materials 0.000 description 3
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 3
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 description 2
- MRPWWVMHWSDJEH-UHFFFAOYSA-N antimony telluride Chemical compound [SbH3+3].[SbH3+3].[TeH2-2].[TeH2-2].[TeH2-2] MRPWWVMHWSDJEH-UHFFFAOYSA-N 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000001723 curing Methods 0.000 description 2
- 229920006332 epoxy adhesive Polymers 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 230000006870 function Effects 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 238000000227 grinding Methods 0.000 description 2
- 238000007654 immersion Methods 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- KJTLSVCANCCWHF-UHFFFAOYSA-N Ruthenium Chemical compound [Ru] KJTLSVCANCCWHF-UHFFFAOYSA-N 0.000 description 1
- 238000003848 UV Light-Curing Methods 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000000748 compression moulding Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000011161 development Methods 0.000 description 1
- 230000018109 developmental process Effects 0.000 description 1
- 239000006185 dispersion Substances 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229910000449 hafnium oxide Inorganic materials 0.000 description 1
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 description 1
- 238000013007 heat curing Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000005304 joining Methods 0.000 description 1
- 229910001092 metal group alloy Inorganic materials 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 229910052758 niobium Inorganic materials 0.000 description 1
- 239000010955 niobium Substances 0.000 description 1
- GUCVJGMIXFAOAE-UHFFFAOYSA-N niobium atom Chemical compound [Nb] GUCVJGMIXFAOAE-UHFFFAOYSA-N 0.000 description 1
- 229910052762 osmium Inorganic materials 0.000 description 1
- SYQBFIAQOQZEGI-UHFFFAOYSA-N osmium atom Chemical compound [Os] SYQBFIAQOQZEGI-UHFFFAOYSA-N 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 229910052707 ruthenium Inorganic materials 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- XSOKHXFFCGXDJZ-UHFFFAOYSA-N telluride(2-) Chemical compound [Te-2] XSOKHXFFCGXDJZ-UHFFFAOYSA-N 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
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- H01L21/4878—Mechanical treatment, e.g. deforming
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- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
- H01L23/427—Cooling by change of state, e.g. use of heat pipes
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Description
本發明係有關於半導體裝置之製造方法,且特別是有關於一種含散熱器之半導體裝置之製造方法。
在半導體製程中,積體電路係形成於半導體晶圓上,而這些晶圓經切割成晶片後封裝,以作使用。在目前趨勢中,晶圓厚度係逐漸變薄,而隨著使用較薄的晶圓,能夠容許立體積體電路(3DIC)製程。
薄化的晶圓會導致積體電路製程的困難度增加。例如,薄晶圓具有顯著的翹曲,而某些製程可能無法在翹曲的晶圓上進行。為解決上述問題,係以載材與經過處理或薄化的薄晶圓結合,由於載材具有足夠的厚度,可避免翹曲的問題。藉由黏著劑,薄化的晶圓可黏著在載材上並可保持平坦。
然而,當薄晶圓自載材上移除時,的翹曲問題即會再度產生。為解決上述問題,可將薄晶圓隨載材一併切割。由於晶片之尺寸相對較小,翹曲問題在切割後的晶片上不明顯。然而,如使用上述方法,載材會隨晶片一併被切割,因而無法再度使用。
本發明實施例係提供一種半導體裝置之製造方法,包括:透過一黏著劑附接一晶圓至一載材上;形成複數溝槽
於此載材中,以將此載材轉換成一散熱器;以及切割此散熱器、此載材及此黏著劑進入複數封裝體中。
本發明實施例亦提供一種半導體裝置之製造方法,包含:透過一黏著劑附接一半導體晶圓至一載材上;在進行此附接步驟之後,形成複數導電元件於此半導體晶圓上,其中這些導電元件與此半導體晶圓中的元件電性連接;在進行此形成這些導電元件之步驟後,形成複數溝槽於載材中,以將此載材轉換為一散熱器;以及切割此散熱器、此載材及此黏著劑進入複數封裝體中。
本發明實施例更提供一種半導體裝置之製造方法,包含:透過一黏著劑附接一晶圓至一載材上;在進行此附接步驟之後,薄化此晶圓;在進行此薄化步驟之後,形成複數溝槽於載材中,以將此載材轉換成一散熱器;以及切割此散熱器、此載材及此黏著劑進入複數封裝體中。
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳細說明如下:
本發明接下來將會提供許多不同的實施例以實施本發明中不同的特徵。值得注意的是,這些實施例提供許多可行之發明概念並可實施於各種特定情況。然而,在此所討論之這些特定實施例僅用於舉例說明,但非用於限定本發明之範圍。
在本發明實施例中,提供了包含由載材轉換而成之散
熱器(heat sink)之封裝體及其製造方法,並舉例說明其中間製程及其可能的實施例變化。在各圖式及所舉例之實施例中,相似元件標號可用以指定相似元件。
第1圖顯示為晶圓100之剖面圖。在某些實施例中,如第1及2A圖所示,晶圓100包含封裝元件20,且此封裝元件20係與封裝元件44相接合。在其他實施例中,如第2B圖所示,晶圓100為一之裝置晶圓,於其上未有晶片接合,主動元件23係直接形成於基材22之表面上。如第2B圖所示之晶圓100亦包含晶片(或晶粒)40其中。
重新參見第1圖,封裝元件20包含基材22。在某些實施例中,基材22為半導體基材,其可更包含結晶矽基材。或者,基材22可由其他半導體材料形成,例如鍺化矽、碳化矽或其類似物。在其他實施例中,基材22為介電基材。封裝元件20可為裝置晶圓,其包含如電晶體等主動元件23形成於半導體基材22之表面22A上。當封裝元件20為裝置晶圓時,其亦可包含如電阻器及/或電容器等被動元件(未顯示)。在某些實施例中,封裝元件20係為中介晶圓(interposer wafer),不包含主動元件於其中,但可包含或不包含被動元件形成於其中。通孔(through vias)24可自基材之22頂表面22A延伸至基材22中。通孔24有時亦可稱為貫通孔,或者,當基材22為矽基材時,通孔24有時亦可稱為矽穿孔。封裝元件20包含多個封裝元件40,且這些封裝元件40可為彼此相同的封裝元件。封裝元件40可為裝置晶片/晶粒(chips/dies)、中介晶片或其類似物。因此,在本說明書中,封裝元件40又可稱為晶片(chips)或晶粒
(dies)40。
內連線結構28係形成於基材22上,且用以電性連接積體電路(如有需要)及/或通孔24。內連線結構28可包含多層介電層30。金屬線32形成於介電層30中。通孔34形成於介電層中,並作內連接,例如連接位於其上及其下的金屬線32。金屬線32及通孔34有時亦可稱為重分佈線(RDL)32/34。在某些實施例中,介電層30包含氧化矽、氮化矽、碳化矽、氮氧化矽、前述之組合及/或前述之多層組合。或者,介電層30可包含一或多層的低介電常數介電層,其具有例如低於30,或更低於約2.5之介電常數值(k值)。
連接器38形成於封裝元件20之頂表面。在某些實施例中,連接器38包含金屬柱,且在金屬柱之頂面上可具有或不具有焊料蓋(solder caps)形成。在某些實施例中,連接器38可包含焊接區域。在其他實施例中,連接器38可為複合凸塊,包含銅柱、鎳層、焊料蓋、無電鍍鎳浸金(electroless nickel immersion gold,ENIG)、無電鍍鎳鈀浸金(electroless nickel electroless palladium immersion gold,ENEPIG)、及/或其類似物。
封裝元件44可透過例如覆晶接合方式與封裝元件20接合。因此,封裝元件44中的電路與封裝元件20中的重分佈線32及通孔24係透過連接器38接合並電性偶接。封裝元件44可為裝置晶粒,包含邏輯電路、記憶電路或其類似物。因此,此後封裝元件44又可稱為晶粒44。或者,封裝元件44可包含接合於中介物、封裝基材及/或其類似
物之晶粒40。在每一晶粒40上皆可具有二或多個晶粒44接合於其上。在某些實施例中,晶粒44包含基材46,例如矽基材。在其他實施例中,基材46可由例如鍺化矽、碳化矽、III-V化合物半導體或其類似物形成。因此,基材46之表面46A即為矽、鍺化矽、碳化矽、III-V化合物半導體或其類似物之表面。
接著,施予聚合物50進入晶片44及封裝元件20之間。聚合物50可為底部填充材料(underfill),並因此可稱為底部填充材料50。底部填充材料50可包含環氧樹脂,或亦可為塑模材料(molding material)。
塑模材料52模塑(molded)於晶片44及封裝元件20上,例如使用壓縮模塑方法。塑模材料52可例如為聚合物。在某些實施例中,塑模材料52包含塑模化合物,例如環氧樹脂或其類似物。塑模材料可由進行固化步驟予以固化,固化步驟可例如為熱固化、UV固化或其類似方法。在上述實施例中,晶粒44係埋藏於塑模材料中20。在固化塑模材料52之後,可進行例如研磨之平坦化製程,以移除塑模材料之過剩部分,例如塑模材料52之凸出於裝置晶粒44頂表面46的部分。因此,基材46之頂表面46A係暴露於外,且與塑模材料52之頂表面52A同一水平。
參見第2A及2B圖,導熱載材54可透過黏著劑55附接於晶圓100上。在第2圖所示之實施例中,黏著層55可與晶粒44及塑模材料52接觸。在第2B圖所示之實施例中,黏著層55可與基材22接觸。在某些實施例中,導熱載材54為矽晶圓,其可包含結晶矽。在其他實施例中,導
熱載材54可包含玻璃、陶瓷或其類似物。導熱載材54之導熱性可大於約100 Watts/m*K或大於約150 Watts/m*K。黏著層55可包含導熱黏著劑,其可為晶片貼膜(die attach film,DAF)、熱環氧膠材、黏著性熱界面材料(adhesive thermal interface material,TIM)或其類似物。
第3A圖顯示第2A圖所示之封裝元件20之背端結構之形成。此背端結構之形成步驟可包含:對半導體基材22之背端進行研磨,以薄化半導體基材22,直至暴露出通孔24;形成一或多層介電層56於半導體基材22之背端;形成連接器58於封裝元件20之背端上,並與通孔24電性連接。在某些實施例中,連接器58可為焊球。在其他實施例中,連接器58可包含金屬墊、金屬凸塊、銲蓋(solder cap)或其類似物。重分佈線可形成於封裝元件20之背端及於介電層56中,其中元件62即為重分佈線。連接器58可用以接合其他額外的電子元件(未顯示),例如半導體基材、封裝基材、印刷電路板(PCB)或其類似物。
第3B圖顯示為第2B圖之晶圓100之前端內連線結構28。主動元件23可形成於基材22之前端。內連線結構可包含形成於介電層130中的金屬線132。通孔134形成於位在其上及其上之金屬線132之間,並將其內連接。介電層130可包含一或多層的低介電常數介電層,其具有例如低於3.0,或更低於約2.5之介電常數值。電子連接器138形成於晶圓100之前端。
接著,如第4A及4B圖所示,形成多個溝槽64於導熱載材54中,以將導熱載材54轉換為散熱器(heat sink),
其亦可稱為散熱器54。溝槽64可透過蝕刻形成。或者,溝槽64可由切割刀切割導熱載材54形成。所形成之散熱器54包含多個鰭66於溝槽64之間。這些鰭66亦可形成陣列。第7A及7B圖顯示溝槽64之上視圖。由散熱器54之上視角度觀之,溝槽64可包含複數個彼此相互平行之第一溝槽64A。溝槽64可包含(或不包含)複數個彼此相互平行之第二溝槽64B,其中這些第二溝槽64B可垂直於第一溝槽64A。如第4A及4B圖所示,溝槽64自表面54A延伸至導熱載材54之中間。在某些實施例中,溝槽64之深度D1(亦為鰭66的鰭高度)可介於約200 μm及約800 μm之間。深度D1之實際數值係可決定於基材22厚度。至此,即完成晶片堆疊晶圓(chip-on-wafer)封裝體。
接著,沿切割線68進行切割製程,以將第4A及4B圖中之封裝體切割成封裝體70。封裝體70可如第5A及5B圖所示。在第5A圖中,封裝體70包含一部分的散熱器54、一部分的晶粒40及一或多個晶粒44。可發現的是,在封裝體70中,散熱器54之邊緣54B係與塑模材料52之對應邊緣對齊。在第5B圖中,封裝體70包含裝置晶粒40,其中散熱器54之邊緣係與晶粒40之對應邊緣40A對齊。此外,以上視角度觀之時,散熱器54與其對應的晶粒40具有相同的形狀及尺寸。
第6圖顯示依照本發明一實施例之封裝體,此封裝體可為第5A或5B圖所示之封裝體70。散熱器54可與積體散熱器(integrated heat spreader,IHS)72接合,例如透過氧化物-氧化物接合方式接合。在某些實施例中,積體散熱器
72為一金屬蓋,其包含平坦部分72A及側邊部分72B,其中側邊部分72B在如第6圖之上視角度中係為一環狀。或者,積體散熱器72可為平坦的積體散熱器。溝槽64被積體散熱器72自頂部密封。因此,密封的溝槽64形成多個微通道,冷卻媒介可藉由這些微通道傳導。在某些實施例中,在散熱器54及積體散熱器72接合之後,可於積體散熱器72中形成連接至溝槽64的多個孔洞74。管線76可安裝於積體散熱器72上。此外,這些孔洞74亦可在接合積體散熱器72與散熱器54之前就已預形成。晶粒40在操作時,會產生廢熱,而這些廢熱會傳導至散熱器54。冷卻媒介,例如水、油、冷空氣或其他類似物,可透過管線76傳導至溝槽64,並因此可將廢散出。圖中箭頭80所指方向即為冷卻媒介之流動方向。
第7A及7B圖顯示為依照本發明實施例之第6圖之結構之上視圖。參見第7A圖,某些溝槽64(標示為64A)係彼此平行,且其長度方向(lengthwise direction)係由輸入管線76A指向輸出管線76B。某些溝槽64(標示為64B)係可形成於垂直於溝槽64A之長度方向的方向上。溝槽64B與溝槽64A相互連接。在某些實施例中,溝槽64B之間的間距較溝槽64A大。
在第7B圖中,溝槽64B與溝槽64A具有實質上相同的間距,因而溝槽64A及64B可形成棋盤(grid)結構。在這些實施例中,輸入和輸出管線76可放置於散熱器54之兩端或相反側。在這些實施例中,溝槽64A及64B可用作為揮發通道。冷卻媒介78流入至輸入管線76中,並可藉
由溝槽64中藉由晶片40產生的廢熱揮發成蒸氣,由輸出管線76B散出而帶走廢熱。
第8圖顯示依照本發明其他實施例之封裝體70。在此實施例中,散熱器54與散熱器82透過導熱黏著劑894相接合。散熱器82可由例如金屬或金屬合金形成。導熱黏著劑84可由晶片貼膜(die attach film,DAF)、熱環氧膠材、黏著性熱界面材料(adhesive thermal interface material,TIM)或其類似物形成。目前已知的是,透過黏著劑接合晶圓/晶粒及散熱器時,可能會在黏著劑中產生氣泡。氣泡為熱的絕緣體,因而較佳需避免氣泡產生。然而,某些實施例中,溝槽64可能會吸入部分的氣泡86。例如,參見第8圖,某些氣泡86係被擠壓至溝槽64中,因此由上視圖可看出氣泡86減少。因此,可減少氣泡86對導熱性的影響。因此,在難以避免氣泡86生成的清況下,即使黏著劑84的導熱性低於散熱器54,散熱器82及晶粒40之間的導熱性可藉由形成溝槽而增加。
在某上述實施例中,散熱器可由晶圓級製程製造,而非晶片級,並因可減少製造成本。既然散熱器隨著晶粒一起切割,即沒有散熱器及晶粒對準問題。此外,即使如第1至6B圖所示之晶圓為薄晶圓,既然晶圓100未自對應的載材上移除,晶圓100在製造時亦無翹曲的問題。
雖然本發明已以數個較佳實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作任意之更動與潤飾。此外,本發明之範圍不限定於現有或未來所發展的特
定程序、機器、製造、物質之組合、功能、方法或步驟,其實質上進行與依照本發明所述之實施例相同的功能或達成相同的結果。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。此外,每個申請專利範圍建構成一獨立的實施例,且各種申請專利範圍及實施例之組合皆介於本發明之範圍內。
20‧‧‧封裝元件
22‧‧‧基材
22A‧‧‧基材表面
23‧‧‧主動元件
24‧‧‧通孔
28‧‧‧內連線結構
32‧‧‧金屬線
34‧‧‧通孔
38‧‧‧連接器
40‧‧‧晶粒
40A‧‧‧晶粒邊緣
44‧‧‧晶粒
46‧‧‧基材
46A‧‧‧基材表面
50‧‧‧聚合物
52‧‧‧塑模材料
52A‧‧‧塑模材料頂表面
52B‧‧‧塑模材料邊緣
54‧‧‧導熱載材
54A‧‧‧表面
54B‧‧‧散熱器邊緣
55‧‧‧黏著劑
56‧‧‧介電層
58‧‧‧連接器
62‧‧‧重分佈線
64‧‧‧溝槽
64A‧‧‧溝槽
64B‧‧‧溝槽
66‧‧‧鰭
68‧‧‧切割線
70‧‧‧封裝體
72‧‧‧積體散熱器
72A‧‧‧平坦部分
72B‧‧‧側邊部分
74‧‧‧孔洞
76‧‧‧管線
78‧‧‧冷卻媒介
80‧‧‧流動方向
82‧‧‧散熱器
84‧‧‧導熱黏著劑
86‧‧‧氣泡
100‧‧‧晶圓
130‧‧‧介電層
132‧‧‧金屬線
134‧‧‧通孔
138‧‧‧電子連接器
D1‧‧‧深度
第1、2A~5A及2B~5B圖顯示為依照本發明示範實施例之封裝體於各種中間製程階段之剖面圖。
第6、7A、7B及8圖顯示為依照這本發明某些實施例之封裝體之使用。
40‧‧‧晶粒
54‧‧‧導熱載材
55‧‧‧黏著劑
64‧‧‧溝槽
70‧‧‧封裝體
72‧‧‧積體散熱器
72A‧‧‧平坦部分
72B‧‧‧側邊部分
74‧‧‧孔洞
76‧‧‧管線
78‧‧‧冷卻媒介
80‧‧‧流動方向
Claims (10)
- 一種半導體裝置之製造方法,包括:透過一黏著劑附接一晶圓至一載材上;形成複數溝槽於該載材中,以將該載材轉換成一散熱器;以及切割該散熱器、該晶圓及該黏著劑成為複數封裝體。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,更包含將該載材與一散熱器接合,其中該散熱器密封該些溝槽。
- 如申請專利範圍第2項所述之半導體裝置之製造方法,更包含:形成該些孔洞於該散熱器中,其中該些孔洞與該些溝槽相連接;及透過該些孔洞連接複數管線至該些溝槽。
- 如申請專利範圍第1項所述之半導體裝置之製造方法,其中該晶圓包含一額外的晶圓於其中,其中該額外的晶圓包含一第一基材及複數通孔自該第一基材之一頂表面延伸,其中該半導體裝置之製造方法更包含接合複數晶粒於該額外的晶圓上,其中每一晶粒包含一第二基材,且其中該載材係與該些晶粒之該些第二基材之頂表面相接合。
- 一種半導體裝置之製造方法,包含:透過一黏著劑附接一半導體晶圓至一載材上;在進行該附接步驟之後,形成複數導電元件於該半導體晶圓上,其中該些導電元件與該半導體晶圓中的元件電性連接; 在進行該形成該些導電元件之步驟後,形成複數溝槽於載材中,以將該載材轉換為一散熱器;以及切割該散熱器、該半導體晶圓及該黏著劑成為複數封裝體。
- 如申請專利範圍第5項所述之半導體裝置之製造方法,其中該進行該切割步驟時,該些溝槽為未填充的溝槽。
- 如申請專利範圍第5項所述之半導體裝置之製造方法,其中該半導體晶圓包含矽晶圓,且其中該矽晶圓實質上沒有積體電路裝置設於其中。
- 如申請專利範圍第5項所述之半導體裝置之製造方法,其中該形成該些溝槽之步驟包含形成複數相互平行的第一溝槽及複數相互平行的第二溝槽,其中該些第二溝槽垂直於該些第一溝槽且與該些第二溝槽相互連接。
- 一種半導體裝置之製造方法,包含:透過一黏著劑附接一晶圓至一載材上;在進行該附接步驟之後,薄化該晶圓;在進行該薄化步驟之後,形成複數溝槽於載材中,以將該載材轉換成一散熱器;以及切割該散熱器、該晶圓及該黏著劑成為複數封裝體。
- 如申請專利範圍第9項所述之半導體裝置之製造方法,其中該晶圓包含複數通孔於該晶圓之一基材中,且其中該薄化步驟包含薄化該基材以暴露出該些通孔,且其中該半導體裝置之製造方法更包含形成複數導電元件連接至該些通孔。
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CN112614785B (zh) * | 2020-12-17 | 2023-07-28 | 上海先方半导体有限公司 | 集成微流道的三维封装结构及封装方法 |
TWI796694B (zh) * | 2021-05-21 | 2023-03-21 | 矽品精密工業股份有限公司 | 電子封裝件及其製法 |
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Also Published As
Publication number | Publication date |
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DE102012110982B4 (de) | 2016-06-02 |
TW201342453A (zh) | 2013-10-16 |
US20130273694A1 (en) | 2013-10-17 |
DE102012110982A1 (de) | 2013-10-17 |
US9034695B2 (en) | 2015-05-19 |
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