TWI496251B - 半導體裝置、該半導體裝置的製造方法及電子元件 - Google Patents

半導體裝置、該半導體裝置的製造方法及電子元件 Download PDF

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Publication number
TWI496251B
TWI496251B TW101103353A TW101103353A TWI496251B TW I496251 B TWI496251 B TW I496251B TW 101103353 A TW101103353 A TW 101103353A TW 101103353 A TW101103353 A TW 101103353A TW I496251 B TWI496251 B TW I496251B
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Taiwan
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electrode
recess
semiconductor
semiconductor element
disposed
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TW101103353A
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TW201238017A (en
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Motoaki Tani
Keishiro Okamoto
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Fujitsu Ltd
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Description

半導體裝置、該半導體裝置的製造方法及電子元件
本文中揭示之實施例係關於半導體裝置、該半導體裝置之製造方法及電子元件。
因為氮化物半導體具有包含高電子飽和速度和寬能隙之特性，因此他們可以應用於高擊穿電壓(breakdown voltage)。例如氮化物半導體之高功率半導體元件GaN較矽(1.1 eV)和GaAs(1.4 eV)具有較寬的能隙，例如3.4 eV；因此，其具有高的擊穿場強度(breakdown field strngth)。因此，GaN可以使用為操作於高電壓並且輸出高電壓用於電源供應應用之用於功率元件之材料。
相關技術為揭示於日本專利公開公報第62-71301和5-121589號，和日本專利第3127895號
低電阻傳輸可考慮用於大電流流過之功率元件。高散熱可考慮用於輻射大量熱之功率元件。舉例而言，若半導體元件藉由低成本打線接合方法面向上安裝於平坦的電路板上，則導線可以製得較短或較厚用於低電阻傳輸封裝件。
然而，尚未提供用於高散熱低電阻傳輸之半導體元件之高可靠封裝件技術。
依照實施例之一個態樣，半導體裝置包含：半導體元件，包含第一電極；基板，包含第二電極和凹部；以及散熱黏著材料，將該半導體元件安置於該凹部中以便將該第 一電極配置成靠近該第二電極，其中該第一電極耦接至該第二電極，而該散熱黏著材料覆蓋該半導體元件之底表面和至少部分之側表面。
提供一種可以有低電阻傳輸並且具有簡單結構之高散熱化合物半導體元件10之低成本半導體封裝件。
於部分下列說明中將提出本發明之其他優點和新穎特徵，在檢視下列說明或者藉由實作本發明而習得本發明後對於熟悉此項技術者而言會對該說明部分變得很清楚。
為了方便的目的，於下列圖式中可以不描繪正確的大小和正確的厚度。
第1圖顯示範例半導體封裝件製造程序。第2A至2F圖顯示範例半導體元件製造程序。可以藉由例示於第2A至2F圖中之半導體元件製造程序製造AlGaN/GaN高電子移動率電晶體(high electron mobility transistor，HEMT)。透過第1圖中之操作S1和S2製造化合物半導體元件，和透過第1圖中之操作S3至S6製造半導體封裝件。
於第1圖中之操作S1中，製造用來安裝在樹脂電路板上之半導體元件，例如，具有HEMT結構之化合物半導體元件。例如，可以製造為氮化物半導體元件之AlGaN/GaN。或者，例如，可以製造InAlN/GaN HEMT或者InAlGaN/GaN HEMT。亦可以製造HEMT以外之氮化物半導體元件、氮化物半導體元件以外之化合物半導體元件、半導體記憶體、或其他的半導體元件。
參照第2A圖，分層化合物半導體結構形成在成長基板(例如，矽基板1)上。舉例而言，矽基板、SiC基板、藍寶石基板、GaAs基板、或GaN基板可以使用為成長基板。基板可以是半絕緣或導電基板。分層化合物半導體結構2可以包含緩衝層2a、電子渡越層(electron transit layer)2b、中間層2c、電子供應層2d、和蓋層2e。
於AlGaN/GaN HEMT之操作中，AlGaN/GaN HEMT於電子渡越層2b與電子供應層2d之間的接面附近，例如，電子渡越層2b與中間層2c之間的接面產生二維電子氣體(2DEG)。可以根據電子渡越層2b之化合物半導體(例如，GaN)之晶格常數與電子供應層2d之化合物半導體(例如，AlGaN)之晶格常數之間之差異產生2DEG。
在矽基板1上依序形成為具有厚度大約0.1μm之AIN層、具有厚度大約3μm之故意未摻雜之GaN(i-GaN)層、具有厚度大約5nm之i-AlGaN層、具有厚度大約30nm之n-AlGaN層、和具有厚度大約10nm之n-GaN層。藉由例如金屬有機氣相磊晶(MOVPE)形成這些化合物半導體。取代使用MOVPE，例如，可以使用分子束磊晶(MBE)。於是，形成緩衝層2a、電子渡越層2b、中間層2c、電子供應層2d、和蓋層2e。
作為AIN、GaN、AlGaN、和GaN之成長條件，可以使用三甲基鋁氣體、三甲基鎵氣體、和氨氣體之混合物作為來源氣體。三甲基鋁氣體(其為鋁來源)、三甲基鎵氣體(其為鎵來源)的供應與否和他們的流率可以依據成長之化合 物半導體層而決定。為共同來源氣體之氨氣之流率可以大約為100 ccm至10 Lm。成長壓力可以是大約50至300托(Torr)。成長溫度可以是大約1000℃至1200℃。
當形成n型GaN和AlGaN時，例如，包含用作為n型雜質之矽之SiH4 氣體以某一流率添加至來源氣體而用矽摻雜GaN和AlGaN。矽摻雜濃度可以是大約1×1018 /cm3 至約1×1020 /cm3 ，例如，大約5×1018 /cm3 。
參照第2B圖，形成隔離結構3。於第2C至2F圖中，可以省略隔離結構3。舉例而言，氬(Ar)植入於分層化合物半導體結構2之隔離區域中。隔離結構3形成在分層化合物半導體結構2和矽基板1之表面區域中。隔離結構3定義分層化合物半導體結構2中之主動區域。取代使用植入，可以藉由例如淺溝槽隔離(shallow trench isolation，STI)形成隔離結構3。用於分層化合物半導體結構2之乾蝕刻，例如，可以使用含氯蝕刻氣體。
參照第2C圖，形成源極電極4和汲極電極5。電極凹部2A和2B形成於將要形成源極電極4和汲極電極5於分層化合物半導體結構2之表面上之位置，例如，電極形成位置。係用阻劑舖設分層化合物半導體結構2之表面。然後藉由微影處理阻劑以形成對應於電極形成位置暴露分層化合物半導體結構2之表面之開口。於是，形成具有開口之阻劑遮罩。
使用阻劑遮罩，藉由乾蝕刻將蓋層2e從電極形成位置去除直到暴露電子供應層2d之表面為止。於是，電極凹 部2A和2B形成在暴露電子供應層2d之表面之電極形成位置。使用之蝕刻氣體可以是惰性氣體(譬如氬)和含氯氣體(譬如Cl2 )。作為蝕刻條件，例如，Cl2 之流率設定至30sccm，壓力設定至2Pa，和射頻(RF)功率設定至20W。可以藉由於蓋層2e之某處終止蝕刻或者藉由繼續蝕刻至電子供應層2d或下面的層而形成電極凹部2A和2B。例如藉由灰化而去除阻劑遮罩。
形成用來形成源極電極4和汲極電極5之阻劑遮罩。舉例而言，可以使用適用於蒸發和剝離(lift-off)製程之懸垂雙層阻劑(overhanging double-layer resist)。懸垂雙層阻劑係鋪設於分層化合物半導體結構2，並且形成暴露電極凹部2A和2B之開口。於是，形成具有開口之阻劑遮罩。使用該阻劑遮罩，例如鉭和鋁之電極材料藉由例如蒸發而沉積在包含暴露電極凹部2A和2B之開口之阻劑遮罩上方。鉭可以沉積至大約20nm之厚度，而鋁可以沉積至大約200nm之厚度。藉由剝離製程去除阻劑遮罩和沉積在其上之鉭和鋁。矽基板1於400℃至1000℃，例如，大約600℃，於例如氮環境中被退火，而使得剩餘的鉭和鋁與電子供應層2d形成歐姆接觸。可以不退火而形成歐姆接觸。於是，電極凹部2A和2B部分被填滿電極材料，由此形成源極電極4和汲極電極5。
參照第2D圖，用於閘極電極之電極凹部2C形成在分層化合物半導體結構2上。分層化合物半導體結構2之表面係舖設阻劑。然後藉由微影處理阻劑以形成開口，其中 分層化合物半導體結構2之表面對應於待形成閘極電極位置(例如，電極形成位置)之分層化合物半導體結構2之表面。於是，形成具有開口之阻劑遮罩。
使用阻劑遮罩，藉由乾蝕刻從電極形成位置去除蓋層2e和部分之電子供應層2d。於是，形成延伸穿過蓋層2e和部分的電子供應層2d之電極凹部2C。譬如氬和譬如cl2 之含氯氣體之惰性氣體可以使用為蝕刻氣體。作為蝕刻條件，例如，Cl2 之流率設定至30sccm，壓力設定至2 Pa，和射頻(RF)功率設定至20W。可以藉由於蓋層2e之某處終止蝕刻或者藉由繼續蝕刻至電子供應層2d中之較深位置而形成電極凹部2C。例如藉由灰化而去除阻劑遮罩。
參照第2E圖，形成閘極絕緣體6。例如Al2 O3 之絕緣材料係沉積在分層化合物半導體結構2上以便覆蓋電極凹部2C之內壁表面。舉例而言，藉由原子層沉積(atomic layer deposition，ALD)形成具有厚度大約2至200nm(例如，大約10nm)之Al2 O3 層。於是，形成閘極絕緣體6。
取代使用ALD，可以藉由例如電漿輔助化學氣相沉積(CVD)或濺鍍而沉積Al2 O3 。取代使用Al2 O3 ，可以由氮化鋁或氧氮化物形成閘極絕緣體6。或者，可以使用矽、鉿、鋯、鈦、鉭、或鎢之氧化物、氮化物、或氧氮化物，或者選自這些材料之材料的多層結構。
參照第2F圖，形成閘極電極7。形成用來形成閘極電極7和場板電極之阻劑遮罩。舉例而言，使用適合於蒸發和剝離製程之懸垂雙層阻劑。懸垂雙層阻劑係鋪設於閘極 絕緣體6，形成開口暴露面對電極凹部2C之閘極絕緣體6之部分。於是，形成具有開口之阻劑遮罩。
使用阻劑遮罩，藉由例如蒸發將例如鎳和金之電極材料沉積在包含開口之阻劑遮罩上，於該開口處暴露面對電極凹部2C之閘極絕緣體6之部分。鎳可以沉積至大約30nm之厚度，金可以沉積至大約400nm之厚度。藉由剝離製程去除阻劑遮罩和沉積在該阻劑遮罩上之鎳和金。於是，電極凹部2C係用具有閘極絕緣體6之部分電極材料填滿，由此形成閘極電極7。
形成層間絕緣體、耦接至該源極電極4、汲極電極5、或閘極電極7之互連、上保護層、和暴露於最外側表面之連接電極。於是形成AlGaN/GaN HEMT。
可以形成具有閘極絕緣體6之金屬絕緣體半導體(metal-insulator-semiconductor，MIS)AlGaN/GaN HEMT。或者，可以形成不具有閘極絕緣體6，以閘極電極7與分層化合物半導體結構2直接接觸之肖特基AlGaN/GaN HEMT。可以不使用閘極電極7形成在電極凹部2C中之閘極凹部結構，而該閘極電極7可以直接形成、或以閘極絕緣體6置於其間的方式形成在不具有凹部之分層化合物半導體結構2上。
於操作S2中，具有AlGaN/GaN HEMT形成於操作S1中之矽基板1被切割成個別的化合物半導體元件，例如，個別的化合物半導體晶片。矽基板1藉由使用例如某種雷射沿著形成在其上之切粒線(dicing line)切割，而切成個 別的化合物半導體元件。
第3圖顯示範例化合物半導體元件。可以藉由例示於第2A至2F圖中之製造程序製造例示於第3圖中之化合物半導體元件。化合物半導體元件10具有沿著其矩型周邊之四個側面中之三個側面之線配置用於外部連接之連接電極11。連接電極11透過例如下面的互連而耦接至例如源極電極、汲極電極、或閘極電極。
第4A和4B圖顯示範例半導體封裝件。第4A圖表示剖面圖，第4B圖表示平面圖。於第1圖之操作S3中，如第4A和4B圖中所例示，例如，埋頭孔或腔21之凹部21形成在樹脂電路板20之前表面上。樹脂電路板20具有銅(Cu)互連23形成在樹脂22之前和後表面上。銅互連23透過通孔24彼此耦接。包含散熱金屬(例如，銅)之金屬核心25配置在樹脂22中。取代使用銅，金屬核心25可以包含選擇自金(Au)、鎳(Ni)、鋁(Al)、鈦(Ti)、鈀(Pa)之至少一種金屬。樹脂22之前和後表面分別以抗焊料(solder resist)26和27覆蓋。於樹脂22之前表面上的抗焊料26具有開口26a和26b暴露樹脂22之前表面之部分。待耦接至化合物半導體元件10之連接電極11之連接電極28a形成在開口26a中某些位置。用於外部電極之連接電極28b形成在開口26b中。於樹脂22之後表面上的抗焊料27具有開口27a和27b暴露樹脂22之後表面之部分。用於外部連接之連接電極29a和29b分別形成在開口27a和27b中。於第4A和4B圖中，樹脂電路板20具有貫穿孔。
第5圖顯示範例半導體封裝件。第5圖中例示之樹脂電路板20之結構實質上相同或相似於例示於第4A和4B圖中之結構。如第5圖中，樹脂電路板20可以不具有貫穿孔。例示於第4A圖中之樹脂電路板20具有貫穿孔(例如，貫穿孔31a和31b)延伸穿過樹脂22。銅沉積在貫穿孔31a和31b之內壁表面上。於樹脂22之前表面上之連接電極28a和於樹脂22之後表面上之連接電極29a透過貫穿孔31a耦接在一起。於樹脂22之前表面上之連接電極28b、金屬核心25、和於樹脂22之後表面上之連接電極29b透過貫穿孔31b耦接在一起。於第5圖中例示之樹脂電路板20中，於樹脂22之前表面上之連接電極28b、金屬核心25、和於樹脂22之後表面上之連接電極29b透過銅互連23和通孔24耦接在一起。
暴露金屬核心25之部分表面之凹部21藉由雷射處理或起槽機處理而形成在樹脂22和抗焊料26之表面之某位置。凹部21具有大於化合物半導體元件10之景觀導向的矩形，以凹部21之周邊四面中之其中三個面沿著配置成線之連接電極28a延伸。於處理樹脂22之製程期間去除散射的樹脂之後，暴露於前表面之連接電極28a和29a之表面和暴露於凹部21之底表面之金屬核心25之表面係用例如鎳然後金進行電鍍。雖然暴露於凹部21之底表面之金屬核心25在其面積部分在樹脂電路板20之前表面增加時具有較高的散熱，但是該金屬核心25可以視情況需要而被圖案化。
第6A和6B圖顯示範例半導體封裝件。第6A圖表示剖面圖，第6B圖表示平面圖。於第6A和6B圖中，樹脂電路板20具有貫穿孔31a、31b。於第1圖之操作S4中，如第6A和6B圖中所例示，假性元件30配置在凹部21中，而具有高散熱之黏著材料(散熱黏著材料)，例如，金屬材料32，係供應至凹部21。舉例而言，具有與化合物半導體元件10實質相同形狀和大小之假性元件30被配置在化合物半導體元件10將固定於凹部21中之位置處。假性元件30可以包含，例如，矽、玻璃、或陶瓷。固定位置可以是在凹部21之底表面上。假性元件30之三個側面，例如，對應於形成連接電極11之化合物半導體元件10之三個側面處，可以與凹部21之周邊相隔大約0.01至0.1mm，例如，大約0.05mm。假性元件30之剩餘側面，例如，對應於不形成連接電極11之化合物半導體元件10之側面處，可以與凹部21之周邊相隔大約4mm或更多，例如，大約10.05mm。
假性元件30配置在將固定化合物半導體元件10之位置處，而金屬材料32，例如，銀(Ag)燒結膏，係供應至凹部21，以便具有至少部分覆蓋假性元件30之側表面之厚度。該厚度可以是某一厚度。該某一厚度(例如，燒結膏之厚度)可以大於或等於假性元件30之側表面之一半高度(中間位置)，例如，大於或等於化合物半導體元件10之一半厚度(中間位置)。
取代使用銀燒結膏，金屬材料32可以是，例如，選 擇自金和銅燒結膏之至少其中一種材料。取代使用金屬材料，散熱黏著材料可以是譬如BN或AIN膏之絕緣材料。亦可以使用包含鑽石(C)之導電膏。
第7A和7B圖顯示範例半導體封裝件。第7A圖表示剖面圖，第7B圖表示平面圖。於第7A和7B圖中，樹脂電路板20具有貫穿孔31a、31b。於第1圖之操作S5中，如第7A和7B圖中所例示，去除假性元件30。於去除假性元件30後，具有某一厚度之金屬材料32留在凹部21之整個表面上，除了將固定化合物半導體元件10之位置之外。由金屬材料32定義於凹部21中之固定位置可以是固定位置32a。
第8A和8B圖顯示範例半導體封裝件。第8A圖表示剖面圖，第8B圖表示平面圖。於第8A和8B圖中，樹脂電路板20具有貫穿孔31a、31b。於第1圖之操作S6中，如第8A和8B圖中所例示，於其後表面上具有金屬材料33之化合物半導體元件10係黏合於樹脂電路板20之凹部21中。金屬材料33係鋪設至具有某一厚度，例如，小於金屬材料32厚度之厚度的半導體元件10之後表面。實質上與金屬材料32相同之銀燒結膏可以使用為金屬材料33，或者不同的金屬，例如，可以使用選擇自金和銅燒結膏之至少其中一種。具有金屬材料33鋪設至其後表面之化合物半導體元件10係暫時固定至面對於凹部21之固定位置32aa。化合物半導體元件10可以於例如大約2 kgf之壓力下被暫時固定。金屬材料32和33於大約150℃至250℃(例 如大約200℃)，於大氣壓力下經過約1小時被硬化。於是，化合物半導體元件10被黏合至凹部21中之固定位置32a。
金屬材料33係鋪設至化合物半導體元件10之後表面。或者，金屬材料可以具實質相同的厚度鋪設至在凹部21中固定位置32a處之金屬核心25之表面，而化合物半導體元件10可以配置在金屬材料上。於此情況，可以在如上述相同狀況下施行暫時固定和硬化。
因為使用假性元件30形成金屬材料32，因此金屬材料32具有某一厚度以便覆蓋化合物半導體元件10之側表面。金屬材料32覆蓋形成連接電極11處之化合物半導體元件10之側面與凹部21之周邊之間之化合物半導體元件10之側表面。舉例而言，為了縮短金屬導線，形成連接電極11處之化合物半導體元件10之側面與凹部21之周邊之間之距離可以減少或者以較短的方式接觸。金屬材料32可以不在該距離中。因為金屬材料32之散熱效果正比於其大小，例如，其表面積，因此金屬材料32可以不在該距離中。化合物半導體元件10可以與金屬材料黏合而不需使用假性元件30。
第9A和9B圖顯示範例半導體封裝件。第9A圖表示剖面圖，而第9B圖表示平面圖。於第9A和9B圖中，樹脂電路板20具有貫穿孔31a、3lb。於第l圖之操作S7中，如第9A和9B圖中所例示，化合物半導體元件10之連接電極11和樹脂電路板20之連接電極28a藉由打線接合耦接在一起。金屬導線34被用來耦接在化合物半導體元件10 之三個側面上和樹脂電路板20之三個側面上面對的連接電極11和28a。舉例而言，具有直徑大約100至2500μm(例如，大約100μm)和長度例如大約0.10mm之鋁導線被使用作為金屬導線34。取代使用鋁導線，選擇自金、銅、和鈀導線之金屬導線使用為金屬導線34。於是，製成半導體封裝件。
化合物半導體元件10用金屬材料32和33固定在形成在樹脂電路板20上之凹部21中。化合物半導體元件10可以配置在凹部21之底表面上某一位置。可以配置化合物半導體元件10而使得於配置有連接電極11之化合物半導體元件10之周邊的三個側面與凹部21之周邊相隔較小的距離，而於沒有配置連接電極11之側面處與凹部21之周邊相隔較大的距離。於對應於化合物半導體元件10之周邊與凹部21之周邊之間較大距離之寬區域中，鋪設金屬材料32以便具有厚度覆蓋化合物半導體元件10之側表面至某一位置。透過金屬材料32和33從化合物半導體元件10之底和側表面有效地散熱，例如，從用金屬材料32覆蓋之部分。因為金屬材料32佔據了大面積，因此可以改善散熱。於對應於化合物半導體元件10之周邊與凹部21之周邊之間較小距離之窄區域中，金屬導線34耦接面對的連接電極11和28a。因為金屬導線34變得較短，因此得以施行低電阻傳輸。
因此，提供了一種使得可以具有簡單構造之低電阻傳輸和高散熱之低成本化合物半導體元件10之半導體封裝 件。
第10圖顯示範例半導體封裝件。第10圖中例示之半導體封裝件可以對應於第9B圖中例示之半導體封裝件。於第10圖中，實質上與第9B圖中例示之那些半導體封裝件相同或相似之元件可以由相同的元件符號表示，而可以省略或減少其說明。透過第1圖中之操作S1至S7製造半導體封裝件。參照第10圖，化合物半導體元件40具有連接電極11用於在沿著面對其矩形周邊之四個側面其中二個側面之線所配置之外部連接。樹脂電路板20具有凹部41暴露金屬核心之表面之部分。凹部41具有大於化合物半導體元件40之景觀導向的矩形，以凹部41之周邊之二個相對側面沿著配置成線之連接電極28a延伸。
於凹部41中，化合物半導體元件40之側表面用金屬材料32固定，而底表面用金屬材料33固定。於形成連接電極11之二個相對側與凹部41之周邊相隔大約0.01至0.1mm，例如，大約0.05mm。未形成連接電極11之二個相對側與凹部41之周邊相隔大約4mm或更多，例如，大約6.5mm。
化合物半導體元件40用金屬材料32和33固定在形成在樹脂電路板20上之凹部41中。化合物半導體元件40可以配置在凹部41之底表面上某一位置處。可以配置化合物半導體元件40而使得於置有連接電極11之化合物半導體元件40之周邊的二個側面處與凹部41之周邊相隔較小的距離，而於沒有配置連接電極11之側面與凹部41之周 邊處相隔較大的距離。於對應於化合物半導體元件40之周邊與凹部41之周邊之間較大距離之寬區域中，鋪設金屬材料32以便具有厚度覆蓋化合物半導體元件40之側表面至某一位置。透過金屬材料32和33從化合物半導體元件40之底和側表面有效地散熱，例如，從用金屬材料32覆蓋之部分。因為金屬材料32佔據了大面積，因此可以改善散熱。於對應於化合物半導體元件40之周邊與凹部41之周邊之間較小距離之窄區域中，金屬導線34耦接面對的連接電極11和28a。因為金屬導線34變得較短，因此得以施行低電阻傳輸。
因此，提供了一種使得可以具有簡單構造之低電阻傳輸和高散熱之低成本化合物半導體元件40之半導體封裝件。
第11圖顯示範例半導體封裝件。第11圖中例示之半導體封裝件可以對應於第9B圖中例示之半導體封裝件。於第11圖中，實質上與第9B圖中例示之那些半導體封裝件相同或相似之元件可以由相同的元件符號表示，而可以省略或減少其說明。透過第1圖中之操作S1至S7製造半導體封裝件。參照第11圖，化合物半導體元件50具有連接電極11用於在沿著面對其矩形周邊之四個側面其中一個側面之線配置之外部連接。樹脂電路板20具有凹部51暴露金屬核心之表面之部分。凹部51具有大於化合物半導體元件50之景觀導向的矩形，以凹部51之周邊之一個側面沿著配置成線之連接電極28a延伸。
於凹部51中，化合物半導體元件50之側表面用金屬材料32固定，而底表面用金屬材料33固定。於形成連接電極11之化合物半導體元件50之側面與凹部51之周邊相隔大約0.01至0.1mm，例如，大約0.05mm。未形成連接電極11之三個側面與凹部51之周邊分離大約4mm或更多，例如，大約10.05mm。
化合物半導體元件50用金屬材料32和33固定在形成在樹脂電路板20上之凹部51中。化合物半導體元件50可以配置在凹部51之底表面上某一位置。可以配置化合物半導體元件50而使得化合物半導體元件50之周邊的三個側面與凹部51之周邊相隔較小的距離，而剩餘之側面與凹部51之周邊相隔較大的距離。於對應於化合物半導體元件50之周邊與凹部51之周邊之間較大距離之寬區域中，鋪設金屬材料32以便具有厚度覆蓋化合物半導體元件50之側表面至某一位置。透過金屬材料32和33從化合物半導體元件50之底和側表面有效地散熱，例如，從用金屬材料32覆蓋之部分。因為金屬材料32佔據了大面積，因此可以改善散熱。於對應於化合物半導體元件50之周邊與凹部51之周邊之間較小距離之窄區域中，金屬導線34耦接面對的連接電極11和28a。因為金屬導線34變得較短，因此得以施行低電阻傳輸。
因此，提供了一種使得可以具有簡單構造之低電阻傳輸和高散熱之低成本化合物半導體元件50之半導體封裝件。
第12圖顯示範例半導體封裝件製造程序。於第12圖之操作S11中，相似於例示於第1圖中之操作S1製造AlGaN/GaN HEMT。
於第12圖之操作S12中，如第13A圖中所例示，於操作S11中製造之具有AlGaN/GaN HEMT之矽基板1被不完全地切粒。舉例而言，矽基板1從其後表面1b(相對於前表面1a)沿著形成在其上之切粒線DL用例如某些刀片或雷射(雷射切粒)而被不完全切粒。當終止時切粒可為不完全者。舉例而言，當出現於切粒中之凹槽1A變成對應於熔化的金屬材料將覆蓋化合物半導體元件之側表面之高度之深度時，可以終止切粒。凹槽1A之深度可以大於或等於化合物半導體元件之厚度之一半(中間位置)。
第13A至13C顯示範例切粒。於操作S13中，如第13B圖中所例示，用來改善對熔化金屬材料潤濕度之金屬薄膜61形成在矽基板1之後表面1b上，以便覆蓋凹槽1A之內壁表面。舉例而言，具有改善對熔化金屬材料之潤濕度性質的金屬，例如，鈦、鎳、和金之多層膜，藉由例如濺鍍、真空沉積、或電漿輔助CVD方式形成。於是，形成金屬薄膜61。取代使用鈦、鎳、和金之多層膜，可以使用選擇自金、銅、鎳、鋁、鈦、和鈀之一種或多種金屬之多層膜作為金屬薄膜61。
於操作S14中，如第13C圖中所例示，藉由雷射切粒沿著於矽基板1之底表面1b上之切粒線DL將矽基板1切割成個別的化合物半導體元件60。覆蓋化合物半導體元件 60從整個底表面1b至沿著側表面某高度之金屬薄膜61形成在各化合物半導體元件60中。如例示於第13C圖中之化合物半導體元件10，複數個連接電極11被配置在沿著化合物半導體元件60之矩形周邊之四個側面之其中三個側面的線上。
於操作S15中，相似於第4A和4B圖中之操作S3，在樹脂電路板之前表面上形成凹部。
第14A和14B圖顯示範例半導體封裝件。於操作S16中，如第14A和14B圖中所例示，化合物半導體元件60被黏合於樹脂電路板20之凹部21中。舉例而言，化合物半導體元件60用熔化的金屬材料62，例如，錫銀(Sn-Ag)黏合至在樹脂電路板20之凹部21之底表面上之預定位置。取代使用錫銀，可以使用例如錫銀鉍(Sn-Ag-Bi)，或選擇自錫、鉛(Pb)、銀、銦(In)、鉍(Bi)、鋅(Zn)、銻(Sb)、和銅之複數種金屬作為熔化的金屬材料62。舉例而言，於形成連接電極11之化合物半導體元件60之三個側面可以與凹部21之周邊相隔大約0.01至0.1mm，例如，大約0.05mm。未形成連接電極11之該側面可以與凹部21之周邊相隔大約4mm或更多，例如，大約10.05mm。
形成用來改善對於熔化的金屬材料62之潤濕度之金屬薄膜61，以便覆蓋化合物半導體元件60從整個底表面1b至沿著側表面之某一高度。熔化的金屬材料62接觸化合物半導體元件60於金屬薄膜61形成在化合物半導體元件60上之區域，例如，從化合物半導體元件60之整個底 表面1b至沿著側表面之某一高度。與化合物半導體元件60之其中一個側表面接觸之熔化的金屬材料62之部分形成微凸表面62a，該微凸表面62a之高度在熔化金屬之表面張力下從側表面朝向凹部21之側壁漸漸減少。凸出表面可以較均勻高度之平坦表面區域具有較大表面區域。熔化的金屬材料62可以於藉由冷卻固化後保持其形狀。
金屬材料62覆蓋形成連接電極11處之化合物半導體元件60之側面與凹部21之周邊之間之該化合物半導體元件60的側表面。舉例而言，為了縮短金屬導線，形成連接電極11處之化合物半導體元件60之側面與凹部21之周邊可以相隔較小距離或者接觸。金屬材料62可以不在該小距離中。因為金屬材料62之散熱效果正比於其大小，例如，其表面區域，所以該金屬材料62可以是在窄區域中。
第15A和15B圖顯示範例半導體封裝件。如第15A和15B圖中所例示，在第12圖之操作S17中，化合物半導體元件60之連接電極11與樹脂電路板20之連接電極28a係相似於第1圖中之操作S7藉由打線接合而耦接在一起。因此，製成半導體封裝件。
化合物半導體元件60用固化的金屬材料62固定在形成在樹脂電路板20上之凹部21中。化合物半導體元件60可以配置在凹部21之底表面上的某一位置處。可以配置化合物半導體元件60而使得於配置有連接電極11之化合物半導體元件60之周邊的三個側面處與凹部21之周邊相隔較小的距離，而於沒有配置連接電極11之側面處與凹部 21之周邊相隔較大的距離。於對應於化合物半導體元件60之周邊與凹部21之周邊之間較大距離之寬區域中，鋪設金屬材料62以便具有厚度覆蓋化合物半導體元件60之側表面至某一位置。透過熔化的金屬材料62從化合物半導體元件60之底和側表面有效地散熱，例如，從用熔化的金屬材料62覆蓋之部分。因為金熔化的金屬材料62佔據了大面積，因此可以改善散熱。熔化的金屬材料62可以形成微凸表面62a，該微凸表面62a之高度從側表面朝向凹部21之側壁漸漸減少。凸出表面62a具有較大表面區域而因此較均勻高度之平坦表面區域具有較大量的散熱。於對應於化合物半導體元件60之周邊與凹部21之周邊之間較小距離之窄區域中，金屬導線34耦接面對的連接電極11和28a。因為金屬導線34變得較短，因此得以施行低電阻傳輸。
因此，提供了一種使得可以具有簡單構造之低電阻傳輸和高散熱之低成本化合物半導體元件60之半導體封裝件。
如第10和11圖中所例示之半導體封裝件，具有連接電極11沿著其一或二側面形成之化合物半導體元件可以用熔化的金屬材料固定在樹脂電路板之凹部中。用來改善對熔化金屬材料潤濕度之金屬薄膜可以透過第12圖中操作S12至S14形成在化合物半導體元件上。
第16圖顯示範例電源供應元件。於第16圖中例示之電源供應元件可以包含藉由第1或12圖中顯示之製程製造之半導體封裝件。
電源供應元件包含高電壓一次側電路71、低電壓二次側電路72、和配置在一次側電路71與二次側電路72之間之變壓器73。一次側電路71包含交流電源供應器74、橋接整流電路75、和複數個開關元件，例如，四個開關元件76a、76b、76c、和76d。橋接整流電路75包含開關元件76e。二次側電路72包含複數個開關元件，例如，三個開關元件77a、77b、和77c。
一次側電路71之開關元件76a、76b、76c、76d、和76e可以是第1圖中操作S1中製成之化合物半導體元件，例如，AlGaN/GaN HEMT。二次側電路72之開關元件77a、77b、和77c可以是包含矽之金屬絕緣體場效電晶體(MISFET)。
因此，使得可以具有簡單構造之低電阻傳輸和高散熱之化合物半導體元件之低成本半導體封裝件應用於高電壓電路。
第17圖顯示範例高頻放大器。第17圖中例示之高頻放大器可以包含藉由第1或12圖中例示之製程製造之半導體封裝件。
高頻放大器包含數位預失真電路81、混頻器82a和82b、和功率放大器83。數位預失真電路81補償於輸入訊號之非線性失真。混頻器82a將非線性失真已補償過的輸入訊號與交流訊號混頻。功率放大器83放大已與交流訊號混頻過的輸入訊號。功率放大器83包含於第1圖中之操作S1製造之化合物半導體元件，例如，AlGaN/GaN HEMT。例 如，根據切換，混頻器82b將輸出側訊號與交流訊號混頻，並且輸出該混頻之訊號至數位預失真電路81。
因此，使得可以具有簡單構造之低電阻傳輸和高散熱之化合物半導體元件之低成本半導體封裝件應用於高電壓電路。
已經依照上述優點說明了本發明之範例實施例。應該了解到這些實例僅僅用來例示本發明。許多的變異和修飾對於熟悉此項技術者將是清楚了解的。
1‧‧‧矽基板
1A‧‧‧凹線
1a‧‧‧前表面
1b‧‧‧後表面(底表面)
2‧‧‧分層化合物半導體結構
2A、2B、2C‧‧‧電極凹部
2a‧‧‧緩衝層
2b‧‧‧電子渡越層
2c‧‧‧中間層
2d‧‧‧電子供應層
2e‧‧‧蓋層
3‧‧‧隔離結構
4‧‧‧源極電極
5‧‧‧汲極電極
6‧‧‧閘極絕緣體
7‧‧‧閘極電極
10、40、50、60‧‧‧化合物半導體元件
11、28a、28b、29a、29b‧‧‧連接電極
20‧‧‧樹脂電路板
21、41、51‧‧‧凹部(埋頭孔或腔)
22‧‧‧樹脂
23‧‧‧銅互連
24‧‧‧通孔
25‧‧‧金屬核心
26、27‧‧‧抗焊料
26a、26b、27a、27b‧‧‧開口
30‧‧‧假性元件
31a、31b‧‧‧貫穿孔
32、33‧‧‧金屬材料
32a‧‧‧固定位置
34‧‧‧金屬導線
61‧‧‧金屬薄膜
62‧‧‧金屬材料
62a‧‧‧微凸表面
71‧‧‧一次側電路
72‧‧‧二次側電路
73‧‧‧變壓器
74‧‧‧交流電源供應器
75‧‧‧橋接整流電路
76a、76b、76c、76d、76e、77a、77b、77c‧‧‧開關元件
81‧‧‧數位預失真電路
82a、82b‧‧‧混頻器
83‧‧‧和功率放大器
第1圖顯示範例半導體封裝件製造程序；第2A圖至第2F圖顯示範例半導體元件製造程序；第3圖顯示範例化合物半導體元件；第4A圖和第4B圖顯示範例半導體封裝件；第5圖顯示範例半導體封裝件；第6A圖和第6B圖顯示範例半導體封裝件；第7A圖和第7B圖顯示範例半導體封裝件；第8A圖和第8B圖顯示範例半導體封裝件；第9A圖和第9B圖顯示範例半導體封裝件；第10圖顯示範例半導體封裝件；第11圖顯示範例半導體封裝件；第12圖顯示範例半導體封裝件製造程序；第13A圖至第13C圖顯示範例切粒；第14A圖和第14B圖顯示範例半導體封裝件；第15A圖和第15B圖顯示範例半導體封裝件； 第16圖顯示範例電源供應元件；以及第17圖顯示範例高頻放大器。
10‧‧‧化合物半導體元件
11、28a、28b、29a、29b‧‧‧連接電極
20‧‧‧樹脂電路板
21‧‧‧凹部(埋頭孔或腔)
22‧‧‧樹脂
23‧‧‧銅互連
24‧‧‧通孔
25‧‧‧金屬核心
26、27‧‧‧抗焊料
26a、26b、27a、27b‧‧‧開口
31a、31b‧‧‧貫穿孔
32、33‧‧‧金屬材料
32a‧‧‧固定位置

Claims (18)

  1. 一種半導體裝置，包括：半導體元件，包含第一電極；基板，包含第二電極和凹部；以及散熱黏著材料，將該半導體元件安置於該凹部中以便將該第一電極配置成靠近該第二電極，其中該第一電極耦接至該第二電極，而該散熱黏著材料覆蓋該半導體元件之底表面和至少部分之側表面，其中，配置有該第一電極之該半導體元件之周邊之第一部分和配置有該第二電極之該凹部之周邊之第二部分彼此以第一距離面對；未配置該第一電極之該半導體元件之周邊之第三部分和未配置該第二電極之該凹部之周邊之第四部分彼此以大於該第一距離之第二距離面對；以及該散熱黏著材料覆蓋於該第二部分之該半導體元件之該側表面之至少一部分。
  2. 如申請專利範圍第1項所述之半導體裝置，其中，該散熱黏著材料包含金屬材料。
  3. 如申請專利範圍第2項所述之半導體裝置，其中，覆蓋該半導體元件之該側表面之至少一部分之該金屬材料之一部分具有凸出表面。
  4. 如申請專利範圍第2項所述之半導體裝置，其中，該半導體元件包含從該底表面延伸至由該金屬材料覆蓋之該側表面之一部分之金屬膜。
  5. 如申請專利範圍第2項所述之半導體裝置，其中，該金 屬材料包含選擇自由錫、鉛、銀、銦、鉍、鋅、銻、和銅所組成之群組之至少一種材料。
  6. 如申請專利範圍第1項所述之半導體裝置，復包括，配置在該凹部之底表面上之散熱金屬。
  7. 如申請專利範圍第1項所述之半導體裝置，其中，該半導體元件包含化合物半導體元件。
  8. 一種製造半導體裝置之方法，包括下列步驟：製備包含第一電極之半導體元件；於包含第二電極之基板形成凹部；於該凹部中配置該半導體元件而使得該第一電極變成靠近該第二電極；用散熱黏著材料從該半導體元件之底表面至側表面之至少一部分覆蓋該半導體元件；耦接該第一電極至該第二電極；使配置有該第一電極之該半導體元件之周邊之第一部分和配置有該第二電極之該凹部之周邊之第二部分彼此以第一距離面對；使未配置該第一電極之該半導體元件之周邊之第三部分和未配置該第二電極之該凹部之周邊之第四部分彼此以大於該第一距離之第二距離面對；以及以該散熱黏著材料覆蓋該半導體元件之底表面以及於該第二部分之該半導體元件之該側表面之至少一部分。
  9. 一種製造半導體裝置之方法，包括下列步驟： 製備包含第一電極之半導體元件；於包含第二電極之基板形成凹部；於該凹部中配置該半導體元件而使得該第一電極變成靠近該第二電極；用散熱黏著材料從該半導體元件之底表面至側表面之至少一部分覆蓋該半導體元件；耦接該第一電極至該第二電極；配置假性元件於該半導體元件待設置於該凹部中之位置；供應該散熱黏著材料；去除該假性元件以定義用於待設置於該散熱黏著材料中之該半導體元件之位置；以及黏合該半導體元件於該位置。
  10. 如申請專利範圍第8項所述之方法，其中，該散熱黏著材料包含金屬材料。
  11. 如申請專利範圍第10項所述之方法，其中，覆蓋該半導體元件之該側表面之至少一部分之該金屬材料之一部分具有凸出表面。
  12. 如申請專利範圍第11項所述之方法，復包括：從該底表面至由該金屬材料覆蓋之該側表面之一部分形成金屬膜於該半導體元件上；以及用該金屬材料設置該半導體元件於該凹部中。
  13. 如申請專利範圍第10項所述之方法，其中，該金屬材料包含選擇自由錫、鉛、銀、銦、鉍、鋅、銻、和銅所 組成之群組之至少一種材料。
  14. 如申請專利範圍第13項所述之方法，其中，該半導體元件包含化合物半導體元件。
  15. 如申請專利範圍第13項所述之方法，復包括：於該半導體基板之後表面上藉由切粒法形成具有深度的凹槽；於該半導體基板之後表面上形成該金屬膜以便覆蓋該凹槽之內表面；以及從該半導體基板切割該半導體元件。
  16. 一種電子元件，包括：半導體元件，包含：包含第一電極之化合物半導體元件；包含第二電極和凹部之基板；以及散熱黏著材料，將該半導體元件安置於該凹部中以便將該第一電極配置成靠近該第二電極，其中該第一電極耦接至該第二電極，而該散熱黏著材料覆蓋該半導體元件之底表面和至少部分之側表面，其中，配置有該第一電極之該半導體元件之周邊之第一部分和配置有該第二電極之該凹部之周邊之第二部分彼此以第一距離面對；未配置該第一電極之該半導體元件之周邊之第三部分和未配置該第二電極之該凹部之周邊之第四部分彼此以大於該第一距離之第二距離面對；以及該散熱黏著材料覆蓋於該第二部分之該半導體元件之該側表面之至少一部分。
  17. 如申請專利範圍第16項所述之電子元件，其中，該半導體元件包含高頻放大器，以放大輸入之高頻電壓。
  18. 一種電子元件，包括：半導體元件，包含：包含第一電極之化合物半導體元件；包含第二電極和凹部之基板；以及散熱黏著材料，將該半導體元件安置於該凹部中以便將該第一電極配置成靠近該第二電極，其中該第一電極耦接至該第二電極，而該散熱黏著材料覆蓋該半導體元件之底表面和至少部分之側表面，其中，該半導體元件包含：變壓器；以及將該變壓器配置於其間之高電壓電路和低電壓電路。
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