TWI484148B - Temperature sensor circuit - Google Patents
Temperature sensor circuit Download PDFInfo
- Publication number
- TWI484148B TWI484148B TW102148736A TW102148736A TWI484148B TW I484148 B TWI484148 B TW I484148B TW 102148736 A TW102148736 A TW 102148736A TW 102148736 A TW102148736 A TW 102148736A TW I484148 B TWI484148 B TW I484148B
- Authority
- TW
- Taiwan
- Prior art keywords
- transistor
- electrically connected
- source
- gate
- drain
- Prior art date
Links
Landscapes
- Measuring Temperature Or Quantity Of Heat (AREA)
Description
本發明是有關於一種溫度感測電路，且特別是一種可有效提升溫度感測精準度的溫度感測電路。The invention relates to a temperature sensing circuit, and in particular to a temperature sensing circuit capable of effectively improving temperature sensing accuracy.
溫度感測器現今已廣泛應用在各種電子產品上。在大部分溫度感測器的操作上，主要為先將溫度轉換成電壓或電流等訊號，接著再由溫度感測器內的電路處理此電壓或電流訊號，根據此電壓或電流訊號與溫度的關係來回推溫度。然而，電壓或電流訊號轉換為溫度的特性曲線有非線性的問題，導致電壓或電流訊號轉換為溫度的精準度降低。為了克服上述問題，可多設置額外的校正電路來降低非線性的影響，但同時也增加了消耗功率和電路佈局面積。Temperature sensors are now widely used in a variety of electronic products. In most of the operation of the temperature sensor, the temperature is first converted into a voltage or current signal, and then the voltage or current signal is processed by the circuit in the temperature sensor, according to the voltage or current signal and temperature. The relationship pushes the temperature back and forth. However, the characteristic curve of voltage or current signal conversion to temperature has a nonlinear problem, resulting in a decrease in the accuracy of voltage or current signal conversion to temperature. In order to overcome the above problems, additional correction circuits can be provided to reduce the influence of nonlinearity, but at the same time increase power consumption and circuit layout area.
因此，本發明的目的是在提供一種溫度感測電路，可有效提升溫度感測的精準度，且其同時具有低功率消耗和電路面積小型化等優點。Therefore, the object of the present invention is to provide a temperature sensing circuit which can effectively improve the accuracy of temperature sensing, and at the same time has the advantages of low power consumption and miniaturization of circuit area.
根據本發明之上述目的，提出一種溫度感測電路，此溫度感測電路包含第一電晶體、第二電晶體、第三電晶體、第四電晶體、第五電晶體、第六電晶體和共源極放大器。第一電晶體具有閘極、汲極和電性連接於電壓源的源 極，其中第一電晶體的閘極電性連接於第一電晶體的汲極。第二電晶體具有汲極、電性連接於電壓源的源極和電性連接於第一電晶體的閘極的閘極。第三電晶體具有汲極、電性連接於第一電晶體的汲極的源極和電性連接於偏壓電壓源的閘極。第四電晶體具有汲極、電性連接於第二電晶體的汲極的源極和電性連接於偏壓電壓源的閘極。第五電晶體具有電性連接於第三電晶體的汲極的汲極、電性連接於第四電晶體的汲極的閘極和電性連接於接地端的源極。第六電晶體具有電性連接於第四電晶體的汲極的汲極、電性連接於第五電晶體的閘極的閘極和電性連接於接地端的源極。共源極放大器電性連接於電壓源和第四電晶體的汲極，其包含第七電晶體、第八電晶體和電阻元件。第七電晶體具有閘極、汲極和電性連接於電壓源的源極，其中第七電晶體的閘極電性連接於第七電晶體的汲極。第八電晶體具有源極、電性連接於第七電晶體的汲極的汲極和電性連接於第四電晶體的汲極的閘極。電阻元件具有電性連接於第八電晶體的源極的第一端和電性連接於接地端的第二端。According to the above object of the present invention, a temperature sensing circuit is provided, the temperature sensing circuit comprising a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, and Common source amplifier. The first transistor has a gate, a drain, and a source electrically connected to the voltage source a pole, wherein the gate of the first transistor is electrically connected to the drain of the first transistor. The second transistor has a drain, a source electrically connected to the voltage source, and a gate electrically connected to the gate of the first transistor. The third transistor has a drain, a source electrically connected to the drain of the first transistor, and a gate electrically connected to the bias voltage source. The fourth transistor has a drain, a source electrically connected to the drain of the second transistor, and a gate electrically connected to the bias voltage source. The fifth transistor has a drain electrically connected to the drain of the third transistor, a gate electrically connected to the drain of the fourth transistor, and a source electrically connected to the ground. The sixth transistor has a drain electrically connected to the drain of the fourth transistor, a gate electrically connected to the gate of the fifth transistor, and a source electrically connected to the ground. The common source amplifier is electrically connected to the voltage source and the drain of the fourth transistor, and includes a seventh transistor, an eighth transistor, and a resistance element. The seventh transistor has a gate, a drain and a source electrically connected to the voltage source, wherein the gate of the seventh transistor is electrically connected to the drain of the seventh transistor. The eighth transistor has a source, a drain electrically connected to the drain of the seventh transistor, and a gate electrically connected to the drain of the fourth transistor. The resistive element has a first end electrically connected to the source of the eighth transistor and a second end electrically connected to the ground end.
依據本發明之一實施例，上述第一電晶體、第二電晶體、第三電晶體、第四電晶體和第七電晶體為P型金屬氧化半導體場效應電晶體(p-type metal oxide semiconductor field effect transistor；pMOSFET)，且上述第五電晶體、第六電晶體和第八電晶體為N型金屬氧化半導體場效應電晶體(n-type metal oxide semiconductor field effect transistor；nMOSFET)。According to an embodiment of the invention, the first transistor, the second transistor, the third transistor, the fourth transistor, and the seventh transistor are P-type metal oxide semiconductors (p-type metal oxide semiconductor) Field effect transistor; pMOSFET), and the fifth transistor, the sixth transistor, and the eighth transistor are N-type metal oxide semiconductor field Effect transistor; nMOSFET).
依據本發明之另一實施例，上述P型金屬氧化半導體場效應電晶體的臨界電壓的溫度係數(temperature coefficient)大於上述N型金屬氧化半導體場效應電晶體之的臨界電壓的溫度係數。According to another embodiment of the present invention, a temperature coefficient of a threshold voltage of the P-type metal oxide semiconductor field effect transistor is greater than a temperature coefficient of a threshold voltage of the N-type metal oxide semiconductor field effect transistor.
依據本發明之又一實施例，上述第一電晶體的寬長比(W/L)大於上述第三電晶體的寬長比，且上述第三電晶體的寬長比大於上述第六電晶體的寬長比。According to still another embodiment of the present invention, the aspect ratio (W/L) of the first transistor is greater than the aspect ratio of the third transistor, and the aspect ratio of the third transistor is greater than the sixth transistor. The aspect ratio.
依據本發明之再一實施例，上述溫度感測電路更包含電流鏡電路，電性連接於電壓源、接地端與第七電晶體的閘極。According to still another embodiment of the present invention, the temperature sensing circuit further includes a current mirror circuit electrically connected to the voltage source, the ground end, and the gate of the seventh transistor.
依據本發明之再一實施例，上述電流鏡電路包含第九電晶體、第十電晶體、第十一電晶體、第十二電晶體和第十三電晶體。第九電晶體具有汲極、電性連接於電壓源的源極和電性連接於第七電晶體的閘極的閘極。第十電晶體具有閘極、源極和電性連接於第九電晶體的汲極的汲極，其中第十電晶體的汲極電性連接於第十電晶體的閘極。第十一電晶體具有閘極、電性連接於第十電晶體的源極的汲極和電性連接於接地端的源極，其中第十一電晶體的汲極電性連接於第十一電晶體的閘極。第十二電晶體具有源極、汲極和電性連接於第十電晶體的閘極的閘極。第十三電晶體具有電性連接於第十二電晶體的源極的汲極、電性連接於第十一電晶體的閘極的閘極和電性連接於接地端的源極。According to still another embodiment of the present invention, the current mirror circuit includes a ninth transistor, a tenth transistor, an eleventh transistor, a twelfth transistor, and a thirteenth transistor. The ninth transistor has a drain, a source electrically connected to the voltage source, and a gate electrically connected to the gate of the seventh transistor. The tenth transistor has a gate, a source and a drain electrically connected to the drain of the ninth transistor, wherein the drain of the tenth transistor is electrically connected to the gate of the tenth transistor. The eleventh transistor has a gate, a drain electrically connected to the source of the tenth transistor, and a source electrically connected to the ground, wherein the eleventh transistor is electrically connected to the eleventh The gate of the crystal. The twelfth transistor has a source, a drain, and a gate electrically connected to the gate of the tenth transistor. The thirteenth transistor has a drain electrically connected to the source of the twelfth transistor, a gate electrically connected to the gate of the eleventh transistor, and a source electrically connected to the ground.
依據本發明之再一實施例，上述第九電晶體為P型金屬氧化半導體場效應電晶體，且上述第十電晶體、第十一電晶體、第十二電晶體和第十三電晶體為N型金屬氧化半導體場效應電晶體。According to still another embodiment of the present invention, the ninth transistor is a P-type metal oxide semiconductor field effect transistor, and the tenth transistor, the eleventh transistor, the twelfth transistor, and the thirteenth transistor are N-type metal oxide semiconductor field effect transistor.
依據本發明之再一實施例，上述溫度感測電路更包含電流控制振盪器(current controlled oscillator；CCO)，電性連接於電流鏡電路、電壓源與接地端。According to still another embodiment of the present invention, the temperature sensing circuit further includes a current controlled oscillator (CCO) electrically connected to the current mirror circuit, the voltage source and the ground.
依據本發明之再一實施例，上述電流控制振盪器包含正反器、第一比較器、第二比較器、第一電容、第二電容、第一互補金屬氧化半導體(complementary metal oxide semiconductor；CMOS)和第二互補金屬氧化半導體。正反器具有第一輸入端、第二輸入端、第一輸出端和第二輸出端。第一比較器具有負相輸入端、電性連接於參考電壓源的正相輸入端和電性連接於正反器的第一輸入端的輸出端。第二比較器具有負相輸入端、電性連接於參考電壓源的正相輸入端和電性連接於正反器的第二輸入端的輸出端。第一電容具有電性連接於第一比較器的負相輸入端的第一端和電性連接於接地端的第二端。第二電容具有電性連接於第二比較器的負相輸入端的第一端和電性連接於接地端的第二端。第一互補金屬氧化半導體電性連接於電壓源、第一電容的第一端、正反器的第一輸出端和電流鏡電路。第二互補金屬氧化半導體電性連接於電壓源、第二電容的第一端、正反器的第二輸出端和電流鏡電路。According to still another embodiment of the present invention, the current controlled oscillator includes a flip flop, a first comparator, a second comparator, a first capacitor, a second capacitor, and a first complementary metal oxide semiconductor (CMOS). And a second complementary metal oxide semiconductor. The flip-flop has a first input, a second input, a first output, and a second output. The first comparator has a negative phase input, a positive phase input electrically coupled to the reference voltage source, and an output electrically coupled to the first input of the flip flop. The second comparator has a negative phase input, a positive phase input electrically coupled to the reference voltage source, and an output electrically coupled to the second input of the flip flop. The first capacitor has a first end electrically connected to the negative phase input end of the first comparator and a second end electrically connected to the ground end. The second capacitor has a first end electrically connected to the negative phase input end of the second comparator and a second end electrically connected to the ground end. The first complementary metal oxide semiconductor is electrically connected to the voltage source, the first end of the first capacitor, the first output of the flip-flop, and the current mirror circuit. The second complementary metal oxide semiconductor is electrically connected to the voltage source, the first end of the second capacitor, the second output of the flip-flop, and the current mirror circuit.
100、500‧‧‧溫度感測電路100, 500‧‧‧ temperature sensing circuit
110‧‧‧共源極放大器110‧‧‧Common source amplifier
510‧‧‧電流鏡電路510‧‧‧current mirror circuit
520‧‧‧電流控制振盪器520‧‧‧current controlled oscillator
521‧‧‧正反器521‧‧‧Factor
522、523‧‧‧比較器522, 523‧‧‧ comparator
524、525‧‧‧互補金屬氧化半導體524, 525‧‧‧Complementary metal oxide semiconductor
C1、C2‧‧‧電容C1, C2‧‧‧ capacitor
GND‧‧‧接地端GND‧‧‧ ground terminal
IR‧‧‧電流IR‧‧‧current
IS‧‧‧鏡像電流IS‧‧‧Mirror current
M1~M17‧‧‧電晶體M1~M17‧‧‧O crystal
POUT‧‧‧脈波訊號POUT‧‧‧ pulse signal
R‧‧‧電阻元件R‧‧‧resistive components
VB‧‧‧偏壓電壓源VB‧‧‧ bias voltage source
VDD‧‧‧電壓源VDD‧‧‧voltage source
VP‧‧‧節點電壓VP‧‧‧ node voltage
VREF‧‧‧參考電壓源VREF‧‧‧reference voltage source
為讓本發明之上述和其他目的、特徵、優點與實施例能更明顯易懂，所附圖式之說明如下：第1圖係繪示依據本發明實施例溫度感測電路之示意圖。The above and other objects, features, advantages and embodiments of the present invention will become more <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt; </ RTI> <RTIgt;
第2A圖係繪示依據本發明實施例溫度與第1圖中節點電壓的關係之示意圖。2A is a schematic diagram showing the relationship between the temperature and the node voltage in FIG. 1 according to an embodiment of the present invention.
第2B圖係繪示依據本發明實施例溫度與第1圖中節點電壓產生之溫度誤差的關係之示意圖。FIG. 2B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the node voltage in FIG. 1 according to an embodiment of the present invention.
第3A圖係繪示依據本發明實施例溫度與第1圖中電阻元件的關係之示意圖。Fig. 3A is a schematic view showing the relationship between the temperature and the resistance element in Fig. 1 according to an embodiment of the present invention.
第3B圖係繪示依據本發明實施例溫度與第1圖中電阻元件產生之溫度誤差的關係之示意圖。Fig. 3B is a schematic view showing the relationship between the temperature and the temperature error generated by the resistive element in Fig. 1 according to an embodiment of the present invention.
第4A圖係繪示依據本發明實施例溫度與第1圖中電流的關係之示意圖。Fig. 4A is a schematic view showing the relationship between the temperature and the current in Fig. 1 according to an embodiment of the present invention.
第4B圖係繪示依據本發明實施例溫度與第1圖中電流產生之溫度誤差的關係之示意圖。Fig. 4B is a schematic diagram showing the relationship between the temperature and the temperature error of current generation in Fig. 1 according to an embodiment of the present invention.
第5圖係繪示依據本發明實施例溫度感測電路之示意圖。Figure 5 is a schematic diagram showing a temperature sensing circuit in accordance with an embodiment of the present invention.
第6A圖係繪示第5圖中偏壓電壓源為1伏特(V)時溫度與輸出頻率的關係之示意圖。Fig. 6A is a diagram showing the relationship between the temperature and the output frequency when the bias voltage source is 1 volt (V) in Fig. 5.
第6B圖係繪示依據本發明實施例溫度與第5圖中偏壓電壓源為1伏特時輸出頻率產生之溫度誤差的關係之示意圖。Figure 6B is a diagram showing the relationship between the temperature and the temperature error generated by the output frequency when the bias voltage source is 1 volt in Fig. 5 according to an embodiment of the present invention.
第7A圖係繪示第5圖中偏壓電壓源為1.13伏特時溫 度與輸出頻率的關係之示意圖。Figure 7A shows the temperature of the bias voltage source in Figure 5 at 1.13 volts. Schematic diagram of the relationship between degrees and output frequency.
第7B圖係繪示依據本發明實施例溫度與第5圖中偏壓電壓源為1.13伏特時輸出頻率產生之溫度誤差的關係之示意圖。Fig. 7B is a diagram showing the relationship between the temperature and the temperature error generated by the output frequency when the bias voltage source is 1.13 volts in Fig. 5 according to an embodiment of the present invention.
第8A圖係繪示第5圖中偏壓電壓源為1.2伏特時溫度與輸出頻率的關係之示意圖。Fig. 8A is a diagram showing the relationship between the temperature and the output frequency when the bias voltage source is 1.2 volts in Fig. 5.
第8B圖係繪示依據本發明實施例溫度與第5圖中偏壓電壓源為1.2伏特時輸出頻率產生之溫度誤差的關係之示意圖。Figure 8B is a diagram showing the relationship between the temperature and the temperature error generated by the output frequency when the bias voltage source of Figure 5 is 1.2 volts according to an embodiment of the present invention.
以下仔細討論本發明的實施例。然而，可以理解的是，實施例提供許多可應用的發明概念，其可實施於各式各樣的特定內容中。所討論之特定實施例僅供說明，並非用以限定本發明之範圍。Embodiments of the invention are discussed in detail below. However, it will be appreciated that the embodiments provide many applicable inventive concepts that can be implemented in a wide variety of specific content. The specific embodiments discussed are illustrative only and are not intended to limit the scope of the invention.
請參照第1圖，其係繪示本發明實施例溫度感測電路100之示意圖。在第1圖中，溫度感測電路100包含電晶體M1~M8和電阻元件R。電晶體M1具有閘極、汲極和電性連接於電壓源VDD的源極，且電晶體M1的閘極與電晶體M1的汲極電性連接。電晶體M2具有汲極、電性連接於電壓源VDD的源極和電性連接於電晶體M1的閘極的閘極。電晶體M3具有汲極、電性連接於電晶體M1的汲極的源極和電性連接於偏壓電壓源VB的閘極。電晶體M4具有汲極、電性連接於電晶體M2的汲極的源極和電性連接於偏壓電壓源VB的閘極。電晶體M5具有電性連接於電晶體 M3的汲極的汲極、電性連接於電晶體M4的汲極的閘極和電性連接於接地端GND的源極。電晶體M6具有電性連接於電晶體M4的汲極的汲極、電性連接於電晶體M5的閘極的閘極和電性連接於接地端GND的源極。Please refer to FIG. 1 , which is a schematic diagram of a temperature sensing circuit 100 according to an embodiment of the present invention. In FIG. 1, the temperature sensing circuit 100 includes transistors M1 to M8 and a resistance element R. The transistor M1 has a gate, a drain and a source electrically connected to the voltage source VDD, and the gate of the transistor M1 is electrically connected to the gate of the transistor M1. The transistor M2 has a drain, a source electrically connected to the voltage source VDD, and a gate electrically connected to the gate of the transistor M1. The transistor M3 has a drain, a source electrically connected to the drain of the transistor M1, and a gate electrically connected to the bias voltage source VB. The transistor M4 has a drain, a source electrically connected to the drain of the transistor M2, and a gate electrically connected to the bias voltage source VB. The transistor M5 is electrically connected to the transistor The drain of the drain of M3 is electrically connected to the gate of the drain of the transistor M4 and the source electrically connected to the ground GND. The transistor M6 has a drain electrically connected to the drain of the transistor M4, a gate electrically connected to the gate of the transistor M5, and a source electrically connected to the ground GND.
在本發明實施例中，電晶體M1~M4為P型金屬氧化半導體場效應電晶體(p-type metal oxide semiconductor field effect transistor；pMOSFET)，且電晶體M5和M6為N型金屬氧化半導體場效應電晶體(n-type metal oxide semiconductor field effect transistor；nMOSFET)。In the embodiment of the present invention, the transistors M1 to M4 are p-type metal oxide semiconductor field effect transistors (pMOSFETs), and the transistors M5 and M6 are N-type metal oxide semiconductor field effects. An n-type metal oxide semiconductor field effect transistor (nMOSFET).
在本發明實施例中，電晶體M1、M3和M6的寬長比(W/L)關係為M1>M3>M6，使節點電壓VP對溫度的一次項係數為正。在電晶體通道寬度(W)和通道長度(L)的設計上，電晶體M1的通道寬度和通道長度分別為4.4微米(μm)和2微米，電晶體M3的通道寬度和通道長度分別為2.4微米和2微米，且電晶體M6的通道寬度和通道長度分別為2.2微米和10微米。此外，在本發明實施例中，N型金屬氧化半導體場效應電晶體的載子遷移率(carrier mobility)大約為P型金屬氧化半導體場效應電晶體的載子遷移率的2倍。另一方面，節點電壓VP具有與絕對溫度成正比(proportional to absolute temperature；PTAT)的特性。應注意的是，上述通道寬度和通道長度的設計值及載子遷移率的關係係本發明之一示範實施例，其並非用以限制本發明的範圍。In the embodiment of the present invention, the width-to-length ratio (W/L) relationship of the transistors M1, M3, and M6 is M1>M3>M6, and the coefficient of the primary voltage of the node voltage VP to the temperature is positive. In the design of the transistor channel width (W) and channel length (L), the channel width and channel length of the transistor M1 are 4.4 micrometers (μm) and 2 micrometers, respectively, and the channel width and channel length of the transistor M3 are 2.4, respectively. Micrometers and 2 micrometers, and the channel width and channel length of the transistor M6 are 2.2 micrometers and 10 micrometers, respectively. Further, in the embodiment of the present invention, the carrier mobility of the N-type metal oxide semiconductor field effect transistor is about twice that of the carrier mobility of the P-type metal oxide semiconductor field effect transistor. On the other hand, the node voltage VP has a characteristic of proportional to absolute temperature (PTAT). It should be noted that the relationship between the design values of the channel width and the channel length and the carrier mobility is an exemplary embodiment of the present invention and is not intended to limit the scope of the present invention.
請參照第2A圖，第2A圖係繪示依據本發明實施 例溫度與第1圖中節點電壓VP的關係之示意圖。在第2A圖中，節點電壓VP與溫度間的線性度(linearity)約為99.92%，且節點電壓VP對溫度的靈敏度(sensitivity)約為2.233毫伏特(mV)/℃。此外，請同時參照第2B圖，第2B圖係繪示依據本發明實施例溫度與第1圖中節點電壓VP產生之溫度誤差的關係之示意圖。第2B圖所繪示的關係將節點電壓VP與第2A圖之線性迴歸線上的對應值相減後，再除以此線性迴歸線的斜率而得。由第2B圖可知，在溫度為0℃~125℃的範圍內，節點電壓VP所產生的溫度誤差可到1℃以上，其不利於溫度感測。Please refer to FIG. 2A, and FIG. 2A illustrates the implementation according to the present invention. A schematic diagram of the relationship between the temperature of the example and the node voltage VP in FIG. In Figure 2A, the linearity between the node voltage VP and the temperature is about 99.92%, and the sensitivity of the node voltage VP to temperature is about 2.233 millivolts (mV) / °C. In addition, please refer to FIG. 2B at the same time, and FIG. 2B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the node voltage VP in FIG. 1 according to the embodiment of the present invention. The relationship depicted in Fig. 2B subtracts the node voltage VP from the corresponding value on the linear regression line of Fig. 2A, and then divides the slope of the linear regression line. It can be seen from FIG. 2B that the temperature error generated by the node voltage VP can be above 1 ° C in the range of 0 ° C to 125 ° C, which is not conducive to temperature sensing.
請再回到第1圖。電晶體M7具有閘極、汲極和電性連接於電壓源VDD的源極，且電晶體M7的閘極與電晶體M7的汲極電性連接。電晶體M8具有源極、電性連接於電晶體M7的汲極的汲極和電性連接於電晶體M4的汲極的閘極。電阻元件R具有電性連接於電晶體M8的源極的第一端和電性連接於接地端GND的第二端。電晶體M7和M8和電阻元件R的組合為共源極放大器110，其係用以提供電壓增益，進而放大流經電阻元件R的電流IR。Please return to Figure 1. The transistor M7 has a gate, a drain and a source electrically connected to the voltage source VDD, and the gate of the transistor M7 is electrically connected to the gate of the transistor M7. The transistor M8 has a source, a drain electrically connected to the drain of the transistor M7, and a gate electrically connected to the drain of the transistor M4. The resistive element R has a first end electrically connected to the source of the transistor M8 and a second end electrically connected to the ground GND. The combination of transistors M7 and M8 and resistive element R is a common source amplifier 110 that is used to provide a voltage gain that amplifies the current IR flowing through the resistive element R.
在共源極放大器110中，電晶體M7為P型金屬氧化半導體場效應電晶體，且電晶體M8為N型金屬氧化半導體場效應電晶體。此外，電阻元件R的溫度誤差特性與節點電壓VP的溫度誤差特性相似。本發明的電阻元件R係以多晶矽電阻(polysilicon resistor)為例。在其他實施例中，電阻元件R可以是擴散電阻(diffused resistor)或 其他類似元件。In the common source amplifier 110, the transistor M7 is a P-type metal oxide semiconductor field effect transistor, and the transistor M8 is an N-type metal oxide semiconductor field effect transistor. Further, the temperature error characteristic of the resistance element R is similar to the temperature error characteristic of the node voltage VP. The resistive element R of the present invention is exemplified by a polysilicon resistor. In other embodiments, the resistive element R can be a diffused resistor or Other similar components.
請參照第3A圖，第3A圖係繪示依據本發明實施例溫度與第1圖中電阻元件R的關係之示意圖。在第3A圖中，電阻值與溫度間的線性度約為99.62%，且電阻元件R對溫度的靈敏度約為24.24歐姆(Ω)/℃。此外，請同時參照第3B圖，第3B圖係繪示依據本發明實施例溫度與第1圖中電阻元件R產生之溫度誤差的關係之示意圖。由第3B圖可知，在溫度為0℃~125℃的範圍內，電阻元件R所產生的溫度誤差可到1℃以上，其亦不利於溫度感測。Referring to FIG. 3A, FIG. 3A is a schematic diagram showing the relationship between the temperature and the resistance element R in FIG. 1 according to an embodiment of the present invention. In Figure 3A, the linearity between the resistance value and temperature is about 99.62%, and the sensitivity of the resistive element R to temperature is about 24.24 ohms (Ω) / °C. In addition, please refer to FIG. 3B at the same time, and FIG. 3B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the resistance element R in FIG. 1 according to the embodiment of the present invention. It can be seen from Fig. 3B that the temperature error generated by the resistive element R can be above 1 °C in the range of 0 °C to 125 °C, which is also disadvantageous for temperature sensing.
然而，比較第2B和3B圖可知，第2B圖所繪示的曲線與第3B圖所繪示的曲線相似。換言之，節點電壓VP的溫度誤差特性相似於電阻元件R的溫度誤差特性。請再回到第1圖。在第1圖中，於電晶體M8的轉導值(transconductance)與電阻元件R的電阻值之乘積遠大於1的情況下，電流IR與節點電壓VP和電阻元件R的關係可表示為：IR=(VP-VGS8 )/R， (1)其中，VGS8 代表電晶體M8的閘極與源極之間的電位差。因節點電壓VP與電阻元件R的溫度誤差特性相似，藉由式(1)中節點電壓VP與電阻元件R的關係，節點電壓VP與電阻元件R的溫度誤差特性可大致抵銷，使電流IR的溫度誤差控制在一定的範圍內。雖電晶體M8的閘極與源極之間的電位差VGS8 可能隨著偏壓電流或溫度而改變，但利用節點電壓VP和電阻元件R對溫度的相似非線 性曲率關係，透過式(1)的線性化處理，仍可得到高線性度的電流IR與溫度之關係。However, comparing Figures 2B and 3B, the curve depicted in Figure 2B is similar to the curve depicted in Figure 3B. In other words, the temperature error characteristic of the node voltage VP is similar to the temperature error characteristic of the resistance element R. Please return to Figure 1. In Fig. 1, in the case where the product of the transconductance of the transistor M8 and the resistance value of the resistance element R is much larger than 1, the relationship between the current IR and the node voltage VP and the resistance element R can be expressed as: IR = (VP - V GS8 ) / R, (1) where V GS8 represents the potential difference between the gate and the source of the transistor M8. Because the node voltage VP is similar to the temperature error characteristic of the resistive element R, the relationship between the node voltage VP and the resistive element R can be substantially offset by the relationship between the node voltage VP and the resistive element R in the equation (1), so that the current IR The temperature error is controlled within a certain range. Although the potential difference V GS8 between the gate and the source of the transistor M8 may vary with the bias current or temperature, the similar nonlinear curvature relationship of the node voltage VP and the resistance element R to the temperature is transmitted through the equation (1). The linearization process can still obtain the relationship between the high linearity IR and temperature.
請參照第4A圖，第4A圖係繪示依據本發明實施例溫度與第1圖中電流IR的關係之示意圖。在第4A圖中，電流IR與溫度間的線性度約為99.9998%，且電流IR對溫度的靈敏度約為28奈安培(nA)/℃。此外，請同時參照第4B圖，第4B圖係繪示依據本發明實施例溫度與第1圖中電流IR產生之溫度誤差的關係之示意圖。由第4B圖可知，在溫度為0℃~125℃的範圍內，電阻元件R所產生的溫度誤差在-0.2℃~0.1℃之間。Please refer to FIG. 4A. FIG. 4A is a schematic diagram showing the relationship between the temperature and the current IR in FIG. 1 according to an embodiment of the present invention. In Figure 4A, the linearity between current IR and temperature is about 99.9998%, and the sensitivity of current IR to temperature is about 28 nanoamperes (nA) / °C. In addition, please refer to FIG. 4B at the same time, and FIG. 4B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the current IR in FIG. 1 according to an embodiment of the present invention. As can be seen from Fig. 4B, the temperature error generated by the resistive element R is in the range of -0.2 ° C to 0.1 ° C in the range of 0 ° C to 125 ° C.
由上述可知，依據本發明的溫度感測電路100，可使所產生的電流IR和溫度之間的線性度在99.9998%之上，且溫度誤差可控制在一定的範圍內，如此一來，便可藉由量測電流IR來推算對應的溫度。因此，本發明的溫度感測電路100可有效提升溫度感測的精準度。此外，本發明的溫度感測電路100係由電晶體M1~M8和電阻元件R等元件組成，故其同時具有低功率消耗和電路面積小型化等優點。It can be seen from the above that according to the temperature sensing circuit 100 of the present invention, the linearity between the generated current IR and the temperature can be above 99.9998%, and the temperature error can be controlled within a certain range, so that The corresponding temperature can be estimated by measuring the current IR. Therefore, the temperature sensing circuit 100 of the present invention can effectively improve the accuracy of temperature sensing. Further, the temperature sensing circuit 100 of the present invention is composed of elements such as the transistors M1 to M8 and the resistance element R, so that it has advantages such as low power consumption and miniaturization of the circuit area.
然而，溫度感測電路100可能會受到量測儀器、外在環境和負載元件寄生量過大，導致量測到電流IR的精準度下降。另一方面，電流IR對溫度的靈敏度為奈安培等級，故在量測電流IR的變化上較為困難。針對上述問題，本發明另提出一種溫度感測電路，其係先將電流轉換為脈波訊號，再藉由脈波訊號的輸出頻率來推算對應的溫度，以避 免外在因素的影響而導致量測精準度下降，且便利於實際量測。However, the temperature sensing circuit 100 may be subject to excessive measurement by the measuring instrument, the external environment, and the load component, resulting in a decrease in the accuracy of measuring the current IR. On the other hand, the sensitivity of the current IR to temperature is a Nesmite grade, so it is difficult to measure the change of the current IR. In view of the above problems, the present invention further provides a temperature sensing circuit, which first converts a current into a pulse wave signal, and then uses the output frequency of the pulse wave signal to calculate a corresponding temperature to avoid The measurement accuracy is reduced due to the influence of external factors, and it is convenient for actual measurement.
請參照第5圖，第5圖係繪示依據本發明實施例溫度感測電路500之示意圖。溫度感測電路500除了包含溫度感測電路100的電晶體M1~M8和電阻元件R外，更包含電流鏡電路510和電流控制振盪器(current controlled oscillator；CCO)520。電流鏡電路510電性連接於電壓源VDD、接地端GND與電晶體M7的閘極，其係用以產生對應電流IR的鏡像電流IS。電流控制振盪器520電性連接於電流鏡電路510、電壓源VDD與接地端GND，其係用以將鏡像電流IS轉換為脈波訊號POUT。Please refer to FIG. 5, which is a schematic diagram of a temperature sensing circuit 500 in accordance with an embodiment of the present invention. The temperature sensing circuit 500 includes a current mirror circuit 510 and a current controlled oscillator (CCO) 520 in addition to the transistors M1 M M8 and the resistive element R of the temperature sensing circuit 100. The current mirror circuit 510 is electrically connected to the voltage source VDD, the ground GND and the gate of the transistor M7 for generating a mirror current IS corresponding to the current IR. The current control oscillator 520 is electrically connected to the current mirror circuit 510, the voltage source VDD and the ground GND for converting the mirror current IS into the pulse signal POUT.
電流鏡電路510包含電晶體M9~M13。電晶體M9具有汲極、電性連接於電壓源VDD的源極和電性連接於電晶體M7的閘極的閘極。電晶體M10具有閘極、源極和電性連接於電晶體M9的汲極的汲極，且電晶體M10的汲極與電晶體M10的閘極電性連接。電晶體M11具有閘極、電性連接於電晶體M10的源極的汲極和電性連接接地端GND的源極，且電晶體M11的汲極與電晶體M11的閘極電性連接。電晶體M12具有源極、汲極和電性連接於電晶體M10的閘極的閘極。電晶體M13具有電性連接於電晶體M12的源極的汲極、電性連接於電晶體M11的閘極的閘極和電性連接於接地端GND的源極。在電流鏡電路510中，電晶體M9為P型金屬氧化半導體場效應電晶體，且電晶體M10~M13為N型金屬氧化半導體場效應電晶體。The current mirror circuit 510 includes transistors M9 to M13. The transistor M9 has a drain, a source electrically connected to the voltage source VDD, and a gate electrically connected to the gate of the transistor M7. The transistor M10 has a gate, a source and a drain electrically connected to the drain of the transistor M9, and the drain of the transistor M10 is electrically connected to the gate of the transistor M10. The transistor M11 has a gate, a drain electrically connected to the source of the transistor M10, and a source electrically connected to the ground GND, and the drain of the transistor M11 is electrically connected to the gate of the transistor M11. The transistor M12 has a source, a drain, and a gate electrically connected to the gate of the transistor M10. The transistor M13 has a drain electrically connected to the source of the transistor M12, a gate electrically connected to the gate of the transistor M11, and a source electrically connected to the ground GND. In the current mirror circuit 510, the transistor M9 is a P-type metal oxide semiconductor field effect transistor, and the transistors M10 to M13 are N-type metal oxide semiconductor field effect transistors.
電流控制振盪器包含正反器(flip-flop)521、比較器522和523、電容C1和C2和互補金屬氧化半導體(complementary metal oxide semiconductor；CMOS)524和525。正反器521為SR正反器(SR flip-flop)，其具有第一輸入端、第二輸入端、第一輸出端和第二輸出端，其中第一輸出端用以輸出脈波訊號POUT。比較器522具有負相輸入端、電性連接於參考電壓源VREF的正相輸入端和電性連接於正反器521的第一輸入端的輸出端。比較器具有負相輸入端、電性連接於參考電壓源VREF的正相輸入端和電性連接於正反器521的第二輸入端的輸出端。電容C1具有電性連接於比較器522的負相輸入端的第一端和電性連接於接地端GND的第二端。電容C2具有電性連接於比較器523的負相輸入端的第一端和電性連接於接地端GND的第二端。互補金屬氧化半導體524電性連接於電壓源VDD、電容C1的第一端、正反器521的第一輸出端和電流鏡電路510中電晶體M12的源極。互補金屬氧化半導體525電性連接於電壓源VDD、電容C2的第一端、正反器521的第二輸出端和電流鏡電路510中電晶體M12的源極。互補金屬氧化半導體524包含電晶體M14和M15，且互補金屬氧化半導體525包含電晶體M16和M17。其中，電晶體M14和M16為P型金屬氧化半導體場效應電晶體，且電晶體M15和M17為N型金屬氧化半導體場效應電晶體。The current controlled oscillator includes a flip-flop 521, comparators 522 and 523, capacitors C1 and C2, and complementary metal oxide semiconductors (CMOS) 524 and 525. The flip-flop 521 is a SR flip-flop having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, wherein the first output terminal is configured to output a pulse signal POUT . The comparator 522 has a negative phase input terminal, a positive phase input terminal electrically connected to the reference voltage source VREF, and an output terminal electrically connected to the first input terminal of the flip-flop 521. The comparator has a negative phase input terminal, a positive phase input terminal electrically connected to the reference voltage source VREF, and an output terminal electrically connected to the second input terminal of the flip-flop 521. The capacitor C1 has a first end electrically connected to the negative input terminal of the comparator 522 and a second end electrically connected to the ground GND. The capacitor C2 has a first end electrically connected to the negative phase input end of the comparator 523 and a second end electrically connected to the ground end GND. The complementary metal oxide semiconductor 524 is electrically connected to the voltage source VDD, the first end of the capacitor C1, the first output of the flip-flop 521, and the source of the transistor M12 in the current mirror circuit 510. The complementary metal oxide semiconductor 525 is electrically connected to the voltage source VDD, the first end of the capacitor C2, the second output of the flip-flop 521, and the source of the transistor M12 in the current mirror circuit 510. Complementary metal oxide semiconductor 524 includes transistors M14 and M15, and complementary metal oxide semiconductor 525 includes transistors M16 and M17. Among them, the transistors M14 and M16 are P-type metal oxide semiconductor field effect transistors, and the transistors M15 and M17 are N-type metal oxide semiconductor field effect transistors.
藉由切換互補金屬氧化半導體524和525的狀態， 使電容C1和C2在充電狀態與放電狀態之間往復改變，再經由輸入至比較器522和523負相輸入端的電壓準位與參考電壓源VREF比較，使輸出的脈波訊號POUT在高準位和低準位之間來回切換，如此便可決定脈波訊號POUT的輸出頻率。另一方面，在電晶體M14與M16導通時分別對電容C1與C2充電的充電速率均遠大於電晶體M15與M17導通時分別對電容C1與C2放電的放電速率之條件下，脈波訊號POUT的半週期時間寬度大致等於電容C1或C2的放電時間。若電容C1和C2的電容量相同，則輸出脈波的責任週期(duty cycle)為50%。By switching the states of the complementary metal oxide semiconductors 524 and 525, The capacitors C1 and C2 are reciprocally changed between the state of charge and the state of discharge, and the voltage level input to the negative phase input terminals of the comparators 522 and 523 is compared with the reference voltage source VREF, so that the output pulse signal POUT is at a high level. Switch back and forth between the low level and the low level to determine the output frequency of the pulse signal POUT. On the other hand, when the transistors M14 and M16 are turned on, the charging rates of the capacitors C1 and C2 are respectively charged much higher than the discharge rates of the capacitors C1 and C2 when the transistors M15 and M17 are turned on, respectively, and the pulse signal POUT The half cycle time width is approximately equal to the discharge time of capacitor C1 or C2. If the capacitances of the capacitors C1 and C2 are the same, the duty cycle of the output pulse is 50%.
在第5圖中，脈波訊號POUT的輸出頻率fPOUT 與鏡像電流IS的關係如下：fPOUT =IS/[2C(VDD-VREF)]， (2)其中，C代表電容C1和C2的電容量。由式(2)可知，脈波訊號POUT的輸出頻率fPOUT 與鏡像電流IS為線性關係。如前所述，電流IR和溫度之間具有高度線性關係。因此，搭配電流鏡電路510和電流控制振盪器520後，脈波訊號POUT的輸出頻率fPOUT 與溫度之間亦具有高度線性關係。In Figure 5, the output frequency f POUT of the pulse signal POUT is related to the mirror current IS as follows: f POUT =IS/[2C(VDD-VREF)], (2) where C represents the capacitance of the capacitors C1 and C2. capacity. It can be seen from equation (2) that the output frequency f POUT of the pulse signal POUT is linear with the mirror current IS. As mentioned earlier, there is a highly linear relationship between current IR and temperature. Therefore, after the current mirror circuit 510 and the current control oscillator 520 are combined, the output frequency f POUT of the pulse signal POUT has a highly linear relationship with the temperature.
請參照第6A圖，第6A圖係繪示第5圖中偏壓電壓源VB為1伏特時輸出頻率fPOUT 與溫度間的關係之示意圖。在第6A圖中，溫度與輸出頻率fPOUT 的線性度約為99.9941%，且輸出頻率fPOUT 對溫度的靈敏度約為2.3千赫茲(KHz)/℃。此外，請同時參照第6B圖，第6B圖係繪 示依據本發明實施例溫度與第5圖中偏壓電壓源VB為1伏特時輸出頻率fPOUT 產生之溫度誤差的關係之示意圖。由第6B圖可知，在溫度為0℃~125℃的範圍內，輸出頻率fPOUT 所產生的溫度誤差在-0.5℃~0.5℃之間。Please refer to FIG. 6A. FIG. 6A is a schematic diagram showing the relationship between the output frequency f POUT and the temperature when the bias voltage source VB is 1 volt in FIG. 5 . In Fig. 6A, the linearity of the temperature and the output frequency f POUT is about 99.9941%, and the sensitivity of the output frequency f POUT to temperature is about 2.3 kilohertz (KHz) / °C. In addition, please refer to FIG. 6B at the same time, and FIG. 6B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the output frequency f POUT when the bias voltage source VB is 1 volt in FIG. 5 according to the embodiment of the present invention. It can be seen from Fig. 6B that the temperature error caused by the output frequency f POUT is between -0.5 ° C and 0.5 ° C in the range of 0 ° C to 125 ° C.
請參照第7A圖，第7A圖係繪示第5圖中偏壓電壓源VB為1.13伏特時輸出頻率fPOUT 與溫度間的關係之示意圖。在第7A圖中，溫度與輸出頻率fPOUT 的線性度約為99.9934%，且輸出頻率fPOUT 對溫度的靈敏度約為2.28千赫茲/℃。此外，請同時參照第7B圖，第7B圖係繪示依據本發明實施例溫度與第5圖中偏壓電壓源VB為1.13伏特時輸出頻率fPOUT 產生之溫度誤差的關係之示意圖。由第7B圖可知，在溫度為0℃~125℃的範圍內，輸出頻率fPOUT 所產生的溫度誤差在-0.5℃~0.4℃之間。Please refer to FIG. 7A. FIG. 7A is a schematic diagram showing the relationship between the output frequency f POUT and the temperature when the bias voltage source VB in FIG. 5 is 1.13 volts. In Figure 7A, the linearity of the temperature and output frequency f POUT is approximately 99.9934%, and the sensitivity of the output frequency f POUT to temperature is approximately 2.28 kHz / °C. In addition, please refer to FIG. 7B at the same time, and FIG. 7B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the output frequency f POUT when the bias voltage source VB is 1.13 volts in FIG. 5 according to the embodiment of the present invention. It can be seen from Fig. 7B that the temperature error caused by the output frequency f POUT is between -0.5 ° C and 0.4 ° C in the range of 0 ° C to 125 ° C.
請參照第8A圖，第8A圖係繪示第5圖中偏壓電壓源VB為1.2伏特時輸出頻率fPOUT 與溫度間的關係之示意圖。在第8A圖中，溫度與輸出頻率fPOUT 的線性度約為99.9993%，且輸出頻率fPOUT 對溫度的靈敏度約為2.24千赫茲/℃。此外，請同時參照第8B圖，第8B圖係繪示依據本發明實施例溫度與第5圖中偏壓電壓源VB為1.2伏特時輸出頻率fPOUT 產生之溫度誤差的關係之示意圖。由第8B圖可知，在溫度為0℃~125℃的範圍內，輸出頻率fPOUT 所產生的溫度誤差在-0.15℃~0.2℃之間。Please refer to FIG. 8A. FIG. 8A is a schematic diagram showing the relationship between the output frequency f POUT and the temperature when the bias voltage source VB is 1.2 volts in FIG. 5 . In Fig. 8A, the linearity of the temperature and the output frequency f POUT is about 99.9993%, and the sensitivity of the output frequency f POUT to temperature is about 2.24 kHz / °C. In addition, please refer to FIG. 8B at the same time, and FIG. 8B is a schematic diagram showing the relationship between the temperature and the temperature error generated by the output frequency f POUT when the bias voltage source VB in FIG. 5 is 1.2 volts according to the embodiment of the present invention. It can be seen from Fig. 8B that the temperature error caused by the output frequency f POUT is between -0.15 ° C and 0.2 ° C in the range of 0 ° C to 125 ° C.
由上述可知，依據本發明的溫度感測電路500，可使輸出頻率fPOUT 與溫度之間具有高度線性關係，且溫度誤 差可控制在一定的範圍內，如此一來，便可藉由量測輸出頻率fPOUT 來推算對應的溫度。此外，相較於直接量測對溫度的靈敏度為奈安培等級的電流IR，量測脈波訊號POUT的輸出頻率fPOUT 較為容易，且不易受到量測儀器、外在環境和負載元件寄生量過大的影響，而導致其精準度下降。因此，本發明的溫度感測電路500除了可有效提升溫度感測的精準度外，亦可便利於實際量測。It can be seen from the above that the temperature sensing circuit 500 according to the present invention can have a highly linear relationship between the output frequency f POUT and the temperature, and the temperature error can be controlled within a certain range, so that the measurement can be performed by measuring The output frequency f POUT is used to estimate the corresponding temperature. In addition, compared with the direct measurement temperature sensitivity is the current IR of the Nei Amper level, measuring the output frequency f POUT of the pulse signal POUT is relatively easy, and is not susceptible to excessive measurement by the measuring instrument, the external environment and the load component. The impact of this, resulting in a decrease in its accuracy. Therefore, the temperature sensing circuit 500 of the present invention can effectively improve the accuracy of the temperature sensing, and can also facilitate the actual measurement.
另一方面，本發明的溫度感測電路500，可藉由調整偏壓電壓源VB的準位以達成輸出頻率fPOUT 校正的功效。舉例而言，將偏壓電壓源VB的準位調高，可降低脈波訊號POUT的輸出頻率fPOUT ，但同時也降低輸出頻率fPOUT 對溫度的靈敏度。On the other hand, the temperature sensing circuit 500 of the present invention can achieve the effect of correcting the output frequency f POUT by adjusting the level of the bias voltage source VB. For example, increasing the level of the bias voltage source VB can reduce the output frequency f POUT of the pulse signal POUT , but at the same time reduce the sensitivity of the output frequency f POUT to temperature.
綜上所述，本發明的溫度感測電路可有效提升溫度感測的精準度。此外，本發明的溫度感測電路係由低耗能的小型電子元件組成，故其同時具有低功率消耗和電路面積小型化等優點。In summary, the temperature sensing circuit of the present invention can effectively improve the accuracy of temperature sensing. In addition, the temperature sensing circuit of the present invention is composed of small electronic components with low energy consumption, so that it has the advantages of low power consumption and miniaturization of circuit area.
雖然本發明已以實施方式揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and the present invention can be modified and modified without departing from the spirit and scope of the present invention. The scope is subject to the definition of the scope of the patent application attached.
100‧‧‧溫度感測電路100‧‧‧temperature sensing circuit
110‧‧‧共源極放大器110‧‧‧Common source amplifier
GND‧‧‧接地端GND‧‧‧ ground terminal
IR‧‧‧電流IR‧‧‧current
M1~M8‧‧‧電晶體M1~M8‧‧‧O crystal
R‧‧‧電阻元件R‧‧‧resistive components
VB‧‧‧偏壓電壓源VB‧‧‧ bias voltage source
VDD‧‧‧電壓源VDD‧‧‧voltage source
VP‧‧‧節點電壓VP‧‧‧ node voltage
Claims (9)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102148736A TWI484148B (en) | 2013-12-27 | 2013-12-27 | Temperature sensor circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102148736A TWI484148B (en) | 2013-12-27 | 2013-12-27 | Temperature sensor circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| TWI484148B true TWI484148B (en) | 2015-05-11 |
| TW201525428A TW201525428A (en) | 2015-07-01 |
Family
ID=53723474
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| TW102148736A TWI484148B (en) | 2013-12-27 | 2013-12-27 | Temperature sensor circuit |
Country Status (1)
| Country | Link |
|---|---|
| TW (1) | TWI484148B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI719809B (en) * | 2020-01-20 | 2021-02-21 | 瑞昱半導體股份有限公司 | Temperature sensing circuit |
| TWI730596B (en) * | 2020-01-20 | 2021-06-11 | 瑞昱半導體股份有限公司 | Temperature sensing circuit |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP6826499B2 (en) * | 2017-06-30 | 2021-02-03 | ルネサスエレクトロニクス株式会社 | Semiconductor devices and power modules |
| TWI682623B (en) * | 2019-04-02 | 2020-01-11 | 聯陽半導體股份有限公司 | Temperature compensated oscillation circuit |
| TWI835313B (en) * | 2022-09-27 | 2024-03-11 | 力拓半導體股份有限公司 | Electronic device and temperature detection device thereof |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100356151C (en) * | 2005-08-19 | 2007-12-19 | 清华大学 | Digital CMOS built-in temperature sensor |
| TW200804779A (en) * | 2006-07-11 | 2008-01-16 | Mediatek Inc | Temperature sensing apparatus for generating a sensing signal and related method |
| US20080284493A1 (en) * | 2007-05-18 | 2008-11-20 | Samsung Electronics Co., Ltd. | Proportional to absolute temperature current generation circuit having higher temperature coefficient, display device including the same, and method thereof |
-
2013
- 2013-12-27 TW TW102148736A patent/TWI484148B/en not_active IP Right Cessation
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100356151C (en) * | 2005-08-19 | 2007-12-19 | 清华大学 | Digital CMOS built-in temperature sensor |
| TW200804779A (en) * | 2006-07-11 | 2008-01-16 | Mediatek Inc | Temperature sensing apparatus for generating a sensing signal and related method |
| US20080284493A1 (en) * | 2007-05-18 | 2008-11-20 | Samsung Electronics Co., Ltd. | Proportional to absolute temperature current generation circuit having higher temperature coefficient, display device including the same, and method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI719809B (en) * | 2020-01-20 | 2021-02-21 | 瑞昱半導體股份有限公司 | Temperature sensing circuit |
| TWI730596B (en) * | 2020-01-20 | 2021-06-11 | 瑞昱半導體股份有限公司 | Temperature sensing circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201525428A (en) | 2015-07-01 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| TWI484148B (en) | Temperature sensor circuit | |
| US8152363B2 (en) | Temperature detection circuit | |
| EP3076143B1 (en) | Integrated electronic device comprising a temperature sensor and sensing method | |
| JP5930252B2 (en) | Pseudo resistance circuit and charge detection circuit | |
| JP6831421B2 (en) | Voltage-based power cycling | |
| CN108106747B (en) | Temperature sensor based on capacitance-to-digital converter | |
| US8729969B2 (en) | Oscillation circuit and oscillation system | |
| TWI638145B (en) | Sensing circuit and method for controlling sensing circuit | |
| JP6270002B2 (en) | Pseudo resistance circuit and charge detection circuit | |
| KR101276947B1 (en) | A Temperature Sensor with Low Power, High Precision, and Wide Temperature Range | |
| JP2007187559A (en) | Temperature detection circuit | |
| Nguyen et al. | An energy efficient inverter based readout circuit for capacitive sensor | |
| JP2011007545A (en) | Temperature sensor | |
| TWI499883B (en) | Voltage buffer | |
| JP2007187558A (en) | Temperature detection circuit | |
| CN212007570U (en) | Temperature sensor and integrated circuit | |
| KR102153872B1 (en) | Comparison circuit | |
| CN113008410A (en) | Temperature sensor for integrated circuit | |
| Sen et al. | On-chip implementation of analog linearization schemes for giant-magnetoresistance sensors | |
| CN112504494A (en) | Ultra-low power consumption CMOS temperature sensing circuit | |
| TW201934965A (en) | Signal detection circuit and signal detection method | |
| US7567071B1 (en) | Current and voltage source that is unaffected by temperature, power supply, and device process | |
| US11946958B2 (en) | Current sensing circuit | |
| CN111337154A (en) | Temperature sensor and integrated circuit | |
| CN107643785B (en) | Input device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| MM4A | Annulment or lapse of patent due to non-payment of fees |