TWI475551B - Driving method of display panel, display panel and gate driving circuit - Google Patents
Driving method of display panel, display panel and gate driving circuit Download PDFInfo
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本發明係相關於一種顯示面板之驅動方法、顯示面板及閘極驅動電路,尤指一種可改善畫素充電差異之顯示面板之驅動方法、顯示面板及閘極驅動電路。The invention relates to a driving method of a display panel, a display panel and a gate driving circuit, in particular to a driving method of a display panel, a display panel and a gate driving circuit which can improve pixel charging difference.
一般而言,液晶顯示面板包含有複數個畫素、閘極驅動電路以及源極驅動電路。源極驅動電路係用以寫入資料訊號於被開啟之畫素。閘極驅動電路包含複數級移位暫存器,用來提供複數個閘極訊號以控制畫素之開啟與關閉。Generally, a liquid crystal display panel includes a plurality of pixels, a gate driving circuit, and a source driving circuit. The source driver circuit is used to write a data signal to the pixel that is turned on. The gate drive circuit includes a plurality of shift register registers for providing a plurality of gate signals to control the turning on and off of the pixels.
請參考第1圖,第1圖為習知二列極性反轉(2-row inversion)方式驅動液晶顯示面板時相關波形的示意圖。如第1圖所示,於畫面顯示周期之第一掃描時段t1,閘極訊號S1先從第一電壓位準V1上拉至第二電壓位準V2,以開啟第一列畫素之電晶體,而資料訊號Sd被寫入被開啟之第一列畫素。之後,於畫面顯示周期之第二掃描時段t2,閘極訊號S2亦從第一電壓位準V1上拉至第二電壓位準V2,以開啟第二列畫素之電晶體,而資料訊號Sd再被寫入被開啟之第二列畫素。其中寫入第一列畫素及第二列畫素之資料訊號Sd的極性相同,而寫入下二列畫素之資料訊號的極性係相反於寫入第一列畫素及第二列畫素之資料訊號的極性,以此類推。Please refer to FIG. 1 , which is a schematic diagram of related waveforms when a liquid crystal display panel is driven by a conventional 2-row inversion method. As shown in FIG. 1, in the first scanning period t1 of the screen display period, the gate signal S1 is first pulled up from the first voltage level V1 to the second voltage level V2 to turn on the first column of pixels. And the data signal Sd is written to the first column of pixels that are turned on. Then, in the second scanning period t2 of the screen display period, the gate signal S2 is also pulled up from the first voltage level V1 to the second voltage level V2 to turn on the transistor of the second column of pixels, and the data signal Sd It is then written to the second column of pixels that are turned on. The data signal Sd in which the first column of pixels and the second column of pixels are written has the same polarity, and the polarity of the data signal written into the second column of pixels is opposite to the writing of the first column of pixels and the second column of pixels. The polarity of the data signal, and so on.
在上述二列極性反轉方式中,當第一列畫素剛被開啟時,資料訊號Sd尚未達到預定電壓位準,而當第二列畫素被開啟時,資料訊號Sd已達到預定電壓位準,因此,第一列畫素及第二列畫素之間會有充電差異,進而影響液晶顯示面板的畫面品質。尤其當液晶顯示面板的畫面更新頻率越高時,畫素的充電時間越短,因極性反轉驅動方式所造成的畫素充電差異問題將會更嚴重。In the above two-column polarity inversion mode, when the first column of pixels is turned on, the data signal Sd has not reached the predetermined voltage level, and when the second column of pixels is turned on, the data signal Sd has reached the predetermined voltage level. Therefore, there is a difference in charging between the first column of pixels and the second column of pixels, which in turn affects the picture quality of the liquid crystal display panel. Especially when the picture update frequency of the liquid crystal display panel is higher, the charging time of the pixel is shorter, and the difference in pixel charging caused by the polarity inversion driving method will be more serious.
本發明之目的在於提供一種可改善畫素充電差異之顯示面板之驅動方法、顯示面板及閘極驅動電路,以解決先前技術的問題。SUMMARY OF THE INVENTION An object of the present invention is to provide a driving method of a display panel, a display panel and a gate driving circuit which can improve pixel charging difference, to solve the problems of the prior art.
本發明顯示面板之驅動方法包含於一畫面顯示周期之一第一掃描時段經由一第一掃描線將一第一畫素之電晶體之閘極電壓從一第一電壓位準上拉至一第二電壓位準,以開啟該第一畫素之電晶體;於該第一掃描時段中寫入具一第一極性之資料訊號於該第一畫素;於該畫面顯示周期之一第二掃描時段經由一第二掃描線將一第二畫素之電晶體之閘極電壓從一第三電壓位準上拉至一第四電壓位準,以開啟該第二畫素之電晶體;以及於該第二掃描時段中寫入具該第一極性之資料訊號於該第二畫素;其中該第一掃描線相鄰於該第二掃描線,該第四電壓位準低於該第二電壓位準,該第三電壓位準低於該第一電壓位準。The driving method of the display panel of the present invention comprises: pulling, at a first scan period of a picture display period, a gate voltage of a first pixel of the transistor from a first voltage level to a first via a first scan line a voltage level to turn on the first pixel of the first pixel; writing a data signal having a first polarity to the first pixel in the first scanning period; and displaying a second scan in the picture display period Opening a gate voltage of a second pixel transistor from a third voltage level to a fourth voltage level via a second scan line to turn on the second pixel transistor; Writing a data signal having the first polarity to the second pixel in the second scanning period; wherein the first scanning line is adjacent to the second scanning line, and the fourth voltage level is lower than the second voltage The third voltage level is lower than the first voltage level.
本發明閘極驅動電路包含複數個第一移位暫存器,以及複數個第二移位暫存器。每一第一移位暫存器用以輸出一第一閘極訊號,該第一閘極訊號係從一第一電壓位準被上拉至一第二電壓位準,以開啟相對應畫素之電晶體。每一第二移位暫存器用以輸出一第二閘極訊號,該第二閘極訊號係從一第三電壓位準被上拉至一第四電壓位準,以開啟相對應畫素之電晶體。其中該些第一移位暫存器及該些第二移位暫存器係交錯配置,該第四電壓位準 低於該第二電壓位準,該第三電壓位準低於該第一電壓位準。The gate drive circuit of the present invention includes a plurality of first shift registers and a plurality of second shift registers. Each first shift register is configured to output a first gate signal, and the first gate signal is pulled up from a first voltage level to a second voltage level to turn on a corresponding pixel Transistor. Each second shift register is configured to output a second gate signal, and the second gate signal is pulled up from a third voltage level to a fourth voltage level to turn on the corresponding pixel Transistor. The first shift register and the second shift registers are alternately arranged, and the fourth voltage level is Below the second voltage level, the third voltage level is lower than the first voltage level.
本發明顯示面板包含一畫素矩陣,一閘極驅動電路,以及一資料驅動電路。畫素矩陣包含複數個畫素。閘極驅動電路包含複數個第一移位暫存器,以及複數個第二移位暫存器。每一第一移位暫存器用以輸出一第一閘極訊號,該第一閘極訊號係從一第一電壓位準被上拉至一第二電壓位準,以開啟相對應畫素之電晶體。每一第二移位暫存器用以輸出一第二閘極訊號,該第二閘極訊號係從一第三電壓位準被上拉至一第四電壓位準,以開啟相對應畫素之電晶體。該資料驅動電路用以寫入相對應資料訊號於被開啟之畫素。其中該些第一移位暫存器及該些第二移位暫存器係交錯配置,該第四電壓位準低於該第二電壓位準,該第三電壓位準低於該第一電壓位準。The display panel of the present invention comprises a pixel matrix, a gate driving circuit, and a data driving circuit. The pixel matrix contains a plurality of pixels. The gate drive circuit includes a plurality of first shift registers and a plurality of second shift registers. Each first shift register is configured to output a first gate signal, and the first gate signal is pulled up from a first voltage level to a second voltage level to turn on a corresponding pixel Transistor. Each second shift register is configured to output a second gate signal, and the second gate signal is pulled up from a third voltage level to a fourth voltage level to turn on the corresponding pixel Transistor. The data driving circuit is configured to write a corresponding data signal to the pixel that is turned on. The first shift register and the second shift register are alternately arranged, the fourth voltage level is lower than the second voltage level, and the third voltage level is lower than the first Voltage level.
相較於先前技術,本發明係輸出不同電壓位準的閘極訊號以分別開啟相鄰兩列之畫素,進而改善因極性反轉驅動方式所造成的畫素充電差異問題。因此本發明顯示面板具有較佳的畫面品質。Compared with the prior art, the present invention outputs gate signals of different voltage levels to respectively turn on the adjacent two columns of pixels, thereby improving the pixel charging difference caused by the polarity inversion driving method. Therefore, the display panel of the present invention has better picture quality.
100‧‧‧顯示面板100‧‧‧ display panel
110‧‧‧畫素矩陣110‧‧‧ pixel matrix
120‧‧‧閘極驅動電路120‧‧ ‧ gate drive circuit
122‧‧‧第一移位暫存器122‧‧‧First shift register
124‧‧‧第二移位暫存器124‧‧‧Second shift register
130‧‧‧資料驅動電路130‧‧‧Data Drive Circuit
C‧‧‧電容C‧‧‧ capacitor
D‧‧‧資料線D‧‧‧ data line
G1~G4‧‧‧掃描線G1~G4‧‧‧ scan line
S1,S2‧‧‧閘極訊號S1, S2‧‧‧ gate signal
Sg1‧‧‧第一閘極訊號Sg1‧‧‧ first gate signal
Sg2‧‧‧第二閘極訊號Sg2‧‧‧ second gate signal
Sd,Sd1,Sd2‧‧‧資料訊號Sd, Sd1, Sd2‧‧‧ data signal
V1‧‧‧第一電壓位準V1‧‧‧ first voltage level
V2‧‧‧第二電壓位準V2‧‧‧second voltage level
V3‧‧‧第三電壓位準V3‧‧‧ third voltage level
V4‧‧‧第四電壓位準V4‧‧‧ fourth voltage level
T‧‧‧電晶體T‧‧‧O crystal
t1‧‧‧第一掃描時段T1‧‧‧First scan period
t2‧‧‧第二掃描時段T2‧‧‧second scan period
t3‧‧‧第三掃描時段T3‧‧‧ third scan period
t4‧‧‧第四掃描時段T4‧‧‧4th scan period
P‧‧‧畫素P‧‧‧ pixels
600‧‧‧流程圖600‧‧‧ Flowchart
610至680‧‧‧步驟610 to 680 ‧ steps
第1圖為習知二列極性反轉方式驅動液晶顯示面板時相關波形的示意圖。FIG. 1 is a schematic diagram showing correlation waveforms when a liquid crystal display panel is driven by a conventional two-column polarity inversion method.
第2圖為本發明顯示面板的示意圖。Figure 2 is a schematic view of the display panel of the present invention.
第3圖為第2圖閘極驅動電路的示意圖。Figure 3 is a schematic diagram of the gate drive circuit of Figure 2.
第4圖為本發明顯示面板之驅動方法之相關波形的示意圖。Fig. 4 is a schematic view showing the waveforms of the driving method of the display panel of the present invention.
第5圖為本發明顯示面板之驅動方法之相關波形的示意圖。Fig. 5 is a schematic view showing the waveforms of the driving method of the display panel of the present invention.
第6圖為本發明顯示面板之驅動方法之流程圖。Fig. 6 is a flow chart showing a driving method of the display panel of the present invention.
第7圖為二列加一極性反轉方式的示意圖。Figure 7 is a schematic diagram of the two-column plus one polarity inversion method.
第8圖為二點加一極性反轉方式的示意圖。Figure 8 is a schematic diagram of a two-point plus one polarity inversion method.
請同時參考第2圖及第3圖,第2圖為本發明顯示面板的示意圖。第3圖為第2圖閘極驅動電路的示意圖。如圖所示,本發明顯示面板100包含畫素矩陣110,閘極驅動電路120,以及資料驅動電路130。畫素矩陣110包含複數個畫素P。閘極驅動電路120包含複數個第一移位暫存器122,以及複數個第二移位暫存器124。第一移位暫存器122及第二移位暫存器124分別用以輸出第一閘極訊號Sg1及第二閘極訊號Sg2,進而開啟相對應畫素P之電晶體T。第一移位暫存器122及第二移位暫存器124係交錯配置。資料驅動電路130用以經由資料線D寫入相對應資料訊號於被開啟之畫素P的電容C。Please refer to FIG. 2 and FIG. 3 at the same time. FIG. 2 is a schematic view of the display panel of the present invention. Figure 3 is a schematic diagram of the gate drive circuit of Figure 2. As shown, the display panel 100 of the present invention includes a pixel matrix 110, a gate drive circuit 120, and a data drive circuit 130. The pixel matrix 110 includes a plurality of pixels P. The gate drive circuit 120 includes a plurality of first shift registers 122 and a plurality of second shift registers 124. The first shift register 122 and the second shift register 124 are respectively configured to output the first gate signal Sg1 and the second gate signal Sg2, thereby turning on the transistor T corresponding to the pixel P. The first shift register 122 and the second shift register 124 are alternately arranged. The data driving circuit 130 is configured to write the corresponding data signal to the capacitor C of the pixel P to be turned on via the data line D.
請同時參考第4圖及第5圖,並一併參考第2圖及第3圖。第4圖及第5圖為本發明顯示面板之驅動方法之相關波形的示意圖。當本發明以兩列極性反轉方式驅動液晶顯示面板100時,如第4圖所示,於畫面顯示周期之第一掃描時段t1,位於第1級之第一移位暫存器122輸出的第一閘極訊號Sg1先從第一電壓位準V1上拉至第二電壓位準V2,以經由掃描線G1開啟第一列畫素P之電晶體T,而具第一極性之資料訊號Sd1被寫入被開啟之第一列畫素P。之後,於畫面顯示周期之第二掃描時段t2,位於第2級之第二移位暫存器124輸出的第二閘極訊號Sg2從第三電壓位準V3上拉至第四電壓位準V4,以經由掃描線G2開啟第二列畫素P之電晶體T,而具第一極性之資料訊號Sd1被寫入被開啟之第二列畫素P。其中第四電壓位準V4低於第二電壓位準V2,而第三電壓位準V3低於第一電壓位準V1。Please refer to Figures 4 and 5 at the same time, and refer to Figures 2 and 3 together. 4 and 5 are schematic views showing relevant waveforms of the driving method of the display panel of the present invention. When the present invention drives the liquid crystal display panel 100 in a two-column polarity inversion manner, as shown in FIG. 4, at the first scan period t1 of the picture display period, the first shift register 122 of the first stage outputs The first gate signal Sg1 is first pulled up from the first voltage level V1 to the second voltage level V2 to turn on the transistor T of the first column of pixels P via the scan line G1, and the data signal Sd1 having the first polarity The first column of pixels P that is turned on is written. Then, in the second scan period t2 of the picture display period, the second gate signal Sg2 outputted by the second shift register 124 of the second stage is pulled up from the third voltage level V3 to the fourth voltage level V4. The transistor T of the second column of pixels P is turned on via the scan line G2, and the data signal Sd1 having the first polarity is written to the second column of pixels P that is turned on. The fourth voltage level V4 is lower than the second voltage level V2, and the third voltage level V3 is lower than the first voltage level V1.
如第5圖所示,於畫面顯示周期之第三掃描時段t3,位於第3級之第一移位暫存器122輸出的第一閘極訊號Sg1先從第一電壓位準V1上拉至第二電壓位準V2,以經由掃描線G3開啟第三列畫素P之電晶體T,而具 第二極性之資料訊號Sd2被寫入被開啟之第三列畫素P。之後,於畫面顯示周期之第四掃描時段t4,位於第4級之第二移位暫存器124輸出的第二閘極訊號Sg2從第三電壓位準V3上拉至第四電壓位準V4,以經由掃描線G4開啟第四列畫素P之電晶體T,而具第二極性之資料訊號Sd2被寫入被開啟之第四列之畫素P,以此類推。其中第二極性係相反於該第一極性。As shown in FIG. 5, the first gate signal Sg1 outputted by the first shift register 122 at the third stage is first pulled from the first voltage level V1 to the third scan period t3 of the picture display period. a second voltage level V2 to turn on the transistor T of the third column of pixels P via the scan line G3 The data signal Sd2 of the second polarity is written to the third column of pixels P that is turned on. Then, in the fourth scan period t4 of the picture display period, the second gate signal Sg2 outputted by the second shift register 124 of the fourth stage is pulled up from the third voltage level V3 to the fourth voltage level V4. The transistor T of the fourth column of pixels P is turned on via the scan line G4, and the data signal Sd2 having the second polarity is written to the pixel P of the fourth column that is turned on, and so on. Wherein the second polarity is opposite to the first polarity.
依據上述配置,當本發明顯示面板100係以二列極性反轉(2-row inversion)方式驅動時,相鄰兩列畫素之第一列畫素P的電晶體T係被具較高電壓位準的第一閘極訊號Sg1開啟,以縮短資料訊號寫入的時間,因此相鄰兩列畫素之第一列畫素及第二列畫素之間的充電差異將會減少。According to the above configuration, when the display panel 100 of the present invention is driven in a two-row inversion manner, the transistor T of the first column of pixels of the adjacent two columns of pixels is subjected to a higher voltage. The level of the first gate signal Sg1 is turned on to shorten the time of writing the data signal, so the difference in charging between the first column of pixels and the second column of pixels of the adjacent two columns of pixels will be reduced.
另外,為了避免顯示面板100的饋通(feed through)效應,第二電壓位準V2及第一電壓位準V1之電壓差係相同於第四電壓位準V4及第三電壓位準V3之電壓差。In addition, in order to avoid the feed through effect of the display panel 100, the voltage difference between the second voltage level V2 and the first voltage level V1 is the same as the voltage of the fourth voltage level V4 and the third voltage level V3. difference.
在上述實施例中,本發明顯示面板之驅動方法係應用於二列極性反轉方式,然而,在本發明其他實施例中,本發明顯示面板之驅動方法亦可應用於其他極性反轉方式,例如二點極性反轉(2-dot inversion)方式。或者,本發明顯示面板之驅動方法亦可應用於如第7圖所示之二列加一極性反轉方式,以及應用於如第8圖所示之二點加一極性反轉方式。In the above embodiment, the driving method of the display panel of the present invention is applied to the two-column polarity inversion mode. However, in other embodiments of the present invention, the driving method of the display panel of the present invention can also be applied to other polarity inversion modes. For example, the two-point polarity inversion (2-dot inversion) method. Alternatively, the driving method of the display panel of the present invention can also be applied to the two-column plus one polarity inversion method as shown in FIG. 7, and to the two-point plus one polarity inversion method as shown in FIG.
請參考第6圖,第6圖為本發明顯示面板之驅動方法之流程圖600。本發明顯示裝置之影像處理方法之流程如下列步驟:步驟610:於一畫面顯示周期之一第一掃描時段經由一第一掃描線將一第一畫素之電晶體之閘極電壓從一第一電壓位準上拉至一第二電壓位準,以開啟該第一畫素之電晶體; 步驟620:於該第一掃描時段中寫入具一第一極性之資料訊號於該第一畫素;步驟630:於該畫面顯示周期之一第二掃描時段經由一第二掃描線將一第二畫素之電晶體之閘極電壓從一第三電壓位準上拉至一第四電壓位準,以開啟該第二畫素之電晶體;步驟640:於該第二掃描時段中寫入具該第一極性之資料訊號於該第二畫素;步驟650:於該畫面顯示周期之一第三掃描時段經由一第三掃描線將一第三畫素之電晶體之閘極電壓從該第一電壓位準上拉至該第二電壓位準,以開啟該第三畫素之電晶體;步驟660:於該第三掃描時段中寫入具一第二極性之資料訊號於該第三畫素;步驟670:於該畫面顯示周期之一第四掃描時段經由一第四掃描線將一第四畫素之電晶體之閘極電壓從該第三電壓位準上拉至該第四電壓位準,以開啟該第四畫素之電晶體;以及步驟680:於該第四掃描時段中寫入具該第二極性之資料訊號於該第四畫素。Please refer to FIG. 6. FIG. 6 is a flow chart 600 of a driving method of the display panel of the present invention. The flow of the image processing method of the display device of the present invention is as follows: Step 610: The gate voltage of a first pixel of the first pixel is changed from a first scan period to a first scan period of a picture display period. Pulling a voltage level up to a second voltage level to turn on the first pixel of the transistor; Step 620: Write a data signal having a first polarity to the first pixel in the first scanning period; step 630: in the second scanning period of the picture display period, a second scanning line The gate voltage of the two-pixel transistor is pulled up from a third voltage level to a fourth voltage level to turn on the second pixel transistor; step 640: writing in the second scan period The data signal having the first polarity is in the second pixel; and step 650: the gate voltage of the transistor of the third pixel is from the third scan period in the third scan period of the picture display period The first voltage level is pulled up to the second voltage level to turn on the third pixel transistor; step 660: writing a second polarity data signal to the third in the third scanning period a pixel; step 670: pulling a gate voltage of a fourth pixel of the fourth pixel from the third voltage level to the fourth voltage via a fourth scan line in one of the picture display periods a level to turn on the fourth pixel of the fourth pixel; and step 680: in the first Scanning period is written with the data signals in the second polarity of the fourth pixel.
相較於先前技術,本發明係輸出不同電壓位準的閘極訊號以分別開啟相鄰兩列之畫素,進而改善因極性反轉驅動方式所造成的畫素充電差異問題。因此本發明顯示面板具有較佳的畫面品質。Compared with the prior art, the present invention outputs gate signals of different voltage levels to respectively turn on the adjacent two columns of pixels, thereby improving the pixel charging difference caused by the polarity inversion driving method. Therefore, the display panel of the present invention has better picture quality.
600‧‧‧流程圖600‧‧‧ Flowchart
610至680‧‧‧步驟610 to 680 ‧ steps
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