TWI450071B - Adaptive input-current shaping for boost pfc converters - Google Patents

Adaptive input-current shaping for boost pfc converters Download PDF

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TWI450071B
TWI450071B TW100146790A TW100146790A TWI450071B TW I450071 B TWI450071 B TW I450071B TW 100146790 A TW100146790 A TW 100146790A TW 100146790 A TW100146790 A TW 100146790A TW I450071 B TWI450071 B TW I450071B
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voltage
current
signal
compensation
receiving
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TW201327087A (en
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Wei C Huang
Chung Ping Ku
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Alpha & Omega Semiconductor Cayman Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Description

功率因素校正裝置及其校正方法 Power factor correction device and correction method thereof

本發明係有關一種校正技術，特別是關於一種功率因素校正裝置及其校正方法。 The present invention relates to a correction technique, and more particularly to a power factor correction device and a calibration method thereof.

現今電源供應器之業者追求高質量的電力供需一直是全球各國所想要達成的目標，然而大量地興建電廠並非解決問題的唯一途徑，一方面提高電力供給的能量，另一方面提高電器產品的功率因素(power factor)或效率，才能有效地解決問題。而功率因素修正器(power factor corrector)之主要作用是讓電器產品的輸入電壓與輸入電流的相位相同，意即使電器產品的負載近似於電阻式負載，且有效地減少輸入電流的諧波失真(current harmonic distortion)以達到供電的高功率因素。 Nowadays, the pursuit of high-quality power supply and demand by power supply suppliers has always been the goal that all countries in the world want to achieve. However, building a large number of power plants is not the only way to solve the problem. On the one hand, it can improve the energy supply of electric power, on the other hand, it can improve the electrical products. Power factor or efficiency can effectively solve the problem. The main function of the power factor corrector is to make the input voltage of the electrical product and the phase of the input current the same, even if the load of the electrical product is similar to the resistive load, and effectively reduce the harmonic distortion of the input current ( Current harmonic distortion) to achieve high power factor in power supply.

一般功率因素修正裝置除了需要一脈衝寬度調變訊號產生器來產生一脈衝寬度調變訊號，並且需要一輸入電壓的取樣作為校正電流的參考訊號。然而，在習知技術中，如美國專利US5886586所揭露之脈衝寬度調變訊號產生器，不需要取樣輸入電壓，而採用一積分器來進行一週期控制方法(one cycle control method)，以決定積分電容 充放電時間和積分電容的電位。其他如美國專利US7068016 B2、US5804950也都有類似積分器之技術。由於上述專利於電路內部或是置於外部都有使用積分器或積分電容，如此會造成內部電路運作時的響應速度大幅下降，此外電路內部需要一開關作積電容的放電用途，途增功耗且增加電路空間。 In general, the power factor correction device requires a pulse width modulation signal generator to generate a pulse width modulation signal, and requires sampling of an input voltage as a reference signal for correcting current. However, in the prior art, the pulse width modulation signal generator disclosed in US Pat. No. 5,886,586 does not need to sample the input voltage, but uses an integrator to perform a one cycle control method to determine the integral. capacitance Charge and discharge time and the potential of the integrated capacitor. Others such as U.S. Patent Nos. 7,706,016 B2 and US 5,804,950 also have techniques similar to integrators. Since the above patent uses an integrator or an integrating capacitor inside or outside the circuit, the response speed of the internal circuit is greatly reduced. In addition, a switch is required inside the circuit for the discharge of the capacitor, and the power consumption is increased. And increase the circuit space.

因此，本發明係在針對上述之困擾，提出一種功率因素校正裝置及其校正方法，以解決習知所產生的問題。 Accordingly, the present invention has been made in view of the above problems, and a power factor correcting apparatus and a correcting method thereof are provided to solve the problems caused by the prior art.

本發明之主要目的，在於提供一種功率因素校正裝置及其校正方法，其係利用一乘法器連接電流補償電路與電壓補償電路，以將兩補償器輸出之補償電壓訊號與補償電流訊號進行相乘，進而得到提供給電流補償電路之參考電流訊號之技術，來進行功率因素校正，此技術可同時避免利用積分電容之技術，且使內部電路在運作時的響應速度大幅提升，以增進功率因素修正效能。 The main object of the present invention is to provide a power factor correction device and a calibration method thereof, which use a multiplier to connect a current compensation circuit and a voltage compensation circuit to multiply a compensation voltage signal outputted by two compensators with a compensation current signal. Then, the technology of the reference current signal provided to the current compensation circuit is obtained to perform power factor correction. This technology can simultaneously avoid the technique of using the integral capacitor, and greatly improve the response speed of the internal circuit during operation to improve the power factor correction. efficacy.

為達上述目的，本發明提供一種功率因素校正裝置，包含一功率級電路，其係連接一負載，並接收一交流電壓，藉由電感器、功率二極體與一脈波寬度調變訊號驅動的功率晶體，以依據脈波寬度調變訊號轉換交流電壓為一輸入電流，且將其輸出至負載，使負載上產生一輸出電壓。功率級電路藉由取樣電阻取樣輸入電流，以作為一校正電流輸出。功率級電路連接一電流補償電路，其接收校正電流與一參考電流訊號之間的誤差，經由電流誤差放大器及電 流補償器以產生一補償電流訊號。功率級電路亦連接一電壓補償電路，其係由分壓器接收輸出電壓與一參考電壓之間的誤差，再由電壓誤差放大器及電壓補償器以產生一補償電壓訊號。電流補償電路之輸出與電壓補償電路之輸出連接一乘法增益器，其係接收補償電流訊號與補償電壓訊號，以相乘後，產生參考電流訊號。電流補償電路與該電壓補償電路連接一脈波寬度調變轉換器，其係接收補償電流訊號與補償電壓訊號，以產生脈波寬度調變訊號，使交流電壓與輸入電流之相位相同。 To achieve the above objective, the present invention provides a power factor correction device including a power stage circuit connected to a load and receiving an AC voltage, driven by an inductor, a power diode, and a pulse width modulation signal. The power crystal converts the AC voltage into an input current according to the pulse width modulation signal, and outputs it to the load to generate an output voltage on the load. The power stage circuit samples the input current by a sampling resistor as a corrected current output. The power stage circuit is connected to a current compensation circuit that receives an error between the correction current and a reference current signal, via the current error amplifier and the power The flow compensator generates a compensation current signal. The power stage circuit is also connected to a voltage compensation circuit, which receives the error between the output voltage and a reference voltage by the voltage divider, and then generates a compensation voltage signal by the voltage error amplifier and the voltage compensator. The output of the current compensation circuit is connected to the output of the voltage compensation circuit by a multiplying gainer, which receives the compensation current signal and the compensation voltage signal to multiply and generate a reference current signal. The current compensation circuit and the voltage compensation circuit are connected to a pulse width modulation converter, which receives the compensation current signal and the compensation voltage signal to generate a pulse width modulation signal, so that the AC voltage and the input current have the same phase.

本發明提供之一種功率因素校正方法，將校正電流與輸出電壓分別與參考電流訊號及參考電壓比較後，經由電流補償電路及電壓補償電路產生一補償電流訊號與產生一補償電壓訊號，據此可產生更新之脈波寬度調變訊號，使交流電壓與輸入電流之相位相同。其中參考電流訊號係由連接兩補償器之乘法增益器將補償電流訊號與補償電壓訊號相乘而得之。最後，接收補償電流訊號與補償電壓訊號，以據此產生更新之脈波寬度調變訊號，使交流電壓與輸入電流之相位相同。 The invention provides a power factor correction method, which compares the correction current and the output voltage with the reference current signal and the reference voltage, respectively, and generates a compensation current signal and generates a compensation voltage signal via the current compensation circuit and the voltage compensation circuit, thereby An updated pulse width modulation signal is generated to make the AC voltage and the input current have the same phase. The reference current signal is obtained by multiplying the compensation current signal by the compensation voltage signal by a multiplying gain device connected to the two compensators. Finally, the compensation current signal and the compensation voltage signal are received to generate an updated pulse width modulation signal so that the AC voltage and the input current have the same phase.

茲為使 貴審查委員對本發明之結構特徵及所達成之功效更有進一步之瞭解與認識，謹佐以較佳之實施例圖及配合詳細之說明，說明如後： For a better understanding and understanding of the structural features and the achievable effects of the present invention, please refer to the preferred embodiment and the detailed description.

請參閱第1圖。本發明之功率因素校正裝置連接一負載10，並包含一功率級電路12，其係連接負載10，並接 收一交流電壓V AC 與一脈波寬度調變訊號V PWM ，以依據此脈波寬度調變訊號V PWM 轉換交流電壓V AC 為一輸入電流I AC ，且將其輸出至負載10，使負載10上產生一輸出電壓V o ，並取樣輸入電流I AC ，以作為一校正電流I sen 輸出。功率級電路12連接一電流補償電路14與一電壓補償電路16。電流補償電路14接收校正電流I sen 與一參考電流訊號I ref ，並將此兩者比較後，產生一補償電流訊號I EA 。電壓補償電路16則接收輸出電壓V o 與一參考電壓V ref ，並將此兩者比較後，產生一補償電壓訊號V EA 。電流補償電路14與電壓補償電路16皆連接一乘法增益器18與一脈波寬度調變轉換器20。乘法增益器18接收補償電流訊號I EA 與補償電壓訊號V EA ，以相乘後，產生參考電流訊號I ref 。脈波寬度調變轉換器20，則接收補償電流訊號I EA 與補償電壓訊號V EA ，以產生脈波寬度調變訊號V PWM ，使交流電壓V AC 與輸入電流I AC 之相位相同。 Please refer to Figure 1. The power factor correcting device of the present invention is connected to a load 10 and includes a power stage circuit 12 connected to the load 10 and receiving an AC voltage V AC and a pulse width modulation signal V PWM to be based on the pulse width. Modulation signal V PWM converts AC voltage V AC into an input current I AC and outputs it to load 10, causes an output voltage V o to be generated on load 10, and samples input current I AC as a correction current I sen Output. The power stage circuit 12 is connected to a current compensation circuit 14 and a voltage compensation circuit 16. The current compensation circuit 14 receives the correction current I sen and a reference current signal I ref , and compares the two to generate a compensation current signal I EA . The voltage compensation circuit 16 receives the output voltage V o and a reference voltage V ref , and compares the two to generate a compensation voltage signal V EA . The current compensation circuit 14 and the voltage compensation circuit 16 are both connected to a multiplying gain unit 18 and a pulse width modulation converter 20. The multiplying gainer 18 receives the compensation current signal I EA and the compensation voltage signal V EA to multiply and generate a reference current signal I ref . Pulse width modulation converter 20, the reception signal compensation current I EA and EA compensation voltage signal V, to generate a pulse width of the PWM modulation signal V, the AC voltage of the same phase of the AC V and the input current I AC.

功率級電路12更包含一取樣電阻22與一交直流轉換器24，交直流轉換器24包含一電感器241、一功率晶體243及一功率二極體245。取樣電阻22連接電流補償電路14，交直流轉換器24則連接負載10、取樣電阻22、電流補償電路14與電壓補償電路16。交直流轉換器24接收交流電壓V AC 與脈波寬度調變訊號V PWM ，並藉由電感器241、一功率晶體243及一功率二極體245，來依據脈波寬度調變訊號V PWM 轉換交流電壓V AC 為輸入電流I AC ，且將其輸出至負載，以產生輸出電壓V o ，又利用取樣電阻22取樣輸入 電流I AC ，以輸出上述之校正電流I sen 。 The power stage circuit 12 further includes a sampling resistor 22 and an AC/DC converter 24. The AC/DC converter 24 includes an inductor 241, a power crystal 243, and a power diode 245. The sampling resistor 22 is connected to the current compensation circuit 14, and the AC/DC converter 24 is connected to the load 10, the sampling resistor 22, the current compensation circuit 14, and the voltage compensation circuit 16. AC-DC converter 24 receives an AC voltage V AC and the pulse width modulation signal V PWM, and by an inductor 241, a power transistor 243 and a power diode 245, according to the pulse width modulation signal V PWM converter The AC voltage V AC is the input current I AC and is output to the load to generate the output voltage V o , and the sampling resistor 22 is used to sample the input current I AC to output the above-mentioned correction current I sen .

電流補償電路14更包含一電流誤差放大器26與一電流補償器28。電流誤差放大器26連接功率級電路12之取樣電阻22，並接收校正電流I sen 與一參考電流訊號I ref ，將此兩者比較後，輸出一比較電流。電流補償器28則連接電流誤差放大器26，並接收比較電流，以進行電流補償後，產生補償電流訊號I EA 。電壓補償電路16更包含一分壓器30，其係連接功率級電路12之交直流轉換器24，並接收輸出電壓V o ，以分壓產生一回授電壓V FB 。分壓器30連接一電壓誤差放大器32，其係接收回授電壓V FB 與參考電壓V ref ，將此兩者比較後，輸出一比較電壓。電壓誤差放大器32則連接一電壓補償器34，其係接收比較電壓，以進行電壓補償後，產生補償電壓訊號V EA 。 The current compensation circuit 14 further includes a current error amplifier 26 and a current compensator 28. The current error amplifier 26 is connected to the sampling resistor 22 of the power stage circuit 12, and receives the correction current I sen and a reference current signal I ref . After comparing the two, a comparison current is output. The current compensator 28 is connected to the current error amplifier 26 and receives the comparison current for current compensation to generate a compensation current signal I EA . The voltage compensation circuit 16 further includes a voltage divider 30 connected to the AC/DC converter 24 of the power stage circuit 12 and receiving the output voltage V o to generate a feedback voltage V FB by voltage division. The voltage divider 30 is connected to a voltage error amplifier 32, which receives the feedback voltage V FB and the reference voltage V ref , and compares the two to output a comparison voltage. The voltage error amplifier 32 is connected to a voltage compensator 34, which receives the comparison voltage for voltage compensation and generates a compensation voltage signal V EA .

乘法增益器18更包含一乘法器36與一電流增益調節器38。乘法器36連接電流補償電路14之電流補償器28與電壓補償電路16之電壓補償器34，並接收補償電流訊號I EA 與補償電壓訊號V EA ，以相乘後，產生一補償回授電流。乘法器36更連接電流增益調節器38，其係接收補償回授電流，將其乘上一電流增益K m 後，產生參考電流訊號I ref 。 The multiplier gainer 18 further includes a multiplier 36 and a current gain adjuster 38. The multiplier 36 is connected a current compensation circuit 14 of the current compensator 28 and the voltage compensator 16 of the voltage compensation circuit 34, and receives the compensation current I EA signal and the compensation signal voltage V EA, is multiplied to generate a compensated feedback current. After the multiplier 36 is connected more current gain adjuster 38 is provided for receiving feedback compensation current, the current gain which is multiplied by a K m, generate a reference current signal I ref.

脈波寬度調變轉換器20更包含一斜波產生器40，其係連接電壓補償電路16之電壓誤差放大器32，並接收補償電壓訊號V EA ，以據此產生一斜波訊號V RAMP 。斜波產生器40與電流補償電路14之電流誤差放大器26連接一轉換比 較器42，其係接收斜波訊號V RAMP 與補償電流訊號I EA ，以進行比較後，輸出脈波寬度調變訊號V PWM 至功率級電路12之交直流轉換器24中。其中，當斜波訊號V RAMP 之電壓值大於補償電流訊號I EA 對應之電壓值時，脈波寬度調變訊號V PWM 為高準位電壓；當斜波訊號V RAMP 之電壓值小於補償電流訊號I EA 對應之電壓值時，脈波寬度調變訊號V RAMP 為低準位電壓。 The pulse width modulation converter 20 further includes a ramp generator 40 connected to the voltage error amplifier 32 of the voltage compensation circuit 16 and receiving the compensation voltage signal V EA to generate a ramp signal V RAMP accordingly . The ramp generator 40 and the current error amplifier 26 of the current compensation circuit 14 are connected to a conversion comparator 42 for receiving the ramp signal V RAMP and the compensation current signal I EA for comparison, and outputting the pulse width modulation signal V. The PWM is in the AC to DC converter 24 of the power stage circuit 12. Wherein, when the voltage value of the ramp signal V RAMP is greater than the voltage value corresponding to the compensation current signal I EA , the pulse width modulation signal V PWM is a high level voltage; when the voltage value of the ramp signal V RAMP is less than the compensation current signal When the voltage value of I EA corresponds to the pulse width modulation signal V RAMP is a low level voltage.

為了使交流電壓與輸入電流之相位相同，以有效達到功率因素修正之目的，取樣電阻、脈波寬度調變訊號V PWM 、輸入電流I AC 、交流電壓V AC 、輸出電壓V o 與斜波訊號V PAMP 必須符合下列條件：R S ．i in (θ)=[1-d(θ)]．T S.W. ．S V (1) In order to make the phase of the AC voltage and the input current the same, in order to effectively achieve the power factor correction, the sampling resistor, the pulse width modulation signal V PWM , the input current I AC , the AC voltage V AC , the output voltage V o and the ramp signal V PAMP must meet the following conditions: R S . i in (θ)=[1- d (θ)]. T SW . S V (1)

V in_pk ．sin(θ)/V o =1-d(θ) (2) V in_pk. Sin(θ)/ V o =1- d (θ) (2)

i in (θ)=V in_pk ．sin(θ)/R in(ac) (3) i in (θ)= V in_pk . Sin(θ)/ R in ( ac ) (3)

其中i in (θ)即為輸入電流I AC ，V in_pk ．sin(θ)為交流電壓V AC ，S V 為斜波訊號V RAMP 之斜率，R in(ac)為等效輸入交流電阻，T S.W. 與d(θ)為分別脈波寬度調變訊號V PWM 之週期與責任週期(duty cycle)。由上述公式(1)、(2)、(3)可以得到公式(4)、(5)： Wherein i in (θ) is the input current I AC, V in_pk. Sin(θ) is the AC voltage V AC , S V is the slope of the ramp signal V RAMP , R in ( ac ) is the equivalent input AC resistance, T SW and d (θ) are the pulse width modulation signal V PWM Cycle and duty cycle. Equations (4) and (5) can be obtained from the above formulas (1), (2), and (3):

由公式(5)可知，R in(ac)為一常數，因此可以使交流 電壓與輸入電流相位相同，以達到功率因素校正之目的。 It can be known from equation (5) that R in ( ac ) is a constant, so that the AC voltage and the input current can be in the same phase for the purpose of power factor correction.

以下介紹輸入功率P in 、補償電流訊號I EA 、補償電壓訊號V EA 、斜波訊號V RAMP 之斜率S V 、斜波訊號V RAMP 之峰值電壓V p max： The following describes the slope of the input power P in, the compensation current signal I EA, the compensation voltage signal V EA, the ramp signal V RAMP S V, the ramp signal V RAMP peak voltage V p max:

在公式(6)至公式(10)中，K multi 為乘法器36之乘法增益，g mv 為電壓誤差放大器32之增益，C S 為斜波產生器40之內部電容器之電容值，I EAmax為補償電流訊號I EA 之最大電流值，V ACmin為交流電壓之最小值。 In the formulas (6) to (10), K multi is the multiplication gain of the multiplier 36, g mv is the gain of the voltage error amplifier 32, and C S is the capacitance value of the internal capacitor of the ramp generator 40, I EA max To compensate for the maximum current value of the current signal I EA , V AC min is the minimum value of the AC voltage.

接著介紹將補償電流訊號I EA 與補償電壓訊號V EA 相乘，得到參考電流訊號I ref 之計算過程： Next, the calculation process of multiplying the compensation current signal I EA and the compensation voltage signal V EA to obtain the reference current signal I ref is introduced:

在上述計算過程中，K v 為分壓器30之分壓比例，Z comp 為電流補償器28之阻抗。從上述計算過程可知，本發明不需取樣輸入電壓，且主要利用補償電流訊號I EA 與補償電壓訊號V EA ，得到參考電流訊號I ref ，進而達到功率因素修正，此法可同時避免利用到積分電容之技術，使內部電路在運作時的響應速度大幅提升，以增進功率修正效能。 In the above calculation process, K v is the partial pressure ratio of the voltage divider 30, and Z comp is the impedance of the current compensator 28. It can be seen from the above calculation process that the present invention does not need to sample the input voltage, and mainly uses the compensation current signal I EA and the compensation voltage signal V EA to obtain the reference current signal I ref , thereby achieving the power factor correction, which can avoid the use of the integral at the same time. Capacitor technology greatly enhances the response speed of internal circuits during operation to improve power correction performance.

以下介紹本發明之校正方法，請同時參閱第2圖與第3圖，其中Gv(s)為電壓補償器34之轉移函數，Gi(s)為電流補償器28之轉移函數，Gid(s)為交直流轉換器24之轉移函數，K PWM 為脈波寬度調變轉換器20之轉移函數。 The correction method of the present invention will be described below. Please refer to FIG. 2 and FIG. 3 simultaneously, where Gv(s) is the transfer function of the voltage compensator 34, and Gi(s) is the transfer function of the current compensator 28, Gid(s). the transfer function for the AC-DC converter 24 of the transfer function, K PWM is pulse width modulation of the converter 20.

首先，如步驟S10所示，功率級電路12之交直流轉換器24接收交流電壓V AC 與脈波寬度調變訊號V PWM ，以依據此脈波寬度調變訊號V PWM 轉換交流電壓V AC 為輸入電流I AC 。接著，如步驟S12所示，功率級電路12之交直流轉 換器24轉換輸入電流I AC 成輸出電壓V o 輸出，並利用取樣電阻22取樣輸入電流I AC ，以作為校正電流I sen 輸出。然後，如步驟S14所示，電流補償電路14與電壓補償電路16分別接收校正電流I sen 與輸出電壓V o ，電流補償電路14將校正電流I sen 與參考電流訊號I ref 比較後，以產生補償電流訊號I EA ，且電壓補償電路16將輸出電壓V o 與參考電壓V ref 比較後，以產生補償電壓訊號V EA ，其中參考電流訊號I ref 係由乘法增益器18接收上述補償電流訊號I EA 與補償電壓訊號V EA ，以將其相乘而得之。 First, as shown in step 12 the turn of the power stage circuit DC converter 24 receives an AC voltage V AC and the pulse width modulation signal V PWM SlO, according to this pulse width modulation signal V PWM converting an AC voltage V AC is Input current I AC . Next, as shown in step S12, the AC/DC converter 24 of the power stage circuit 12 converts the input current I AC into an output voltage V o output, and samples the input current I AC using the sampling resistor 22 to output as a correction current I sen . Then, as shown in step S14, the current compensation circuit 14 and the voltage compensation circuit 16 respectively receive the correction current I sen and the output voltage V o , and the current compensation circuit 14 compares the correction current I sen with the reference current signal I ref to generate compensation. The current signal I EA , and the voltage compensation circuit 16 compares the output voltage V o with the reference voltage V ref to generate a compensation voltage signal V EA , wherein the reference current signal I ref receives the compensation current signal I EA from the multiplying gain device 18 And the compensation voltage signal V EA is multiplied by it.

最後，如步驟S16所示，脈波寬度調變轉換器20接收補償電流訊號I EA 與補償電壓訊號V EA ，以據此產生更新之脈波寬度調變訊號V PWM ，並將此傳送至功率級電路12中，然後，回至步驟S10，再次依序進行步驟S10、S12、S14、S16，使交流電壓與輸入電流之相位相同。 Finally, as shown in step S16, the pulse width modulation converter 20 receives the compensation current signal I EA and the compensation voltage signal V EA to generate an updated pulse width modulation signal V PWM and transmit the power to the power. In the stage circuit 12, then, returning to step S10, steps S10, S12, S14, and S16 are sequentially performed again to make the phase of the alternating current voltage and the input current the same.

在上述流程中，步驟S14中的電流補償電路14接收校正電流I sen ，並將其與參考電流訊號I ref 比較後，以產生補償電流訊號I EA 之步驟，更可以下列步驟實施之：首先，電流誤差放大器26接收校正電流I sen 與參考電流訊號I ref ，將此兩者比較後，輸出比較電流。接著，電流補償器28接收此比較電流，以進行電流補償後，產生補償電流訊號I EA 。另，電壓補償電路16接收輸出電壓V o ，並將其與參考電壓V ref 比較後，以產生補償電壓訊號V EA 之步驟，更可以下列步驟實施之：首先，分壓器30接收輸出電壓V o ，以分壓產生一回授電壓。接著，電壓誤差放大器32接收回授電壓與 參考電壓V ref ，將此兩者比較後，輸出比較電壓。最後，電壓補償器34接收比較電壓，以進行電壓補償後，產生補償電壓訊號V EA 。此外，參考電流訊號I ref 係由乘法增益器18接收上述補償電流訊號I EA 與補償電壓訊號V EA ，以將其相乘而得之之步驟，亦可以下列步驟實施之：首先乘法器36接收補償電流訊號I EA 與補償電壓訊號V EA ，以相乘後，產生補償回授電流。接著，電流增益調節器38接收補償回授電流，將其乘上電流增益K m 後，產生參考電流訊號I ref 。 In the above process, the current compensation circuit 14 in step S14 receives the correction current I sen and compares it with the reference current signal I ref to generate a compensation current signal I EA , which can be implemented in the following steps: First, The current error amplifier 26 receives the correction current I sen and the reference current signal I ref , and compares the two to output a comparison current. Then, the current compensator 28 receives the comparison current to perform current compensation, and generates a compensation current signal I EA . In addition, the voltage compensation circuit 16 receives the output voltage V o and compares it with the reference voltage V ref to generate the compensation voltage signal V EA , which can be implemented in the following steps: First, the voltage divider 30 receives the output voltage V. o , a partial voltage is generated by partial voltage. Next, the voltage error amplifier 32 receives the feedback voltage and the reference voltage V ref , compares the two, and outputs a comparison voltage. Finally, the voltage compensator 34 receives the comparison voltage for voltage compensation, and generates a compensation voltage signal V EA . In addition, the reference current signal I ref is obtained by the multiplying gainer 18 receiving the compensation current signal I EA and the compensation voltage signal V EA to multiply it, or the following steps may be implemented: first, the multiplier 36 receives The compensation current signal I EA and the compensation voltage signal V EA are multiplied to generate a compensation feedback current. Next, the current gain adjuster 38 receives the compensated feedback current and multiplies it by the current gain K m to generate a reference current signal I ref .

在步驟S16中，更可以下列步驟實施之：首先，斜波產生器40接收補償電壓訊號V EA ，以據此產生斜波訊號V RAMP 。接著，轉換比較器42接收斜波訊號V RAMP 與補償電流訊號I EA ，以進行比較後，輸出更新之脈波寬度調變訊號V PWM 至功率級電路12。 In step S16, the following steps can be further implemented: First, the ramp generator 40 receives the compensation voltage signal V EA to generate the ramp signal V RAMP accordingly . Then, the conversion comparator 42 receives the ramp signal V RAMP and the compensation current signal I EA for comparison, and then outputs the updated pulse width modulation signal V PWM to the power stage circuit 12.

在上述各主要訊號，如參考電流訊號I ref 、補償電壓訊號V EA 、回授電壓V FB 、交流電壓V AC 、補償電流訊號I EA 與斜波訊號V RAMP 之波形圖如第4圖所示，其中，互相對應之參考電流訊號I ref 、補償電流訊號I EA 與補償電壓訊號V EA 係放大後，展示於第5圖中。 The waveforms of the above main signals, such as reference current signal I ref , compensation voltage signal V EA , feedback voltage V FB , AC voltage V AC , compensation current signal I EA and ramp signal V RAMP are shown in FIG. 4 . The reference current signal I ref , the compensation current signal I EA and the compensation voltage signal V EA corresponding to each other are amplified, and are shown in FIG. 5 .

在轉換比較器42的轉換過程中，當斜波訊號V RAMP 之電壓值大於補償電流訊號I EA 對應之電壓值時，脈波寬度調變訊號V PWM 為高準位電壓；當斜波訊號V RAMP 之電壓值小於補償電流訊號I EA 對應之電壓值時，脈波寬度調變訊號V RAMP 為低準位電壓，如第6圖所示。 During the conversion process of the conversion comparator 42, when the voltage value of the ramp signal V RAMP is greater than the voltage value corresponding to the compensation current signal I EA , the pulse width modulation signal V PWM is a high level voltage; when the ramp signal V When the voltage value of RAMP is less than the voltage value corresponding to the compensation current signal I EA , the pulse width modulation signal V RAMP is a low level voltage, as shown in FIG. 6 .

請參閱第7圖與第8圖，第7圖為本發明之220伏特 之交流電壓V AC 及其輸入電流I AC 波形圖；第8圖則為本發明之110伏特之交流電壓V AC 及其輸入電流I AC 波形圖，此兩圖皆為本發明之校正裝置所實驗出來的波形圖，由圖可知，本發明的確可使交流電壓V AC 及其輸入電流同相位，達到功率因素校正的目的。 Please refer to FIG. 7 and FIG. 8. FIG. 7 is a waveform diagram of the 220 volt AC voltage V AC and its input current I AC according to the present invention; FIG. 8 is the 110 volt AC voltage V AC of the present invention and Input current I AC waveform diagram, both of which are waveform diagrams of the calibration device of the present invention. It can be seen from the figure that the present invention can make the AC voltage V AC and its input current in phase, achieving the purpose of power factor correction. .

綜上所述，本發明利用一乘法增益器接收電流補償訊號與電壓補償訊號，來產生提供給電流補償電路之參考電流訊號，進而修正輸入訊號之功率因素。 In summary, the present invention utilizes a multiplying gainer to receive the current compensation signal and the voltage compensation signal to generate a reference current signal supplied to the current compensation circuit, thereby correcting the power factor of the input signal.

以上所述者，僅為本發明一較佳實施例而已，並非用來限定本發明實施之範圍，故舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾，均應包括於本發明之申請專利範圍內。 The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, so that the shapes, structures, features, and spirits described in the claims of the present invention are equally varied and modified. All should be included in the scope of the patent application of the present invention.

10‧‧‧負載 10‧‧‧ load

12‧‧‧功率級電路 12‧‧‧Power level circuit

14‧‧‧電流補償電路 14‧‧‧ Current compensation circuit

16‧‧‧電壓補償電路 16‧‧‧Voltage compensation circuit

18‧‧‧乘法增益器 18‧‧‧Multiplier

20‧‧‧脈波寬度調變轉換器 20‧‧‧ Pulse width modulation converter

22‧‧‧取樣電阻 22‧‧‧Sampling resistor

24‧‧‧交直流轉換器 24‧‧‧AC-DC converter

241‧‧‧電感器 241‧‧‧Inductors

243‧‧‧功率晶體 243‧‧‧Power crystal

245‧‧‧功率二極體 245‧‧‧Power diode

26‧‧‧電流誤差放大器 26‧‧‧ Current Error Amplifier

28‧‧‧電流補償器 28‧‧‧current compensator

30‧‧‧分壓器 30‧‧‧Divider

32‧‧‧電壓誤差放大器 32‧‧‧Voltage error amplifier

34‧‧‧電壓補償器 34‧‧‧Voltage compensator

36‧‧‧乘法器 36‧‧‧Multiplier

38‧‧‧電流增益調節器 38‧‧‧ Current Gain Regulator

40‧‧‧斜波產生器 40‧‧‧ ramp generator

42‧‧‧轉換比較器 42‧‧‧Conversion comparator

第1圖為本發明之校正裝置電路示意圖。 Figure 1 is a circuit diagram of a calibration device of the present invention.

第2圖為本發明之校正裝置的轉移函數方塊圖。 Fig. 2 is a block diagram showing the transfer function of the correction device of the present invention.

第3圖為本發明之校正方法流程圖。 Figure 3 is a flow chart of the calibration method of the present invention.

第4圖為本發明之各訊號波形圖。 Figure 4 is a waveform diagram of each signal of the present invention.

第5圖為本發明之參考電流訊號、補償電流訊號與補償電壓訊號放大波形圖。 Figure 5 is a waveform diagram of the reference current signal, the compensation current signal and the compensation voltage signal of the present invention.

第6圖為本發明之斜波訊號、補償電流訊號與脈波寬度調變訊號波形圖。 Figure 6 is a waveform diagram of the ramp signal, the compensation current signal and the pulse width modulation signal of the present invention.

第7圖為本發明之220伏特之交流電壓及其輸入電流波形圖。 Figure 7 is a waveform diagram of the 220 volt AC voltage and its input current of the present invention.

第8圖為本發明之110伏特之交流電壓及其輸入電流波形 圖。 Figure 8 is the 110 volt AC voltage and its input current waveform of the present invention. Figure.

10‧‧‧負載 10‧‧‧ load

12‧‧‧功率級電路 12‧‧‧Power level circuit

14‧‧‧電流補償電路 14‧‧‧ Current compensation circuit

16‧‧‧電壓補償電路 16‧‧‧Voltage compensation circuit

18‧‧‧乘法增益器 18‧‧‧Multiplier

20‧‧‧脈波寬度調變轉換器 20‧‧‧ Pulse width modulation converter

22‧‧‧取樣電阻 22‧‧‧Sampling resistor

24‧‧‧交直流轉換器 24‧‧‧AC-DC converter

241‧‧‧電感器 241‧‧‧Inductors

243‧‧‧功率晶體 243‧‧‧Power crystal

245‧‧‧功率二極體 245‧‧‧Power diode

26‧‧‧電流誤差放大器 26‧‧‧ Current Error Amplifier

28‧‧‧電流補償器 28‧‧‧current compensator

30‧‧‧分壓器 30‧‧‧Divider

32‧‧‧電壓誤差放大器 32‧‧‧Voltage error amplifier

34‧‧‧電壓補償器 34‧‧‧Voltage compensator

36‧‧‧乘法器 36‧‧‧Multiplier

38‧‧‧電流增益調節器 38‧‧‧ Current Gain Regulator

40‧‧‧斜波產生器 40‧‧‧ ramp generator

42‧‧‧轉換比較器 42‧‧‧Conversion comparator

Claims (16)

一種功率因素校正裝置，其係連接一負載，該功率因素校正裝置包含：一功率級電路，連接該負載，並接收一交流電壓與一脈波寬度調變訊號，以依據該脈波寬度調變訊號轉換該交流電壓為一輸入電流，且將其輸出至該負載，使該負載上產生一輸出電壓，並取樣該輸入電流以作為一校正電流輸出；一電流補償電路，連接該功率級電路，以接收並比較該校正電流與一參考電流訊號，以產生一補償電流訊號；一電壓補償電路，連接該功率級電路，以接收並比較該輸出電壓與一參考電壓，以產生一補償電壓訊號；一乘法增益器，連接該電流補償電路與該電壓補償電路，並接收該補償電流訊號與該補償電壓訊號，以相乘後，產生該參考電流訊號；以及一脈波寬度調變轉換器，連接該電流補償電路與該電壓補償電路，並接收該補償電流訊號與該補償電壓訊號，以產生該脈波寬度調變訊號，使該交流電壓與該輸入電流之相位相同。 A power factor correction device is connected to a load, the power factor correction device includes: a power stage circuit connected to the load, and receiving an AC voltage and a pulse width modulation signal to be modulated according to the pulse width The signal is converted into an input current, and is output to the load, so that an output voltage is generated on the load, and the input current is sampled as a correction current output; a current compensation circuit is connected to the power stage circuit, Receiving and comparing the correction current and a reference current signal to generate a compensation current signal; a voltage compensation circuit connected to the power stage circuit to receive and compare the output voltage and a reference voltage to generate a compensation voltage signal; a multiplying gainer is connected to the current compensation circuit and the voltage compensation circuit, and receives the compensation current signal and the compensation voltage signal to multiply to generate the reference current signal; and a pulse width modulation converter, connected The current compensation circuit and the voltage compensation circuit receive the compensation current signal and the compensation voltage signal To generate the pulse width modulation signal, so that the same phase as the AC voltage and the input current. 如請求項1所述之功率因素校正裝置，其中該功率級電路更包含：一取樣電阻，連接該電流補償電路；以及一交直流轉換器，連接該負載、該取樣電阻、該電流補償電路與該電壓補償電路，並接收該交流電壓與該脈波寬 度調變訊號，以依據該脈波寬度調變訊號轉換該交流電壓為該輸入電流，且將其輸出至該負載，以產生該輸出電壓，又利用該取樣電阻取樣該輸入電流，以輸出該校正電流。 The power factor correction device of claim 1, wherein the power stage circuit further comprises: a sampling resistor connected to the current compensation circuit; and an AC/DC converter connected to the load, the sampling resistor, the current compensation circuit and The voltage compensation circuit receives the alternating voltage and the pulse width Adjusting the signal to convert the AC voltage to the input current according to the pulse width modulation signal, and outputting the same to the load to generate the output voltage, and sampling the input current by using the sampling resistor to output the signal Correct the current. 如請求項1所述之功率因素校正裝置，其中該電流補償電路更包含：一電流誤差放大器，連接該功率級電路，並接收該校正電流與一參考電流訊號，將此兩者比較後，輸出一比較電流；以及一電流補償器，連接該電流誤差放大器，並接收該比較電流，以進行電流補償後，產生該補償電流訊號。 The power factor correction device of claim 1, wherein the current compensation circuit further comprises: a current error amplifier connected to the power stage circuit, and receiving the correction current and a reference current signal, comparing the two, and outputting a comparison current; and a current compensator connected to the current error amplifier and receiving the comparison current for current compensation to generate the compensation current signal. 如請求項1所述之功率因素校正裝置，其中該電壓補償電路更包含：一分壓器，連接該功率級電路，並接收該輸出電壓，以分壓產生一回授電壓；一電壓誤差放大器，連接該分壓器，並接收該回授電壓與該參考電壓，將此兩者比較後，輸出一比較電壓；以及一電壓補償器，連接該電壓誤差放大器，並接收該比較電壓，以進行電壓補償後，產生該補償電壓訊號。 The power factor correction device of claim 1, wherein the voltage compensation circuit further comprises: a voltage divider connected to the power stage circuit, and receiving the output voltage to generate a feedback voltage by voltage division; a voltage error amplifier Connecting the voltage divider, receiving the feedback voltage and the reference voltage, comparing the two, and outputting a comparison voltage; and a voltage compensator connecting the voltage error amplifier and receiving the comparison voltage for performing After the voltage is compensated, the compensation voltage signal is generated. 如請求項1所述之功率因素校正裝置，其中該乘法增益器更包含：一乘法器，連接該電流補償電路與該電壓補償電路，並接收該補償電流訊號與該補償電壓訊號，以相乘後，產生一補償回授電流；以及一電流增益調節器，連接該乘法器，並接收該補償回授 電流，將其乘上一電流增益後，產生該參考電流訊號。 The power factor correction device of claim 1, wherein the multiplying gainer further comprises: a multiplier, connecting the current compensation circuit and the voltage compensation circuit, and receiving the compensation current signal and the compensation voltage signal to multiply Thereafter, generating a compensated feedback current; and a current gain regulator connected to the multiplier and receiving the compensation feedback The current is multiplied by a current gain to generate the reference current signal. 如請求項2所述之功率因素校正裝置，其中該脈波寬度調變轉換器更包含：一斜波產生器，連接該電壓補償電路，並接收該補償電壓訊號，以據此產生一斜波訊號；以及一轉換比較器，連接該斜波產生器與該電流補償電路，並接收該斜波訊號與該補償電流訊號，以進行比較後，輸出該脈波寬度調變訊號至該功率級電路中。 The power factor correction device of claim 2, wherein the pulse width modulation converter further comprises: a ramp generator connected to the voltage compensation circuit and receiving the compensation voltage signal to generate a ramp wave accordingly And a conversion comparator connected to the ramp generator and the current compensation circuit, and receiving the ramp signal and the compensation current signal for comparison, and outputting the pulse width modulation signal to the power stage circuit in. 如請求項6所述之功率因素校正裝置，其中該斜波訊號之電壓值大於該補償電流訊號對應之電壓值時，該脈波寬度調變訊號為高準位電壓；以及該斜波訊號之電壓值小於該補償電流訊號對應之電壓值時，該脈波寬度調變訊號為低準位電壓。 The power factor correction device of claim 6, wherein when the voltage value of the ramp signal is greater than a voltage value corresponding to the compensation current signal, the pulse width modulation signal is a high level voltage; and the ramp signal is When the voltage value is less than the voltage value corresponding to the compensation current signal, the pulse width modulation signal is a low level voltage. 如請求項7所述之功率因素校正裝置，其中該取樣電阻、該脈波寬度調變訊號、該輸入電流、該交流電壓、該輸出電壓與該斜波訊號係符合下列條件：R S ．i in (θ)=[1-d(θ)]．T S.W. ．S V ；V in_pk ．sin(θ)/V o =1-d(θ)；以及i in (θ)=V in_pk ．sin(θ)/R in(ac)，其中R S 為該取樣電阻之阻值，i in (θ)為該輸入電流，V in_pk ．sin(θ)為該交流電壓，V o 為該輸出電壓，S V 為該斜波訊號之斜率，R in(ac)為等效輸入交流電阻，T S.W. 與d(θ)為分別該脈波寬度調變訊號之週期與責任週期(duty cycle)。 The power factor correction device of claim 7, wherein the sampling resistor, the pulse width modulation signal, the input current, the alternating voltage, the output voltage and the ramp signal are in accordance with the following condition: R S . i in (θ)=[1- d (θ)]. T SW . S V ; V in_pk . Sin(θ)/ V o =1- d (θ); and i in (θ)= V in_pk . Sin(θ) / R in ( ac ) , where R S is the resistance of the sampling resistor, i in (θ) is the input current, V in_pk . Sin(θ) is the AC voltage, V o is the output voltage, S V is the slope of the ramp signal, R in ( ac ) is the equivalent input AC resistance, and T SW and d (θ) are respectively the pulse wave The period of the width modulation signal and the duty cycle. 一種功率因素校正方法，其係包含下列步驟： 接收一交流電壓與一脈波寬度調變訊號，以依據該脈波寬度調變訊號轉換該交流電壓為一輸入電流；轉換該輸入電流成一輸出電壓輸出，並取樣該輸入電流，以作為一校正電流輸出；接收該校正電流與該輸出電壓，將該校正電流與一參考電流訊號比較後，以產生一補償電流訊號，且將該輸出電壓與一參考電壓比較後，以產生一補償電壓訊號，其中該參考電流訊號係由該補償電流訊號與該補償電壓訊號相乘而得之；以及接收該補償電流訊號與該補償電壓訊號，以據此產生更新之該脈波寬度調變訊號，使該交流電壓與該輸入電流之相位相同。 A power factor correction method includes the following steps: Receiving an alternating voltage and a pulse width modulation signal to convert the alternating current into an input current according to the pulse width modulation signal; converting the input current into an output voltage output, and sampling the input current as a correction Current output; receiving the correction current and the output voltage, comparing the correction current with a reference current signal to generate a compensation current signal, and comparing the output voltage with a reference voltage to generate a compensation voltage signal, The reference current signal is obtained by multiplying the compensation current signal by the compensation voltage signal; and receiving the compensation current signal and the compensation voltage signal to generate the updated pulse width modulation signal according to the The AC voltage is the same as the phase of the input current. 如請求項9所述之功率因素校正方法，其中接收該校正電流，並將其與該參考電流訊號比較後，以產生該補償電流訊號之步驟，更包含下列步驟：接收該校正電流與該參考電流訊號，將此兩者比較後，輸出一比較電流；以及接收該比較電流，以進行電流補償後，產生該補償電流訊號。 The power factor correction method of claim 9, wherein the step of receiving the correction current and comparing the reference current signal with the reference current signal to generate the compensation current signal further comprises the steps of: receiving the correction current and the reference The current signal, after comparing the two, outputs a comparison current; and receiving the comparison current to perform current compensation, the compensation current signal is generated. 如請求項9所述之功率因素校正方法，其中接收該輸出電壓，並將其與該參考電壓比較後，以產生該補償電壓訊號之步驟，更包含下列步驟：接收該輸出電壓，以分壓產生一回授電壓；接收該回授電壓與該參考電壓，將此兩者比較後，輸出 一比較電壓；以及接收該比較電壓，以進行電壓補償後，產生該補償電壓訊號。 The power factor correction method of claim 9, wherein the step of receiving the output voltage and comparing the reference voltage to the reference voltage to generate the compensation voltage signal further comprises the steps of: receiving the output voltage to divide the voltage Generating a feedback voltage; receiving the feedback voltage and the reference voltage, comparing the two, and outputting And comparing the voltage; and receiving the comparison voltage to perform voltage compensation, and generating the compensation voltage signal. 如請求項9所述之功率因素校正方法，其中該參考電流訊號係由該補償電流訊號與該補償電壓訊號相乘而得之步驟，更包含下列步驟：接收該補償電流訊號與該補償電壓訊號，以相乘後，產生一補償回授電流；以及接收該補償回授電流，將其乘上一電流增益後，產生該參考電流訊號。 The power factor correction method of claim 9, wherein the reference current signal is obtained by multiplying the compensation current signal by the compensation voltage signal, and further comprising the steps of: receiving the compensation current signal and the compensation voltage signal After multiplying, a compensated feedback current is generated; and the compensated feedback current is received and multiplied by a current gain to generate the reference current signal. 如請求項9所述之功率因素校正方法，其中接收該補償電流訊號與該補償電壓訊號，以據此產生該更新之該脈波寬度調變訊號之步驟，更包含下列步驟：接收該補償電壓訊號，以據此產生一斜波訊號；以及接收該斜波訊號與該補償電流訊號，以進行比較後，輸出該更新之該脈波寬度調變訊號。 The power factor correction method of claim 9, wherein the step of receiving the compensation current signal and the compensation voltage signal to generate the updated pulse width modulation signal according to the method further comprises the steps of: receiving the compensation voltage a signal for generating a ramp signal; and receiving the ramp signal and the compensation current signal for comparison, and outputting the updated pulse width modulation signal. 如請求項13所述之功率因素校正方法，其中該斜波訊號之電壓值大於該補償電流訊號對應之電壓值時，該脈波寬度調變訊號為高準位電壓；以及該斜波訊號之電壓值小於該補償電流訊號對應之電壓值時，該脈波寬度調變訊號為低準位電壓。 The power factor correction method of claim 13, wherein when the voltage value of the ramp signal is greater than a voltage value corresponding to the compensation current signal, the pulse width modulation signal is a high level voltage; and the ramp signal is When the voltage value is less than the voltage value corresponding to the compensation current signal, the pulse width modulation signal is a low level voltage. 如請求項13所述之功率因素校正方法，其中取樣該輸入電流，以作為該校正電流輸出之步驟中，係利用一取樣電阻，取樣該輸入電流，以作為該校正電流輸出。 The power factor correction method according to claim 13, wherein the step of sampling the input current as the correction current output is to sample the input current as a correction current output by using a sampling resistor. 如請求項15所述之功率因素校正方法，其中該取樣電阻、該脈波寬度調變訊號、該輸入電流、該交流電壓、該輸出電壓與該斜波訊號係符合下列條件：R S ．i in (θ)=[1-d(θ)]．T S.W. ．S V ；V in_pk ．sin(θ)/V o =1-d(θ)；以及i in (θ)=V in_pk ．sin(θ)/R in(ac)，其中R S 為該取樣電阻之阻值，i in (θ)為該輸入電流，V in_pk ．sin(θ)為該交流電壓，V o 為該輸出電壓，S V 為該斜波訊號之斜率，R in(ac)為等效輸入交流電阻，T S.W .與d(θ)為分別該脈波寬度調變訊號之週期與責任週期(duty cycle)。 The power factor correction method of claim 15, wherein the sampling resistor, the pulse width modulation signal, the input current, the alternating voltage, the output voltage and the ramp signal meet the following conditions: R S . i in (θ)=[1- d (θ)]. T SW . S V ; V in_pk . Sin(θ)/ V o =1- d (θ); and i in (θ)= V in_pk . Sin(θ) / R in ( ac ) , where R S is the resistance of the sampling resistor, i in (θ) is the input current, V in_pk . Sin(θ) is the AC voltage, V o is the output voltage, S V is the slope of the ramp signal, R in ( ac ) is the equivalent input AC resistance, T SW . and d (θ) are respectively the pulse The period of the wave width modulation signal and the duty cycle.
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