TWI438850B - Switching device - Google Patents
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- TWI438850B TWI438850B TW100115934A TW100115934A TWI438850B TW I438850 B TWI438850 B TW I438850B TW 100115934 A TW100115934 A TW 100115934A TW 100115934 A TW100115934 A TW 100115934A TW I438850 B TWI438850 B TW I438850B
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Description
本發明是有關於一種開關元件，且特別是有關於一種具有漏電流抑制層(leakage current restrain layer)以及材料誘發空乏區(material-induced depletion region)之開關元件。The present invention relates to a switching element, and more particularly to a switching element having a leakage current restraining layer and a material-induced depletion region.
近年來，薄膜電晶體在液晶顯示器(Liquid Crystal Display，LCD)的應用日趨廣泛，且相關的產品也在陸續量產中。一般而言，薄膜電晶體大致上可區分為非晶矽薄膜電晶體、多晶矽薄膜電晶體、氧化物半導體薄膜電晶體等。不論是何種型態之薄膜電晶體，其在關閉狀態(Off state)下的漏電流是無法完全避免的。漏電流產生的原因主要是因為通道層的厚度過厚以及製程條件(如通道層的沈積條件、主動層之後製程(如紫外光照射)、離子佈植之製程條件等)不穩定所導致。當通道層的厚度過後或者形成通道層之製程條件不穩定時，閘極對於通道層的控制能力便會下降，導致背通道效應(back channel effect)。詳言之，在與源極以及汲極接觸之通道層表面上會有漏電路徑(leakage path)產生，此位於源極與汲極之間的漏電路徑將使得漏電流無法被抑制，進而導致薄膜電晶體的電氣特性惡化。In recent years, the application of thin film transistors in liquid crystal displays (LCDs) has become increasingly widespread, and related products are also in mass production. In general, a thin film transistor can be roughly classified into an amorphous germanium thin film transistor, a polycrystalline germanium thin film transistor, an oxide semiconductor thin film transistor, or the like. Regardless of the type of thin film transistor, the leakage current in the off state cannot be completely avoided. Leakage current is mainly caused by the thickness of the channel layer being too thick and the process conditions (such as the deposition conditions of the channel layer, the process after the active layer (such as ultraviolet light irradiation), the process conditions of ion implantation, etc.). When the thickness of the channel layer is over or the process conditions for forming the channel layer are unstable, the control ability of the gate to the channel layer is reduced, resulting in a back channel effect. In detail, a leakage path occurs on the surface of the channel layer in contact with the source and the drain, and the leakage path between the source and the drain causes the leakage current to be suppressed, thereby causing the film. The electrical characteristics of the transistor deteriorate.
承上述，如何進一步改善薄膜電晶體的電氣特性，以有效降低薄膜電晶體在關閉狀態下的漏電流，實為研發者目前亟欲解決的問題之一。In view of the above, how to further improve the electrical characteristics of the thin film transistor to effectively reduce the leakage current of the thin film transistor in the off state is one of the problems that the developer is currently trying to solve.
本發明提供一種具有漏電流抑制層以及由漏電流抑制層誘發所形成之材料誘發空乏區之開關元件。The present invention provides a switching element having a leakage current suppressing layer and a material induced depletion region induced by a leakage current suppressing layer.
本發明提供一種開關元件，其包括一閘極、一通道層、一閘絕緣層、一源極、一汲極以及一漏電流抑制層。閘絕緣層配置於閘極與通道層之間，源極與汲極分別與通道層接觸，且源極與汲極彼此分離。漏電流抑制層配置於通道層上，漏電流抑制層位於源極與汲極之間以於通道層中形成一材料誘發空乏區。The invention provides a switching element comprising a gate, a channel layer, a gate insulating layer, a source, a drain and a leakage current suppressing layer. The gate insulating layer is disposed between the gate and the channel layer, the source and the drain are respectively in contact with the channel layer, and the source and the drain are separated from each other. The leakage current suppression layer is disposed on the channel layer, and the leakage current suppression layer is located between the source and the drain to form a material induced depletion region in the channel layer.
在本發明之一實施例中，前述之漏電流抑制層不與源極以及汲極接觸。In an embodiment of the invention, the leakage current suppression layer is not in contact with the source and the drain.
在本發明之一實施例中，前述之漏電流抑制層係電性浮置(electrical floating)。In an embodiment of the invention, the leakage current suppression layer is electrically floating.
在本發明之一實施例中，前述之漏電流抑制層係電性耦接於一固定電位。In an embodiment of the invention, the leakage current suppression layer is electrically coupled to a fixed potential.
在本發明之一實施例中，前述之漏電流抑制層與源極電性連接或與汲極電性連接。In an embodiment of the invention, the leakage current suppression layer is electrically connected to the source or electrically connected to the drain.
在本發明之一實施例中，前述之源極與汲極之材質相同，而源極以及汲極之材質與漏電流抑制層之材質不同。In an embodiment of the invention, the source and the drain are made of the same material, and the source and the drain are different in material from the leakage current suppression layer.
在本發明之一實施例中，前述之漏電流抑制層之材質包括半導體或金屬。In an embodiment of the invention, the material of the leakage current suppression layer comprises a semiconductor or a metal.
在本發明之一實施例中，前述之通道層之材質包括矽基(silicon-based)半導體、鍺基(germanium-based)半導體或金屬氧化物半導體。In an embodiment of the invention, the material of the channel layer comprises a silicon-based semiconductor, a germanium-based semiconductor or a metal oxide semiconductor.
在本發明之一實施例中，前述之開關元件可進一步包括一配置於通道層上之蝕刻終止層，其中源極與汲極覆蓋部分的蝕刻終止層以及部分的通道層，而漏電流抑制層係嵌於蝕刻終止層中並與通道層接觸。In an embodiment of the invention, the switching element may further include an etch stop layer disposed on the channel layer, wherein the source and the drain cover portion of the etch stop layer and a portion of the channel layer, and the leakage current suppression layer The system is embedded in the etch stop layer and is in contact with the channel layer.
在本發明之一實施例中，前述之開關元件可進一步包括一覆蓋通道層、源極與汲極之保護層，其中通道層係覆蓋部分源極與部分汲極，而漏電流抑制層係嵌於保護層中並與通道層接觸。In an embodiment of the invention, the switching element may further include a protection layer covering the channel layer, the source and the drain, wherein the channel layer covers part of the source and part of the drain, and the leakage current suppression layer is embedded. In the protective layer and in contact with the channel layer.
在本發明之一實施例中，前述之開關元件可進一步包括一覆蓋通道層、源極、汲極與漏電流抑制層之保護層，其中通道層係覆蓋部分源極與部分汲極。In an embodiment of the invention, the switching element may further include a protective layer covering the channel layer, the source, the drain and the leakage current suppressing layer, wherein the channel layer covers a portion of the source and a portion of the drain.
由於本發明之開關元件具有漏電流抑制層以及由漏電流抑制層誘發所形成之材料誘發空乏區，因此本發明之開關元件具有良好的電氣特性(electrical characteristics)。Since the switching element of the present invention has a leakage current suppressing layer and a material-induced depletion region induced by the leakage current suppressing layer, the switching element of the present invention has good electrical characteristics.
為讓本發明之上述和其他目的、特徵和優點能更明顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下。The above and other objects, features and advantages of the present invention will become more <RTIgt;
圖1為本發明第一實施例之主動元件的剖面示意圖。請參照圖1，本實施例之開關元件100包括一閘極G、一通道層C、一閘絕緣層GI、一源極S、一汲極D以及一漏電流抑制層110。閘絕緣層GI配置於閘極G與通道層C之間，源極S與汲極D分別與通道層C接觸，且源極S與汲極D彼此分離。此外，漏電流抑制層110配置於通道層C上，且漏電流抑制層110位於源極S與汲極D之間以於通道層C中形成一材料誘發空乏區120。1 is a schematic cross-sectional view showing an active device according to a first embodiment of the present invention. Referring to FIG. 1 , the switching device 100 of the present embodiment includes a gate G, a channel layer C, a gate insulating layer GI, a source S, a drain D, and a leakage current suppression layer 110. The gate insulating layer GI is disposed between the gate G and the channel layer C, the source S and the drain D are respectively in contact with the channel layer C, and the source S and the drain D are separated from each other. In addition, the leakage current suppression layer 110 is disposed on the channel layer C, and the leakage current suppression layer 110 is located between the source S and the drain D to form a material-induced depletion region 120 in the channel layer C.
從圖1可知，本實施例之源極S與汲極D例如係形成於通道層C的部分區域上，且漏電流抑制層110不與源極S以及汲極D接觸。舉例而言，本實施例之漏電流抑制層110例如是電性浮置，或者是耦接於一固定電位。然而，本發明並非限定漏電流抑制層110不得與源極S以及汲極D接觸，在其他可行的實施例中，漏電流抑制層110可選擇性地與源極S電性連接或是與汲極D電性連接。此時，漏電流抑制層110的電位便與所電性連接的源極S或汲極D相同。值得注意的是，漏電流抑制層110不得同時與源極S以及汲極D電性連接。As can be seen from FIG. 1, the source S and the drain D of the present embodiment are formed, for example, on a partial region of the channel layer C, and the leakage current suppressing layer 110 is not in contact with the source S and the drain D. For example, the leakage current suppression layer 110 of the embodiment is electrically floating, for example, or coupled to a fixed potential. However, the present invention does not limit the leakage current suppression layer 110 from being in contact with the source S and the drain D. In other feasible embodiments, the leakage current suppression layer 110 may be selectively electrically connected to the source S or Extreme D electrical connection. At this time, the potential of the leakage current suppressing layer 110 is the same as the source S or the drain D which is electrically connected. It should be noted that the leakage current suppression layer 110 must not be electrically connected to the source S and the drain D at the same time.
請繼續參照圖1，主動元件100中的源極S與汲極D例如是採用相同材質製作，舉例而言，源極S與汲極D例如是藉由圖案化(例如微影蝕刻製程)同一層導體層所形成的。源極S與通道層C之間以及汲極D與通道層C之間會形成歐姆接觸(ohmic contact)。此外，源極S以及汲極D之材質與漏電流抑制層110之材質不同，舉例而言，源極S與汲極D是藉由圖案化(例如微影蝕刻製程)同一層導體層所形成的，而漏電流抑制層110是藉由圖案化(例如微影蝕刻製程)另一層導體層所形成的，本實施例不限定源極S、汲極D與漏電流抑制層110的形成順序。Referring to FIG. 1 , the source S and the drain D in the active device 100 are made of the same material, for example, the source S and the drain D are, for example, patterned (for example, a photolithography process). Formed by a layer of conductor. An ohmic contact is formed between the source S and the channel layer C and between the drain D and the channel layer C. In addition, the materials of the source S and the drain D are different from the material of the leakage current suppression layer 110. For example, the source S and the drain D are formed by patterning (for example, a photolithography process) of the same layer of conductor layers. The leakage current suppression layer 110 is formed by patterning (for example, a photolithography process) another layer of conductor layers. This embodiment does not limit the order in which the source S, the drain D, and the leakage current suppression layer 110 are formed.
在本實施例中，漏電流抑制層110之材質例如為半導體(例如矽、鍺、矽鍺化合物、銦錫氧化物或銦鋅氧化物)或金屬(例如金、銀、鈀、鉑、鎢或鉬)，而通道層C之材質包括矽基半導體、鍺基半導體或金屬氧化物半導體(例如銦的氧化物、鎵的氧化物、鋅的氧化物、錫的氧化物、鉬的氧化物、釩的氧化物、銻的氧化物、鉍的氧化物、錸的氧化物、鉭的氧化物、鎢的氧化物、鈮的氧化物或鎳的氧化物)。In this embodiment, the material of the leakage current suppression layer 110 is, for example, a semiconductor (for example, germanium, antimony, antimony compound, indium tin oxide or indium zinc oxide) or a metal (for example, gold, silver, palladium, platinum, tungsten or Molybdenum), and the material of the channel layer C includes a germanium-based semiconductor, a germanium-based semiconductor or a metal oxide semiconductor (for example, an oxide of indium, an oxide of gallium, an oxide of zinc, an oxide of tin, an oxide of molybdenum, vanadium Oxides, antimony oxides, antimony oxides, antimony oxides, antimony oxides, tungsten oxides, antimony oxides or nickel oxides).
當漏電流抑制層110之材質為矽、鍺或矽鍺化合物時，由於半導體可以透過摻雜的方式調整其本身的費米能階(Fermi-level)，因此通道層C之材質可以從矽基半導體、鍺基半導體以及金屬氧化物半導體中任意選擇。此時，只要漏電流抑制層110之摻雜型態與通道層C的摻雜型態相同(同為P型摻雜或同為N型摻雜)，便可在通道層C中形成材料誘發空乏區120以達到抑制漏電流的效果。When the material of the leakage current suppression layer 110 is a ruthenium, osmium or iridium compound, since the semiconductor can adjust its Fermi-level by doping, the material of the channel layer C can be obtained from the ruthenium base. Semiconductors, germanium-based semiconductors, and metal oxide semiconductors are arbitrarily selected. At this time, as long as the doping type of the leakage current suppressing layer 110 is the same as the doping type of the channel layer C (same as P-type doping or the same N-type doping), material formation can be induced in the channel layer C. The depletion region 120 has the effect of suppressing leakage current.
當漏電流抑制層110之材質為銦錫氧化物或銦鋅氧化物，而通道層C之材質為矽基半導體、鍺基半導體時，由於銦錫氧化物或銦鋅氧化物的功函數(work function)接近矽、鍺或矽鍺化合物之中間能帶(middle-band)，因此漏電流抑制層110與通道層C之間會形成蕭基接觸(Schottky contact)以於通道層C中形成材料誘發空乏區120，進而達到抑制漏電流的效果。When the material of the leakage current suppressing layer 110 is indium tin oxide or indium zinc oxide, and the material of the channel layer C is a germanium-based semiconductor or a germanium-based semiconductor, the work function of indium tin oxide or indium zinc oxide is The function is close to the middle-band of the ruthenium, osmium or iridium compound, so a Schottky contact is formed between the leakage current suppression layer 110 and the channel layer C to induce material formation in the channel layer C. The depletion region 120 further achieves the effect of suppressing leakage current.
當漏電流抑制層110之材質為銦錫氧化物或銦鋅氧化物，而通道層C之材質為金屬氧化物半導體時，銦錫氧化物或銦鋅氧化物的功函數接近金屬氧化物半導體的功函數，由於形成通道層C之金屬氧化物半導體為離子晶體，漏電流抑制層110與通道層C之材質不同，且漏電流抑制層110能夠提供氧原子至通道層C中以抑制背通道效應，因此漏電流抑制層110與通道層C之間雖不會形成蕭基接觸(Schottky contact)，但仍能達到抑制漏電流的效果。When the material of the leakage current suppression layer 110 is indium tin oxide or indium zinc oxide, and the material of the channel layer C is a metal oxide semiconductor, the work function of the indium tin oxide or the indium zinc oxide is close to that of the metal oxide semiconductor. The work function, since the metal oxide semiconductor forming the channel layer C is an ionic crystal, the leakage current suppression layer 110 is different from the material of the channel layer C, and the leakage current suppression layer 110 can supply oxygen atoms to the channel layer C to suppress the back channel effect. Therefore, although the Schottky contact is not formed between the leakage current suppressing layer 110 and the channel layer C, the effect of suppressing leakage current can be achieved.
當漏電流抑制層110之材質為金屬，而通道層C之材質為矽基半導體、鍺基半導體或金屬氧化物半導體時，由於金屬的功函數與矽基半導體、鍺基半導體或金屬氧化物半導體的功函數不同，因此僅需選擇適當的金屬作為漏電流抑制層110。舉例而言，當通道層C為P型摻雜時，漏電流抑制層110的材質例如為鉬、鎢或銀，當通道層C為P型摻雜時，漏電流抑制層110的材質例如為金、鈀或鉑。When the material of the leakage current suppressing layer 110 is metal, and the material of the channel layer C is a germanium-based semiconductor, a germanium-based semiconductor or a metal oxide semiconductor, the work function of the metal is based on a germanium-based semiconductor, a germanium-based semiconductor or a metal-oxide semiconductor. The work function is different, so only a suitable metal needs to be selected as the leakage current suppression layer 110. For example, when the channel layer C is P-type doped, the material of the leakage current suppression layer 110 is, for example, molybdenum, tungsten or silver. When the channel layer C is P-doped, the material of the leakage current suppression layer 110 is, for example, Gold, palladium or platinum.
圖2為本發明第二實施例之主動元件的剖面示意圖。請參照圖1與圖2，本實施例之開關元件100’與第一實施例之開關元件100類似，惟二者主要差異之處在於：本實施荔枝開關元件100’進一步包括一配置於通道層C上之蝕刻終止層130，其中源極S與汲極D覆蓋部分的蝕刻終止層130以及部分的通道層C，而漏電流抑制層120係嵌於蝕刻終止層130中並與通道層C接觸。2 is a cross-sectional view of an active device in accordance with a second embodiment of the present invention. Referring to FIG. 1 and FIG. 2, the switching element 100' of the present embodiment is similar to the switching element 100 of the first embodiment, but the main difference is that the present embodiment of the lychee switching element 100' further includes a channel layer disposed at the channel layer. The etch stop layer 130 on C, wherein the source S and the drain D cover a portion of the etch stop layer 130 and a portion of the channel layer C, and the leakage current suppression layer 120 is embedded in the etch stop layer 130 and is in contact with the channel layer C. .
圖3為本發明第三實施例之主動元件的剖面示意圖。請參照圖1與圖3，本實施例之開關元件100”與第一實施例之開關元件100類似，惟二者主要差異之處在於：本實施例之主動元件100”進一步包括一覆蓋通道層C’、源極S與汲極D之保護層140，而通道層C’係覆蓋部分源極S與部分汲極D，且漏電流抑制層110係嵌於保護層140中並與通道層C’接觸。3 is a cross-sectional view of an active device in accordance with a third embodiment of the present invention. Referring to FIG. 1 and FIG. 3, the switching element 100" of the present embodiment is similar to the switching element 100 of the first embodiment, but the main difference between the two is that the active device 100" of the embodiment further includes a cover channel layer. C', the source S and the drain D of the protective layer 140, and the channel layer C' covers a portion of the source S and a portion of the drain D, and the leakage current suppression layer 110 is embedded in the protective layer 140 and the channel layer C 'contact.
圖4為本發明第四實施例之主動元件的剖面示意圖。請參照圖3與圖4，本實施例之開關元件100’’’與第三實施例之開關元件100”類似，惟二者主要差異之處在於：本實施例之主動元件100’’’進一步包括一覆蓋通道層C’、源極S、汲極D與漏電流抑制層110之保護層140。詳言之，漏電流抑制層110未外露。4 is a cross-sectional view showing an active device according to a fourth embodiment of the present invention. Referring to FIG. 3 and FIG. 4, the switching element 100"' of the present embodiment is similar to the switching element 100" of the third embodiment, but the main difference between the two is that the active element 100''' of the embodiment further A protective layer 140 covering the channel layer C', the source S, the drain D, and the leakage current suppressing layer 110 is included. In detail, the leakage current suppressing layer 110 is not exposed.
圖5A至圖5C為閘極電壓(gate voltage)與汲極電流(drain current)之關係圖。請參照圖5A，當通道層之材質為氧化銦鎵鋅(IGZO)，而無漏電流抑制層110設置時，從各個閘極電壓與汲極電流之關係曲線判斷，主動元件的臨界電壓(Vth)飄移的十分嚴重。5A to 5C are diagrams showing a relationship between a gate voltage and a drain current. Referring to FIG. 5A, when the material of the channel layer is indium gallium zinc oxide (IGZO) and the leakage current suppression layer 110 is not provided, the threshold voltage of the active device (Vth) is determined from the relationship between the gate voltage and the drain current. ) The drift is very serious.
請參照圖5B，為了解決臨界電壓(Vth)飄移的問題，可利用紫外光照射的方式使臨界電壓(Vth)，但若紫外光照射的控制不當極有可能導致氧化銦鎵鋅(IGZO)的半導體特性喪失，如圖5B所示。意即，氧化銦鎵鋅(IGZO)會因漏電流路徑而讓源極與汲極意外導通。Referring to FIG. 5B, in order to solve the problem of threshold voltage (Vth) drift, the threshold voltage (Vth) can be made by ultraviolet light irradiation, but if the improper control of ultraviolet light irradiation is likely to cause indium gallium zinc oxide (IGZO) The semiconductor characteristics are lost as shown in Fig. 5B. That is, indium gallium zinc oxide (IGZO) causes the source and the drain to be accidentally turned on due to the leakage current path.
請參照圖5C，本發明藉由設置漏電流抑制層，此處漏電流抑制層之材質為金(Au)，可以讓氧化銦鎵鋅(IGZO)層中產生材料誘發空乏區120，進而使氧化銦鎵鋅(IGZO)層的半導體特性恢復，並且阻斷漏電流路徑。Referring to FIG. 5C, the present invention provides a leakage current suppression layer, wherein the material of the leakage current suppression layer is gold (Au), which can cause the material in the indium gallium zinc oxide (IGZO) layer to induce the depletion region 120, thereby oxidizing. The semiconductor characteristics of the indium gallium zinc (IGZO) layer are recovered and the leakage current path is blocked.
由於本發明之開關元件具有漏電流抑制層以及由漏電流抑制層所誘發形成之材料誘發空乏區，因此本發明之開關元件具有穩定且良好的電氣特性。Since the switching element of the present invention has a leakage current suppressing layer and a material-induced depletion region induced by the leakage current suppressing layer, the switching element of the present invention has stable and good electrical characteristics.
雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application.
100、100’、100”、100’’’．．．主動元件100, 100', 100", 100'''... active components
110．．．漏電流抑制層110. . . Leakage current suppression layer
120．．．材料誘發空乏區120. . . Material induced depletion zone
130．．．蝕刻終止層130. . . Etch stop layer
140‧‧‧保護層140‧‧‧Protective layer
G‧‧‧閘極G‧‧‧ gate
GI‧‧‧閘絕緣層GI‧‧‧ brake insulation
C、C’‧‧‧通道層C, C’‧‧‧ channel layer
S‧‧‧源極S‧‧‧ source
D‧‧‧汲極D‧‧‧汲
圖1為本發明第一實施例之主動元件的剖面示意圖。1 is a schematic cross-sectional view showing an active device according to a first embodiment of the present invention.
圖2為本發明第二實施例之主動元件的剖面示意圖。2 is a cross-sectional view of an active device in accordance with a second embodiment of the present invention.
圖3為本發明第三實施例之主動元件的剖面示意圖。3 is a cross-sectional view of an active device in accordance with a third embodiment of the present invention.
圖4為本發明第四實施例之主動元件的剖面示意圖。4 is a cross-sectional view showing an active device according to a fourth embodiment of the present invention.
圖5A至圖5C為閘極電壓(gate voltage)與汲極電流(drain current)之關係圖。5A to 5C are diagrams showing a relationship between a gate voltage and a drain current.
100．．．主動元件100. . . Active component
110．．．漏電流抑制層110. . . Leakage current suppression layer
120．．．材料誘發空乏區120. . . Material induced depletion zone
G．．．閘極G. . . Gate
GI．．．閘絕緣層GI. . . Brake insulation
C．．．通道層C. . . Channel layer
S．．．源極S. . . Source
D．．．汲極D. . . Bungee
Claims (11)
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| Application Number | Priority Date | Filing Date | Title |
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| TW100115934A TWI438850B (en) | 2011-05-06 | 2011-05-06 | Switching device |
| CN201110184754.3A CN102280490B (en) | 2011-05-06 | 2011-06-28 | Switch assembly |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW100115934A TWI438850B (en) | 2011-05-06 | 2011-05-06 | Switching device |
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| TW201246392A TW201246392A (en) | 2012-11-16 |
| TWI438850B true TWI438850B (en) | 2014-05-21 |
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| CN102280490B (en) | 2014-03-26 |
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