TWI435529B - Motor driving apparatus with minimum and maximum speed settings - Google Patents

Motor driving apparatus with minimum and maximum speed settings Download PDF

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TWI435529B
TWI435529B TW101106724A TW101106724A TWI435529B TW I435529 B TWI435529 B TW I435529B TW 101106724 A TW101106724 A TW 101106724A TW 101106724 A TW101106724 A TW 101106724A TW I435529 B TWI435529 B TW I435529B
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signal
pwm
output
circuit
motor
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TW201338396A (en
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Teng Hui Lee
Kuo Yung Yu
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Amtek Semiconductor Co Ltd
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Description

具有最低轉速及最高轉速設定的馬達驅動裝置Motor drive with minimum speed and maximum speed setting

本發明是有關於一種馬達之驅動裝置，特別是有關於一種具有最低轉速及最高轉速設定的馬達驅動裝置，其係藉由一外部電路來調整輸入的電流，以產生一個固定的轉速設定輸出，再藉由PWM脈波訊號來做同歩運算，使得馬達操作在最低轉速及最高轉速設定時，不會在隨著PWM輸入訊號做改變，藉此更進一歩的來增加馬達應用的靈活度；此外，本發明之馬達驅動裝置可以使用在單相馬達及三相馬達。The present invention relates to a driving device for a motor, and more particularly to a motor driving device having a minimum rotational speed and a maximum rotational speed setting, wherein an input circuit is used to adjust an input current to generate a fixed rotational speed setting output. The PWM pulse signal is used for the same operation, so that the motor operation at the minimum speed and the maximum speed setting will not change with the PWM input signal, thereby further increasing the flexibility of the motor application; Further, the motor driving device of the present invention can be used in a single-phase motor and a three-phase motor.

近年來，個人電腦（Personal Computer，PC）、可攜式電腦（Portable Computer/Note-Boob，NB）或是工作站（Work Station）之快速化發展，使得運算晶片之運作速度急遽上升，例如：中央處理單元(Central Processor Unit，CPU)、數位訊號處理器(Digital Signal Processor，DSP)。因此，隨著晶片動作速度的增加，亦使得時脈頻率變高，造成晶片產生大量的熱。然而，高熱會引起以下問題：導致晶片運算不正常，或者對周圍電路產生影響。因此，晶片之散熱功能成為極其重要之技術。In recent years, the rapid development of personal computers (PCs), portable computers (Portable Computer/Note-Boob, NB) or workstations has made the operation speed of computing chips soaring, for example, the central Central Processor Unit (CPU), Digital Signal Processor (DSP). Therefore, as the speed of operation of the wafer increases, the clock frequency also becomes high, causing a large amount of heat to be generated in the wafer. However, high heat causes problems such as causing wafer operations to be abnormal or affecting surrounding circuits. Therefore, the heat dissipation function of the wafer becomes an extremely important technology.

首先，如圖1所示，一般在以PWM控制馬達驅動的方式中，都是以線性方式隨著PWM之供應電源週期（duty cycle）循序地增加馬達的轉速，因此，其無法根據實際的需求來達到最低轉速設定和(或)最高速設定的功能。例如，在相同的馬達負載下，為了達到最低散熱要求並且減少馬達重新起動所產生的雜訊、噪音時，通常在PWM供應電源週期低到一定值之後(例如：20% duty cycle)，即會希望馬達能夠固定在一個轉速，並且要能夠不要隨著PWM供應電源週期變化來改變轉速；同時，也不要在PWM供應電源週期的輸出小於馬達最低工作力矩(torque)時，造成馬達停止轉動；藉此控制方式來保持最低散熱的要求。很明顯地，此時馬達驅動裝置就需要有最低轉速設定的功能，來維持馬達的最低工作力矩。First, as shown in FIG. 1, generally, in the manner of driving the motor by PWM control, the rotational speed of the motor is sequentially increased in a linear manner with the supply cycle of the PWM, and therefore, it cannot be based on actual needs. To achieve the lowest speed setting and / or the highest speed setting. For example, under the same motor load, in order to achieve the minimum heat dissipation requirement and reduce the noise and noise generated by the motor restart, usually after the PWM power supply cycle is low to a certain value (for example, 20% duty cycle), It is desirable that the motor can be fixed at a speed, and it is necessary to not change the speed with the PWM supply power cycle change; at the same time, do not cause the motor to stop rotating when the output of the PWM supply period is less than the minimum torque of the motor; This control method is used to maintain the minimum heat dissipation requirement. Obviously, the motor drive requires a minimum speed setting to maintain the minimum operating torque of the motor.

另外，在同一馬達負載下，如果要應用在不同的散熱模組時，譬如顯示卡的散熱模組，其所需的散熱能力不需要像CPU散熱模組要求來得高，為了達到散熱和節能的平衡點，多半會重新設計一個新的散熱模組。然而，若馬達驅動裝置能夠提供一個最高轉速的設定時，則在相同的馬達負載下，便可設定其最高的轉速應用，以達到散熱的需求，並且兼顧節能的效用，藉此更進一歩的來增加馬達應用的靈活度。In addition, under the same motor load, if it is to be applied to different heat dissipation modules, such as the heat dissipation module of the display card, the required heat dissipation capability does not need to be as high as the CPU heat dissipation module requirements, in order to achieve heat dissipation and energy saving. At the balance point, most of the new thermal modules will be redesigned. However, if the motor drive can provide a maximum speed setting, then the highest speed application can be set under the same motor load to meet the heat dissipation requirements, and the energy-saving effect can be taken into account. To increase the flexibility of the motor application.

依據先前技術所存在之PWM控制馬達驅動的方式在實際操作上的限制情形，本發明之一主要目的在提供一種具有最低轉速設定的馬達驅動裝置，藉由一外部電路對馬達轉速的設定後，使得馬達可以操作在最低轉速，用以避免於PWM驅動訊號的脈波週期小於馬達最低工作力矩(torque)時，造成馬達停止轉動；藉此控制方式來保持最低散熱的要求。According to the limitation of the practical operation of the PWM control motor driving mode existing in the prior art, one of the main objects of the present invention is to provide a motor driving device having a minimum rotational speed setting, after setting the motor rotational speed by an external circuit. The motor can be operated at the minimum speed to prevent the motor from stopping when the pulse period of the PWM drive signal is less than the minimum torque of the motor; this control method is used to maintain the minimum heat dissipation requirement.

本發明之另一主要目的在提供一種具有最高轉速設定的馬達驅動裝置，藉由一外部電路對馬達轉速的設定後，使得馬達可以操作在最高轉速；故當馬達驅動裝置能夠提供一個最高轉速的設定時，可以在相同的馬達負載下，達到最高的轉速應用，以達到散熱的需求。Another main object of the present invention is to provide a motor driving device having a maximum rotational speed setting, which can be operated at a maximum rotational speed by setting an external circuit to a motor rotational speed; therefore, when the motor driving device can provide a maximum rotational speed When set, the highest speed application can be achieved under the same motor load to meet the heat dissipation requirements.

本發明之再一主要目的在提供一種具有最低轉速及最高轉速設定的馬達驅動裝置，藉由一外部電路對馬達轉速的設定後，使得馬達可以操作在最低轉速或最高轉速；於馬達操作在最低轉速時，用以避免於PWM驅動訊號的脈波週期小於馬達最低工作力矩(torque)時，造成馬達停止轉動，藉此控制方式來保持最低散熱的要求並且兼顧節能的效用；於馬達操作在最高轉速時，可以在相同的馬達負載下，達到最高的轉速應用，以達到散熱的需求。Still another main object of the present invention is to provide a motor driving device having a minimum rotational speed and a maximum rotational speed setting, wherein the motor can be operated at a minimum rotational speed or a maximum rotational speed by setting an external circuit to the motor rotational speed; When the speed is used, it is avoided that the pulse period of the PWM driving signal is less than the minimum working torque of the motor, causing the motor to stop rotating, thereby controlling the way to maintain the minimum heat dissipation requirement and taking into account the energy saving effect; At the same speed, the highest speed can be achieved under the same motor load to meet the heat dissipation requirements.

本發明之還有一主要目的在提供一種具有最低轉速及最高轉速設定的馬達驅動裝置，藉由至少一個外部電路對馬達轉速的設定後，使得馬達操作在最低轉速或最高轉速時，完全不受到外部系統所提供的PWM驅動訊號之影響；藉此更進一歩的來增加馬達應用的靈活度。Still another object of the present invention is to provide a motor driving device having a minimum rotational speed and a maximum rotational speed setting, wherein the motor is operated at the lowest rotational speed or the highest rotational speed without any external control by setting the motor rotational speed by at least one external circuit. The effect of the PWM drive signal provided by the system; thereby further increasing the flexibility of the motor application.

依據上述之各項目的，本發明提供一種馬達轉速設定裝置，包括：一個PWM訊號產生電路，其輸入端與PWM驅動訊號連接，並由輸出端輸出一個與PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；一個轉速電流設定電路，其輸入端與一個電路連接，藉由調整電路來控制轉速電流設定電路輸出一個電流；一個轉速訊號產生電路，其輸入端與轉速電流設定電路所輸出的電流連接，並由輸出端輸出一個由高電位改變為低電位的脈波訊號（P_MINR/P_MAXR）；一個RS閂鎖電路，其第一輸入端與PWM訊號產生電路所輸出之PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其第二輸入端與轉速訊號產生電路所輸出之脈波訊號（P_MINR/P_MAXR）連接，並由第一輸出端輸出一個第一固定週期的脈波訊號（VMINR/VMAXR），由第二輸出端輸出一個第二固定週期的脈波訊號（VSET ）至轉速訊號產生電路的第二輸入端；及一個邏輯閘，其第一輸入端與PWM驅動訊號連接，其第二輸入端與RS閂鎖電路的第一輸出端所輸出的第一固定週期的脈波訊號（VMINR/VMAXR）連接，以輸出一個馬達轉速之控制訊號。According to the above items, the present invention provides a motor speed setting device, comprising: a PWM signal generating circuit, wherein an input end is connected to a PWM driving signal, and a pulse wave synchronized with a trigger signal of the PWM driving signal is outputted from the output end. Signal (P_PWM); a speed current setting circuit, the input end of which is connected to a circuit, and the adjusting current circuit controls the speed current setting circuit to output a current; a speed signal generating circuit whose input end and the speed current setting circuit output The current is connected, and a pulse signal (P_MINR/P_MAXR) which changes from a high potential to a low potential is outputted from the output terminal; an RS latch circuit is triggered by the first input end and the PWM driving signal outputted by the PWM signal generating circuit The signal-synchronized pulse wave signal (P_PWM) is connected, the second input end is connected with the pulse signal (P_MINR/P_MAXR) outputted by the speed signal generating circuit, and the first output end outputs a pulse signal of the first fixed period. (VMINR/VMAXR), the second output terminal outputs a second fixed period pulse signal (V SET ) to the rotation speed a second input end of the signal generating circuit; and a logic gate, wherein the first input end is connected to the PWM driving signal, and the second input end and the first output end of the RS latching circuit output the first fixed period pulse wave The signal (VMINR/VMAXR) is connected to output a control signal of the motor speed.

本發明提供另一種馬達驅動裝置，是由一個馬達轉速設定裝置及一個輸出單元所形成，而輸出單元與馬達轉速設定裝置之輸出端連接，其中，馬達轉速設定裝置包括：一個PWM訊號產生電路，其輸入端與PWM驅動訊號連接，並由輸出端輸出一個與PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；一個轉速電流設定電路，其輸入端與一個電路連接，藉由調整電路來控制轉速電流設定電路輸出一個電流；一個轉速訊號產生電路，其輸入端與轉速電流設定電路所輸出的電流連接，並由輸出端輸出一個脈波訊號（P_MINR/P_MAXR）；一個RS閂鎖電路，其第一輸入端與PWM訊號產生電路所輸出之PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其第二輸入端與轉速訊號產生電路所輸出之脈波訊號（P_MINR/P_MAXR）連接，並由第一輸出端輸出一個第一固定週期的脈波訊號（VMINR/VMAXR），由第二輸出端輸出一個第二固定週期的脈波訊號（VSET ）至轉速訊號產生電路的第二輸入端；及一個邏輯閘，其第一輸入端與PWM驅動訊號連接，其第二輸入端與RS閂鎖電路的第一輸出端所輸出的第一固定週期的脈波訊號（VMINR/VMAXR）連接，以輸出一個馬達轉速之控制訊號。The present invention provides another motor driving device which is formed by a motor rotation speed setting device and an output unit, and the output unit is connected to an output end of the motor rotation speed setting device, wherein the motor rotation speed setting device comprises: a PWM signal generation circuit. The input end is connected with the PWM driving signal, and the output end outputs a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal; a speed current setting circuit, the input end of which is connected with a circuit, by adjusting the circuit The control speed current setting circuit outputs a current; a speed signal generating circuit whose input end is connected with the current outputted by the speed current setting circuit, and outputs a pulse signal (P_MINR/P_MAXR) from the output end; an RS latch circuit, The first input end is connected with a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal outputted by the PWM signal generating circuit, and the second input end and the pulse signal (P_MINR/P_MAXR) output by the rotational speed signal generating circuit are connected. Connected and output a pulse signal of the first fixed period by the first output (VM INR/VMAXR), the second output terminal outputs a second fixed period pulse signal (V SET ) to the second input end of the speed signal generating circuit; and a logic gate whose first input is connected to the PWM driving signal The second input terminal is connected to the first fixed period pulse signal (VMINR/VMAXR) outputted by the first output end of the RS latch circuit to output a control signal of the motor speed.

本發明接著再提供一種馬達驅動裝置，是由一馬達轉速設定裝置及一輸出單元所形成，而輸出單元與馬達轉速設定裝置之輸出端連接，其中，馬達轉速設定裝置包括：一PWM訊號產生電路，其輸入端與一PWM驅動訊號連接，並由輸出端輸出一個與PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；一最低轉速設定裝置，其第一輸入端與PWM訊號產生電路所輸出之PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其第二輸入端與第一電路連接，並輸出一個第一固定週期的脈波訊號（VMINR）；一最高轉速設定裝置，其第一輸入端與PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其第二輸入端與第二電路連接，並輸出一個第二固定週期的脈波訊號（VMAXR）；一OR邏輯閘，其第一輸入端與PWM訊號產生電路所輸出之PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其第二輸入端與第一固定週期的脈波訊號（VMINR）連接，並由輸出端輸出一個第一控制訊號（PWM_MIN）；一AND邏輯閘，其第一輸入端與第一控制訊號（PWM_MIN）連接，其第二輸入端與第二固定週期的脈波訊號（VMAXR）連接，並由輸出端輸出一個第二控制訊號（PWM_MIN_MAX）至輸出單元。The present invention further provides a motor driving device which is formed by a motor rotation speed setting device and an output unit, and the output unit is connected to an output end of the motor rotation speed setting device, wherein the motor rotation speed setting device comprises: a PWM signal generation circuit The input end is connected with a PWM driving signal, and the output end outputs a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal; a minimum speed setting device, the first input end and the PWM signal generating circuit The output PWM signal is triggered by a pulse signal (P_PWM) connected to the trigger signal, and the second input terminal is connected to the first circuit, and outputs a first fixed period pulse signal (VMINR); a maximum speed setting device, The first input end is connected with a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal outputted by the PWM signal generating circuit, and the second input end is connected with the second circuit, and outputs a second fixed period pulse. Wave signal (VMAXR); an OR logic gate, triggered by the first input terminal and the PWM driving signal output by the PWM signal generating circuit No. synchronous pulse signal (P_PWM) connection, the second input end is connected with the first fixed period pulse signal (VMINR), and the output end outputs a first control signal (PWM_MIN); an AND logic gate, The first input terminal is connected to the first control signal (PWM_MIN), the second input terminal is connected to the second fixed period pulse signal (VMAXR), and the output terminal outputs a second control signal (PWM_MIN_MAX) to the output unit.

本發明主要是揭露一種具有最低轉速及最高轉速設定的馬達驅動裝置，藉由一外部電路對馬達轉速的設定後，使得馬達可以操作在最低轉速及最高轉速。由於本發明是於一般馬達驅動裝置中增加一種最低轉速設定和(或)一個最高轉速設定電路來達成；故對於馬達驅動裝置中的馬達控制電路（至少包括：磁滯裝置、防鎖死判斷裝置及計數裝置等）以及馬達輸出單元電路等，是與先前技術所使用者相同，故對馬達控制電路及馬達輸出單元的詳細電路並未表示於圖中。此外，下述內文中之圖式，亦並未依據實際之相關尺寸完整繪製，其作用僅在表達與本創作特徵有關之示意圖。The invention mainly discloses a motor driving device with a minimum rotation speed and a maximum rotation speed setting. After setting the motor rotation speed by an external circuit, the motor can be operated at the minimum rotation speed and the maximum rotation speed. Since the present invention is achieved by adding a minimum speed setting and/or a maximum speed setting circuit to a general motor driving device, the motor control circuit in the motor driving device (including at least: hysteresis device, anti-locking judging device) The circuit and the motor output unit circuit and the like are the same as those of the prior art, so the detailed circuit of the motor control circuit and the motor output unit is not shown in the figure. In addition, the drawings in the following texts are not completely drawn according to the actual relevant dimensions, and their functions are only to express the schematic diagram related to the present creative features.

首先，請參考圖2，是本發明之具有最低轉速設定電路的馬達驅動裝置實施例之示意圖。如圖2所示，本發明之馬達驅動裝置10包括霍爾偏壓110、輸出單元200及最低轉速設定裝置300等所組成。當馬達驅動裝置10被起動後，會由馬達驅動裝置10外部的系統提供一個高電位之PWM驅動訊號（PWM_IN）30，此高電位之PWM驅動訊號（PWM_IN）30（如圖3之PWM_IN驅動訊號波形所示）會經過最低轉速設定裝置300的處理後，產生一個PWM最低轉速訊號（如圖3之PWM_MIN最低轉速控制訊號波形所示）並輸出到控制單元130，再由控制單元130來控制輸出單元200以驅動馬達40轉動。當馬達40開始轉動後，位於馬達40上的霍爾元件20會將馬達40之轉動時的換相訊號送到馬達驅動裝置10中的磁滯裝置（未顯示於圖2中）中，用以判斷馬達40是否持續的在轉動。接著，霍爾元件20之第1端子經由電阻21與施加有霍爾偏壓110之電源線相連接，其第2端子經由電阻22接地。很明顯地，霍爾元件20之第1輸出端及第2輸出端所輸出的霍爾訊號之位準隨著馬達40轉子之位置而改變。First, please refer to FIG. 2, which is a schematic diagram of an embodiment of a motor driving device with a minimum speed setting circuit of the present invention. As shown in FIG. 2, the motor driving device 10 of the present invention comprises a Hall bias 110, an output unit 200, a minimum rotational speed setting device 300, and the like. When the motor driving device 10 is started, a high-potential PWM driving signal (PWM_IN) 30 is provided by a system external to the motor driving device 10, and the high-potential PWM driving signal (PWM_IN) 30 (such as the PWM_IN driving signal of FIG. 3) After the processing of the minimum speed setting device 300, a PWM minimum speed signal (shown as the PWM_MIN minimum speed control signal waveform of FIG. 3) is generated and output to the control unit 130, and then controlled by the control unit 130. The unit 200 is rotated by the drive motor 40. When the motor 40 starts to rotate, the Hall element 20 on the motor 40 sends a commutation signal when the motor 40 rotates to a hysteresis device (not shown in FIG. 2) in the motor driving device 10 for It is judged whether or not the motor 40 is continuously rotating. Next, the first terminal of the Hall element 20 is connected to the power supply line to which the Hall bias 110 is applied via the resistor 21, and the second terminal is grounded via the resistor 22. Obviously, the level of the Hall signal outputted by the first output terminal and the second output terminal of the Hall element 20 changes with the position of the rotor of the motor 40.

請繼續請參考圖2及圖3，其中圖3為圖2之最低轉速設定裝置中的訊號示意圖。本發明之最低轉速設定裝置300是由一個PWM訊號產生電路（PWM signal pulse generator circuit）310、一個轉速電流設定電路(rotation speed current setting circuit）320，在本實施例中，此轉速電流設定電路稱為最低轉速電流設定電路（MINR current setting circuit）、一個轉速訊號產生電路（rotation speed generator circuit）330，在本實施例中，此轉速電流設定電路稱為最低轉速產生電路（MINR rotation speed generator circuit）、一個RS閂鎖電路340及一個OR邏輯閘（OR Gate）350所組成。Please refer to FIG. 2 and FIG. 3, wherein FIG. 3 is a schematic diagram of signals in the minimum speed setting device of FIG. The minimum speed setting device 300 of the present invention is composed of a PWM signal pulse generator circuit 310 and a rotation speed current setting circuit 320. In this embodiment, the speed current setting circuit is called It is a minimum speed current setting circuit (MINR current setting circuit) and a rotation speed generator circuit 330. In this embodiment, the speed current setting circuit is called a MINR rotation speed generator circuit. An RS latch circuit 340 and an OR gate 350 are formed.

如圖2所示，當外部系統所提供的高電位之PWM驅動訊號30（如圖3中的PWM_IN驅動訊號波形所示）進入至最低轉速設定電路300後，其由PWM訊號產生電路310之輸入端進入，然後由PWM訊號產生電路310的輸出端輸出一個P_PWM訊號（如圖3中的P_PWM訊號波形所示）；接著，最小轉速電流設定電路320之輸入端與一個外接電路400（例如：此外接電路400可以是一個可以依據系統需求而改變的電阻）連接，並經由調整外接電路400以產生一個設定之電流後，將此一設定電流輸出至最低轉速產生電路330的輸入端，再由最低轉速產生電路330的輸出端來輸出一個P_MINR訊號（如圖3中的P_MINR訊號波形所示）；之後，將PWM訊號產生電路310所產生的P_PWM訊號及最低轉速產生電路330所產生的P_MINR訊號一起送至RS閂鎖電路340中，使得RS閂鎖電路340產生一個固定週期的VMINR脈波訊號（如圖3中的VMINR脈波訊號波形所示），此VMINR脈波訊號即為最低轉速設定電壓；最後，VMINR脈波訊號會再和PWM驅動訊號30（PWM_IN）進行OR的運算後，產生一個PWM_MIN訊號（如圖3中的PWM_MIN最低轉速控制訊號波形所示）輸出到控制單元130，藉以控制馬達40轉動；其中，當PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR訊號的脈波週期時，藉由VMINR脈波訊號和PWM驅動訊號30（PWM_IN）進行OR的運算後，由OR邏輯閘350輸出一個PWM_MIN訊號來驅動馬達40轉動，此時的PWM_MIN訊號即為最低轉速的控制訊號，即以VMINR脈波訊號來驅動馬達40轉動；當PWM驅動訊號30（PWM_IN）的脈波週期大於VMINR訊號的脈波週期時，藉由VMINR脈波訊號和PWM驅動訊號進行OR的運算後，由OR邏輯閘350輸出一個PWM_MIN訊號，此時，馬達40的轉動即由PWM驅動訊號30（PWM_IN）來控制轉速。As shown in FIG. 2, when the high-potential PWM driving signal 30 (shown by the PWM_IN driving signal waveform in FIG. 3) provided by the external system enters the minimum speed setting circuit 300, it is input by the PWM signal generating circuit 310. The terminal enters, and then an output of the PWM signal generating circuit 310 outputs a P_PWM signal (as shown by the P_PWM signal waveform in FIG. 3); then, the input terminal of the minimum speed current setting circuit 320 and an external circuit 400 (for example: The connection circuit 400 can be a resistor that can be changed according to system requirements, and after adjusting the external circuit 400 to generate a set current, the set current is output to the input end of the minimum speed generation circuit 330, and then the lowest The output of the rotational speed generating circuit 330 outputs a P_MINR signal (as shown by the P_MINR signal waveform in FIG. 3); thereafter, the P_PWM signal generated by the PWM signal generating circuit 310 and the P_MINR signal generated by the minimum rotational speed generating circuit 330 are together. The RS latch circuit 340 is sent to the RS latch circuit 340 to generate a fixed period of VMINR pulse signals (such as the VMINR pulse in FIG. 3). As shown in the signal waveform, the VMINR pulse signal is the lowest speed setting voltage; finally, the VMINR pulse signal is ORed with the PWM drive signal 30 (PWM_IN) to generate a PWM_MIN signal (as in Figure 3). The PWM_MIN minimum speed control signal waveform is output to the control unit 130, thereby controlling the rotation of the motor 40; wherein, when the pulse period of the PWM driving signal 30 (PWM_IN) is less than the pulse period of the VMINR signal, the VMINR pulse signal is used. After the OR operation is performed with the PWM driving signal 30 (PWM_IN), a PWM_MIN signal is output from the OR logic gate 350 to drive the motor 40 to rotate. The PWM_MIN signal at this time is the control signal of the lowest speed, that is, driven by the VMINR pulse signal. The motor 40 rotates; when the pulse period of the PWM driving signal 30 (PWM_IN) is greater than the pulse period of the VMINR signal, after the OR operation is performed by the VMINR pulse signal and the PWM driving signal, a PWM_MIN signal is output by the OR logic gate 350. At this time, the rotation of the motor 40 is controlled by the PWM drive signal 30 (PWM_IN).

很明顯地，當最低轉速電流設定電路320之輸入端與一個外接電路400之可變電阻（RMSR ）連接後，經由適當地調整可變電阻RMSR 的電阻值後，可以使得控制馬達轉速的PWM_MIN訊號的前段轉速（即當PWM驅動訊號30的脈波週期小於VMINR脈波週期之區間；約10~30%）不受外部系統提供之PWM驅動訊號30的控制（如圖3之PWM_MIN最低轉速控制訊號波形所示），而是依據VMINR脈波訊號來控制馬達的轉速；過了這個區間後，馬達轉速則會隨PWM驅動訊號30（PWM_IN）的控制加速至100%。若將外接電路400形成開路（即將可變電阻調整至無限大時）後，則會使得馬達轉速完全受PWM驅動訊號30（PWM_IN）的控制。Obviously, after the input end of the minimum speed current setting circuit 320 is connected to the variable resistor (R MSR ) of an external circuit 400, the motor speed can be controlled by appropriately adjusting the resistance value of the variable resistor R MSR . The front speed of the PWM_MIN signal (that is, the pulse period of the PWM drive signal 30 is less than the period of the VMINR pulse period; about 10~30%) is not controlled by the PWM drive signal 30 provided by the external system (as shown in Figure 3, the PWM_MIN minimum speed) The control signal waveform is shown), but the motor speed is controlled according to the VMINR pulse signal; after this interval, the motor speed is accelerated to 100% with the control of the PWM drive signal 30 (PWM_IN). If the external circuit 400 is formed as an open circuit (that is, when the variable resistor is adjusted to infinity), the motor speed is completely controlled by the PWM drive signal 30 (PWM_IN).

接著，詳細說明本實施例之最低轉速設定裝置300的操作過程如下。Next, the operation of the minimum rotation speed setting device 300 of the present embodiment will be described in detail as follows.

首先，請參考圖4，是本實施例中的PWM訊號產生電路示意圖。如圖4所示，當外部系統所提供的高電位之PWM驅動訊號30（PWM_IN）進入至最低轉速設定裝置300後，PWM驅動訊號30（PWM_IN）會先經過PWM訊號產生電路310中的第一反相器3110及第二反相器3120後，輸入到NAND邏輯閘3170的第一輸入端；接著，PWM驅動訊號30（PWM_IN）再經過第三反相器3130後，對電容器3160進行充電後會產生一個delay，再經過第四反相器3140及第五反相器3150後，將另一處理過的訊號輸入到NAND邏輯閘3170的第二輸入端，之後由NAND邏輯閘3170來產生P_PWM訊號；其中P_PWM訊號為一個和PWM驅動訊號30（PWM_IN）之正緣觸發訊號或是負緣觸發訊號同步的小脈波觸發訊號（如圖3中的P_PWM訊號波形所示）。之後，此一P_PWM訊號會輸入到RS閂鎖器340的第一輸入端。First, please refer to FIG. 4, which is a schematic diagram of a PWM signal generating circuit in this embodiment. As shown in FIG. 4, after the high-potential PWM driving signal 30 (PWM_IN) provided by the external system enters the minimum rotational speed setting device 300, the PWM driving signal 30 (PWM_IN) first passes through the first in the PWM signal generating circuit 310. The inverter 3110 and the second inverter 3120 are input to the first input terminal of the NAND logic gate 3170. Then, after the PWM driving signal 30 (PWM_IN) passes through the third inverter 3130, the capacitor 3160 is charged. A delay is generated, and after passing through the fourth inverter 3140 and the fifth inverter 3150, another processed signal is input to the second input terminal of the NAND logic gate 3170, and then the P_PWM is generated by the NAND logic gate 3170. The signal; wherein the P_PWM signal is a small pulse trigger signal synchronized with the positive edge trigger signal of the PWM drive signal 30 (PWM_IN) or the negative edge trigger signal (as shown by the P_PWM signal waveform in FIG. 3). Thereafter, the P_PWM signal is input to the first input of the RS latch 340.

請參考圖5，是本實施例中的最低轉速電流設定電路示意圖。如圖5所示，最低轉速電流設定電路320其輸入端是與一個外接電路400連接；在本實施例中，此外接電路400為一個電阻（RMSR ）。由圖5之電路可以得知分壓點VA 經過第一電晶體3210和第二電晶體3220所產生的電位移轉（level-shift）後，可以得到一個IMSR 電流，其中IMSR 電流可以由分壓點VA 除以電阻（RMSR ）而得到，即IMSR =VA /RMSR 。接著，所產生的IMSR 電流會經過一個電流鏡電路（是由電晶體3230和電晶體3240所組成的），最後傳送到最低轉速產生電路330。Please refer to FIG. 5, which is a schematic diagram of a minimum speed current setting circuit in this embodiment. As shown in FIG. 5, the input terminal of the minimum speed current setting circuit 320 is connected to an external circuit 400; in the embodiment, the external circuit 400 is a resistor (R MSR ). It can be seen from the circuit of FIG. 5 that after the voltage division point V A is level-shifted by the first transistor 3210 and the second transistor 3220, an I MSR current can be obtained, wherein the I MSR current can be It is obtained by dividing the voltage dividing point V A by the resistance (R MSR ), that is, I MSR =V A /R MSR . Next, the generated I MSR current is passed through a current mirror circuit (which is composed of transistor 3230 and transistor 3240) and finally to the minimum speed generating circuit 330.

請參考圖6，是本實施例中的最低轉速產生電路示意圖。如圖6所示，當最低轉速電流設定電路320所產生的IMSR 電流進入至最低轉速產生電路330後，IMSR 電流會對電容C2進行充電的動作。由此可知，最低轉速產生電路320是經由電阻（RMSR ）設定所產生的IMSR 電流來決定，並據以決定最低轉速設定的大小了。Please refer to FIG. 6, which is a schematic diagram of the minimum rotation speed generating circuit in this embodiment. As shown in FIG. 6, when the I MSR current generated by the minimum rotational current setting circuit 320 enters the minimum rotational speed generating circuit 330, the I MSR current charges the capacitor C2. From this, it can be seen that the minimum rotational speed generating circuit 320 is determined by the I MSR current generated by the resistance (R MSR ) setting, and the magnitude of the minimum rotational speed setting is determined accordingly.

最低轉速產生電路330，由一個比較器3310的第一輸入端點連接到電阻R4、電阻R5及電阻R6所產生的分壓來設定電容器3320（C2 ）的充電電位，再將IMSR 電流對電容器3320（C2 ）所得到的充電電壓連接到比較器3310的第二輸入端；當VSET 為一個高電位時，使得電晶體3330會被導通（ON），所以IMSR 電流會被電晶體3330導通至接地點，此時IMSR 並不會對電容器3320（C2 ）充電；而當VSET 由高電位變成低電位時，電晶體3330不會被導通（即OFF），此時IMSR 電流就會開始對電容器3320（C2 ）做充電的動作，其充電之波形如圖3圖之Cap示意圖；一直到電容器3320（C2 ）的充電電壓大於電阻R4、電阻R5及電阻R6所產生的分壓電壓後，此時比較器3310會輸出一個P-_MINR的脈波訊號；在本實施例的圖3中，此一P_MINR脈波訊號會產生一個由高電位改變為低電位的脈波訊號；然而，此P_MINR脈波訊號也可以是一個由低電位改變為高電位的脈波訊號（未顯示於圖3中），對此，都可以適用在本實施例中。The minimum speed generating circuit 330 sets the charging potential of the capacitor 3320 (C 2 ) by the voltage division generated by the first input terminal of the comparator 3310 connected to the resistor R4, the resistor R5 and the resistor R6, and then sets the I MSR current pair. The charging voltage obtained by the capacitor 3320 (C 2 ) is connected to the second input terminal of the comparator 3310; when V SET is at a high potential, the transistor 3330 is turned on (ON), so the I MSR current is blocked by the transistor. 3330 is turned on to the ground point, at which time I MSR does not charge capacitor 3320 (C 2 ); and when V SET changes from high to low, transistor 3330 is not turned on (ie, OFF), at this time I MSR The current will start to charge the capacitor 3320 (C 2 ), and the charging waveform is shown in Figure 3; the charging voltage of the capacitor 3320 (C 2 ) is greater than that generated by the resistor R4, the resistor R5 and the resistor R6. After the divided voltage, the comparator 3310 outputs a pulse signal of P-_MINR; in FIG. 3 of the embodiment, the P_MINR pulse signal generates a pulse wave that changes from a high potential to a low potential. Signal; however, this P_MINR pulse wave It may be changed from a low level to a high potential pulse signal (not shown in FIG. 3), which are applicable in the present embodiment.

之後，將P_MINR訊號輸入到RS閂鎖電路340的第二輸入端，並將NAND邏輯閘3170所產生的P_PWM訊號輸入到RS閂鎖電路340的第一輸入端，使得P_MINR訊號與P_PWM訊號進行運算後，由RS閂鎖電路340的第一輸出端產生一個固定週期的V-MINR脈波訊號。另外，RS閂鎖電路340的第二輸出端訊號會將P_PWM訊號經過一個反相器後，將反相的P_PWM訊號送至OR邏輯閘360並與RS閂鎖電路340的第三輸端的VMINR脈波訊號做一個OR運算，以輸出另一個固定週期的脈波訊號VSET ，其中VSET 的脈波訊號的相位是與V-MINR脈波訊號相反；而VSET 脈波訊號是用來決定電晶體3330是否導通；例如，當VSET 的脈波訊號為一高電位時，可使電晶體3330導通，並瞬間將電容器3320（C2 ）上的電壓放電到接地點（GND）的電位；直到下一次的P_PWM訊號由高電位改變至低電位時，才會將電晶體3330再次的關閉（即OFF），使電容器3320（C2 ）開始充電。同時，PWM驅動訊號30也會輸入到OR邏輯閘350的第一輸入端，並將RS閂鎖電路340所輸出的V-MINR脈波訊號輸入至OR邏輯閘350的第二輸入點後，OR邏輯閘350即會輸出PWM_MIN的訊號（如圖3中的PWM_MIN訊號波形所示），此PWM_MIN訊號即為在PWM驅動訊號30（PWM_IN）以及調整外接電路400所設定的最小電流後所產生的最低轉速設定訊號，此一輸出訊號送到馬達驅動控制電路200，就可以控制馬達40的轉速；當PWM驅動訊號30（PWM_IN）的脈波週期小於RS閂鎖電路340所輸出的V-MINR脈波訊號時，藉由VMINR脈波訊號和PWM驅動訊號30（PWM_IN）通過OR邏輯閘350的動作運算後，即會輸出一個與VMINR脈波訊號相同的脈波訊號來控制馬達40以最低轉速轉動；很明顯地，此PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR脈波訊號的區間，約在PWM_MIN訊號前10~30%的區間(即可依據不同系統需求，做10%~30%的最低轉速調整)，如圖7所標示的最低轉速設定區間做最低轉速的調整。而當PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路340 所輸出的V-MINR脈波訊號時，藉由VMINR脈波訊號和PWM驅動訊號30（PWM_IN）通過OR邏輯閘350的動作運算後，即會輸出一個與PWM驅動訊號30（PWM_IN）相同的訊號來控制馬達40的轉動；很明顯地，當PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路340所輸出的V-MINR脈波訊號的區間後，馬達轉速則會隨PWM驅動訊號30（PWM_IN）的控制加速至100%。Then, the P_MINR signal is input to the second input end of the RS latch circuit 340, and the P_PWM signal generated by the NAND logic gate 3170 is input to the first input end of the RS latch circuit 340, so that the P_MINR signal and the P_PWM signal are operated. Thereafter, a fixed period of V-MINR pulse signals is generated by the first output of the RS latch circuit 340. In addition, the second output signal of the RS latch circuit 340 passes the P_PWM signal through an inverter, and sends the inverted P_PWM signal to the OR logic gate 360 and the VMINR of the third input of the RS latch circuit 340. The wave signal performs an OR operation to output another fixed period pulse signal V SET , wherein the phase of the pulse signal of V SET is opposite to the V-MINR pulse signal; and the V SET pulse signal is used to determine the power. Whether the crystal 3330 is turned on; for example, when the pulse signal of V SET is at a high potential, the transistor 3330 can be turned on, and the voltage on the capacitor 3320 (C 2 ) is instantaneously discharged to the potential of the ground point (GND); When the next P_PWM signal changes from a high level to a low level, the transistor 3330 is turned off (ie, OFF) again, causing the capacitor 3320 (C 2 ) to start charging. At the same time, the PWM driving signal 30 is also input to the first input end of the OR logic gate 350, and the V-MINR pulse signal outputted by the RS latching circuit 340 is input to the second input point of the OR logic gate 350, OR The logic gate 350 outputs a PWM_MIN signal (as shown by the PWM_MIN signal waveform in FIG. 3), and the PWM_MIN signal is the minimum generated after the PWM drive signal 30 (PWM_IN) and the minimum current set by the external circuit 400 is adjusted. The rotation speed setting signal, the output signal is sent to the motor drive control circuit 200, and the rotation speed of the motor 40 can be controlled; when the pulse period of the PWM drive signal 30 (PWM_IN) is smaller than the V-MINR pulse output by the RS latch circuit 340 During the signal, after the operation of the OR logic gate 350 is performed by the VMINR pulse signal and the PWM drive signal 30 (PWM_IN), a pulse signal identical to the VMINR pulse signal is output to control the motor 40 to rotate at the minimum speed; Obviously, the pulse period of the PWM drive signal 30 (PWM_IN) is smaller than the interval of the VMINR pulse signal, which is about 10~30% before the PWM_MIN signal (it can be 10%~30% according to different system requirements). Minimum speed adjustment ), Indicated 7 in FIG minimum frequency setting interval of the minimum speed to make adjustments. When the pulse period of the PWM driving signal 30 (PWM_IN) is greater than the V-MINR pulse signal output by the RS latch circuit 340, the VMINR pulse signal and the PWM driving signal 30 (PWM_IN) pass through the OR logic gate 350. After the operation operation, a signal similar to the PWM drive signal 30 (PWM_IN) is output to control the rotation of the motor 40; obviously, the pulse period of the PWM drive signal 30 (PWM_IN) is greater than the output of the RS latch circuit 340. After the interval of the V-MINR pulse signal, the motor speed is accelerated to 100% with the control of the PWM drive signal 30 (PWM_IN).

根據上述之說明，在本發明之具有最低轉速設定電路的馬達驅動裝置中，當最低轉速電流設定電路320之輸入端與一個外接電路400之可變電阻（RMSR ）連接後，經由適當地調整可變電阻RMSR 的電阻值後，可以使得控制馬達轉速的PWM_MIN訊號的前段轉速（即當PWM驅動訊號30的脈波週期小於VMINR脈波訊號的區間；約在PWM_MIN訊號前段的10~30%區間）不受外部系統提供之PWM驅動訊號30（PWM_IN）的控制，而是依據VMINR脈波訊號來控制馬達的轉速（如圖3之PWM_MIN訊號的前段約10~30%區間所示）；過了這個區間後，馬達轉速則會隨PWM驅動訊號30（PWM_IN）的控制加速至100%。若將外接電路400形成開路（即將可變電阻調整至無限大時）後，使得最低轉速電流設定電路320不會產生IMSR 電流的輸出，故無法對最低轉速產生電路330中的電容器3320（C2 ）進行充電，故使得馬達轉速完全受PWM驅動訊號30的控制。According to the above description, in the motor drive device having the lowest rotational speed setting circuit of the present invention, after the input terminal of the minimum rotational speed current setting circuit 320 is connected to the variable resistor (R MSR ) of an external circuit 400, it is appropriately adjusted. After the resistance value of the variable resistor R MSR , the front speed of the PWM_MIN signal for controlling the motor speed can be made (that is, when the pulse period of the PWM driving signal 30 is smaller than the interval of the VMINR pulse signal; about 10~30% of the front part of the PWM_MIN signal) The interval is not controlled by the PWM drive signal 30 (PWM_IN) provided by the external system, but the speed of the motor is controlled according to the VMINR pulse signal (as shown in the range of 10~30% of the front part of the PWM_MIN signal in Fig. 3); After this interval, the motor speed is accelerated to 100% with the control of PWM drive signal 30 (PWM_IN). When the external circuit 400 is formed as an open circuit (that is, when the variable resistor is adjusted to infinity), the minimum speed current setting circuit 320 does not generate an output of the I MSR current, so the capacitor 3320 in the minimum rotation speed generating circuit 330 cannot be used. 2 ) Charging is performed so that the motor speed is completely controlled by the PWM driving signal 30.

根據本發明之具有最低轉速設定電路的馬達驅動裝置，藉由至少一個外部電路對馬達轉速的設定後，可以避免於PWM驅動訊號30的脈波週期小於馬達最低工作力矩(torque)時，造成馬達停止轉動；藉此控制方式來保持最低散熱的要求。此外，當馬達操作在最低轉速時，完全不受到外部系統所提供的PWM驅動訊號之影響；藉此更進一歩的來增加馬達應用的靈活度。According to the motor driving device with the minimum rotation speed setting circuit of the present invention, after the motor rotation speed is set by at least one external circuit, the motor can be prevented from being caused when the pulse period of the PWM driving signal 30 is less than the minimum working torque of the motor. Stop rotation; this control method is used to maintain the minimum heat dissipation requirement. In addition, when the motor is operated at the lowest speed, it is completely unaffected by the PWM drive signal provided by the external system; thereby further increasing the flexibility of the motor application.

請繼續請參考圖8及圖9，其中圖8是本發明之具有最高轉速設定裝置的馬達驅動裝置實施例之示意圖，而圖9為圖8之最高轉速設定裝置中的訊號示意圖。本發明之馬達驅動裝置11包括霍爾偏壓110、輸出單元200及最高轉速設定裝置500等所組成；很明顯地，圖8之實施例與圖2之實施例之間的差異僅在於：圖8實施例的馬達驅動裝置11中是配置一個最高轉速設定裝置500，且最高轉速設定裝置500之輸出端是藉由一個AND邏輯閘550來輸出一個最高轉速的控制訊號PWM_MAX（而圖2的馬達驅動裝置10中是配置一個最低轉速設定裝置300，且最最低轉速設定裝置300之輸出端是藉由一個OR邏輯閘350來輸出一個最低轉速的控制訊號PWM_MIN）；換句話說，圖8之實施例與圖2之實施例只有在最高轉速設定裝置500及最低轉速設定裝置300的輸出端使用不同的邏輯閘來產生控制訊號；故圖8與圖2之實施例的其他部份的電路結構及操作原理是相同的，不再贅述之。Please refer to FIG. 8 and FIG. 9. FIG. 8 is a schematic diagram of an embodiment of a motor driving device with a maximum rotation speed setting device according to the present invention, and FIG. 9 is a schematic diagram of signals in the maximum rotation speed setting device of FIG. The motor driving device 11 of the present invention comprises a Hall bias 110, an output unit 200, and a maximum rotational speed setting device 500; obviously, the difference between the embodiment of FIG. 8 and the embodiment of FIG. 2 is only: In the motor driving device 11 of the eighth embodiment, a maximum rotational speed setting device 500 is disposed, and the output of the highest rotational speed setting device 500 outputs a maximum rotational speed control signal PWM_MAX by an AND logic gate 550 (and the motor of FIG. 2). In the driving device 10, a minimum speed setting device 300 is disposed, and the output of the lowest speed setting device 300 outputs a minimum speed control signal PWM_MIN by an OR logic gate 350; in other words, the implementation of FIG. For example and the embodiment of FIG. 2, only the logic gates are used at the output ends of the maximum speed setting device 500 and the minimum speed setting device 300 to generate control signals; therefore, the circuit structures of other parts of the embodiment of FIG. 8 and FIG. 2 and The principle of operation is the same and will not be described again.

本發明之馬達驅動裝置11中的最高轉速設定裝置500是由一個PWM訊號產生電路（PWM signal pulse generator circuit）510、一個轉速電流設定電路(rotation speed current setting circuit）520，在本實施例中，此轉速電流設定電路稱為最高轉速電流設定電路（MAXR current setting circuit）、一個轉速產生電路（rotation speed generator circuit）530，在本實施例中，此轉速產生電路稱為最高轉速產生電路（MAXR rotation speed generator circuit）、一個RS閂鎖電路540及一個AND邏輯閘（AND Gate）550所組成。The maximum speed setting device 500 in the motor driving device 11 of the present invention is a PWM signal pulse generator circuit 510 and a rotation speed current setting circuit 520. In this embodiment, The speed current setting circuit is called a MAXR current setting circuit and a rotation speed generator circuit 530. In this embodiment, the speed generating circuit is called a maximum speed generating circuit (MAXR rotation). A speed generator circuit, an RS latch circuit 540 and an AND gate 550 are formed.

如圖8所示，當外部系統所提供的高電位之PWM驅動訊號30（如圖9中的PWM_IN驅動訊號波形所示）進入至最高轉速設定裝置500後，其由PWM訊號產生電路510之輸入端進入，然後由PWM訊號產生電路510的輸出端輸出一個P_PWM訊號（如圖9中的P_PWM訊號波形所示）；接著，最高轉速電流設定電路520之輸入端與一個外接電路400（例如：此外接電路400可以是一個電阻）連接，並經由調整外接電路400以產生一個設定之電流後，將此一設定電流輸出至最高轉速產生電路530的輸入端，再由最高轉速產生電路530的輸出端來輸出一個P_MAXR訊號（如圖9中的P_MAXR訊號波形所示）；之後，將PWM訊號產生電路510所產生的P_PWM訊號及最高轉速產生電路530所產生的P_MAXR訊號一起送至RS閂鎖電路540中，使得RS閂鎖電路540產生一個固定週期的VMAXR脈波訊號（如圖9中的VMAXR脈波訊號波形所示），此VMAXR脈波訊號即為最高轉速設定電壓；最後，VMAXR脈波訊號會再和PWM驅動訊號30進行AND的運算後，產生一個PWM_MAX訊號（如圖9中的PWM_MAX最高轉速控制訊號波形所示）輸出到控制單元130，藉以控制馬達40轉動；其中，當PWM驅動訊號30（PWM_IN）的脈波週期小於VMAXR脈波訊號時，藉由VMAXR脈波訊號和PWM驅動訊號30進行AND的運算後，由AND邏輯閘550輸出一個PWM_MAX訊號來驅動馬達40轉動，而此時的PWM_MAX訊號即與PWM驅動訊號30（PWM_IN）相同，並輸出到控制單元130，再由控制單元130來控制輸出單元200來驅動馬達40轉動；很明顯地，在PWM驅動訊號30（PWM_IN）的脈波週期小於VMAXR脈波訊號時，馬達轉速是受PWM驅動訊號30（PWM_IN）的控制；當PWM驅動訊號30（PWM_IN）的脈波週期大於VMAXR脈波訊號時，藉由VMAXR脈波訊號和PWM驅動訊號30（PWM_IN）進行AND的運算後，由AND邏輯閘550輸出一個PWM_MAX訊號，而此PWM_MAX訊號是與V-MAXR脈波訊號相同；也就是說，當PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路540所輸出的V-MAXR脈波訊號時，馬達轉速是受V-MAXR脈波訊號的控制。As shown in FIG. 8, when the high-potential PWM driving signal 30 (shown by the PWM_IN driving signal waveform in FIG. 9) provided by the external system enters the maximum speed setting device 500, it is input by the PWM signal generating circuit 510. The terminal enters, and then a P_PWM signal is outputted from the output of the PWM signal generating circuit 510 (as shown by the P_PWM signal waveform in FIG. 9); then, the input terminal of the highest speed current setting circuit 520 and an external circuit 400 (for example: The connection circuit 400 can be a resistor), and after adjusting the external circuit 400 to generate a set current, the set current is output to the input end of the maximum speed generating circuit 530, and then the output end of the highest speed generating circuit 530. To output a P_MAXR signal (as shown by the P_MAXR signal waveform in FIG. 9); then, the P_PWM signal generated by the PWM signal generating circuit 510 and the P_MAXR signal generated by the highest speed generating circuit 530 are sent to the RS latch circuit 540. The RS latch circuit 540 generates a fixed period of VMAXR pulse signal (as shown by the VMAXR pulse signal waveform in FIG. 9), the VMAXR The wave signal is the maximum speed setting voltage; finally, the VMAXR pulse signal is ANDed with the PWM driving signal 30, and a PWM_MAX signal (shown as the PWM_MAX maximum speed control signal waveform in Fig. 9) is output to the control. The unit 130 is configured to control the rotation of the motor 40. When the pulse period of the PWM driving signal 30 (PWM_IN) is less than the VMAXR pulse signal, the AND operation is performed by the AND operation of the VMAXR pulse signal and the PWM driving signal 30. The gate 550 outputs a PWM_MAX signal to drive the motor 40 to rotate, and the PWM_MAX signal at this time is the same as the PWM driving signal 30 (PWM_IN), and is output to the control unit 130, and then the control unit 130 controls the output unit 200 to drive the motor 40. Rotating; obviously, when the pulse period of the PWM drive signal 30 (PWM_IN) is less than the VMAXR pulse signal, the motor speed is controlled by the PWM drive signal 30 (PWM_IN); when the pulse of the PWM drive signal 30 (PWM_IN) When the period is greater than the VMAXR pulse signal, the AND circuit is outputted by the AND logic gate 550 after the AND operation is performed by the VMAXR pulse signal and the PWM drive signal 30 (PWM_IN). The PWM_MAX signal is the same as the V-MAXR pulse signal; that is, when the pulse period of the PWM drive signal 30 (PWM_IN) is greater than the V-MAXR pulse signal output by the RS latch circuit 540, the motor speed It is controlled by the V-MAXR pulse signal.

很明顯地，當最高轉速電流設定電路520之輸入端與一個外接電路400之可變電阻（RMSR ）連接後，可依據系統應用的需求，經由適當地調整可變電阻RMSR 的電阻值後，可以使得控制馬達轉速的PWM_MAX訊號的後段轉速（即當PWM驅動訊號30的脈波週期大於VMAXR脈波訊號；約在PWM_MAX訊號的後段70%~100%）不受外部系統提供之PWM驅動訊號30的控制（如圖9之PWM_MAX最高轉速控制訊號波形所示），而是依據VMAXR脈波訊號來控制馬達的轉速；在此區間之前，馬達轉速是受PWM驅動訊號30（PWM_IN）的控制。若將外接電路400形成開路（即將可變電阻調整至無限大時）後，則會使得馬達轉速完全受PWM驅動訊號30的控制。Obviously, when the input end of the maximum speed current setting circuit 520 is connected to the variable resistor (R MSR ) of an external circuit 400, the resistance value of the variable resistor R MSR can be appropriately adjusted according to the requirements of the system application. The latter stage speed of the PWM_MAX signal for controlling the motor speed (that is, when the pulse period of the PWM driving signal 30 is greater than the VMAXR pulse signal; about 70%~100% of the latter part of the PWM_MAX signal) is not affected by the PWM driving signal provided by the external system. The control of 30 (shown as the PWM_MAX maximum speed control signal waveform in Figure 9) controls the motor speed based on the VMAXR pulse signal; before this interval, the motor speed is controlled by the PWM drive signal 30 (PWM_IN). If the external circuit 400 is formed into an open circuit (i.e., when the variable resistor is adjusted to infinity), the motor speed is completely controlled by the PWM drive signal 30.

接著，詳細說明本實施例之最高轉速設定裝置500的操作過程如下；其中，要強調的是，在本最高轉速設定裝置500的實施例中，其PWM訊號產生電路510的電路圖與圖4相同，故於說明PWM訊號產生電路510的電路圖時，是以圖4的元件符號來說明；最高轉速電流設定電路520的電路圖與圖5相同，故於說明最高轉速電流設定電路520的電路圖時，是以圖5的元件符號來說明；最高轉速產生電路530的電路圖與圖6相同，故於說明最高轉速產生電路530的電路圖時，是以圖6的元件符號來說明；RS閂鎖電路540與圖2中的RS閂鎖電路340相同，故於說明RS閂鎖電路540的電路圖時，是以RS閂鎖電路340的元件符號來說明，以及OR邏輯閘560與圖2中的OR邏輯閘360相同。Next, the operation of the maximum rotation speed setting device 500 of the present embodiment will be described in detail as follows. In the embodiment of the present maximum rotation speed setting device 500, the circuit diagram of the PWM signal generation circuit 510 is the same as that of FIG. Therefore, when the circuit diagram of the PWM signal generating circuit 510 is described, the component symbol of FIG. 4 is used. The circuit diagram of the highest-speed current setting circuit 520 is the same as that of FIG. 5. Therefore, when the circuit diagram of the highest-speed current setting circuit 520 is described, 5 is the same as that of FIG. 6. Therefore, when the circuit diagram of the maximum rotation speed generation circuit 530 is described, the component symbol of FIG. 6 is used; the RS latch circuit 540 and FIG. 2 are shown. The RS latch circuit 340 is the same, so the circuit diagram of the RS latch circuit 540 is illustrated with the component symbols of the RS latch circuit 340, and the OR logic gate 560 is identical to the OR logic gate 360 of FIG.

首先，請參考圖4，是本實施例中的PWM訊號產生電路示意圖。如圖4所示，當外部系統所提供的高電位之PWM驅動訊號30（PWM_IN）進入至最高轉速設定裝置500後，PWM驅動訊號30會先經過PWM訊號產生電路510中的第一反相器3110及第二反相器3120後，輸入到NAND邏輯閘3170的第一輸入端；接著，PWM驅動訊號30再經過第三反相器3130後，對電容器3160進行充電後會產生一個delay，再經過第四反相器3140及第五反相器3150後，將另一處理過的訊號輸入到NAND邏輯閘3170的第二輸入端，之後由NAND邏輯閘3170來產生P_PWM訊號；其中P_PWM訊號為一個和PWM正緣觸發訊號或是負緣觸發訊號同步的小脈波訊號（如圖9中的P_PWM訊號波形所示）。之後，此一P_PWM訊號會輸入到RS閂鎖器540的第一輸入端。First, please refer to FIG. 4, which is a schematic diagram of a PWM signal generating circuit in this embodiment. As shown in FIG. 4, after the high-potential PWM driving signal 30 (PWM_IN) provided by the external system enters the maximum speed setting device 500, the PWM driving signal 30 first passes through the first inverter in the PWM signal generating circuit 510. After the 3110 and the second inverter 3120 are input to the first input terminal of the NAND logic gate 3170; then, after the PWM driving signal 30 passes through the third inverter 3130, charging the capacitor 3160 generates a delay. After passing through the fourth inverter 3140 and the fifth inverter 3150, another processed signal is input to the second input terminal of the NAND logic gate 3170, and then the P_PWM signal is generated by the NAND logic gate 3170; wherein the P_PWM signal is A small pulse signal that is synchronized with the PWM positive edge trigger signal or the negative edge trigger signal (as shown by the P_PWM signal waveform in Figure 9). Thereafter, the P_PWM signal is input to the first input of the RS latch 540.

請參考圖5，是本實施例中的最高轉速電流設定電路示意圖。如圖5所示，最高轉速電流設定電路520其輸入端是與一個外接電路400連接；在本實施例中，此外接電路400為一個電阻（RMSR ）。由圖5之電路可以得知分壓點VA 經過第一電晶體3210和第二電晶體3220所產生的電位移轉（level-shift）後，可以得到一個IMSR 電流，其中IMSR 電流可以由分壓點VA 除以電阻（RMSR ）而得到，即IMSR =VA /RMSR 。接著，所產生的IMSR 電流會經過一個電流鏡電路（是由電晶體3230和電晶體3240所組成的），最後傳送到最高轉速產生電路530。Please refer to FIG. 5, which is a schematic diagram of a maximum speed current setting circuit in this embodiment. As shown in FIG. 5, the input terminal of the highest speed current setting circuit 520 is connected to an external circuit 400; in the present embodiment, the external circuit 400 is a resistor (R MSR ). It can be seen from the circuit of FIG. 5 that after the voltage division point V A is level-shifted by the first transistor 3210 and the second transistor 3220, an I MSR current can be obtained, wherein the I MSR current can be It is obtained by dividing the voltage dividing point V A by the resistance (R MSR ), that is, I MSR =V A /R MSR . The resulting I MSR current is then passed through a current mirror circuit (which is comprised of transistor 3230 and transistor 3240) and finally to maximum speed generating circuit 530.

請參考圖6，是本實施例中的最高轉速產生電路示意圖。如圖6所示，當最高轉速電流設定電路520所產生的IMSR 電流進入至最高轉速產生電路530後，IMSR 電流會對電容C2進行充電的動作。由此可知，最高轉速產生電路520是經由電阻（RMSR ）設定所產生的IMSR 電流來決定，並據以決定最高轉速設定的大小。Please refer to FIG. 6, which is a schematic diagram of the highest speed generating circuit in this embodiment. As shown in FIG. 6, when the I MSR current generated by the highest speed current setting circuit 520 enters the maximum speed generating circuit 530, the I MSR current charges the capacitor C2. From this, it can be seen that the maximum rotational speed generating circuit 520 is determined by the I MSR current generated by the resistance (R MSR ) setting, and the magnitude of the maximum rotational speed setting is determined accordingly.

最高轉速產生電路530，由一個比較器3310的第一輸入端點連接到電阻R4、電阻R5及電阻R6所產生的分壓來設定電容器3320（C2 ）的充電電位，再將IMSR 電流對電容器3320（C2 ）所得到的充電電壓連接到比較器3310的第二輸入端；當VSET 為一個高電位時，使得電晶體3330會被導通（ON），所以IMSR 電流會被電晶體3330導至接地點，此時IMSR 並不會對電容器3320（C2 ）充電；而當VSET 由高電位變成低電位時，電晶體3330不會被導通（即OFF），此時IMSR 電流就會開始對電容器3320（C2 ）做充電的動作，其充電之波形如圖9之Cap示意圖；一直到電容器3320（C2 ）的充電電壓大於電阻R4、電阻R5及電阻R6所產生的分壓電壓後，此時比較器3310會輸出一個P-_MAXR訊號，且此P_MAXR訊號會產生一個由高電位改變為低電位的脈波（如圖9中的P_MAXR訊號波形所示）；然而，此P_MAXR訊號也可以是一個由低電位改變為高電位的脈波訊號（未顯示於圖9中），對此，都可以適用在本實施例中。很明顯地，由於外接電阻（RMSR ）400的設定值與圖2中的外接電阻（RMSR ）400設定值不相同，故使得IMSR 電流大小也不相同，因此圖9之電容器3320（C2 ）的充電波形Cap示意圖與圖3中的電容器3320（C2 ）的充電波形Cap示意圖不相同。The maximum speed generating circuit 530 sets the charging potential of the capacitor 3320 (C 2 ) by the voltage division generated by the first input terminal of the comparator 3310 connected to the resistor R4, the resistor R5 and the resistor R6, and then sets the I MSR current pair. The charging voltage obtained by the capacitor 3320 (C 2 ) is connected to the second input terminal of the comparator 3310; when V SET is at a high potential, the transistor 3330 is turned on (ON), so the I MSR current is blocked by the transistor. 3330 leads to the ground point, at which point I MSR does not charge capacitor 3320 (C 2 ); and when V SET changes from high to low, transistor 3330 is not turned on (ie, OFF), at this time I MSR The current will start to charge the capacitor 3320 (C 2 ), and the charging waveform is shown in Figure 9; until the charging voltage of the capacitor 3320 (C 2 ) is greater than that generated by the resistor R4, the resistor R5 and the resistor R6. After the voltage is divided, the comparator 3310 outputs a P-_MAXR signal, and the P_MAXR signal generates a pulse wave that changes from a high level to a low level (as shown by the P_MAXR signal waveform in FIG. 9); however, This P_MAXR signal can also be a Changed from low level to high potential pulse signals (not shown in FIG. 9), which are applicable in the present embodiment. Obviously, since the external resistor (R MSR) external resistor (R MSR) 400 is set in the set value 2400 of FIG values are not identical, so that the magnitude of the current I MSR is not the same, the capacitor of FIG. 9 3320 (C capacitor 3320 (C 2) in 32) with a charging waveform schematic Cap Cap schematic diagram of a charging waveform is not the same.

之後，將P_MINR訊號輸入到RS閂鎖電路540的第二輸入端，並將NAND邏輯閘3170所產生的P_PWM訊號輸入到RS閂鎖電路540的第一輸入端，使得P_MINR訊號與P_PWM訊號進行運算後，由RS閂鎖電路540的第一輸出端產生一個固定週期的V-MINR脈波訊號。另外，RS閂鎖電路540的第二輸出端訊號會將P_PWM訊號經過一個反相器後，將反相的P_PWM訊號送至OR邏輯閘560並與RS閂鎖電路540的第三輸端的VMAXR訊號做一個OR運算，以輸出另一個固定週期的脈波訊號VSET ，其中VSET 的脈波訊號的相位是與V-MINR脈波訊號相反；而VSET 訊號是用來決定電晶體3330是否導通；例如，當VSET 的訊號為一高電位時，可使電晶體3330導通，並瞬間將電容器3320（C2 ）上的電壓放電到接地點（GND）的電位；直到下一次的P_PWM訊號由高電位改變至低電位時，才會將電晶體3330再次的關閉（即OFF），使電容器3320（C2 ）開始充電。很明顯地，由於圖9之電容器3320（C2 ）的充電波形Cap示意圖與圖3中的電容器3320（C2 ）的充電波形Cap示意圖不相同，使得圖9之VSET 的訊號與圖3之VSET 的訊號也不相同。Then, the P_MINR signal is input to the second input end of the RS latch circuit 540, and the P_PWM signal generated by the NAND logic gate 3170 is input to the first input end of the RS latch circuit 540, so that the P_MINR signal and the P_PWM signal are operated. Thereafter, a fixed period of V-MINR pulse signals is generated by the first output of the RS latch circuit 540. In addition, the second output signal of the RS latch circuit 540 passes the P_PWM signal through an inverter, and sends the inverted P_PWM signal to the OR logic gate 560 and the VMAXR signal of the third output of the RS latch circuit 540. make an OR operator, to output a fixed period of another pulse signal V SET, wherein the phase of the pulse signal V SET is opposite to the V-MINR pulse signal; and V SET signal is used to determine whether the transistor 3330 is turned on For example, when the signal of V SET is a high potential, the transistor 3330 can be turned on, and the voltage on the capacitor 3320 (C 2 ) is instantaneously discharged to the potential of the ground point (GND); until the next P_PWM signal is When the high potential changes to a low potential, the transistor 3330 is turned off (i.e., OFF) again, causing the capacitor 3320 (C 2 ) to start charging. Obviously, the capacitor 3320 in FIG. 9 of the capacitor 3320 (C 2) in (C 2) charging waveform Cap schematic of FIG. 3 the charging waveform Cap schematic not identical, such that V SET of FIG. 9 of the signal in FIG. 3 of The signal of V SET is also different.

同時，PWM驅動訊號30（PWM_IN）也會輸入到AND邏輯閘550的第一輸入端，並將RS閂鎖電路540所輸出的V-MAXR脈波訊號輸入至AND邏輯閘550的第二輸入點後，AND邏輯閘550即會輸出PWM_MAX的訊號（如圖9中的PWM_MAX最高轉速控制訊號波形所示），此PWM_MAX訊號即為在PWM驅動訊號30（PWM_IN）以及調整外接電路400所設定的最高電流後所產生的最高轉速設定訊號，此一輸出訊號送到馬達驅動控制電路200，就可以控制馬達40的轉速；很明顯地，由於圖9之VMAXR的脈波訊號波形圖與圖3中的VMINR的脈波訊號波形圖不相同，使得圖9之PWM_MAX的最高轉速控制訊號與圖3之PWM_MIN的最低轉速控制訊號也不相同。例如，當PWM驅動訊號30（PWM_IN）的脈波週期小於RS閂鎖電路540所輸出的V-MAXR脈波訊號時，藉由VMAXR脈波訊號和PWM驅動訊號30通過AND邏輯閘550的動作運算後，其所輸出的PWM_MAX訊號是與PWM驅動訊號30（PWM_IN）相同的，也就是說，當PWM驅動訊號30（PWM_IN）的脈波週期小於RS閂鎖電路540 所輸出的VMAXR脈波訊號時，馬達轉速是受PWM驅動訊號30（PWM_IN）的控制。而當PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路540所輸出的V-MAXR脈波訊號時，藉由VMAXR脈波訊號和PWM驅動訊號30（PWM_IN）通過AND邏輯閘550的動作運算後，其所輸出的PWM_MAX訊號是與V-MAXR脈波訊號相同，也就是說，當PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路540所輸出的V-MAXR脈波訊號時，馬達轉速是受V-MAXR脈波訊號的控制；很明顯地，在PWM驅動訊號30（PWM_IN）的脈波週期大於RS閂鎖電路540所輸出的VMAXR脈波訊號的區間，約在PWM_MAX訊號後70%~100%的區間，即如圖7所標示的最高轉速設定區間做最高轉速的調整。At the same time, the PWM drive signal 30 (PWM_IN) is also input to the first input of the AND logic gate 550, and the V-MAXR pulse signal output by the RS latch circuit 540 is input to the second input point of the AND logic gate 550. Afterwards, the AND logic gate 550 outputs a PWM_MAX signal (as shown by the PWM_MAX maximum speed control signal waveform in FIG. 9), and the PWM_MAX signal is the highest set in the PWM drive signal 30 (PWM_IN) and the adjustment external circuit 400. The maximum speed setting signal generated after the current, the output signal is sent to the motor drive control circuit 200, and the rotation speed of the motor 40 can be controlled; obviously, the pulse signal waveform diagram of the VMAXR of FIG. 9 is the same as that of FIG. The pulse signal waveform diagram of VMINR is different, so that the maximum speed control signal of PWM_MAX of FIG. 9 is different from the minimum speed control signal of PWM_MIN of FIG. For example, when the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the V-MAXR pulse signal output by the RS latch circuit 540, the VMAXR pulse signal and the PWM driving signal 30 are operated by the AND logic gate 550. After that, the PWM_MAX signal outputted by the PWM_MAX signal is the same as the PWM driving signal 30 (PWM_IN), that is, when the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the VMAXR pulse signal output by the RS latching circuit 540. The motor speed is controlled by the PWM drive signal 30 (PWM_IN). When the pulse period of the PWM driving signal 30 (PWM_IN) is greater than the V-MAXR pulse signal output by the RS latch circuit 540, the VMAXR pulse signal and the PWM driving signal 30 (PWM_IN) pass through the AND logic gate 550. After the operation operation, the PWM_MAX signal outputted by it is the same as the V-MAXR pulse signal, that is, when the pulse period of the PWM drive signal 30 (PWM_IN) is greater than the V-MAXR pulse output by the RS latch circuit 540. During the signal, the motor speed is controlled by the V-MAXR pulse signal; obviously, the pulse period of the PWM drive signal 30 (PWM_IN) is greater than the interval of the VMAXR pulse signal output by the RS latch circuit 540. The interval from 70% to 100% after the PWM_MAX signal, that is, the maximum speed setting interval as shown in Fig. 7 is used to adjust the maximum speed.

根據上述之說明，在本發明之具有最高轉速設定電路的馬達驅動裝置中，當最高轉速電流設定電路520之輸入端與一個外接電路400之可變電阻（RMSR ）連接後，經由適當地調整可變電阻RMSR 的電阻值後，可以使得控制馬達轉速的PWM_MAX訊號的後段轉速（即當PWM驅動訊號30的脈波週期大於VMAXR脈波訊號的區間；約在PWM_MAX訊號後段的70%~100%區間）不受外部系統提供之PWM驅動訊號30的控制，而是依據VMAXR脈波訊號來控制馬達的轉速（如圖9之PWM_MAX最高轉速控制訊號後段約70%~100%區間所示，可依據系統不用的需求做調整）；在此區間之前，馬達轉速是受PWM驅動訊號30的控制。若將外接電路400形成開路（即將可變電阻調整至無限大時）後，使得最高轉速電流設定電路520不會產生IMSR 電流的輸出，因此無法對最高轉速產生電路530中的電容器3320（C2 ）進行充電，故使得馬達轉速完全受PWM驅動訊號30的控制。According to the above description, in the motor drive device having the highest rotational speed setting circuit of the present invention, when the input terminal of the highest rotational speed current setting circuit 520 is connected to the variable resistor (R MSR ) of an external circuit 400, it is appropriately adjusted. The resistance value of the variable resistor R MSR can be used to control the rear speed of the PWM_MAX signal of the motor speed (that is, when the pulse period of the PWM driving signal 30 is greater than the interval of the VMAXR pulse signal; about 70% to 100 in the latter part of the PWM_MAX signal) The % interval is not controlled by the PWM drive signal 30 provided by the external system, but the speed of the motor is controlled according to the VMAXR pulse signal (as shown in the range of about 70% to 100% of the PWM_MAX maximum speed control signal in Fig. 9). The adjustment is made according to the needs of the system; before this interval, the motor speed is controlled by the PWM drive signal 30. When the external circuit 400 is formed as an open circuit (i.e., when the variable resistance is adjusted to infinity), the maximum speed current setting circuit 520 does not generate an output of the I MSR current, and thus the capacitor 3320 in the highest speed generating circuit 530 cannot be used. 2 ) Charging is performed so that the motor speed is completely controlled by the PWM driving signal 30.

根據本發明之具有最高轉速設定電路的馬達驅動裝置，藉由至少一個外部電路對馬達轉速的設定後，故當馬達驅動裝置能夠提供一個最高轉速的設定時，可以在相同的馬達負載下，達到最高的轉速應用，以達到散熱的需求。此外，當馬達操作在最高轉速時，完全不受到外部系統所提供的PWM驅動訊號之影響；藉此更進一歩的來增加馬達應用的靈活度。According to the motor driving device with the highest speed setting circuit of the present invention, after the motor speed is set by at least one external circuit, when the motor driving device can provide a setting of the maximum speed, it can be achieved under the same motor load. The highest speed application to meet the heat dissipation needs. In addition, when the motor is operated at the maximum speed, it is completely unaffected by the PWM drive signal provided by the external system; thereby further increasing the flexibility of the motor application.

接著，請繼續請參考圖10及圖11，其中圖10是本發明之具有最低-最高轉速設定裝置的馬達驅動裝置實施例之示意圖，而圖11為圖10之最低-最高轉速設定裝置中的訊號示意圖。本發明之具有最低-最高轉速設定裝置的馬達驅動裝置12包括霍爾偏壓110、輸出單元200及最低-最高轉速設定裝置600等所組成；很明顯地，圖10之實施例是將圖8的最高轉速設定裝置500及圖2之最低轉速設定裝置300實施例同時配置於本實施例的馬達驅動裝置12中，使得在馬達驅動裝置12中形成一個最低-最高轉速設定裝置600（故在後續之說明中，最高轉速設定裝置中的各個組成電路所使用的符號與圖8相同；而最低轉速設定裝置中的各個組成電路所使用的符號與圖2相同）；因此，本實施例的馬達驅動裝置12可以提供一個前段是依據VMINR脈波訊號來控制馬達轉速，而在後段是依據VMAXR脈波訊號來控制馬達轉速的控制訊號（如圖11之PWM_MIN_MAX轉速控制訊號波形所示），而位於PWM_MIN_MAX轉速控制訊號前段及後段之間的區間，則是由PWM驅動訊號30（PWM_IN）來控制。當然，藉由此馬達驅動裝置12的電路設計，也可以選擇提供一個只依據VMINR脈波訊號來控制馬達的轉速，或是提供一個只依據VMAXR脈波訊號來控制馬達的轉速。Next, please refer to FIG. 10 and FIG. 11 , wherein FIG. 10 is a schematic diagram of an embodiment of a motor driving device having a lowest-maximum rotational speed setting device according to the present invention, and FIG. 11 is a view of the lowest-maximum rotational speed setting device of FIG. 10 . Signal diagram. The motor driving device 12 having the lowest-maximum rotational speed setting device of the present invention comprises a Hall bias 110, an output unit 200, and a lowest-maximum rotational speed setting device 600; obviously, the embodiment of FIG. 10 is FIG. The embodiment of the maximum rotational speed setting device 500 and the minimum rotational speed setting device 300 of FIG. 2 are simultaneously disposed in the motor driving device 12 of the present embodiment such that a minimum-maximum rotational speed setting device 600 is formed in the motor driving device 12 (thus following In the description, the symbols used in the respective constituent circuits in the highest rotational speed setting means are the same as those in Fig. 8; and the symbols used in the respective constituent circuits in the lowest rotational speed setting means are the same as those in Fig. 2; therefore, the motor drive of the present embodiment The device 12 can provide a control signal for controlling the motor speed according to the VMINR pulse signal, and a control signal for controlling the motor speed according to the VMAXR pulse signal in the latter stage (as shown in the PWM_MIN_MAX rotation control signal waveform of FIG. 11), and is located at PWM_MIN_MAX. The interval between the front and rear segments of the speed control signal is controlled by the PWM drive signal 30 (PWM_IN). Of course, by the circuit design of the motor driving device 12, it is also possible to provide a rotational speed of the motor based on the VMINR pulse signal or a rotational speed of the motor based on the VMAXR pulse signal.

根據上述，馬達驅動裝置12中的最低轉速設定裝置620是由一個PWM訊號產生電路（PWM signal pulse generator circuit）310、一個最低轉速電流設定電路（MINR current setting circuit）320、一個最低轉速產生電路（MINR rotation speed generator circuit）330、一個RS閂鎖電路340及一個OR邏輯閘（OR Gate）640所組成；而馬達驅動裝置12中的最高轉速設定裝置630是由一個PWM訊號產生電路（PWM signal pulse generator circuit）510、一個最高轉速電流設定電路（MAXR current setting circuit）520、一個最高轉速產生電路（MAXR rotation speed generator circuit）530、一個RS閂鎖電路540及一個AND邏輯閘（AND Gate）650所組成。此外，在一較佳實施例中，可以選擇將最低轉速設定裝置620及最高轉速設定裝置630中的共同電路，即PWM訊號產生電路自最低轉速設定裝置620及最高轉速設定裝置630移出，並由一個PWM訊號產生電路610來提供最低轉速設定裝置620及最高轉速設定裝置630中所需的P_PWM訊號，如圖10所示；如此，可以進一步節省電路元件。很明顯地，對於圖10之實施例與圖8及圖2之實施例其相同電路結構及操作原理不再贅述之。According to the above, the minimum rotational speed setting device 620 of the motor driving device 12 is composed of a PWM signal pulse generator circuit 310, a minimum current setting circuit 320, and a minimum rotational speed generating circuit ( A MINR rotation speed generator circuit 330, an RS latch circuit 340 and an OR gate 640; and a maximum speed setting device 630 in the motor driving device 12 is a PWM signal pulse (PWM signal pulse) Generator circuit 510, a MAXR current setting circuit 520, a MAXR rotation speed generator circuit 530, an RS latch circuit 540, and an AND gate 650 composition. In addition, in a preferred embodiment, the common circuit in the minimum rotation speed setting device 620 and the maximum rotation speed setting device 630, that is, the PWM signal generation circuit can be selected to be removed from the minimum rotation speed setting device 620 and the maximum rotation speed setting device 630, and A PWM signal generating circuit 610 provides the P_PWM signals required in the minimum speed setting means 620 and the maximum speed setting means 630, as shown in FIG. 10; thus, circuit elements can be further saved. Obviously, the same circuit structure and operation principle for the embodiment of FIG. 10 and the embodiment of FIG. 8 and FIG. 2 are not described again.

當外部系統所提供的高電位之PWM驅動訊號30（如圖11中的PWM_IN訊號波形所示）由PWM訊號產生電路610之輸入端進入後，然後由PWM訊號產生電路610的輸出端輸出一個P_PWM訊號（如圖11中的P_PWM訊號波形所示）；接著，將最低轉速設定裝置620之輸入端與一個外接電路400（例如：此外接電路400可以是一個電阻）連接，並經由調整外接電路400以產生一個設定之電流後，由最低轉速設定裝置620輸出一個VMINR脈波訊號（如圖11中的VMINR訊號波形所示），此VMINR脈波訊號即為最低轉速設定電壓；在此要說明的是，經由調整外接電路400以使最低轉速設定裝置620輸出一個VMINR脈波訊號的過程，是與圖2之實施例中的最低轉速設定裝置300相同，故不再贅述。When the high-potential PWM driving signal 30 (shown by the PWM_IN signal waveform in FIG. 11) provided by the external system is input from the input end of the PWM signal generating circuit 610, then a P_PWM is outputted from the output of the PWM signal generating circuit 610. The signal (shown as the P_PWM signal waveform in FIG. 11); then, the input of the minimum speed setting device 620 is connected to an external circuit 400 (for example, the external circuit 400 can be a resistor), and the external circuit 400 is adjusted. After generating a set current, the minimum speed setting device 620 outputs a VMINR pulse signal (as shown by the VMINR signal waveform in FIG. 11), and the VMINR pulse signal is the lowest speed setting voltage; The process of adjusting the external circuit 400 to cause the minimum rotational speed setting means 620 to output a VMINR pulse signal is the same as the minimum rotational speed setting means 300 in the embodiment of FIG. 2, and therefore will not be described again.

當PWM驅動訊號30（PWM_IN）的脈波週期小於最低轉速設定裝置620所輸出的V-MINR脈波訊號時，藉由VMINR脈波訊號和PWM驅動訊號30（PWM_IN）通過OR邏輯閘640的運算後，即會輸出一個VMINR脈波訊號來控制馬達40的以最低轉速轉動；很明顯地，此PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR脈波訊號的區間，是在PWM驅動訊號30（PWM_IN）前10~30%的區間（如圖11之PWM_MIN最低轉速控制訊號波形所示）；而當PWM驅動訊號30（PWM_IN）的脈波週期大於VMINR後，此VMINR脈波訊號和PWM驅動訊號30（PWM_IN）通過OR邏輯閘640的動作運算後，即會輸出一個與PWM驅動訊號30（PWM_IN）相同的脈波訊號來控制馬達40；很明顯地，當PWM驅動訊號30（PWM_IN）的脈波週期大於V-MINR脈波訊號的區間後，馬達轉速則會受到PWM驅動訊號30（PWM_IN）的控制。When the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the V-MINR pulse signal output by the minimum rotation speed setting device 620, the operation of the OR logic gate 640 is performed by the VMINR pulse signal and the PWM driving signal 30 (PWM_IN). After that, a VMINR pulse signal is output to control the rotation of the motor 40 at the lowest speed; obviously, the pulse period of the PWM drive signal 30 (PWM_IN) is smaller than the interval of the VMINR pulse signal, which is at the PWM drive signal 30. (PWM_IN) the first 10~30% interval (as shown in the PWM_MIN minimum speed control signal waveform in Figure 11); and when the pulse period of PWM drive signal 30 (PWM_IN) is greater than VMINR, the VMINR pulse signal and PWM drive After the signal 30 (PWM_IN) is operated by the operation of the OR logic gate 640, a pulse signal identical to the PWM drive signal 30 (PWM_IN) is output to control the motor 40; obviously, when the PWM drive signal 30 (PWM_IN) After the pulse period is greater than the interval of the V-MINR pulse signal, the motor speed is controlled by the PWM drive signal 30 (PWM_IN).

當外部系統所提供的高電位之PWM驅動訊號30（如圖11中的PWM_IN訊號波形所示）由PWM訊號產生電路610之輸入端進入後，然後由PWM訊號產生電路610的輸出端輸出一個P_PWM訊號（如圖11中的P_PWM訊號波形所示）；接著，將最高轉速設定裝置630之輸入端與一個外接電路410（例如：此外接電路410可以是一個電阻）連接，並經由調整外接電路410以產生一個設定之電流後，由最高轉速設定裝置630輸出一個VMAXR脈波訊號（如圖11中的VMAXR脈波訊號波形所示），此VMAXR脈波訊號即為最高轉速設定電壓；在此要說明的是，經由調整外接電路410以使最高轉速設定裝置630輸出一個VMAXR脈波訊號的過程，是與圖8之實施例中的最高轉速設定裝置500相同，故不再贅述。When the high-potential PWM driving signal 30 (shown by the PWM_IN signal waveform in FIG. 11) provided by the external system is input from the input end of the PWM signal generating circuit 610, then a P_PWM is outputted from the output of the PWM signal generating circuit 610. The signal (shown as the P_PWM signal waveform in FIG. 11); then, the input of the maximum speed setting device 630 is connected to an external circuit 410 (for example, the external circuit 410 can be a resistor), and the external circuit 410 is adjusted. After generating a set current, the maximum speed setting device 630 outputs a VMAXR pulse signal (as shown by the VMAXR pulse signal waveform in FIG. 11), and the VMAXR pulse signal is the highest speed setting voltage; It is noted that the process of adjusting the external circuit 410 to cause the maximum rotational speed setting means 630 to output a VMAXR pulse signal is the same as the highest rotational speed setting means 500 in the embodiment of FIG. 8, and therefore will not be described again.

接著，再如圖10所示，最高轉速設定裝置630會將其所輸出一個VMAXR脈波訊號輸入至AND邏輯閘650的輸入端，而AND邏輯閘650的另一輸入端則是與OR邏輯閘640所輸出的PWM_MIN訊號連接。Then, as shown in FIG. 10, the maximum rotation speed setting means 630 inputs a VMAXR pulse signal outputted thereto to the input terminal of the AND logic gate 650, and the other input terminal of the AND logic gate 650 is an OR logic gate. The PWM_MIN signal output from 640 is connected.

當PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR脈波訊號時，OR邏輯閘640所輸出的PWM_MIN訊號的前10~30%區間，是與VMINR脈波訊號相同；換句話說，此時OR邏輯閘640所輸出的訊號是VMINR脈波訊號。When the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the VMINR pulse signal, the first 10~30% interval of the PWM_MIN signal output by the OR logic gate 640 is the same as the VMINR pulse signal; in other words, at this time The signal output by the OR logic gate 640 is a VMINR pulse signal.

當OR邏輯閘640所輸出的PWM_MIN脈波訊號與最高轉速設定裝置630會將其所輸出的VMAXR脈波訊號經過AND邏輯閘650的運算後，會輸出一個PWM_MIN_MAX訊號，而此PWM_MIN_MAX訊號的前10%~30%(可依據系統需求，調整外部電路400)是與VMINR脈波訊號相同，此PWM_MIN_MAX訊號即會輸出到控制單元130，再由控制單元130來控制輸出單元200來驅動馬達40轉動；換句話說，PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR訊號時，本發明之馬達驅動裝置12中的馬達40是由VMINR脈波訊號來控制；同樣的，由VMINR脈波訊號來控制馬達40的區間是在PWM_MIN_MAX訊號的前10~30%的區間（如圖11之PWM_MIN_MAX轉速控制訊號所示）。When the PWM_MIN pulse signal and the maximum speed setting device 630 outputted by the OR logic gate 640 pass the operation of the VMAXR pulse signal outputted by the AND logic gate 650, a PWM_MIN_MAX signal is output, and the first 10 of the PWM_MIN_MAX signal is output. %~30% (according to the system requirements, the external circuit 400 can be adjusted) is the same as the VMINR pulse signal, the PWM_MIN_MAX signal is output to the control unit 130, and the control unit 130 controls the output unit 200 to drive the motor 40 to rotate; In other words, when the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the VMINR signal, the motor 40 in the motor driving device 12 of the present invention is controlled by the VMINR pulse signal; similarly, controlled by the VMINR pulse signal. The section of the motor 40 is in the first 10 to 30% of the PWM_MIN_MAX signal (as shown by the PWM_MIN_MAX speed control signal of FIG. 11).

當PWM驅動訊號30（PWM_IN）的脈波週期大於VMINR脈波訊號時，OR邏輯閘640所輸出的PWM_MIN訊號會與PWM驅動訊號30（PWM_IN）相同；換句話說，此時OR邏輯閘640所輸出的訊號是PWM驅動訊號30（PWM_IN）。當OR邏輯閘640所輸出的PWM驅動訊號30（PWM_IN）與最高轉速設定裝置630會將其所輸出的VMAXR脈波訊號經過AND邏輯閘650的運算後，會輸出一個PWM_MIN_MAX訊號。當PWM_MIN的脈波週期小於VMAXR訊號時，AND邏輯閘650所輸出的PWM_MIN_MAX訊號是與PWM_MIN的脈波訊號相同；當PWM_MIN的脈波週期大於VMAXR訊號時，AND邏輯閘650所輸出的PWM_MIN_MAX訊號是與VMAXR脈波訊號相同，此PWM_MIN_MAX訊號即會輸出到控制單元130，再由控制單元130來控制輸出單元200來驅動馬達40轉動；換句話說，當PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR脈波訊號時，PWM_MIN_MAX訊號的前10%~30%(可依據系統需求，調整外部電路400)是與VMINR脈波訊號相同，當PWM驅動訊號30（PWM_IN）的脈波週期大於VMINR並且小於VMAXR時，PWM_MIN_MAX訊號的輸出是與PWM_IN的訊號相同，當PWM驅動訊號30（PWM_IN）的脈波週期大於VMAXR脈波訊號時，PWM_MIN_MAX訊號後段的70%~100%(可依據系統需求，調整外部電路410)是與VMAXR脈波訊號相同，本發明之馬達驅動裝置12中的馬達40是由PWM_MIN_MAX脈波訊號來控制（如圖11之PWM_MIN_MAX轉速控制訊號波形所示）。而輸出的曲線會包含最低-最高轉速設定，如圖7的轉速曲線所示。When the pulse period of the PWM driving signal 30 (PWM_IN) is greater than the VMINR pulse signal, the PWM_MIN signal output by the OR logic gate 640 is the same as the PWM driving signal 30 (PWM_IN); in other words, the OR logic gate 640 at this time. The output signal is PWM drive signal 30 (PWM_IN). When the PWM drive signal 30 (PWM_IN) and the maximum speed setting means 630 outputted by the OR logic gate 640 pass the operation of the VMAXR pulse signal outputted by the AND logic gate 650, a PWM_MIN_MAX signal is output. When the pulse period of PWM_MIN is less than the VMAXR signal, the PWM_MIN_MAX signal output by the AND logic gate 650 is the same as the pulse signal of the PWM_MIN; when the pulse period of the PWM_MIN is greater than the VMAXR signal, the PWM_MIN_MAX signal output by the AND logic gate 650 is Like the VMAXR pulse signal, the PWM_MIN_MAX signal is output to the control unit 130, and the control unit 130 controls the output unit 200 to drive the motor 40 to rotate; in other words, when the PWM drive signal 30 (PWM_IN) pulse period When the VMINR pulse signal is smaller than the VMINR signal, the first 10%~30% of the PWM_MIN_MAX signal (which can be adjusted according to the system requirements) is the same as the VMINR pulse signal. When the pulse period of the PWM drive signal 30 (PWM_IN) is greater than the VMINR and When it is less than VMAXR, the output of PWM_MIN_MAX signal is the same as that of PWM_IN. When the pulse period of PWM drive signal 30 (PWM_IN) is greater than VMAXR pulse signal, 70%~100% of PWM_MIN_MAX signal can be adjusted according to system requirements. The external circuit 410) is the same as the VMAXR pulse signal. The motor 40 in the motor driving device 12 of the present invention is controlled by the PWM_MIN_MAX pulse signal (Fig. 11). PWM_MIN_MAX speed control signal waveform shown). The output curve will contain the lowest-maximum speed setting, as shown in the speed curve in Figure 7.

在本發明之具有最低-最高轉速設定裝置的馬達驅動裝置中，若將外接電路400形成開路（即將可變電阻調整至無限大時）後，使得最低轉速設定裝置620不會產生設定電流的輸出，故最低轉速設定裝置620即不會產生VMINR脈波訊號，使得馬達轉速完全受PWM驅動訊號30（PWM_IN）的控制；直到當PWM驅動訊號30（PWM_IN）的脈波週期大於VMAXR脈波訊號後（即當PWM驅動訊號30的脈波週期大於VMAXR脈波訊號的區間；約在PWM_MIN_MAX訊號後段的70%~100%區間），此時，本發明之具有最低-最高轉速設定裝置的馬達驅動裝置不受外部系統提供之PWM驅動訊號30的控制，而是依據VMAXR訊號來控制馬達的轉速，故其實際之控制功能與圖8之最高轉速設定裝置的馬達驅動裝置相同。In the motor driving device having the lowest-maximum rotational speed setting device of the present invention, if the external circuit 400 is formed as an open circuit (that is, when the variable resistance is adjusted to infinity), the minimum rotational speed setting device 620 does not generate the output of the set current. Therefore, the minimum speed setting device 620 does not generate the VMINR pulse signal, so that the motor speed is completely controlled by the PWM driving signal 30 (PWM_IN); until the pulse period of the PWM driving signal 30 (PWM_IN) is greater than the VMAXR pulse signal. (ie, when the pulse period of the PWM driving signal 30 is greater than the interval of the VMAXR pulse signal; about 70% to 100% of the latter stage of the PWM_MIN_MAX signal), at this time, the motor driving device of the present invention having the lowest-maximum rotational speed setting device It is not controlled by the PWM driving signal 30 provided by the external system, but the speed of the motor is controlled according to the VMAXR signal, so the actual control function is the same as that of the motor of the highest speed setting device of FIG.

在本發明之具有最低-最高轉速設定裝置的馬達驅動裝置中，若將外接電路410形成開路（即將可變電阻調整至無限大時）後，使得最高轉速設定裝置630不會產生設定電流的輸出，故最高轉速設定裝置630即不會產生VMAXR脈波訊號。當PWM驅動訊號30（PWM_IN）的脈波週期小於VMINR脈波訊號時（即當PWM驅動訊號30的脈波週期小於VMAXR脈波訊號的區間；約在PWM_MIN_MAX訊號前段的10~30%區間），此時，本發明之具有最低-最高轉速設定裝置的馬達驅動裝置不受外部系統提供之PWM驅動訊號30（PWM_IN）的控制，而是依據VMINR脈波訊號來控制馬達的轉速，故其實際之控制功能與圖2之最低轉速設定裝置的馬達驅動裝置相同。In the motor drive device having the lowest-maximum rotational speed setting device of the present invention, if the external circuit 410 is formed as an open circuit (i.e., when the variable resistance is adjusted to infinity), the maximum rotational speed setting device 630 does not generate the output of the set current. Therefore, the maximum speed setting device 630 does not generate a VMAXR pulse signal. When the pulse period of the PWM driving signal 30 (PWM_IN) is smaller than the VMINR pulse signal (that is, when the pulse period of the PWM driving signal 30 is smaller than the interval of the VMAXR pulse signal; about 10 to 30% of the interval before the PWM_MIN_MAX signal), At this time, the motor driving device with the lowest-maximum rotational speed setting device of the present invention is not controlled by the PWM driving signal 30 (PWM_IN) provided by the external system, but controls the rotational speed of the motor according to the VMINR pulse signal, so the actual The control function is the same as that of the motor of the minimum speed setting device of Fig. 2.

根據本發明所提供之具有最低-最高轉速設定的馬達驅動裝置，藉由不同的外部電路對馬達轉速的設定後，使得馬達可以操作在最低轉速或最高轉速；於馬達操作在最低轉速時，用以避免於PWM驅動訊號30（PWM_IN）的脈波週期小於馬達最低工作力矩(torque)時，造成馬達停止轉動，藉此控制方式來保持最低散熱的要求並且兼顧節能的效用；於馬達操作在最高轉速時，可以在相同的馬達負載下，達到最高的轉速應用，以達到散熱的需求。此外，當馬達操作在最低轉速或最高轉速時，完全不受到外部系統所提供的PWM驅動訊號之影響；藉此更進一歩的來增加馬達應用的靈活度。According to the motor drive device with the lowest-maximum speed setting provided by the present invention, the motor can be operated at the minimum speed or the maximum speed after the motor speed is set by different external circuits; when the motor is operated at the minimum speed, In order to avoid that the pulse period of the PWM driving signal 30 (PWM_IN) is less than the minimum working torque of the motor, the motor stops rotating, thereby controlling the way to maintain the minimum heat dissipation requirement and taking into account the energy saving effect; At the same speed, the highest speed can be achieved under the same motor load to meet the heat dissipation requirements. In addition, when the motor is operated at the minimum or maximum speed, it is completely unaffected by the PWM drive signal provided by the external system; thereby further increasing the flexibility of the motor application.

最後，本發明所揭露之馬達轉速設定裝置或是馬達驅動裝置，均可以使用半導體製程技術形成一晶片，故當本發明揭露之馬達轉速設定裝置或是馬達驅動裝置製造成晶片後，即可將上述實施例所揭露之外部系統提供之PWM驅動訊號30及外部電路連接至晶片的連接腳(pins)，並且可以經由其他連接腳與一個馬達連接，以控制馬達的轉速。此外，本發明所揭露之馬達驅動裝置中的輸出單元200，其可以配置為一種單相馬達或是一種三相馬達，即本發明馬達驅動裝置10/11/12均可以對單相馬達或是三相馬達的轉速進行控制；由於單相馬達或是三相馬達的結構已為習知技術，故不再贅述其詳細之操作。Finally, the motor rotation speed setting device or the motor driving device disclosed in the present invention can form a wafer by using a semiconductor process technology. Therefore, when the motor rotation speed setting device or the motor driving device disclosed in the present invention is fabricated into a wafer, The PWM driving signal 30 and the external circuit provided by the external system disclosed in the above embodiments are connected to the pins of the wafer, and can be connected to a motor via other connecting legs to control the rotational speed of the motor. In addition, the output unit 200 in the motor driving device disclosed in the present invention can be configured as a single-phase motor or a three-phase motor, that is, the motor driving device 10/11/12 of the present invention can be used for a single-phase motor or The rotational speed of the three-phase motor is controlled; since the structure of the single-phase motor or the three-phase motor is already a conventional technique, detailed operations thereof will not be described again.

如前所述，本發明已詳細描述了馬達驅動裝置之較佳實施例，其主要目的為闡明本發明之實施例，以使得熟悉此技術領域者得以實施，其無意限定本發明之精確應用形式。故熟悉此技術領域者由上述之教導、建議或由本發明的實施例學習而作某種程度修改是可能的。因此，本發明的技術思想將由以下的申請專利範圍及其均等來決定之。As described above, the present invention has been described in detail with reference to the preferred embodiments of the present invention, which are intended to clarify embodiments of the present invention so as to be understood by those skilled in the art, which are not intended to limit the precise application of the present invention. . It is therefore possible for those skilled in the art to make some degree of modification from the above teachings, suggestions, or learning from embodiments of the present invention. Therefore, the technical idea of the present invention will be determined by the following claims and their equals.

10/11/12．．．馬達驅動裝置10/11/12. . . Motor drive

20．．．霍爾元件20. . . Hall element

21/22．．．電阻21/22. . . resistance

30．．．PWM驅動訊號30. . . PWM drive signal

40．．．馬達40. . . motor

110．．．霍爾偏壓110. . . Hall bias

130．．．控制單元130. . . control unit

200．．．輸出單元200. . . Output unit

300/620．．．最低轉速設定裝置300/620. . . Minimum speed setting device

310/510/610．．．PWM訊號產生電路310/510/610. . . PWM signal generation circuit

3110/3120/3130/3140/3150．．．反相器3110/3120/3130/3140/3150. . . inverter

3160．．．電容器3160. . . Capacitor

3170．．．NAND邏輯閘3170. . . NAND logic gate

320/520．．．轉速電流設定電路320/520. . . Speed current setting circuit

3210/3220/3330．．．電晶體3210/3220/3330. . . Transistor

3230/3240．．．電流鏡電路3230/3240. . . Current mirror circuit

330/530．．．轉速訊號產生電路330/530. . . Speed signal generating circuit

3310．．．比較器3310. . . Comparators

3320．．．電容器3320. . . Capacitor

R4/R5/R6．．．電阻R4/R5/R6. . . resistance

340/540．．．RS閂鎖電路340/540. . . RS latch circuit

350/360/560/640．．．OR邏輯閘350/360/560/640. . . OR logic gate

550/650．．．AND邏輯閘550/650. . . AND logic gate

400/410．．．外部電路400/410. . . External circuit

500/630．．．最高轉速設定裝置500/630. . . Maximum speed setting device

600．．．最低-最高轉速設定裝置600. . . Minimum-maximum speed setting device

圖1 係先前技術之PWM驅動訊號對馬達轉速之示意圖；1 is a schematic diagram of a prior art PWM drive signal versus motor speed;

圖2 係本發明之具有最低轉速設定裝置的馬達驅動裝置之電路方塊示意圖；2 is a block diagram showing the circuit of the motor driving device with the lowest speed setting device of the present invention;

圖3 係本發明之圖2各電路之波形示意圖；3 is a schematic waveform diagram of each circuit of FIG. 2 of the present invention;

圖4 係本發明之具有最低轉速設定裝置的馬達驅動裝置中的PWM脈波訊號產生電路示意圖；4 is a schematic diagram of a PWM pulse wave signal generating circuit in a motor driving device with a minimum speed setting device according to the present invention;

圖5 係本發明之具有最低轉速設定裝置的馬達驅動裝置中的最小/最大電流設定電路示意圖；Figure 5 is a schematic diagram of a minimum/maximum current setting circuit in a motor driving device having a minimum rotational speed setting device of the present invention;

圖6 係本發明之具有最低轉速設定裝置的馬達驅動裝置中的最低/最高轉速產生電路示意圖；6 is a schematic diagram of a minimum/maximum rotational speed generating circuit in a motor driving device having a minimum rotational speed setting device according to the present invention;

圖7 係本發明之PWM驅動訊號對馬達轉速之示意圖；7 is a schematic diagram of the PWM driving signal of the present invention versus the motor speed;

圖8 係本發明之具有最高轉速設定裝置的馬達驅動裝置之電路方塊示意圖；Figure 8 is a block diagram showing the circuit of the motor driving device having the highest rotational speed setting device of the present invention;

圖9 係本發明之圖8各電路之波形示意圖；Figure 9 is a schematic diagram showing the waveforms of the circuits of Figure 8 of the present invention;

圖10 係本發明之具有最低-最高轉速設定裝置的馬達驅動裝置之電路方塊示意圖；及Figure 10 is a block diagram showing the circuit of the motor driving device having the lowest-maximum rotational speed setting device of the present invention; and

圖11 係本發明之圖10各電路之波形示意圖。Figure 11 is a schematic diagram showing the waveforms of the circuits of Figure 10 of the present invention.

10．．．馬達驅動裝置10. . . Motor drive

20．．．霍爾元件20. . . Hall element

21/22．．．電阻21/22. . . resistance

30．．．PWM驅動訊號30. . . PWM drive signal

40．．．馬達40. . . motor

110．．．霍爾偏壓110. . . Hall bias

130．．．控制單元130. . . control unit

200．．．輸出單元200. . . Output unit

300．．．最低轉速設定裝置300. . . Minimum speed setting device

310．．．PWM訊號產生電路310. . . PWM signal generation circuit

320．．．轉速電流設定電路320. . . Speed current setting circuit

330．．．轉速訊號產生電路330. . . Speed signal generating circuit

340．．．RS閂鎖電路340. . . RS latch circuit

350/360．．．OR邏輯閘350/360. . . OR logic gate

400．．．外部電路400. . . External circuit

Claims (13)

一種馬達轉速設定裝置，包括：
一PWM訊號產生電路，其輸入端與一PWM驅動訊號連接，並由輸出端輸出一個與該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；
一轉速電流設定電路，其輸入端與一電路連接，藉由調整該電路來控制該轉速電流設定電路輸出一電流；
一轉速訊號產生電路，其輸入端與該轉速電流設定電路所輸出的該電流連接，並由輸出端輸出一個脈波訊號（P_MINR/ P_MAXR）；
一RS閂鎖電路，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與該轉速訊號產生電路所輸出之脈波訊號（P_MINR/P_MAXR）連接，並由一第一輸出端輸出一個第一固定週期的脈波訊號（VMINR/VMAXR），由一第二輸出端輸出一個第二固定週期的脈波訊號（VSET ）至該轉速訊號產生電路的第二輸入端，其中，該第二固定週期的脈波訊號（VSET ）與該第一固定週期的脈波訊號（VMINR）的相位相反；及
一邏輯閘，其一第一輸入端與該PWM驅動訊號連接，其一第二輸入端與該RS閂鎖電路的第一輸出端所輸出的該第一固定週期的脈波訊號（VMINR/VMAXR）連接，以輸出一個馬達轉速之控制訊號。A motor speed setting device includes:
a PWM signal generating circuit, wherein the input end is connected to a PWM driving signal, and the output end outputs a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal;
a speed current setting circuit, wherein the input end is connected to a circuit, and the circuit is controlled to output a current by adjusting the circuit;
a rotational speed signal generating circuit, wherein the input end is connected to the current output by the rotational speed current setting circuit, and a pulse signal (P_MINR/P_MAXR) is outputted from the output end;
a RS latch circuit having a first input coupled to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM drive signal output by the PWM signal generating circuit, a second input terminal and the rotational signal generating circuit The output pulse signal (P_MINR/P_MAXR) is connected, and a first fixed period pulse signal (VMINR/VMAXR) is outputted by a first output terminal, and a second fixed period pulse is outputted by a second output end. a wave signal (V SET ) to the second input end of the speed signal generating circuit, wherein the pulse signal (V SET ) of the second fixed period is opposite to the phase of the first fixed period pulse signal (VMINR); And a logic gate, wherein the first input end is connected to the PWM driving signal, and the second input end and the first output end of the RS latching circuit output the pulse signal of the first fixed period (VMINR/ VMAXR) is connected to output a control signal of the motor speed. 根據申請專利範圍第1項所述之馬達轉速設定裝置，其中該邏輯閘為一OR邏輯閘。The motor speed setting device according to claim 1, wherein the logic gate is an OR logic gate. 根據申請專利範圍第1項所述之馬達轉速設定裝置，其中該邏輯閘為一AND邏輯閘。The motor speed setting device according to claim 1, wherein the logic gate is an AND logic gate. 根據申請專利範圍第1項所述之馬達轉速設定裝置，其中該電路為一可變電阻。The motor speed setting device according to claim 1, wherein the circuit is a variable resistor. 一種馬達驅動裝置，由一馬達轉速設定裝置及一輸出單元所形成，而該輸出單元與該馬達轉速設定裝置之輸出端連接，其中，該馬達轉速設定裝置包括：
一PWM訊號產生電路，其輸入端與一PWM驅動訊號連接，並由輸出端輸出一個與該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；
一轉速電流設定電路，其輸入端與一電路連接，藉由調整該電路來控制該轉速電流設定電路輸出一電流；
一轉速訊號產生電路，其輸入端與該轉速電流設定電路所輸出的該電流連接，並由輸出端輸出一個脈波訊號（P_MINR/P_MAXR）；
一RS閂鎖電路，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與該轉速訊號產生電路所輸出之脈波訊號（P_MINR/P_MAXR）連接，並由一第一輸出端輸出一個第一固定週期的脈波訊號（VMINR/VMAXR），由一第二輸出端輸出一個第二固定週期的脈波訊號（VSET ）至該轉速訊號產生電路的第二輸入端，其中，該第二固定週期的脈波訊號（VSET ）與該第一固定週期的脈波訊號（VMINR）的相位相反；及
一邏輯閘，其一第一輸入端與該PWM驅動訊號連接，其一第二輸入端與該RS閂鎖電路的第一輸出端所輸出的該第一固定週期的脈波訊號（VMINR/VMAXR）連接，以輸出一個馬達轉速之控制訊號。A motor driving device is formed by a motor rotation speed setting device and an output unit, and the output unit is connected to an output end of the motor rotation speed setting device, wherein the motor rotation speed setting device comprises:
a PWM signal generating circuit, wherein the input end is connected to a PWM driving signal, and the output end outputs a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal;
a speed current setting circuit, wherein the input end is connected to a circuit, and the circuit is controlled to output a current by adjusting the circuit;
a rotational speed signal generating circuit, wherein the input end is connected to the current output by the rotational speed current setting circuit, and a pulse signal (P_MINR/P_MAXR) is outputted from the output end;
a RS latch circuit having a first input coupled to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM drive signal output by the PWM signal generating circuit, a second input terminal and the rotational signal generating circuit The output pulse signal (P_MINR/P_MAXR) is connected, and a first fixed period pulse signal (VMINR/VMAXR) is outputted by a first output terminal, and a second fixed period pulse is outputted by a second output end. a wave signal (V SET ) to the second input end of the speed signal generating circuit, wherein the pulse signal (V SET ) of the second fixed period is opposite to the phase of the first fixed period pulse signal (VMINR); And a logic gate, wherein the first input end is connected to the PWM driving signal, and the second input end and the first output end of the RS latching circuit output the pulse signal of the first fixed period (VMINR/ VMAXR) is connected to output a control signal of the motor speed. 根據申請專利範圍第5項所述之馬達驅動裝置，其中該邏輯閘為一OR邏輯閘。The motor drive device of claim 5, wherein the logic gate is an OR logic gate. 根據申請專利範圍第5項所述之馬達驅動裝置，其中該邏輯閘為一AND邏輯閘。The motor driving device of claim 5, wherein the logic gate is an AND logic gate. 根據申請專利範圍第5項所述之馬達轉速設定裝置，其中該電路為一可變電阻。A motor speed setting device according to claim 5, wherein the circuit is a variable resistor. 一種馬達驅動裝置，由一馬達轉速設定裝置及一輸出單元所形成，而該輸出單元與該馬達轉速設定裝置之輸出端連接，其中，該馬達轉速設定裝置包括：
一PWM訊號產生電路，其輸入端與一PWM驅動訊號連接，並由輸出端輸出一個與該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）；
一最低轉速設定裝置，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與一第一電路連接，並輸出一個第一固定週期的脈波訊號（VMINR）；
一最高轉速設定裝置，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與一第二電路連接，並輸出一個第二固定週期的脈波訊號（VMAXR）；
一OR邏輯閘，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與該第一固定週期的脈波訊號（VMINR）連接，並由輸出端輸出一個第一控制訊號（PWM_MIN）；
一AND邏輯閘，其一第一輸入端與該第一控制訊號（PWM_MIN）連接，其一第二輸入端與該第二固定週期的脈波訊號（VMAXR）連接，並由輸出端輸出一個第二控制訊號（PWM_MIN_MAX）至該輸出單元。A motor driving device is formed by a motor rotation speed setting device and an output unit, and the output unit is connected to an output end of the motor rotation speed setting device, wherein the motor rotation speed setting device comprises:
a PWM signal generating circuit, wherein the input end is connected to a PWM driving signal, and the output end outputs a pulse signal (P_PWM) synchronized with the trigger signal of the PWM driving signal;
a minimum speed setting device, wherein a first input end is connected to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM driving signal output by the PWM signal generating circuit, and a second input end is connected to a first circuit And outputting a first fixed period of pulse wave signal (VMINR);
a maximum speed setting device, wherein a first input end is connected to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM driving signal outputted by the PWM signal generating circuit, and a second input end is connected to a second circuit And outputting a second fixed period pulse signal (VMAXR);
An OR logic gate, wherein a first input end is connected to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM driving signal output by the PWM signal generating circuit, and a second input end is coupled to the first fixed period The pulse wave signal (VMINR) is connected, and a first control signal (PWM_MIN) is outputted by the output terminal;
An AND logic gate is connected to the first control signal (PWM_MIN), a second input terminal is connected to the pulse signal (VMAXR) of the second fixed period, and an output is outputted by the output terminal. Two control signals (PWM_MIN_MAX) to the output unit. 根據申請專利範圍第9項所述之馬達驅動裝置，其中該最低轉速設定裝置包括：
一轉速電流設定電路，其輸入端與該第一電路連接，藉由調整該第一電路來控制該轉速電流設定電路輸出一電流；
一轉速訊號產生電路，其輸入端與該轉速電流設定電路所輸出的該電流連接，並由輸出端輸出一個脈波訊號（P_MINR）；
一RS閂鎖電路，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與該轉速訊號產生電路所輸出之脈波訊號（P_MINR）連接，並由一第一輸出端輸出該第一固定週期的脈波訊號（VMINR），再由一第二輸出端輸出一個第三固定週期的脈波訊號（VSET ）至該轉速訊號產生電路的第二輸入端，其中，該第三固定週期的脈波訊號（VSET ）與該第一固定週期的脈波訊號（VMINR）的相位相反；及
一個OR邏輯閘，其一第一輸入端與該PWM驅動訊號連接，其一第二輸入端與該RS閂鎖電路的第一輸出端所輸出的該第一固定週期的脈波訊號（VMINR）連接，以輸出該第一控制訊號（PWM_MIN）。The motor drive device of claim 9, wherein the minimum rotational speed setting device comprises:
a speed current setting circuit, wherein the input end is connected to the first circuit, and the first circuit is adjusted to control the speed current setting circuit to output a current;
a rotational speed signal generating circuit, wherein the input end is connected to the current output by the rotational speed current setting circuit, and a pulse signal (P_MINR) is outputted from the output end;
a RS latch circuit having a first input coupled to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM drive signal output by the PWM signal generating circuit, a second input terminal and the rotational signal generating circuit The output pulse signal (P_MINR) is connected, and the pulse signal (VMINR) of the first fixed period is output by a first output terminal, and the pulse signal of the third fixed period is output by a second output terminal ( V SET ) to the second input end of the rotational speed signal generating circuit, wherein the pulse signal (V SET ) of the third fixed period is opposite to the phase of the pulse signal (VMINR) of the first fixed period; and an OR a logic gate having a first input coupled to the PWM drive signal and a second input coupled to the first fixed cycle pulse signal (VMINR) output by the first output of the RS latch circuit, The first control signal (PWM_MIN) is output. 根據申請專利範圍第9項所述之馬達驅動裝置，其中該最高轉速設定裝置包括：
一轉速電流設定電路，其輸入端與該第二電路連接，藉由調整該第二電路來控制該轉速電流設定電路輸出一電流；
一轉速訊號產生電路，其輸入端與該轉速電流設定電路所輸出的該電流連接，並由輸出端輸出一個脈波訊號（P_MAXR）；
一RS閂鎖電路，其一第一輸入端與該PWM訊號產生電路所輸出之該PWM驅動訊號之觸發訊號同步的脈波訊號（P_PWM）連接，其一第二輸入端與該轉速訊號產生電路所輸出之脈波訊號（P_MAXR）連接，並由一第一輸出端輸出該第二固定週期的脈波訊號（VMAXR），再由一第二輸出端輸出一個第四固定週期的脈波訊號（VSET ）至該轉速訊號產生電路的第二輸入端，其中，該第四固定週期的脈波訊號（VSET ）與該第二固定週期的脈波訊號（VMAXR）的相位相反。The motor drive device of claim 9, wherein the maximum rotational speed setting device comprises:
a speed current setting circuit, wherein the input end is connected to the second circuit, and the second circuit is adjusted to control the speed current setting circuit to output a current;
a rotational speed signal generating circuit, wherein the input end is connected to the current output by the rotational speed current setting circuit, and a pulse signal (P_MAXR) is outputted from the output end;
a RS latch circuit having a first input coupled to a pulse signal (P_PWM) synchronized with a trigger signal of the PWM drive signal output by the PWM signal generating circuit, a second input terminal and the rotational signal generating circuit The output pulse signal (P_MAXR) is connected, and a second fixed period pulse signal (VMAXR) is outputted by a first output terminal, and a fourth fixed period pulse signal is output by a second output terminal ( V SET ) to the second input end of the rotational speed signal generating circuit, wherein the pulse signal (V SET ) of the fourth fixed period is opposite to the phase of the pulse signal (VMAXR) of the second fixed period. 根據申請專利範圍第10項所述之馬達驅動裝置，其中該第一電路為一可變電阻。The motor driving device of claim 10, wherein the first circuit is a variable resistor. 根據申請專利範圍第11項所述之馬達驅動裝置，其中該第二電路為一可變電阻。The motor driving device of claim 11, wherein the second circuit is a variable resistor.
TW101106724A 2012-03-01 2012-03-01 Motor driving apparatus with minimum and maximum speed settings TWI435529B (en)

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