TWI413905B - Apparatus for testing usb ports - Google Patents

Apparatus for testing usb ports Download PDF

Info

Publication number
TWI413905B
TWI413905B TW99108799A TW99108799A TWI413905B TW I413905 B TWI413905 B TW I413905B TW 99108799 A TW99108799 A TW 99108799A TW 99108799 A TW99108799 A TW 99108799A TW I413905 B TWI413905 B TW I413905B
Authority
TW
Taiwan
Prior art keywords
transistor
output
microcontroller
voltage
pin
Prior art date
Application number
TW99108799A
Other languages
Chinese (zh)
Other versions
TW201133247A (en
Inventor
Wei Huang
Zhe Zhang Yuan
Tom Chen
Original Assignee
Inventec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inventec Corp filed Critical Inventec Corp
Priority to TW99108799A priority Critical patent/TWI413905B/en
Publication of TW201133247A publication Critical patent/TW201133247A/en
Application granted granted Critical
Publication of TWI413905B publication Critical patent/TWI413905B/en

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)

Abstract

An apparatus for testing usb (Universal Serial Bus) ports includes a current measurement device, a voltage comparator, an A/D (Analog to Digital) converter, a MCU (Micro Controller Unit), and a loading circuit. The current measurement device is used to measure an output current of an usb port. The voltage comparator is used to protect the loading circuit according to an indicating signal the voltage comparator itself outputs. The A/D converter is used to output a digital signal into which the A/D converter itself converts an analog signal. The MCU is used to examine the output current, an output voltage and four basic transmission properties of the usb port. With the apparatus, it is accomplished to detect both the basic transmission properties and the output current and the output voltage of the usb port.

Description

通用序列匯流排埠測試裝置Universal serial bus enthalpy test device

本發明係關於一種測試裝置,特別是一種用以測試通用序列匯流排埠的供電規範的測試裝置。The present invention relates to a test apparatus, and more particularly to a test apparatus for testing a power supply specification for a universal serial bus bar.

目前所使用的電子設備,大多皆配置有通用序列匯流排埠。通用序列匯流排埠是用以連接電子設備的外部裝置的一種串列埠匯流排。通用序列匯流排埠尤其被廣泛地使用在電腦上,但也可以用在機上盒(Set top box)和遊戲機上。通用序列匯流排埠可用以使得電子設備與其便攜裝置(Universal Serial Bus Device,USB設備)之間可直接交換資料。Most of the electronic devices currently in use are equipped with a universal serial bus. A universal serial bus is a serial bus that is used to connect external devices of an electronic device. Universal serial busbars are especially widely used on computers, but can also be used on set top boxes and gaming consoles. The universal serial bus can be used to allow direct exchange of data between the electronic device and its portable device (Universal Serial Bus Device, USB device).

當使用者把USB設備連接至電子設備的通用序列匯流排埠後,電子設備首先先檢測USB設備是否已成功連接在通用序列匯流排埠上。若已成功連接,然後電子設備才能夠進行與USB設備之間的資料交換,進而實現USB設備的功能。因此,為了驗證電子設備的通用序列匯流排埠能夠正常工作,在電子設備出廠檢驗與日常維護時,測試者或使用者需要進行測試通用序列匯流排埠的品質問題的動作。After the user connects the USB device to the universal serial bus of the electronic device, the electronic device first detects whether the USB device has successfully connected to the universal serial bus. If the connection is successful, then the electronic device can exchange data with the USB device, thereby implementing the function of the USB device. Therefore, in order to verify that the universal serial bus of the electronic device can work normally, the tester or the user needs to perform the action of testing the quality problem of the general sequence bus when the electronic device is factory-inspected and routinely maintained.

一般而言,通用序列匯流排埠的規範,要求其供電電壓不能超過5.25伏特。因此,在正常操作的情況之下,通用序列匯流排埠提供的電壓介於4.75至5.25伏特之間,並且通用序列匯流排埠的輸出電流不超過500毫安培(mA)。In general, the general-purpose serial busbar specification requires that the supply voltage not exceed 5.25 volts. Thus, under normal operating conditions, the universal sequence bus bar provides a voltage between 4.75 and 5.25 volts, and the output current of the universal sequence bus bar does not exceed 500 milliamps (mA).

是故,在測試通用序列匯流排埠傳輸資料的性能是否正常時,通常會透過帶有USB插頭的滑鼠、鍵盤、遊戲桿、印表機或移動硬碟等設備來完成。在測試過程中,可把上述的USB設備***通用序列匯流排埠,再經由電子設備的測試程式查看是否有檢測到該USB設備的存在,接著才檢測該USB設備是否能夠正常工作。然而,此種測試方式存在有一問題:當電子設備包括多個通用序列匯流排埠時,測試者需逐一把USB設備分別***每一個通用序列匯流排埠上。此一程序不但增加了測試過程的複雜度,也使得測試時間過長且效率過低。Therefore, when testing the performance of a general-purpose serial bus and transmitting data, it is usually done through a mouse, keyboard, joystick, printer, or mobile hard disk with a USB plug. During the test, the USB device can be inserted into the universal serial bus, and then the electronic device's test program can check whether the USB device is detected, and then it is detected whether the USB device can work normally. However, there is a problem with this type of test method: when the electronic device includes a plurality of general-purpose serial bus bars, the tester needs to insert each of the universal serial bus bars into one USB device. This procedure not only increases the complexity of the test process, but also makes the test time too long and inefficient.

此外,為了檢驗通用序列匯流排埠的供電電壓與電流是否符合規範,測試者更必須在上述用以測試通用序列匯流排埠傳輸資料的性能是否正常的USB設備外,額外設置其他可用以檢測電壓、電流的測試裝置。是故,此項動作同時也增加了通用序列匯流排埠的測試成本。In addition, in order to verify whether the supply voltage and current of the universal serial bus are in compliance with the specifications, the tester must additionally set other available voltages for detection outside the USB device for testing the performance of the general-purpose serial bus. , current testing device. Therefore, this action also increases the test cost of the universal serial bus.

基於上述先前技術存在有測試成本與測試複雜度的問題,本發明提出一種通用序列匯流排埠測試裝置,用以測試一電子設備的一通用序列匯流排埠。Based on the above prior art, there is a problem of test cost and test complexity. The present invention proposes a universal sequence bus sputum test device for testing a universal sequence bus 一 of an electronic device.

通用序列匯流排埠測試裝置,包括:一電流檢測器、一電壓比較器、一類比數位資料轉換器、一微控制器以及一負載電路。The universal serial bus bar testing device comprises: a current detector, a voltage comparator, an analog data converter, a microcontroller and a load circuit.

電流檢測器,可用以檢測產生於通用序列匯流排埠的一輸出電流並且產生對應於輸出電流的一類比比較電壓。A current detector can be used to detect an output current generated in the common sequence bus bar and generate an analog comparison voltage corresponding to the output current.

電壓比較器,可用以根據類比比較電壓與一參考電壓輸出一指示信號。The voltage comparator can be used to output an indication signal according to the analog comparison voltage and a reference voltage.

類比數位資料轉換器,可用以連接電流檢測器與通用序列匯流排埠,以將類比比較電壓與產生於通用序列匯流排埠的一類比輸出電壓轉換成一數位比較電壓與一數位輸出電壓。An analog digital data converter can be used to connect the current detector to the universal serial bus to convert the analog comparison voltage to a analog output voltage generated in the universal serial bus 成 to a digital comparison voltage and a digital output voltage.

微控制器,可用以接收產生於通用序列匯流排埠的一差分信號、數位比較電壓與數位輸出電壓。A microcontroller can be used to receive a differential signal, a digital comparison voltage, and a digital output voltage generated in a common sequence bus.

負載電路,可用以連接於通用序列匯流排埠測試裝置的一輸出接點、電壓比較器與微控制器之間。並且,負載電路可用以根據微控制器與指示信號形成導通狀態和關閉狀態其中之一。The load circuit can be connected between an output contact of the universal serial bus bar test device, the voltage comparator and the microcontroller. And, the load circuit can be used to form one of an on state and a off state according to the microcontroller and the indication signal.

是故,根據本發明之一實施例所揭露的通用序列匯流排埠測試裝置,不僅可完成對通用序列匯流排埠之基本傳輸類型的測試,更可同時達到對其供電規範(輸出電壓與輸出電流)的測試功能。Therefore, the universal sequence bus bar test device disclosed in one embodiment of the present invention can not only complete the test of the basic transmission type of the universal sequence bus, but also achieve the power supply specification (output voltage and output) at the same time. Current test function.

以上之關於本發明內容說明與以下之實施方式係用以示範與解釋本發明之精神與原理,並且提供本發明專利申請範圍更進一步的解釋。The above description of the present invention and the following embodiments are intended to illustrate and explain the spirit and principles of the invention, and to provide further explanation of the scope of the invention.

請參閱「第1圖」,係為根據本發明之一實施例的通用序列匯流排埠測試裝置。此種通用序列匯流排埠測試裝置可用以測試一電子設備的通用序列匯流排埠10。Please refer to "FIG. 1", which is a general-purpose serial busbar test device according to an embodiment of the present invention. Such a universal serial bus sputum test device can be used to test a universal serial bus 埠 10 of an electronic device.

此通用序列匯流排埠測試裝置包括:一電流檢測器100、一電壓比較器200、一類比數位資料轉換器300、一微控制器400以及一負載電路500。The universal serial bus bar testing device includes a current detector 100, a voltage comparator 200, an analog digital data converter 300, a microcontroller 400, and a load circuit 500.

通用序列匯流排埠10包括有四端點,分別為輸出端VBUS、雙絞線正端D+、雙絞線負端D-與接地端GND。The universal serial bus 埠 10 includes four terminals, namely, an output terminal VBUS, a twisted pair positive terminal D+, a twisted pair negative terminal D-, and a ground GND.

其中,接地端GND用以接地。The ground GND is used for grounding.

輸出端VBUS可用以輸出通用序列匯流排埠10的一類比輸出電壓Va 與一輸出電流Io ,並且輸出端VBUS可用以連接USB設備。The output terminal VBUS can be used to output an analog output voltage V a of the universal sequence bus 埠 10 and an output current I o , and the output terminal VBUS can be used to connect the USB device.

雙絞線正端D+與雙絞線負端D-可用以提供一差分信號Vdif’ 並且差分信號Vdif 可用以驅動USB設備,例如:通用序列匯流排埠測試裝置。The twisted pair positive terminal D+ and the twisted pair negative terminal D- can be used to provide a differential signal V dif ' and the differential signal V dif can be used to drive a USB device, such as a universal serial bus bar test device.

如「第1圖」所示,電流檢測器100連接於通用序列匯流排埠10、負載電路500、類比數位資料轉換器300與電壓比較器200之間。電流檢測器100可用以檢測通用序列匯流排埠10的輸出電流Io ,並且根據輸出電流Io 輸出一類比比較電壓VacAs shown in FIG. 1, the current detector 100 is connected between the general-purpose serial bus bar 10, the load circuit 500, the analog-digital data converter 300, and the voltage comparator 200. The current detector 100 may be used to detect output current universal serial bus ports 10 of I o, I o and the output current comparator outputs an analog voltage V ac.

其中,類比比較電壓Vac 相應於輸出電流Io :當輸出電流Io 小於500毫安培時,其相應的類比比較電壓Vac 會介於0伏特至1伏特之間。而當輸出電流Io 大於500毫安培時,其相應的類比比較電壓Vac 會介於1伏特至2伏特之間。Wherein, the analog comparison voltage V ac corresponds to the output current I o : when the output current I o is less than 500 milliamps, the corresponding analog comparison voltage V ac may be between 0 volts and 1 volt. When the output current I o is greater than 500 mA, the corresponding analog comparison voltage V ac will be between 1 volt and 2 volts.

電流檢測器100的詳細示意圖,請參閱「第2圖」。根據本發明之一實施例,電流檢測器100包括一電流監測單元102與一監測電阻104。For a detailed diagram of the current detector 100, please refer to "Figure 2". According to an embodiment of the invention, current detector 100 includes a current monitoring unit 102 and a monitoring resistor 104.

其中,電流監測單元102包括多個接腳,這些接腳可分別用以連接接地GND、一電源VCC、通用序列匯流排埠10的輸出端VBUS、一輸出接點VR 、電壓比較器200與類比數位資料轉換器300。The current monitoring unit 102 includes a plurality of pins, which are respectively connected to the ground GND, a power source VCC, the output terminal VBUS of the universal serial bus bar 10, an output contact V R , and the voltage comparator 200 and Analog digital data converter 300.

監測電阻104係連接於通用序列匯流排埠10的輸出端VBUS與輸出接點VR 之間。電流監測單元102可用以根據監測電阻104兩端的壓降與監測電阻104的電阻值,計算出通用序列匯流排埠10的輸出電流IoThe monitoring resistor 104 is connected between the output terminal VBUS of the universal serial bus bar 10 and the output contact V R . Current monitoring unit 102 may be used to monitor the resistance value of the resistor 104 and the voltage drop across the sensing resistor 104, the calculated Universal Serial Bus ports of the output current I o 10.

電流監測單元102可包括有六個接腳,但值得一提的是,凡可達成電流監測功能的單元元件並不侷限於接腳數目為六個。為了清楚說明,於此是以接腳數目為六的電流監測單元102揭示如上。The current monitoring unit 102 can include six pins, but it is worth mentioning that the unit elements that can achieve the current monitoring function are not limited to six pins. For clarity of illustration, the current monitoring unit 102, which has a number of pins of six, is disclosed above.

電壓比較器200的正輸入端連接於電流檢測器100與類比數位資料轉換器300的接點。電壓比較器200的負輸入端連接一參考電壓Vref ,其中參考電壓Vref 為1伏特。電壓比較器200的輸出端連接負載電路500。藉此連接關係,電壓比較器200可用以接收類比比較電壓Vac 、比較類比比較電壓Vac 與參考電壓Vref 並且輸出一指示信號Vind 。其中,指示信號Vind 可用以控制負載電路500的導通狀態。當類比比較電壓Vac 介於1伏特至2伏特之間時,指示信號Vind 為高準位。反之,當類比比較電壓Vac 介於0伏特至1伏特之間時,指示信號Vind 為低準位。The positive input of voltage comparator 200 is coupled to the junction of current detector 100 and analog digital data converter 300. The negative input of voltage comparator 200 is coupled to a reference voltage V ref , where reference voltage V ref is 1 volt. The output of the voltage comparator 200 is connected to the load circuit 500. With this connection relationship, the voltage comparator 200 can be used to receive the analog comparison voltage V ac , compare the analog comparison voltage V ac with the reference voltage V ref and output an indication signal V ind . Wherein, the indication signal V ind can be used to control the conduction state of the load circuit 500. When the analog comparison voltage V ac is between 1 volt and 2 volts, the indication signal V ind is at a high level. Conversely, when the analog comparison voltage V ac is between 0 volts and 1 volt, the indication signal V ind is at a low level.

類比數位資料轉換器300的輸入端可用以連接通用序列匯流排埠10的輸出端VBUS與電流檢測器100。藉此連接關係,類比數位資料轉換器300可用以讀取類比輸出電壓Va 與類比比較電壓VacThe input of the analog digital data converter 300 can be used to connect the output VBUS of the universal serial bus 埠 10 with the current detector 100. By this connection relationship, the analog digital data converter 300 can be used to read the analog output voltage V a and the analog comparison voltage V ac .

由於類比數位資料轉換器300可用以轉換類比訊號成數位訊號。因此,類比數位資料轉換器300可用以輸出一數位輸出電壓VD 與一數位比較電壓Vdc 。其中,數位輸出電壓VD 相應於類比輸出電壓Va ,數位比較電壓Vdc 相應於類比比較電壓VacSince the analog digital data converter 300 can be used to convert the analog signal into a digital signal. Therefore, the analog digital data converter 300 can be used to output a digital output voltage V D and a digital comparison voltage V dc . Wherein, the digital output voltage V D corresponds to the analog output voltage V a , and the digital comparison voltage V dc corresponds to the analog comparison voltage V ac .

類比數位資料轉換器300的輸出端可用以連接一電可擦拭可編程唯讀記憶體(Electrically-Erasable Programmable Read-Only Memory)600與微控制器400。其中,電可擦拭可編程唯讀記憶體600可用以暫存類比數位資料轉換器300的記憶狀態,且微控制器400可用以讀取相應於通用序列匯流排埠10的類比輸出電壓Va 的數位輸出電壓VDThe output of the analog digital data converter 300 can be used to connect an electrically-erasable programmable read-only memory 600 to the microcontroller 400. The electrically erasable programmable read only memory 600 can be used to temporarily store the memory state of the analog digital data converter 300, and the microcontroller 400 can be used to read the analog output voltage V a corresponding to the universal serial bus bar 10 Digital output voltage V D .

微控制器400的輸入端可用以連接通用序列匯流排埠10的雙絞線正端D+、雙絞線負端D-與類比數位資料轉換器300。藉此連接關係,微控制器400可用以接收差分信號Vdif 、通用序列匯流排埠10的數位輸出電壓VD 與數位比較電壓Vdc 。微控制器400更可藉由數位比較電壓Vdc 而回推得到通用序列匯流排埠10的輸出電流Io 。是故,根據本發明之一實施例的通用序列匯流排埠測試裝置可藉由上述的機構連結與原理,用以測試通用序列匯流排埠10的數位輸出電壓VD 與輸出電流IoThe input of the microcontroller 400 can be used to connect the twisted pair positive terminal D+ of the universal serial busbar 10, the twisted pair negative terminal D- and the analog digital data converter 300. With this connection, the microcontroller 400 can be used to receive the differential signal V dif , the digital output voltage V D of the universal sequence bus 埠 10, and the digital comparison voltage V dc . The microcontroller 400 can also be pushed back by the digital comparison voltage V dc to obtain the output current I o of the universal serial bus 埠 10 . Therefore, the universal serial bus bar test apparatus according to an embodiment of the present invention can test the digital output voltage V D and the output current I o of the universal serial bus bar 10 by the above-described mechanism connection and principle.

此外,微控制器400更可用於連接於一輸入信號單元700與負載電路500之間,其作動關係如「第3圖」所示。輸入信號單元700包括一開關元件S1 與一輸入電阻R6 。其中,開關元件S1 連接於微控制器400與一第一輸出電壓Vs 之間。輸入電阻R6 的一端連接於微控制器400與開關元件S1 的接點,輸入電阻R6 的另一端接地。於此,第一輸出電壓Vs 可為3.3伏特。In addition, the microcontroller 400 is further configured to be connected between an input signal unit 700 and the load circuit 500, and the actuation relationship is as shown in FIG. 3. The input signal unit 700 includes a switching element S 1 and an input resistor R 6 . The switching element S 1 is connected between the microcontroller 400 and a first output voltage V s . One end of the input resistor R 6 is connected to the contact of the microcontroller 400 and the switching element S 1 , and the other end of the input resistor R 6 is grounded. Here, the first output voltage V s can be 3.3 volts.

當開關元件S1 被關閉時,微控制器400藉由輸入信號單元700被強制連接至第一輸出電壓Vs 。因此微控制器400藉此產生一低準位的錯誤訊號Verr 並且微控制器400可藉由錯誤訊號Verr 控制負載電路500。When the switching element S 1 is turned off, the microcontroller 400 is forcibly connected to the first output voltage V s by the input signal unit 700. Therefore, the microcontroller 400 generates a low level error signal V err and the microcontroller 400 can control the load circuit 500 by the error signal V err .

由於負載電路500係藉由電流檢測器100連接於通用序列匯流排埠10,故當開關元件S1 被關閉時,微控制器400藉由低準位的錯誤訊號Verr 強制使得負載電路500導通。在此情況下,通用序列匯流排埠10的輸出電流Io 超過500毫安培,並且電流檢測器100輸出的類比比較電壓Vac 介於1伏特至2伏特之間。因此,電壓比較器200輸出的指示信號Vind 為高準位。於是,負載電路500接著被強制關閉。是故,電壓比較器200可因此達到保護本發明之一實施例所揭露的通用序列匯流排埠測試裝置的目的。Since the load circuit 500 is connected to the universal serial bus 埠 10 by the current detector 100, when the switching element S 1 is turned off, the microcontroller 400 forcibly turns on the load circuit 500 by the low level error signal V err . . In this case, universal serial bus ports of the output current I o 10 more than 500 mA, and the analog comparison voltage V ac 100 output from the current detector between 1 volt to 2 volts. Therefore, the indication signal V ind output by the voltage comparator 200 is at a high level. Thus, the load circuit 500 is then forced to turn off. Therefore, the voltage comparator 200 can thus achieve the purpose of protecting the universal serial busbar test device disclosed in one embodiment of the present invention.

根據本發明之一實施例之微控制器400的輸出端,更可用以連接一顯示狀態單元800、一通訊轉換電路900與一靜態隨機存取存儲器(Static Random Access Memory,SRAM) 910。其中,靜態隨機存取存儲器910可用以儲存微控制器400的記憶資料。The output of the microcontroller 400 according to an embodiment of the present invention may further be used to connect a display state unit 800, a communication conversion circuit 900, and a static random access memory (SRAM) 910. The static random access memory 910 can be used to store the memory data of the microcontroller 400.

如「第4圖」所示,顯示狀態單元800包括一發光二極體D1 與一顯示電阻R5 。發光二極體D1 連接於微控制器400與顯示電阻R5 之間。顯示電阻R5 的一端連接發光二極體D1 ,顯示電阻R5 的另一端連接第一輸出電壓Vs 。當本發明之一實施例的通用序列匯流排埠測試裝置連接至通用序列匯流排埠10並且微控制器400接收到差分信號Vdif 時,發光二極體D1 會發光。是故,顯示狀態單元800可藉此顯示微控制器400與通用序列匯流排埠10的連接狀態。As shown in "FIG. 4", the status display unit 800 comprises a light emitting diode D 1 and a display resistor R 5. The light emitting diode D 1 is connected between the microcontroller 400 and the display resistor R 5 . One end of the display resistor R 5 is connected to the light-emitting diode D 1 , and the other end of the display resistor R 5 is connected to the first output voltage V s . When the universal serial bus bar test device of one embodiment of the present invention is connected to the universal sequence bus bar 10 and the microcontroller 400 receives the differential signal V dif , the light emitting diode D 1 emits light. Therefore, the display status unit 800 can thereby display the connection status of the microcontroller 400 with the universal serial bus.

接著,請同時參閱「第1圖」與「第5圖」,其中「第5圖」係為根據本發明之一實施例的通訊轉換電路900。通訊轉換電路900連接微控制器400,並且可用以轉換微控制器400的輸出介面。如本發明之一實施例,通訊轉換電路900可以是一通訊轉換晶片(MAX3232)。通訊轉換晶片(MAX3232)的內部構造係為「第5圖」所示:通訊轉換電路900包括一電路元件U1 、一第一電容C1 、一第二電容C2 、一第三電容C3 、一第四電容C4 、一第五電容C5 、一第一輸出器J1 與一第二輸出器J2Next, please refer to "Fig. 1" and "Fig. 5" at the same time, wherein "Fig. 5" is a communication conversion circuit 900 according to an embodiment of the present invention. The communication conversion circuit 900 is coupled to the microcontroller 400 and can be used to convert the output interface of the microcontroller 400. According to an embodiment of the invention, the communication conversion circuit 900 can be a communication conversion chip (MAX3232). The internal structure of the communication conversion chip (MAX3232) is shown in FIG. 5: the communication conversion circuit 900 includes a circuit component U 1 , a first capacitor C 1 , a second capacitor C 2 , and a third capacitor C 3 . a fourth capacitor C 4, a fifth capacitor C 5, a first output means J 1 and the output of a second J 2.

其中,電路元件U1 連接微控制器400。The circuit component U 1 is connected to the microcontroller 400.

第一電容C1 連接於電路元件U1 的第一接腳1與第二接腳2之間。The first capacitor C 1 is connected between the first pin 1 and the second pin 2 of the circuit element U 1 .

第二電容C2 連接於電路元件U1 的第三接腳3與第四接腳4之間。The second capacitor C 2 is connected between the third pin 3 and the fourth pin 4 of the circuit element U 1 .

第三電容C3 連接於電路元件U1 的第五接腳5與接地之間。The third capacitor C 3 is connected between the fifth pin 5 of the circuit element U 1 and the ground.

第四電容C4 連接於電路元件U1 的第六接腳6與接地之間。The fourth capacitor C 4 is connected between the sixth pin 6 of the circuit element U 1 and the ground.

第五電容C5 連接於電路元件U1 的第七接腳7與接地之間。The fifth capacitor C 5 is connected between the seventh pin 7 of the circuit element U 1 and the ground.

第一輸出器J1 連接電路元件U1 的第八接腳8、第九接腳9與接地。The first outputter J 1 is connected to the eighth pin 8 and the ninth pin 9 of the circuit element U 1 and to the ground.

第二輸出器J2 連接電路元件U1 的第十接腳10、第十一接腳11與接地。The second output J 2 is connected to the tenth pin 10 and the eleventh pin 11 of the circuit element U 1 and to the ground.

其中,根據本發明之一實施例,第五接腳5可連接第一輸出電壓Vs ,以供給電路元件U1 電源。並且第一輸出器J1 與第二輸出器J2 係皆為通用非同步收發傳輸器(Universal Asynchronous Receiver/Transmitter,UART)。通訊轉換電路900可用以轉換微控制器400的輸出TTL介面至RS-232介面。藉由通訊轉換電路900的介面轉換功能,本發明之一實施例的通用序列匯流排埠測試裝置可用於與電子設備的其他串口通訊。Wherein, according to an embodiment of the present invention, the fifth pin 5 can be connected to the first output voltage V s to supply the circuit element U 1 power. And the first outputter J 1 and the second outputter J 2 are both Universal Asynchronous Receiver/Transmitter (UART). The communication conversion circuit 900 can be used to convert the output TTL interface of the microcontroller 400 to the RS-232 interface. The universal serial bus bar test device of one embodiment of the present invention can be used to communicate with other serial ports of the electronic device by the interface conversion function of the communication conversion circuit 900.

請參閱「第6圖」,係為根據本發明之一實施例之通用序列匯流排埠測試裝置的負載電路500。負載電路500包括一第一電阻R1 、一第二電阻R2 、一第三電阻R3 、一第四電阻R4 、一第一電晶體Q1 、一第二電晶體Q2 、一第三電晶體Q3 、一第四電晶體Q4 與一負載電阻R1dPlease refer to FIG. 6 , which is a load circuit 500 of a universal serial bus bar test device according to an embodiment of the present invention. The load circuit 500 includes a first resistor R 1 , a second resistor R 2 , a third resistor R 3 , a fourth resistor R 4 , a first transistor Q 1 , a second transistor Q 2 , and a first The three transistors Q 3 , a fourth transistor Q 4 and a load resistor R 1d .

其中,第一電晶體Q1 的基極連接電壓比較器200且第一電晶體Q1 的源極接地。The base of the first transistor Q 1 is connected to the voltage comparator 200 and the source of the first transistor Q 1 is grounded.

第二電晶體Q2 的基極連接微控制器400且第二電晶體Q2 的源極接地。The base of the second transistor Q 2 is connected to the microcontroller 400 and the source of the second transistor Q 2 is grounded.

第一電阻R1 連接於電壓比較器200與第一電晶體Q1 的基極的接點。The first resistor R 1 is coupled to the junction of the voltage comparator 200 and the base of the first transistor Q 1 .

第二電阻R2 連接於微控制器400與第二電晶體Q2 的基極的接點。The second resistor R 2 is coupled to the junction of the microcontroller 400 and the base of the second transistor Q 2 .

第三電晶體Q3 的基極連接第二電晶體Q2 的汲極且第三電晶體Q3 的源極接地。The base of the third transistor Q 3 is connected to the drain of the second transistor Q 2 and the source of the third transistor Q 3 is grounded.

第四電晶體Q4 的基極連接第一電晶體Q1 的汲極且第四電晶體Q4 的源極連接第三電晶體Q3 的汲極。The base of the fourth transistor Q 4 is connected to the drain of the first transistor Q 1 and the source of the fourth transistor Q 4 is connected to the drain of the third transistor Q 3 .

第三電阻R3 ,連接於第三電晶體Q3 的基極與第二電晶體Q2 的汲極的接點。The third resistor R 3 is connected to the junction of the base of the third transistor Q 3 and the drain of the second transistor Q 2 .

第四電阻R4 ,連接於第四電晶體Q4 的基極與第一電晶體Q1 的汲極的接點。The fourth resistor R 4 is connected to the junction of the base of the fourth transistor Q 4 and the drain of the first transistor Q 1 .

負載電阻R1d ,連接於輸出接點VR 與第四電晶體Q4 的汲極之間。The load resistor R 1d is connected between the output contact V R and the drain of the fourth transistor Q 4 .

根據本發明之一實施例的通用序列匯流排埠測試裝置,其中可在第一電阻R1 與第二電阻R2 之浮接的一端各施以3.3伏特的電壓值,在第三電阻R3 與第四電阻R4 之浮接的一端各施以5伏特的電壓值。Universal serial bus ports, one embodiment of the test apparatus according to the present invention, wherein the applied voltage 3.3 volts each in contact with one end of a second resistor R 2 of the first floating resistor R, the third resistor R 3 One end of the floating connection with the fourth resistor R 4 is applied with a voltage value of 5 volts.

本發明之一實施例的通用序列匯流排埠測試裝置,如「第1圖」所示,更可於輸出接點VR 連接一穩壓器LDO。其中,穩壓器LDO可用以降壓。根據本發明之一實施例,由於穩壓器LDO係透過電流檢測器100與通用序列匯流排埠10連接。因此穩壓器LDO可用以使得通用序列匯流排埠10的類比輸出電壓Va 降轉成較低的電壓輸出,以供電子設備的其他串口使用。根據本發明之一實施例的通用序列匯流排埠測試裝置,穩壓器LDO可用以降轉5伏特的電壓並且輸出3.3伏特的電壓。In the general-purpose serial bus/drain test apparatus according to an embodiment of the present invention, as shown in FIG. 1, a regulator LDO can be connected to the output contact V R . Among them, the regulator LDO can be used to step down. According to an embodiment of the invention, the regulator LDO is connected to the universal serial busbar 10 via the current detector 100. Therefore, the regulator LDO can be used to reduce the analog output voltage V a of the universal serial bus 埠 10 to a lower voltage output for use by other serial ports of the electronic device. In accordance with an exemplary serial bus bar testing apparatus in accordance with an embodiment of the present invention, a voltage regulator LDO can be used to reverse a voltage of 5 volts and output a voltage of 3.3 volts.

此外,本發明之一實施例的微控制器400可為生產於Cypress公司的FX2LP系列,型號為CY7C68013A的EZ-USB晶片。此晶片是一種帶有用以連接電子設備的通用序列匯流排埠的接口的高性能晶片。在晶片上主要包括有USB2.0收發器、數據處理引擎與一個增強型的8051處理核心。其餘單元元件我們並不在此贅述。Furthermore, the microcontroller 400 of one embodiment of the present invention may be an EZ-USB chip of the FX2LP series, model number CY7C68013A, produced by Cypress Corporation. This wafer is a high performance wafer with an interface for connecting a universal serial busbar of an electronic device. The chip mainly includes a USB2.0 transceiver, a data processing engine and an enhanced 8051 processing core. The rest of the unit components are not described here.

由於微控制器400係為一種結合數據處理引擎的高性能晶片,因此微控制器400不僅能夠用以實現上述檢測通用序列匯流排埠10的輸出電壓與輸出電流的功能,更可用以測試通用序列匯流排埠10所需具備的四種傳輸類型:控制傳輸、中斷傳輸、批量傳輸與同步傳輸。Since the microcontroller 400 is a high-performance chip combined with a data processing engine, the microcontroller 400 can be used not only to implement the above-described functions of detecting the output voltage and output current of the universal serial bus 埠 10, but also to test the universal sequence. The four types of transmissions required for bus 埠 10: control transmission, interrupt transmission, bulk transmission and synchronous transmission.

其中,當通用序列匯流排埠測試裝置與通用序列匯流排埠10成功連接並可被電子設備正確識別時,可視為控制傳輸功能正常。Wherein, when the universal sequence bus bar test device is successfully connected with the universal sequence bus bar 10 and can be correctly recognized by the electronic device, the control transfer function can be regarded as normal.

當電子設備經由通用序列匯流排埠10傳送一中斷訊號至通用序列匯流排埠測試裝置後,電子設備若能在限制時間內收到通用序列匯流排埠測試裝置的回應訊息,則可視為中斷傳輸功能正常。After the electronic device transmits an interrupt signal to the universal serial bus bar test device via the universal serial bus bar 10, if the electronic device can receive the response message of the universal sequence bus bar test device within the limited time, the electronic device can be regarded as the interrupt transmission. functioning normally.

當電子設備經由通用序列匯流排埠10傳送一資料訊號至通用序列匯流排埠測試裝置後,若電子設備能夠收到一自通用序列匯流排埠測試裝置回傳的訊號,且該訊號的內容等同於發送時的資料訊號時,可視為批量傳輸功能正常。After the electronic device transmits a data signal to the universal serial bus test device via the universal serial bus, the electronic device can receive a signal returned from the universal serial bus test device, and the content of the signal is equivalent. When the data signal is sent, it can be regarded as normal for the bulk transfer function.

同步傳輸的要求即較寬鬆,只要通用序列匯流排埠測試裝置能夠完成與電子設備間訊號的傳送與接收,則可視為同步傳輸功能正常。The requirement for synchronous transmission is looser. As long as the universal serial bus sputum test device can complete the transmission and reception of signals with the electronic device, the synchronous transmission function can be regarded as normal.

是故,本發明之一實施例的通用序列匯流排埠測試裝置,不僅可藉由微控制器400完成上述四種傳輸類型的測試,更可透過本發明之一實施例的通用序列匯流排埠測試裝置所包括的電流檢測器100、電壓比較器200、類比數位資料轉換器300、微控制器400以及負載電路500完成對通用序列匯流排埠10之供電規範(輸出電壓與輸出電流)的測試功能。Therefore, the general-purpose serial bus sputum test apparatus of an embodiment of the present invention can perform the test of the above four types of transmissions not only by the microcontroller 400, but also by the universal sequence bus arrangement of an embodiment of the present invention. The current detector 100, the voltage comparator 200, the analog digital data converter 300, the microcontroller 400, and the load circuit 500 included in the test apparatus complete the test of the power supply specification (output voltage and output current) of the universal serial bus 埠10. Features.

雖然本發明以前述的較佳實施例揭露如上,然其並非用以限定本發明,任何熟習相像技藝者,在不脫離本發明之精神與範圍內,當可作些許更動與潤飾,因此本發明之專利保護範圍須視本說明書所附之申請專利範圍所界定者為準。While the present invention has been described above in its preferred embodiments, it is not intended to limit the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of patent protection shall be subject to the definition of the scope of the patent application attached to this specification.

10...通用序列匯流排埠10. . . Universal sequence bus

100...電流檢測器100. . . Current detector

102...電流監測單元102. . . Current monitoring unit

104...監測電阻104. . . Monitoring resistor

200...電壓比較器200. . . Voltage comparator

300...類比數位資料轉換器300. . . Analog digital data converter

400...微控制器400. . . Microcontroller

500...負載電路500. . . Load circuit

600...電可擦拭可編程唯讀記憶體600. . . Electric wiping programmable read-only memory

700...輸入信號單元700. . . Input signal unit

800...顯示狀態單元800. . . Display status unit

900...通訊轉換電路900. . . Communication conversion circuit

910...靜態隨機存取存儲器910. . . Static random access memory

VBUS...輸出端VBUS. . . Output

D+...雙絞線正端D+. . . Twisted pair positive end

D-...雙絞線負端D-. . . Twisted pair negative end

GND...接地端GND. . . Ground terminal

VCC...電源VCC. . . power supply

Va ...類比輸出電壓V a . . . Analog output voltage

Io ...輸出電流I o . . . Output current

Vdif ...差分信號V dif . . . Differential signal

Vac ...類比比較電壓V ac . . . Analog comparison voltage

VR ...輸出接點V R . . . Output contact

Vref ...參考電壓V ref . . . Reference voltage

Vind ...指示信號V ind . . . Indication signal

VD ...數位輸出電壓V D . . . Digital output voltage

Vdc ...數位比較電壓V dc . . . Digital comparison voltage

S1 ...開關元件S 1 . . . Switching element

R6 ...輸入電阻R 6 . . . Input resistance

Vs ...第一輸出電壓V s . . . First output voltage

Verr ...錯誤訊號V err . . . Error signal

D1 ...發光二極體D 1 . . . Light-emitting diode

R5 ...顯示電阻R 5 . . . Display resistance

U1 ...電路元件U 1 . . . Circuit component

C1 ...第一電容C 1 . . . First capacitor

C2 ...第二電容C 2 . . . Second capacitor

C3 ...第三電容C 3 . . . Third capacitor

C4 ...第四電容C 4 . . . Fourth capacitor

C5 ...第五電容C 5 . . . Fifth capacitor

J1 ...第一輸出器J 1 . . . First output

J2 ...第二輸出器J 2 . . . Second output

1...第一接腳1. . . First pin

2...第二接腳2. . . Second pin

3...第三接腳3. . . Third pin

4...第四接腳4. . . Fourth pin

5...第五接腳5. . . Fifth pin

6...第六接腳6. . . Sixth pin

7...第七接腳7. . . Seventh pin

8...第八接腳8. . . Eighth pin

9...第九接腳9. . . Ninth pin

10...第十接腳10. . . Tenth pin

11...第十一接腳11. . . Eleventh pin

R1 ...第一電阻R 1 . . . First resistance

R2 ...第二電阻R 2 . . . Second resistance

R3 ...第三電阻R 3 . . . Third resistance

R4 ...第四電阻R 4 . . . Fourth resistor

Q1 ...第一電晶體Q 1 . . . First transistor

Q2 ...第二電晶體Q 2 . . . Second transistor

Q3 ...第三電晶體Q 3 . . . Third transistor

Q4 ...第四電晶體Q 4 . . . Fourth transistor

R1d ...負載電阻R 1d . . . Load Resistance

LDO...穩壓器LDO. . . Stabilizer

第1圖係為根據本發明之一實施例之通用序列匯流排埠測試裝置的概要結構圖;1 is a schematic structural diagram of a universal serial bus enthalpy test apparatus according to an embodiment of the present invention;

第2圖係為根據本發明之一實施例之電流檢測器的示意圖;Figure 2 is a schematic illustration of a current detector in accordance with an embodiment of the present invention;

第3圖係為根據本發明之一實施例之輸入信號單元的示意圖;Figure 3 is a schematic illustration of an input signal unit in accordance with an embodiment of the present invention;

第4圖係為根據本發明之一實施例之顯示狀態單元的示意圖;Figure 4 is a schematic illustration of a display state unit in accordance with an embodiment of the present invention;

第5圖係為根據本發明之一實施例之通訊轉換電路的示意圖;以及Figure 5 is a schematic diagram of a communication conversion circuit in accordance with an embodiment of the present invention;

第6圖係為根據本發明之一實施例之負載電路的示意圖。Figure 6 is a schematic diagram of a load circuit in accordance with an embodiment of the present invention.

10...通用序列匯流排埠10. . . Universal sequence bus

100...電流檢測器100. . . Current detector

200...電壓比較器200. . . Voltage comparator

300...類比數位資料轉換器300. . . Analog digital data converter

400...微控制器400. . . Microcontroller

500...負載電路500. . . Load circuit

600...電可擦拭可編程唯讀記憶體600. . . Electric wiping programmable read-only memory

700...輸入信號單元700. . . Input signal unit

800...顯示狀態單元800. . . Display status unit

900...通訊轉換電路900. . . Communication conversion circuit

910...靜態隨機存取存儲器910. . . Static random access memory

VBUS...輸出端VBUS. . . Output

D+...雙絞線正端D+. . . Twisted pair positive end

D-...雙絞線負端D-. . . Twisted pair negative end

GND...接地端GND. . . Ground terminal

Va ...類比輸出電壓V a . . . Analog output voltage

Io ...輸出電流I o . . . Output current

Vdif ...差分信號V dif . . . Differential signal

Vac ...類比比較電壓V ac . . . Analog comparison voltage

VR ...輸出接點V R . . . Output contact

Vref ...參考電壓V ref . . . Reference voltage

Vind ...指示信號V ind . . . Indication signal

VD ...數位輸出電壓V D . . . Digital output voltage

Vdc ...數位比較電壓V dc . . . Digital comparison voltage

Vs ...第一輸出電壓V s . . . First output voltage

Verr ...錯誤訊號V err . . . Error signal

LDO...穩壓器LDO. . . Stabilizer

Claims (10)

一種通用序列匯排流埠測試裝置,用以測試一電子設備的一通用序列匯排流埠,該通用序列匯排流埠測試裝置包括:一電流檢測器,用以檢測產生於該通用序列匯排流埠的一輸出電流以產生對應之一類比比較電壓;一電壓比較器,用以根據該類比比較電壓與一參考電壓輸出一指示信號;一類比數位資料轉換器,連接該電流檢測器與該通用序列匯排流埠,以將該類比比較電壓與產生於該通用序列匯排流埠的一類比輸出電壓轉換成一數位比較電壓與一數位輸出電壓;一微控制器,用以接收產生於該通用序列匯排流埠的一差分信號、該數位比較電壓與該數位輸出電壓;以及一負載電路,連接於該通用序列匯排流埠測試裝置的一輸出接點、該電壓比較器與該微控制器之間,該負載電路用以根據該微控制器與該指示信號形成導通狀態和關閉狀態其中之一。A universal serial bus flow test device for testing a general sequence sink flow of an electronic device, the universal sequence sink flow test device comprising: a current detector for detecting the general sequence sink generated Discharging an output current of the buffer to generate a corresponding analog voltage; a voltage comparator for outputting an indication signal according to the analog comparison voltage and a reference voltage; and an analog digital converter connected to the current detector The universal sequence is arranged to convert the analog voltage and a analog output voltage generated in the general sequence sink into a digital comparison voltage and a digital output voltage; a microcontroller is configured to receive the a differential signal of the general sequence sink, the digital comparison voltage and the digital output voltage; and a load circuit coupled to an output contact of the universal serial bus flow test device, the voltage comparator and the Between the microcontrollers, the load circuit is configured to form one of an on state and a off state according to the microcontroller and the indication signal. 如請求項1所述的通用序列匯排流埠測試裝置,更包括:至少一輸入信號單元,各該輸入信號單元連接該微控制器,並且用以產生一錯誤訊號,以致使該微控制器根據該錯誤訊號控制該負載電路。The universal sequence sinking rogue testing device of claim 1, further comprising: at least one input signal unit, each of the input signal units being coupled to the microcontroller, and configured to generate an error signal to cause the microcontroller The load circuit is controlled according to the error signal. 如請求項2所述的通用序列匯排流埠測試裝置,其中各該輸入信號單元包括:一開關元件,連接於該微控制器與一第一輸出電壓之間;以及一輸入電阻,該輸入電阻的一端連接於該微控制器與該開關元件的接點,該輸入電阻的另一端接地。The universal sequence sinking test device of claim 2, wherein each of the input signal units comprises: a switching element connected between the microcontroller and a first output voltage; and an input resistor, the input One end of the resistor is connected to the junction of the microcontroller and the switching element, and the other end of the input resistor is grounded. 如請求項1所述的通用序列匯排流埠測試裝置,更包括:至少一顯示狀態單元,各該顯示狀態單元連接該微控制器,用以顯示該微控制器與該通用序列匯排流埠的連接狀態。The universal sequence sinking rogue testing device of claim 1, further comprising: at least one display state unit, each of the display state units being coupled to the microcontroller for displaying the microcontroller and the universal sequence The connection status of 埠. 如請求項4所述的通用序列匯排流埠測試裝置,其中各該顯示狀態單元包括:一發光二極體,連接該微控制器;以及一顯示電阻,連接在該發光二極體相對於該微控制器的另一端和一第一輸出電壓之間。The universal sequence sinking flow testing device according to claim 4, wherein each of the display state units comprises: a light emitting diode connected to the microcontroller; and a display resistor connected to the light emitting diode relative to The other end of the microcontroller is between a first output voltage. 如請求項1所述的通用序列匯排流埠測試裝置,其中該電流檢測器包括:一電流監測單元,連接至接地、一電源、該通用序列匯排流埠、該輸出接點、該電壓比較器與該類比數位資料轉換器;以及一監測電阻,連接於該通用序列匯排流埠與該輸出接點之間。The universal sequence sinking rogue testing device of claim 1, wherein the current detector comprises: a current monitoring unit connected to the ground, a power source, the universal sequence sink, the output contact, the voltage a comparator and the analog digital data converter; and a monitoring resistor coupled between the universal serial bus and the output contact. 如請求項1所述的通用序列匯排流埠測試裝置,其中該負載電路包括:一第一電晶體,該第一電晶體的基極連接該電壓比較器且該第一電晶體的源極接地;一第二電晶體,該第二電晶體的基極連接該微控制器且該第二電晶體的源極接地;一第一電阻,連接於該電壓比較器與該第一電晶體的基極的接點;一第二電阻,連接於該微控制器與該第二電晶體的基極的接點;一第三電晶體,該第三電晶體的基極連接該第二電晶體的汲極且該第三電晶體的源極接地;一第四電晶體,該第四電晶體的基極連接該第一電晶體的汲極且該第四電晶體的源極連接該第三電晶體的汲極;一第三電阻,連接於該第三電晶體的基極與該第二電晶體的汲極的接點;一第四電阻,連接於該第四電晶體的基極與該第一電晶體的汲極的接點;以及一負載電阻,連接於該輸出接點與該第四電晶體的汲極之間。The universal sequence sinking test device of claim 1, wherein the load circuit comprises: a first transistor, a base of the first transistor is connected to the voltage comparator and a source of the first transistor Grounding; a second transistor, a base of the second transistor is coupled to the microcontroller and a source of the second transistor is grounded; a first resistor coupled to the voltage comparator and the first transistor a base contact; a second resistor connected to the junction of the microcontroller and the base of the second transistor; a third transistor having a base connected to the second transistor a drain of the third transistor and a source of the third transistor; a fourth transistor having a base connected to the drain of the first transistor and a source of the fourth transistor connected to the third a drain of the transistor; a third resistor connected to the junction of the base of the third transistor and the drain of the second transistor; a fourth resistor connected to the base of the fourth transistor a junction of the drain of the first transistor; and a load resistor coupled to the output contact and the fourth Between the bungee of the transistor. 如請求項1所述的通用序列匯排流埠測試裝置,更包括一通訊轉換電路,連接該微控制器,以轉換該微控制器的輸出介面。The universal sequence sinking test device as claimed in claim 1, further comprising a communication conversion circuit connected to the microcontroller to convert the output interface of the microcontroller. 如請求項8所述的通用序列匯排流埠測試裝置,其中該通訊轉換電路包括:一電路元件,連接該微控制器;一第一電容,連接於該電路元件的一第一接腳與一第二接腳之間;一第二電容,連接於該電路元件的一第三接腳與一第四接腳之間;一第三電容,連接於該電路元件的一第五接腳與接地之間;一第四電容,連接於該電路元件的一第六接腳與接地之間;一第五電容,連接於該電路元件的一第七接腳與接地之間;一第一輸出器,連接該電路元件的一第八接腳、一第九接腳與接地;以及一第二輸出器,連接該電路元件的一第十接腳、一第十一接腳與接地。The universal sequence bus-flow testing device according to claim 8, wherein the communication conversion circuit comprises: a circuit component connected to the microcontroller; a first capacitor connected to a first pin of the circuit component a second capacitor is connected between a third pin and a fourth pin of the circuit component; a third capacitor is connected to a fifth pin of the circuit component Between the grounding; a fourth capacitor connected between a sixth pin of the circuit component and the ground; a fifth capacitor connected between a seventh pin of the circuit component and the ground; a first output And an eighth output pin connected to the circuit component, a ninth pin and a ground; and a second output device connected to a tenth pin, an eleventh pin and the ground of the circuit component. 如請求項9所述的通用序列匯排流埠測試裝置,其中該第一輸出器與該第二輸出器係為通用非同步收發傳輸器。The universal sequence sinking test device of claim 9, wherein the first output device and the second output device are universal asynchronous transceiver transmitters.
TW99108799A 2010-03-24 2010-03-24 Apparatus for testing usb ports TWI413905B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW99108799A TWI413905B (en) 2010-03-24 2010-03-24 Apparatus for testing usb ports

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW99108799A TWI413905B (en) 2010-03-24 2010-03-24 Apparatus for testing usb ports

Publications (2)

Publication Number Publication Date
TW201133247A TW201133247A (en) 2011-10-01
TWI413905B true TWI413905B (en) 2013-11-01

Family

ID=46751125

Family Applications (1)

Application Number Title Priority Date Filing Date
TW99108799A TWI413905B (en) 2010-03-24 2010-03-24 Apparatus for testing usb ports

Country Status (1)

Country Link
TW (1) TWI413905B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI553468B (en) * 2015-12-10 2016-10-11 英業達股份有限公司 Apparatus for usb port testing

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI452315B (en) * 2013-01-17 2014-09-11 Test Research Inc Fixture, system and method for performing functional test

Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW569013B (en) * 2002-02-21 2004-01-01 Via Tech Inc Chip test method for testing host controller of universal serial bus
TWI223745B (en) * 2002-10-25 2004-11-11 Inventec Corp Test method of universal serial bus (USB) port
US6829726B1 (en) * 2000-03-06 2004-12-07 Pc-Doctor, Inc. Method and system for testing a universal serial bus within a computing device
CN1555013A (en) * 2003-12-23 2004-12-15 威盛电子股份有限公司 Debugging device
TWI235910B (en) * 2002-11-21 2005-07-11 Via Tech Inc Apparatus for testing I/O ports of a computer motherboard
TWI264537B (en) * 2003-10-20 2006-10-21 Sony Corp Angular velocity detector, angular velocity detection method by angular velocity detector and production method of angular velocity detector
TWI264547B (en) * 2003-10-20 2006-10-21 Taiwan Semiconductor Mfg USB interface and testing method thereof
US20070136025A1 (en) * 2005-12-09 2007-06-14 Hon Hai Precision Industry Co., Ltd. Usb port tester
TW200722977A (en) * 2005-12-14 2007-06-16 Inventec Corp USB port connection testing device and method of testing USB port by utilizing the same
CN101122879A (en) * 2006-08-11 2008-02-13 英业达股份有限公司 Universal serial bus device test system and its method
US20080082286A1 (en) * 2006-09-29 2008-04-03 Oki Electric Industry Co., Ltd. Circuit for testing a USB device using a packet to be measured controlled by test signals
US7403021B2 (en) * 2005-10-20 2008-07-22 Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. Testing circuit for a data interface
TW200844730A (en) * 2007-05-14 2008-11-16 Via Tech Inc Testing system of universal serial bus device and method thereof
TW200941005A (en) * 2008-03-21 2009-10-01 Inventec Corp Electrical testing device for USB ports
US20090249126A1 (en) * 2008-03-25 2009-10-01 Hong Fu Jin Precision Industry (Shen Zhen) Co., Ltd. Testing device for usb i/o board

Patent Citations (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6829726B1 (en) * 2000-03-06 2004-12-07 Pc-Doctor, Inc. Method and system for testing a universal serial bus within a computing device
TW569013B (en) * 2002-02-21 2004-01-01 Via Tech Inc Chip test method for testing host controller of universal serial bus
TWI223745B (en) * 2002-10-25 2004-11-11 Inventec Corp Test method of universal serial bus (USB) port
TWI235910B (en) * 2002-11-21 2005-07-11 Via Tech Inc Apparatus for testing I/O ports of a computer motherboard
TWI264547B (en) * 2003-10-20 2006-10-21 Taiwan Semiconductor Mfg USB interface and testing method thereof
TWI264537B (en) * 2003-10-20 2006-10-21 Sony Corp Angular velocity detector, angular velocity detection method by angular velocity detector and production method of angular velocity detector
CN1555013A (en) * 2003-12-23 2004-12-15 威盛电子股份有限公司 Debugging device
US7403021B2 (en) * 2005-10-20 2008-07-22 Hong Fu Jin Precision Industry (Shenzhen) Co., Ltd. Testing circuit for a data interface
US20070136025A1 (en) * 2005-12-09 2007-06-14 Hon Hai Precision Industry Co., Ltd. Usb port tester
TW200722977A (en) * 2005-12-14 2007-06-16 Inventec Corp USB port connection testing device and method of testing USB port by utilizing the same
CN101122879A (en) * 2006-08-11 2008-02-13 英业达股份有限公司 Universal serial bus device test system and its method
US20080082286A1 (en) * 2006-09-29 2008-04-03 Oki Electric Industry Co., Ltd. Circuit for testing a USB device using a packet to be measured controlled by test signals
TW200844730A (en) * 2007-05-14 2008-11-16 Via Tech Inc Testing system of universal serial bus device and method thereof
TW200941005A (en) * 2008-03-21 2009-10-01 Inventec Corp Electrical testing device for USB ports
US20090249126A1 (en) * 2008-03-25 2009-10-01 Hong Fu Jin Precision Industry (Shen Zhen) Co., Ltd. Testing device for usb i/o board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI553468B (en) * 2015-12-10 2016-10-11 英業達股份有限公司 Apparatus for usb port testing

Also Published As

Publication number Publication date
TW201133247A (en) 2011-10-01

Similar Documents

Publication Publication Date Title
TWI441399B (en) Overvoltage protection circuit, interfacing system for providing overvoltage protection and overvoltage protection method in a data bus interface
CN101546285B (en) Device for testing USB interface I/O board
CN102207899B (en) Device for testing universal serial bus port
US20100205463A1 (en) Bistone port power controller for usb hubs with legacy battery charge support
TWI484338B (en) Single pin port power control
CN101996121B (en) Universal serial bus (USB) port testing device and testing method
US20120153993A1 (en) Usb port detecting circuit
TW201329731A (en) Apparatus and method of identifying a USB or an MHL device
CN105071484B (en) A kind of charging method and device of the terminal with data exchanging function
TWI501085B (en) Usb interface detection device
US8010721B2 (en) Universal serial bus device having driving program
US20130162298A1 (en) Identifying circuit
TWI451235B (en) Connecting module for coupling output ends of a host device to an external storage device and coupling method thereof
TWI413905B (en) Apparatus for testing usb ports
US20120054392A1 (en) Data read and write device and method for usb ports of 1-wire devices
US11132144B2 (en) Integrated interface and electronic device
US9360524B2 (en) Testing system for serial interface
CN203338238U (en) Multifunctional pin circuit device
TWI583979B (en) Detection device, detection method and electronic apparatus
CN102564576B (en) Light intensity testing device
JP2003223373A (en) Data transmitting/receiving buffer
US8909821B2 (en) Slim-line connector for serial ATA interface that is mounted on expansion bay of computer includes detection signals which indicate connection status and type of device
TWI781849B (en) DETECTION SYSTEM FOR PCIe CEM CONNECTION INTERFACE OF CIRCUIT BOARD AND METHOD THEREOF
CN219959472U (en) Computing device
TWI524177B (en) Debug test circuit and method thereof

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees