TWI413242B

TWI413242B - Solid image sensor

Info

Publication number: TWI413242B
Application number: TW96129576A
Authority: TW
Inventors: Wei Li; Shih Fang Wong; Xin Lu
Original assignee: Hon Hai Prec Ind Co Ltd
Priority date: 2007-08-10
Filing date: 2007-08-10
Publication date: 2013-10-21
Also published as: TW200908312A

Abstract

A solid image sensor includes a plurality of pixels, a vertical scanning circuit, and a horizontal scanning circuit. The vertical scanning circuit and the horizontal scanning circuit are electrically connected to each of the plurality of Pixels. Each pixel includes a light-sensitive array. The light-sensitive array includes a plurality of first polygon prism areas and a plurality of second polygon prism areas. Both the first polygon prism areas and the second polygon prism areas are used for sensing light emitted thereto, and improving the sensing intensity accordingly. The light is distributed to each of the polygon prism areas such that a distinction among the pixels is eliminated.

Description

固態圖像感測器 Solid-state image sensor

本發明涉及成像裝置，特別涉及一種固態圖像感測器(Image Sensor)。 The present invention relates to an imaging device, and more particularly to a solid state image sensor (Image Sensor).

固態圖像感測器主要分為兩類：一類為電荷轉移固態圖像感測器，典型之為CCD(Charge Coupled Device)電荷耦合裝置；另一類為增強型固態圖像感測器，典型之為CMOS(Complementary Metal-Oxide Semiconductor)互補型金屬氧化物半導體固態圖像感測器。這兩種固態圖像感測器結構相類似，其畫素(Pixel )單元均以二維陣列形式排列。傳統上每一畫素單元中含有在矽基底上採用摻雜工藝製成之矩形光電轉換區域，類似於光電二極體，該光電轉換區域用於將外部物體發出之光訊號轉換成電訊號，並通過內部電路處理，例如電荷轉移，類比數位轉換等，得到數位形式表徵之圖像。 Solid-state image sensors are mainly divided into two categories: one is a charge-transfer solid-state image sensor, typically a CCD (Charge Coupled Device) charge-coupled device; the other is an enhanced solid-state image sensor, typically It is a CMOS (Complementary Metal-Oxide Semiconductor) complementary metal oxide semiconductor solid-state image sensor. The two solid-state image sensors are similar in structure, and their Pixel cells are arranged in a two-dimensional array. Traditionally, each pixel unit includes a rectangular photoelectric conversion region formed by a doping process on a germanium substrate, similar to a photodiode, which is used to convert an optical signal emitted by an external object into an electrical signal. And through internal circuit processing, such as charge transfer, analog digital conversion, etc., to obtain an image represented by digital form.

隨著圖像解析度之提高，單一畫素單元中之光電轉換區域之面積持續縮小，而光電轉換區域面積之縮小帶來感光度不充足之問題。為了保持單一畫素之受光面積，提出一種微透鏡技術，即在每一光電二極體上裝置一微透鏡，這樣外部入射光線首先經過微透鏡聚焦後再照射到光電二極體上，從而提升了感光度。然而隨著光電二極體增加，大量配置之微透鏡之間存在著較大之差異，從而在相同光照條件下，不同畫素單元光電二極體之感光特性差異較大。 As the resolution of the image increases, the area of the photoelectric conversion region in the single pixel unit continues to shrink, and the reduction in the area of the photoelectric conversion region brings about insufficient sensitivity. In order to maintain the light receiving area of a single pixel, a microlens technology is proposed, in which a microlens is mounted on each photodiode, so that the external incident light is first focused by the microlens and then irradiated onto the photodiode, thereby Sensitivity. However with The photodiode is increased, and there is a large difference between the microlenses in a large number of configurations, so that the photosensitive characteristics of the photodiodes of different pixel units are different under the same illumination conditions.

有鑒於此，有必要提供一種既能提升畫素單元之感光度，又可縮小各畫素單元之間感光特性差異之固態圖像感測器。 In view of the above, it is necessary to provide a solid-state image sensor capable of improving the sensitivity of the pixel unit and reducing the difference in the photosensitive characteristics between the pixel units.

一種固態圖像感測器，包括若干畫素單元，垂直掃描電路和水平掃描電路，該垂直掃描電路和水平掃描電路分別電性連接該畫素單元，每一畫素單元包括包括放大電晶體，該畫素單元用於將光訊號轉換成電訊號，並基於該垂直掃描電路以及水平掃描電路發出之選擇訊號，輸出該電訊號。每一畫素單元包括感光陣列，該感光陣列包括形成於矽基底材料上的若干第一多邊形棱柱感光區以及若干第二多邊形棱柱感光區，該第二多邊形棱柱感光區鄰接至少一個該第一多邊形棱柱感光區，該第一多邊形棱柱感光區以及第二多邊形棱柱感光區之陰極端電性連接在一起，陽極端共同連接固態圖像感測器之矽基底，該第一多邊形棱柱感光區以及第二多邊形棱柱感光區在外界輸入之光線作用下產生電子電洞對，其中，電洞被傳輸到矽基底上，電子被傳輸到畫素單元放大電晶體之閘極。 A solid-state image sensor includes a plurality of pixel units, a vertical scanning circuit and a horizontal scanning circuit. The vertical scanning circuit and the horizontal scanning circuit are electrically connected to the pixel unit, and each pixel unit includes an amplifying transistor. The pixel unit is configured to convert the optical signal into an electrical signal, and output the electrical signal based on the vertical scanning circuit and the selection signal sent by the horizontal scanning circuit. Each pixel unit includes a photosensitive array including a plurality of first polygonal prism photosensitive regions formed on the base material of the crucible and a plurality of second polygonal prism photosensitive regions adjacent to the second polygonal prism photosensitive region At least one first polygonal prism photosensitive region, the first polygonal prism photosensitive region and the cathode end of the second polygonal prism photosensitive region are electrically connected together, and the anode end is commonly connected to the solid-state image sensor a first substrate, the first polygonal prism photosensitive region and the second polygonal prism photosensitive region generate an electron hole pair under the action of external input light, wherein the hole is transmitted to the substrate, and the electron is transmitted to the drawing The prime unit amplifies the gate of the transistor.

上述固態圖像感測器通過在每一個畫素單元內形成若干個第一多邊形棱柱感光區及第二多邊形棱柱感光區，這些多邊形棱柱感光區均可以將光訊號轉換成電訊號，以提升每一個畫素單元之感光強度。此外，該等多個多邊形棱柱感光區藉由平均分配外界光線到每一個多邊形棱柱感光區，因而可以消除每一畫素單元之間之差異性 The solid-state image sensor forms a plurality of first polygonal prism photosensitive regions and a second polygonal prism photosensitive region in each pixel unit, and the polygonal prism photosensitive regions can convert optical signals into electrical signals. To enhance the photographic intensity of each pixel unit. In addition, the plurality of polygonal prism photosensitive regions are equally distributed by external light To each polygon prism photosensitive area, thus eliminating the difference between each pixel unit

10‧‧‧畫素陣列 10‧‧‧ pixel array

P11、P12、P21、P22‧‧‧畫素單元 P11, P12, P21, P22‧‧‧ pixel units

12‧‧‧感光陣列 12‧‧‧Photosensitive array

14‧‧‧復位電晶體 14‧‧‧Reset transistor

16‧‧‧放大電晶體 16‧‧‧Amplifying the transistor

18‧‧‧行選擇電晶體 18‧‧‧Selecting a transistor

124、126‧‧‧感光區 124, 126‧‧" photosensitive area

圖1為固態圖像感測器之電路圖。 Figure 1 is a circuit diagram of a solid-state image sensor.

圖2為圖1所示之一種實施方式之固態圖像感測器中畫素陣列之平面圖及畫素陣列中一個畫素單元之第一種平面圖。 2 is a plan view of a pixel array in a solid-state image sensor of the embodiment shown in FIG. 1 and a first plan view of a pixel unit in a pixel array.

圖3為圖2所示之畫素陣列中一個畫素單元之第二種平面圖。 3 is a second plan view of a pixel unit in the pixel array shown in FIG. 2.

圖4為圖2所示之畫素陣列中一個畫素單元之第三種平面圖。 4 is a third plan view of a pixel unit in the pixel array shown in FIG. 2.

圖5為圖2所示之畫素陣列中一個畫素單元之第四種平面圖。 Figure 5 is a fourth plan view of a pixel unit in the pixel array of Figure 2.

圖6為圖1所示之另一種實施方式之固態圖像感測器之部分立體圖。 6 is a partial perspective view of a solid-state image sensor of another embodiment shown in FIG. 1.

以下藉由具體實施例配合所附圖式之詳細說明，當更易瞭解本發明之目之、技術內容、特點及其所達成之功效。 The details, technical contents, features, and effects achieved by the present invention will become more apparent from the detailed description of the accompanying drawings.

如圖1所示，CMOS固態圖像感測器100包括畫素陣列10，垂直掃描電路20，水平掃描電路30和圖像處理模組40。畫素陣列10分別電性連接垂直掃描電路20和水平掃描電路30。畫素陣列10用於接收外部物體透過例如鏡頭模組(圖未示出)集聚的光線，並將光訊號轉換成電訊號，然後在垂直掃描電路20和水平掃描電路30的掃描訊號控制下，將電訊號傳遞給圖像處理模組。 As shown in FIG. 1, the CMOS solid-state image sensor 100 includes a pixel array 10, a vertical scanning circuit 20, a horizontal scanning circuit 30, and an image processing module 40. The pixel array 10 is electrically connected to the vertical scanning circuit 20 and the horizontal scanning circuit 30, respectively. The pixel array 10 is configured to receive light collected by an external object through, for example, a lens module (not shown), and convert the optical signal into an electrical signal, and then under the control of the scanning signals of the vertical scanning circuit 20 and the horizontal scanning circuit 30, The electrical signal is passed to the image processing module.

畫素陣列10包括四個畫素單元P11、P12、P21、P22，該等畫素單元P11~P22排列成2行2列。每一畫素單元P11~P22均採用CMOS製造工藝製成，例如在矽基底上通過摻雜、氧化、刻蝕等工藝步驟形成。其中，畫素單元P11包括感光陣列12，復位電晶體14，放大電晶體16以及行選擇電晶體18。感光陣列12之共陽極端接地，共陰極端分別電性連接復位電晶體14之源極和放大電晶體16之閘極。復位電晶體14之閘極和汲極分別電性連接到復位訊號線RST1和復位電壓供給線VR1。放大電晶體16之源極和汲極分別電性連接行選擇電晶體18之汲極和復位電壓供給線VR1。行選擇電晶體18之閘極和源極分別電性連接水平選擇線RW1和垂直選擇線CL1。畫素單元P12、P21、P22分別包含與畫素單元P11相同之電晶體單元，即感光電晶體陣列，復位電晶體，放大電晶體及行選擇電晶體等。畫素單元P12通過水平選擇線RW2，垂直選擇線CL2，復位電壓供給線VR2和復位訊號線RST1電性連接垂直掃描電路20和水平掃描電路30。畫素單元P21通過水平選擇線RW2，垂直選擇線CL1，復位電壓供給線VR2和復位訊號線RST1電性連接垂直掃描電路20和水平掃描電路30。畫素單元P22通過水平選擇線RW2，垂直選擇線CL2，復位電壓供給線VR2和復位訊號線RST2電性連接垂直掃描電路20和水平掃描電路30。 The pixel array 10 includes four pixel units P11, P12, P21, and P22, and the pixel numbers are The elements P11 to P22 are arranged in 2 rows and 2 columns. Each of the pixel units P11 to P22 is formed by a CMOS manufacturing process, for example, by a doping, oxidation, etching, or the like on a germanium substrate. The pixel unit P11 includes a photosensitive array 12, a reset transistor 14, an amplifying transistor 16, and a row selecting transistor 18. The common anode terminal of the photosensitive array 12 is grounded, and the common cathode terminal is electrically connected to the source of the reset transistor 14 and the gate of the amplifying transistor 16. The gate and the drain of the reset transistor 14 are electrically connected to the reset signal line RST1 and the reset voltage supply line VR1, respectively. The source and the drain of the amplifying transistor 16 are electrically connected to the drain of the row selection transistor 18 and the reset voltage supply line VR1, respectively. The gate and source of the row selection transistor 18 are electrically connected to the horizontal selection line RW1 and the vertical selection line CL1, respectively. The pixel units P12, P21, and P22 respectively include the same crystal unit as the pixel unit P11, that is, a photosensitive transistor array, a reset transistor, an amplifying transistor, and a row selection transistor. The pixel unit P12 is electrically connected to the vertical scanning circuit 20 and the horizontal scanning circuit 30 via the horizontal selection line RW2, the vertical selection line CL2, and the reset voltage supply line VR2 and the reset signal line RST1. The pixel unit P21 is electrically connected to the vertical scanning circuit 20 and the horizontal scanning circuit 30 via the horizontal selection line RW2, the vertical selection line CL1, and the reset voltage supply line VR2 and the reset signal line RST1. The pixel unit P22 is electrically connected to the vertical scanning circuit 20 and the horizontal scanning circuit 30 via the horizontal selection line RW2, the vertical selection line CL2, and the reset voltage supply line VR2 and the reset signal line RST2.

在某一時刻，利用固態圖像感測器100攝取外界一幀(Frame)畫面時，圖像感測器100接收到例如用戶發出之驅動訊號。垂直掃描電路20基於該驅動訊號，通過復位訊號線RST1、RST2作用到各畫素單元P11~P22之復位電晶體之閘極。在復位電壓供給線VR1、VR2提供之電壓作用下，各復位電晶體導通，從而感光陣列12被充電到復位電壓V1，V2。畫素陣列10接著進行光電訊號轉換和電訊號之轉移過程之工作原理如下所述。 At a certain moment, when the solid-state image sensor 100 picks up a frame image of the outside world, the image sensor 100 receives, for example, a driving signal from the user. Based on the driving signal, the vertical scanning circuit 20 applies a reset signal line RST1, RST2 to the gate of the reset transistor of each of the pixel units P11 to P22. Under the action of the voltages supplied from the reset voltage supply lines VR1, VR2, the reset transistors are turned on, so that the photosensitive array 12 is Charge to reset voltage V1, V2. The principle of operation of the pixel array 10 followed by the photoelectric signal conversion and the signal transfer process is as follows.

以畫素單元P11為例，當光線入射到感光陣列12上時，光訊號激發感光陣列12產生光生電子電洞對。帶正電之電洞被傳輸到矽基底材料上，帶負電之電子被輸送給放大電晶體16之閘極，從而感光陣列12之電壓逐漸降低。該變化之電壓訊號被放大電晶體16放大後，傳輸到行選擇電晶體18之汲極。經過一預定時間後，水平選擇線RW1送出一水平選擇訊號到行選擇電晶體18之閘極，使行選擇電晶體18導通。因此，經放大電晶體16放大之電壓訊號作為該畫素單元P11之圖像資料被輸出到垂直選擇線CL1。接著，水平掃描電路30送出一垂直選擇訊號到與垂直選擇線CL1電性相連之列選擇電晶體52，使列選擇電晶體52導通，從而代表畫素單元P11之圖像資料之電壓訊號被輸出給圖像處理模組40。 Taking the pixel unit P11 as an example, when light is incident on the photosensitive array 12, the optical signal excites the photosensitive array 12 to generate a pair of photogenerated electron holes. The positively charged holes are transferred to the crucible base material, and the negatively charged electrons are supplied to the gate of the amplifying transistor 16, whereby the voltage of the photosensitive array 12 is gradually lowered. The varying voltage signal is amplified by the amplifying transistor 16 and transmitted to the drain of the row select transistor 18. After a predetermined period of time, the horizontal selection line RW1 sends a horizontal selection signal to the gate of the row selection transistor 18 to turn on the row selection transistor 18. Therefore, the voltage signal amplified by the amplifying transistor 16 is output as the image data of the pixel unit P11 to the vertical selection line CL1. Then, the horizontal scanning circuit 30 sends a vertical selection signal to the column selection transistor 52 electrically connected to the vertical selection line CL1, so that the column selection transistor 52 is turned on, so that the voltage signal representing the image data of the pixel unit P11 is output. The image processing module 40 is provided.

如圖2所示，畫素陣列10通過半導體工藝在矽基底20上形成若干以矩陣形式排列之畫素單元P11、P12、P21、P22。畫素單元P11通過半導體工藝形成感光陣列12，復位電晶體14，放大電晶體16以及行選擇電晶體18。其中，復位電晶體14，放大電晶體16以及行選擇電晶體18位於感光陣列12之周圍。感光陣列12包括若干個感光區124，126(圖2僅顯示該等感光區之一部分)，其中，感光區124被刻蝕成八棱柱形狀，感光區126被刻蝕成四棱柱結構。八棱柱感光區124在矽基底20上之正投影為正八邊形，四棱柱感光區126在矽基底20上之正投影為正方形，正方形和正八邊形呈等邊長設置。這些八棱柱感光區124以矩陣方式規則地排列於每一畫素單元P11-P22內，四棱柱感光區126由四個緊密相鄰之八棱柱感光區124圍繞而成，並基本填滿八棱柱感光區124矩陣留下之空白區域，從而每一個四棱柱感光區126緊鄰四個八棱柱感光區124，而每一個八棱柱感光區124緊鄰四個四棱柱感光區126及四個八棱柱感光區124。通過佈置金屬連線層(圖未示出)，將各個感光區124，126之陰極端電性連接在一起，而陽極端共同連接矽基底。因而，在外界輸入之光線作用下，每一感光區124，126將產生電子電洞對，其中，電洞被傳輸到矽基底20上，而電子被傳輸到放大電晶體16之閘極。 As shown in FIG. 2, the pixel array 10 forms a plurality of pixel units P11, P12, P21, and P22 arranged in a matrix on the germanium substrate 20 by a semiconductor process. The pixel unit P11 forms the photosensitive array 12, the reset transistor 14, the amplifying transistor 16, and the row selecting transistor 18 by a semiconductor process. Among them, the reset transistor 14, the amplifying transistor 16 and the row selecting transistor 18 are located around the photosensitive array 12. The photosensitive array 12 includes a plurality of photosensitive regions 124, 126 (only one portion of which is shown in Fig. 2), wherein the photosensitive region 124 is etched into an octagonal prism shape, and the photosensitive region 126 is etched into a quadrangular prism structure. The orthographic projection of the octagonal column photosensitive region 124 on the ruthenium substrate 20 is a regular octagon, and the orthographic projection of the quadrangular prism photosensitive region 126 on the ruthenium substrate 20 is square, and the square and regular octagons are arranged equilaterally. These octagonal prism photosensitive regions 124 are regularly arranged in a matrix manner in each In a pixel unit P11-P22, the quadrangular prism photosensitive region 126 is surrounded by four closely adjacent octagonal photosensitive regions 124, and substantially fills a blank area left by the matrix of the octagonal prism photosensitive region 124, so that each of the four The prismatic photosensitive region 126 is adjacent to the four octagonal photosensitive regions 124, and each of the octagonal photosensitive regions 124 is adjacent to the four quadrangular prism photosensitive regions 126 and the four octagonal photosensitive regions 124. The cathode ends of the respective photosensitive regions 124, 126 are electrically connected together by arranging a metal wiring layer (not shown), and the anode terminals are commonly connected to the crucible substrate. Thus, each of the photosensitive regions 124, 126 will produce an electron hole pair under the action of externally input light, wherein the holes are transferred to the crucible substrate 20 and the electrons are transmitted to the gate of the amplifying transistor 16.

如圖3所示畫素單元P11之感光陣列12之另一種實施方式，感光陣列12在矽基底20之對角線方向上刻蝕出八棱柱感光區124和四棱柱感光區126。沿對角線方向觀察，八棱柱感光區124也以矩陣方式排列，而四棱柱感光區126基本填滿八棱柱感光區124矩陣留下之空白區域。每一個四棱柱感光區126緊鄰四個八棱柱感光區124，而每一個八棱柱感光區124緊鄰四個四棱柱感光區126及四個八棱柱感光區124。此時，復位電晶體14，放大電晶體16以及行選擇電晶體18可以被設置成位於感光陣列12內部之角落處，以充分利用矽基底20之佈置空間。 As another embodiment of the photosensitive array 12 of the pixel unit P11 shown in FIG. 3, the photosensitive array 12 etches the octagonal column photosensitive region 124 and the quadrangular prism photosensitive region 126 in the diagonal direction of the ruthenium substrate 20. Viewed in the diagonal direction, the octagonal column photosensitive regions 124 are also arranged in a matrix, and the quadrangular prism photosensitive regions 126 substantially fill the blank areas left by the matrix of the octagonal column photosensitive regions 124. Each of the quadrangular prism photosensitive regions 126 is adjacent to four octagonal prism photosensitive regions 124, and each of the octagonal prism photosensitive regions 124 is adjacent to four quadrangular prism photosensitive regions 126 and four octagonal prism photosensitive regions 124. At this time, the reset transistor 14, the amplifying transistor 16, and the row selecting transistor 18 may be disposed at corners inside the photosensitive array 12 to make full use of the arrangement space of the crucible substrate 20.

如圖4所示，感光陣列12內之感光區124也可以刻蝕成六棱柱形狀，感光區126也可以刻蝕成四棱柱形狀。六棱柱感光區124在矽基底20上之正投影為正六邊形，四棱柱感光區126在矽基底20上之正投影為菱形。正六邊形和菱形呈等邊長設置。四棱柱感光區126由四個緊密相鄰之六棱柱感光區124圍繞而成，並基本填滿八棱柱感光區124矩陣留下之空白區域，從而每一個六棱柱感光區124緊鄰四個四棱柱感光區126和兩個六棱柱感光區124，而每一個四棱柱感光區126緊鄰四個六棱柱感光區124。 As shown in FIG. 4, the photosensitive region 124 in the photosensitive array 12 can also be etched into a hexagonal prism shape, and the photosensitive region 126 can also be etched into a quadrangular prism shape. The orthographic projection of the hexagonal prism photosensitive region 124 on the crucible substrate 20 is a regular hexagon, and the orthographic projection of the quadrangular prism photosensitive region 126 on the crucible substrate 20 is a diamond shape. The regular hexagon and the diamond are set in equal length. The quadrangular prism photosensitive region 126 is surrounded by four closely adjacent hexagonal prism photosensitive regions 124 and is substantially filled with eight The prismatic photosensitive region 124 has a blank area left by the matrix, so that each of the hexagonal prism photosensitive regions 124 is adjacent to the four quadrangular prism photosensitive regions 126 and the two hexagonal prism photosensitive regions 124, and each of the quadrangular prism photosensitive regions 126 is adjacent to the four hexagonal prisms. District 124.

如圖5所示，感光陣列12也可以在矽基底20之對角線方向上刻蝕出六棱柱感光區124和四棱柱感光區126。從而，復位電晶體14，放大電晶體16以及行選擇電晶體18可以被設置成位於感光陣列12之內部角落處。 As shown in FIG. 5, the photosensitive array 12 may also etch the hexagonal prism photosensitive region 124 and the quadrangular prism photosensitive region 126 in the diagonal direction of the crucible substrate 20. Thus, the reset transistor 14, the amplifying transistor 16, and the row selection transistor 18 can be disposed to be located at the inner corners of the photosensitive array 12.

如圖6所示，固態圖像感測器100還可以包括微透鏡陣列60，以匯聚外界輸入之光線。該微透鏡陣列60被設置成位於畫素陣列10之上方，包括若干微透鏡62。每一個微透鏡62正對畫素陣列10之畫素單元P11、P12、P21、P22設置，且這些微透鏡62之像方焦平面位於這些畫素單元P11-P22之感光陣列上，從而可以有效地將微透鏡62匯聚光線之光訊號轉換成電訊號。 As shown in FIG. 6, the solid-state image sensor 100 may further include a microlens array 60 to concentrate externally input light. The microlens array 60 is disposed above the pixel array 10 and includes a plurality of microlenses 62. Each of the microlenses 62 is disposed opposite to the pixel units P11, P12, P21, P22 of the pixel array 10, and the image focal planes of the microlenses 62 are located on the photosensitive array of the pixel units P11-P22, thereby being effective The optical signal that converges the light from the microlens 62 is converted into an electrical signal.

對於圖3、圖4和圖5所示不同實施方式之畫素單元P11-P22等，因每一個畫素單元之面積有限，所以位於畫素單元邊緣之每一個四棱柱感光區126，也可以只鄰接一個或者兩個六棱柱或者八棱柱感光區124(圖未示出)。 For the pixel units P11-P22 and the like of the different embodiments shown in FIG. 3, FIG. 4 and FIG. 5, since each of the pixel units has a limited area, each of the quadrangular prism photosensitive regions 126 located at the edge of the pixel unit may also be used. Only one or two hexagonal prisms or octagonal prism photosensitive regions 124 (not shown) are adjacent.

相對于傳統之在矽基底材料上設置之單一四邊形光電二極體感光區，設置多個六邊形或者八邊形之感光區更可與圓形透鏡之面積相匹配，有利於有效接收匯聚光線，從而提升每一個畫素單元之感光度。而通過離散之感光區平均外界匯聚光線之強度，可以降低各個畫素單元之間之差異性，從而在相同之光照條件下，各個畫素單元輸出基本相同之圖像電壓訊號。 Compared with the conventional single quadrilateral photodiode photosensitive region disposed on the enamel base material, a plurality of hexagonal or octagonal photosensitive regions are arranged to match the area of the circular lens, which is beneficial for effectively receiving concentrated light. , thereby increasing the sensitivity of each pixel unit. By dividing the intensity of the external concentrated light by the discrete photosensitive regions, the difference between the individual pixel units can be reduced, so that under the same illumination conditions, each The pixel unit outputs substantially the same image voltage signal.

上述之CMOS固態圖像感測器100僅為較佳實施方式，本領域技術人員在此基礎上可以作一定之變更。例如，八棱柱感光區124也可以被刻蝕成十邊形或者十二邊形等。圖2-6所示之感光區124之感光面積大於感光區126之感光面積，可以通過面積較小之感光區126感測畫面之高亮度部分，以提升畫面之層次。 The CMOS solid-state image sensor 100 described above is only a preferred embodiment, and those skilled in the art can make certain changes on this basis. For example, the octagonal prism photosensitive region 124 may also be etched into a decagon or a dodecagonal shape or the like. The photosensitive area of the photosensitive region 124 shown in FIG. 2-6 is larger than the photosensitive area of the photosensitive region 126, and the high-luminance portion of the image can be sensed by the photosensitive region 126 having a small area to enhance the level of the image.

綜上所述，本發明符合發明專利要件，爰依法提出專利申請。惟，以上該者僅為本發明之較佳實施例，舉凡熟悉本案技藝之人士，在援依本案創作精神所作之等效修飾或變化，皆應包含於以下之申請專利範圍內。 In summary, the present invention complies with the requirements of the invention patent and submits a patent application according to law. However, the above is only a preferred embodiment of the present invention, and those skilled in the art will be able to include equivalent modifications or variations in the spirit of the present invention.

10‧‧‧畫素陣列 10‧‧‧ pixel array

12‧‧‧感光陣列 12‧‧‧Photosensitive array

14‧‧‧復位電晶體 14‧‧‧Reset transistor

16‧‧‧放大電晶體 16‧‧‧Amplifying the transistor

18‧‧‧行選擇電晶體 18‧‧‧Selecting a transistor

124、126‧‧‧感光區 124, 126‧‧" photosensitive area

Claims

一種固態圖像感測器，包括若干畫素單元，垂直掃描電路和水平掃描電路，該垂直掃描電路和該水平掃描電路分別電性連接該畫素單元，每一畫素單元包括包括放大電晶體，該畫素單元用於將光訊號轉換成電訊號，並基於該垂直掃描電路以及該水平掃描電路發出之選擇訊號，輸出該電訊號，其改良在於：該每一畫素單元包括感光陣列，該感光陣列包括形成於矽基底材料上的若干第一多邊形棱柱感光區以及若干第二多邊形棱柱感光區，該第二多邊形棱柱感光區鄰接至少一個該第一多邊形棱柱感光區，該第一多邊形棱柱感光區以及第二多邊形棱柱感光區之陰極端電性連接在一起，陽極端共同連接固態圖像感測器之矽基底，該第一多邊形棱柱感光區以及第二多邊形棱柱感光區在外界輸入之光線作用下產生電子電洞對，其中，電洞被傳輸到矽基底上，電子被傳輸到畫素單元放大電晶體之閘極。 A solid-state image sensor includes a plurality of pixel units, a vertical scanning circuit and a horizontal scanning circuit. The vertical scanning circuit and the horizontal scanning circuit are electrically connected to the pixel unit, and each pixel unit includes an amplifying transistor. The pixel unit is configured to convert the optical signal into an electrical signal, and output the electrical signal based on the vertical scanning circuit and the selection signal sent by the horizontal scanning circuit, wherein the pixel unit comprises a photosensitive array. The photosensitive array includes a plurality of first polygonal prism photosensitive regions formed on the base material of the crucible and a plurality of second polygonal prism photosensitive regions adjacent to at least one of the first polygonal prisms a photosensitive region, the first polygonal prism photosensitive region and the cathode end of the second polygonal prism photosensitive region are electrically connected together, and the anode end is commonly connected to the base of the solid-state image sensor, the first polygon The prismatic photosensitive region and the second polygonal prism photosensitive region generate an electron hole pair under the action of external input light, wherein the hole is transmitted to the substrate, the electron Amplifying the pixel unit is transmitted to the gate of the transistor.

如申請專利範圍第1項所述之固態圖像感測器，該第一多邊形棱柱感光區之感光面積大於該第二多邊形棱柱感光區之感光面積。 The solid-state image sensor according to claim 1, wherein the photosensitive area of the first polygonal prism photosensitive region is larger than the photosensitive area of the second polygonal prism photosensitive region.

如申請專利範圍第1項所述之固態圖像感測器，該固態圖像感測器還包括若干由微透鏡單元組成之微透鏡陣列，每一微透鏡單元相對每一畫素單元設置，以將光線匯聚到該每一畫素單元上。 The solid-state image sensor according to claim 1, the solid-state image sensor further comprising a plurality of microlens arrays composed of microlens units, each microlens unit being disposed relative to each pixel unit, To converge light onto each of the pixel units.

如申請專利範圍第1項所述之固態圖像感測器，該第一多邊形棱柱感光區和該第二多邊形棱柱感光區在矽基底材料上之正投影之多邊形之邊長相等。 The solid-state image sensor according to claim 1, wherein the first polygonal prism photosensitive region and the second polygonal prism photosensitive region have the same length of the side of the orthographic projection on the base material of the crucible. .

如申請專利範圍第4項所述之固態圖像感測器，該第一多邊形棱柱感光區和第二多邊形棱柱感光區以矩陣方式排列於該每一畫素單元內。 The solid-state image sensor according to claim 4, wherein the first polygonal prism photosensitive region and the second polygonal prism photosensitive region are arranged in a matrix manner in each of the pixel units.

如申請專利範圍第4項所述之固態圖像感測器，該第一多邊形棱柱感光區為八棱柱感光區，該第二多邊形棱柱感光區為四棱柱感光區。 The solid-state image sensor of claim 4, wherein the first polygonal prism photosensitive region is an octagonal prism photosensitive region, and the second polygonal prism photosensitive region is a quadrangular prism photosensitive region.

如申請專利範圍第4項所述之固態圖像感測器，該第一多邊形棱柱感光區為六棱柱感光區，該第二多邊形棱柱感光區為四棱柱感光區。 The solid-state image sensor according to claim 4, wherein the first polygonal prism photosensitive region is a hexagonal prism photosensitive region, and the second polygonal prism photosensitive region is a quadrangular prism photosensitive region.

如申請專利範圍第6項或者第7项所述之固態圖像感測器，該每一畫素單元還包括復位電晶體和行選擇電晶體，該復位電晶體之源極電性連接該放大電晶體之閘極，該放大電晶體之源極電性連接該第一選擇電晶體之汲極，該第一多邊形棱柱感光區和第二多邊形棱柱感光區之陽極端共地連接，而陰極端共同電性連接到該放大電晶體之閘極。 The solid-state image sensor according to claim 6 or 7, wherein each pixel unit further comprises a reset transistor and a row selection transistor, wherein the source of the reset transistor is electrically connected to the amplification a gate of the transistor, the source of the amplifying transistor is electrically connected to the drain of the first selective transistor, and the first polygonal prism photosensitive region and the anode end of the second polygonal prism photosensitive region are commonly connected And the cathode end is electrically connected to the gate of the amplifying transistor.

如申請專利範圍第8項所述之固態圖像感測器，該復位電晶體，放大電晶體和行選擇電晶體可以位於該感光陣列內亦可位於該感光陣列外。 The solid-state image sensor according to claim 8, wherein the reset transistor, the amplifying transistor and the row selection transistor may be located in the photosensitive array or outside the photosensitive array.