TWI413085B

TWI413085B - Single-cell-gap type transfective liquid crystal display and driving method thereof

Info

Publication number: TWI413085B
Application number: TW98135005A
Authority: TW
Inventors: Po Sheng Shih; Jia Shyong Cheng; Po Yang Chen; Jiunn Shyong Lin
Original assignee: Innolux Corp
Priority date: 2009-10-15
Filing date: 2009-10-15
Publication date: 2013-10-21
Also published as: TW201113860A

Abstract

The present invention relates to a signal-cell-gap type transfective liquid crystal display (TRLCD) and driving method therefore. A TFT panel of the TRLCD defines multiple pixel areas, each of which has a multiplexer. The multiplexer respectively supplies different voltages to a transmissive region and a reflective region of the corresponding pixel after receiving a modulated gate driving signal. Therefore, a VT curve of the transmissive region and a VR curve of the reflective region are identical.

Description

單晶穴間隙式半穿反液晶顯示器及其驅動方法 Single crystal hole gap type semi-transparent liquid crystal display and driving method thereof

本發明係關於一種半穿反液晶顯示器，尤指一種令反射區及穿透區的穿透率完全相同的單晶穴間隙式半穿反液晶顯示器及其驅動方法。 The present invention relates to a transflective liquid crystal display, and more particularly to a single crystal hole gap type transflective liquid crystal display having the same transmittance of a reflective region and a transmissive region and a driving method thereof.

按，為因應不同使用環境的電子產品，液晶顯示器係依據不同光源環境區分成穿透式、反射式及半穿反式，其中半穿反式液晶顯示器配合使用背光模組，但部份顯示光源則仰賴外界環境光線。以高階行動顯示(mobile display)需求之電子產品(如手機與數位相機等)來說，因使用的場合常常在戶外，因此該等電子產品大多採用半穿反液晶顯示器作為符合高階行動顯示需求之電子產品的較佳解決方案。 According to the electronic products that are used in different environments, the liquid crystal display is divided into transmissive, reflective and trans-transverse according to different light source environments, and the trans-transparent liquid crystal display is combined with the backlight module, but some display light sources are used. It depends on the ambient light. For electronic products that require high-end mobile display (such as mobile phones and digital cameras), they are often used outdoors because of their use. Therefore, most of these electronic products use semi-transparent LCDs as high-end mobile display requirements. A better solution for electronic products.

以下謹進一步說明半穿反液晶顯示器驅動原理及技術演變過桯。 The following is a further explanation of the evolution of the driving principle and technology of the semi-transparent liquid crystal display.

首先請參閱圖一，早期半穿反液晶顯示器10係包含有一基板(Substrate以下簡稱上板)11、一薄膜電晶體基板(TFT Substrate以下簡稱下板)12及夾設於其間的液晶層13，其中下板12定義有複數矩陣排列的畫素(pixel area)，各畫素(pixel area)包含了一穿透區121與一反射區122。其中該反射區122係於下板12的基板上形成有一反射層(reflective layer)123，因此外界光線自上板11穿入至該反射層123後，會由反射層123 加以反射後再自上板11穿出，由於上板11與下板12之間夾設有液晶層13，故該反射的外界光線即可作為顯示用光源。至於下板12背後的背光光源則會直接穿過穿透區121，再經液晶層13自上板11穿出；因此，所謂半穿反液晶顯示器10即有效利用背光光源及外部光源作為顯示光源，相較穿透式液晶顯示器來說即不使用高功率背光光源，除省電外亦有助於縮減整體電子產品的體積。 First, referring to FIG. 1 , the early half-transflective liquid crystal display 10 includes a substrate (Substrate hereinafter referred to as an upper plate) 11 , a thin film transistor substrate (TFT Substrate hereinafter referred to as a lower plate) 12 , and a liquid crystal layer 13 interposed therebetween. The lower panel 12 defines a pixel area in which a plurality of pixels are arranged. Each pixel area includes a penetrating region 121 and a reflecting region 122. The reflective layer 122 is formed with a reflective layer 123 on the substrate of the lower plate 12. Therefore, after the external light penetrates from the upper plate 11 to the reflective layer 123, the reflective layer 123 is formed by the reflective layer 123. After being reflected, it is then ejected from the upper plate 11. Since the liquid crystal layer 13 is interposed between the upper plate 11 and the lower plate 12, the reflected external light can be used as a light source for display. As for the backlight source behind the lower plate 12, it directly passes through the penetrating region 121 and then passes through the liquid crystal layer 13 from the upper plate 11. Therefore, the so-called transflective liquid crystal display 10 effectively utilizes the backlight source and the external light source as display light sources. Compared with penetrating liquid crystal displays, high-power backlight sources are not used. In addition to power saving, it also helps to reduce the size of the overall electronic products.

然而，上述半穿反液晶顯示器10卻因為增加反射層而因為灰階反轉(gray level inversion)現象造成顯像品質不佳的技術缺點。以單一素畫來說，由於外部光線進入反射區到被反射至上板11，故其光程差(optical path difference)是背光光源二倍，而造成了灰階反轉現象。因此如圖二所示，為了讓穿透區121與反射區122的光程差一致，市面上現有產品已採用所謂的雙晶穴間隙(dual cell gap)畫素的半穿反液晶顯示器10a，其特徵係在上板對應反射區122位置向下形成有一層絕緣凸塊(overcoat layer)124，使得反射區122的晶穴間隙D2約為穿透區晶穴間隙D1的一半。如此一來即調整穿透區121與反射區122的光程差大致相等，請配合參閱圖三，為反射區以四組不同晶穴間隙(4.0um/2.2um/2.0um/1.8um)大小進行模擬電壓對反射率(以下簡稱VR)曲線結果，由此圖可知，與穿透區晶穴間隙(4.0um)的電壓對穿透率(以下簡稱VT)曲線相較，相同為4.0um晶穴間隙的VR曲線明顯受到二倍行程差異而與穿透區 VT曲線明顯不一致，然而僅為穿透區區晶穴間隙D1(4.0um)一半差距的反射區晶穴間隙D2(2.0um)，其VR曲線則更貼近穿透區VT曲線，因此該雙晶穴間隙畫素架構確實能令背光光線與反射光光線的行程趨於一致，以改善灰階反轉缺點。然而，此一雙晶穴間隙晝素架構亦衍生其它缺點，諸如製程複雜、低良率及絕緣凸塊124邊緣易產生液晶漏光現象等等，仍無法有效提高半穿反液晶顯示器的顯像品質。 However, the above-described transflective liquid crystal display 10 has a technical disadvantage of poor development quality due to the increase in the reflective layer due to the gray level inversion phenomenon. In the case of a single prime picture, since the external light enters the reflective area to be reflected to the upper plate 11, the optical path difference is twice that of the backlight source, resulting in gray scale inversion. Therefore, as shown in FIG. 2, in order to make the optical path difference of the penetration region 121 and the reflection region 122 coincide, the existing products on the market have adopted a so-called double cell gap pixel half-transflective liquid crystal display 10a. The feature is that an overcoat layer 124 is formed downward at the position corresponding to the reflective region 122 of the upper plate, so that the cell gap D2 of the reflective region 122 is about half of the interstitial space D1 of the penetrating region. In this way, the optical path difference between the transmission area 121 and the reflection area 122 is adjusted to be substantially equal. Please refer to FIG. 3 for the reflection area to have four different cell gaps (4.0 um / 2.2 um / 2.0 um / 1.8 um). The results of the analog voltage versus reflectance (hereinafter referred to as VR) curve are obtained. From this figure, it can be seen that the voltage versus the transmittance (hereinafter referred to as VT) curve of the hole gap of the penetration region (4.0 um) is the same as 4.0 um crystal. The VR curve of the hole gap is obviously affected by the double stroke difference and the penetration zone. The VT curve is obviously inconsistent. However, only the hole spacing D2 (2.0um) of the reflection area which is half the gap of the hole spacing D1 (4.0um) in the penetrating zone is closer to the VT curve of the penetrating zone, so the double crystal hole The gap pixel architecture does align the stroke of the backlight with the reflected light to improve the grayscale inversion. However, this double-cavity gap matrix structure also has other disadvantages, such as complex process, low yield and easy to produce liquid crystal leakage at the edge of the insulating bump 124, etc., and still can not effectively improve the imaging quality of the transflective liquid crystal display. .

有鑒於上述雙晶穴間隙畫素架構所衍生的各項問題，各面板廠又回歸設計單晶穴間隙(single cell gap)畫素架構，但配合另一種以降低反射區電壓以達到調整反射區VR區線與及穿透區VT曲線一致的技術，來解決灰階反轉問題。 In view of the problems arising from the above-mentioned double-cavity gap pixel structure, each panel factory returns to design a single cell gap pixel structure, but cooperates with another to reduce the reflection region voltage to achieve the adjustment of the reflection region. The VR area line is consistent with the VT curve of the penetration area to solve the gray scale inversion problem.

上述降低反射區電壓的其中一種方式為電容耦合式(capacitor coupled type；CC)，如圖四所示，為此種方式的單一畫素等效電路圖，該畫素的單一薄膜電晶體TFT1的汲極D分別與儲存電容C_ST、穿透區儲存電容C_CLC1及反射區液晶電容C_LC2連接，其中於反射區中再加入一耦合電容C_C，且該耦合電容C_C與連接反射區液晶電容C_LC2串聯連接之間。因此，該反射區電壓VR即能藉由串接的耦合電容C_C與其液晶電容C_LC2的電容分壓而調整較穿透區V_D電壓為小，由於反射區及穿透區電壓不同，而能縮小穿透區穿透率與反射區的反射率差異，如圖五所示。然而，此一電容耦合式也有許多致命缺點，如下列： One of the above methods for reducing the voltage of the reflection region is a capacitive coupled type (CC), as shown in FIG. 4, which is a single pixel equivalent circuit diagram of the mode, and the pixel of the single thin film transistor TFT1 of the pixel The pole D is respectively connected to the storage capacitor C _ST , the penetration area storage capacitor C _CLC1 and the reflection area liquid crystal capacitor C _LC2 , wherein a coupling capacitor C _C is further added to the reflection region, and the coupling capacitor C _C and the reflective region liquid crystal capacitor are connected. C _{LC2 is} connected in series. Therefore, the reflected region voltage VR can be adjusted to be smaller than the voltage of the transmissive region V _{D by the} voltage division of the coupling capacitor C _C and the liquid crystal capacitor C _LC2 in series, and the voltages of the reflective region and the transmissive region are different. It can reduce the difference between the penetration rate of the penetration zone and the reflectance of the reflection zone, as shown in Figure 5. However, this capacitive coupling also has many fatal shortcomings, such as the following:

1.穿透區與反射區的液晶反轉臨界電壓值(Threshold Voltage)仍不同V_th1,V_th2，如圖五所示，所以穿透區的VT曲線仍與反射區VR曲線不一致。 1. The liquid crystal inversion threshold voltage (Threshold Voltage) of the penetrating zone and the reflecting zone is still different from V _th1 , V _th2 , as shown in FIG. 5 , so the VT curve of the penetrating zone is still inconsistent with the reflecting zone VR curve.

2.反射區的畫素電極V_R一直為浮接狀態，無法避免累積電荷，進而造成殘影現象。 2. The pixel electrode V _{R of the} reflection area is always in a floating state, and it is impossible to avoid the accumulation of electric charge, thereby causing image sticking.

因此，目前已有另一種方式來解決上述電容耦合式的缺點，請參閱圖六，即以上述電耦合式基礎架構再於各畫素中再額外加入一第二共同電極線V_com2及一補償電容C₂，該補償電容C₂係與該第二共同電極線V_com2連接，因此可利用第二共同電極線V_com2的電壓變化與補償電容C₂的耦合效應，使得穿透區與反射區的液晶反轉臨界電壓V_th1,V_th2較為接近，誠如圖七所示。然而，同樣藉由電容分壓原理調整穿透區電壓V_D與反射區電壓V_R不同來解決灰階反轉問題，但由於反射區的分壓電壓仍為固定值，故僅能解決部分技術問題，而在顯像上還有許多諸如下列的問題無法解決： Therefore, there is another way to solve the above disadvantages of the capacitive coupling type. Referring to FIG. 6, an additional common electrode line V _com2 and a compensation are added to each pixel in the above-mentioned electrically coupled infrastructure. capacitor C _2, the system compensation capacitor C ₂ is connected to the second common electrode line V _com2, thus the voltage variation of the second common electrode line V _com2 the coupling effect compensation capacitor C ₂ so that the reflective region and the transmissive region The liquid crystal inversion threshold voltages V _th1 and V _th2 are relatively close, as shown in FIG. However, the gray-scale inversion problem is also solved by adjusting the penetration region voltage V _D and the reflection region voltage V _R by the capacitance division principle. However, since the partial voltage of the reflection region is still a fixed value, only some technologies can be solved. There are still many problems in the development, such as the following:

1.穿透區VR曲線與反射區的VT曲線仍無法完全相同，如圖七所示，尤其是在高灰階影像時兩個區域的VT曲線差異更為顯著。 1. The VT curve of the penetrating zone and the VT curve of the reflecting zone are still not exactly the same, as shown in Figure 7, especially in the case of high grayscale images, the difference of VT curves in the two regions is more significant.

2.反射區的畫素電極V_R同樣呈現浮接狀態，因此還是有因電荷累積而產生的殘影現象。 2. The pixel electrode V _{R of the} reflection region also exhibits a floating state, and therefore there is still an image sticking phenomenon due to charge accumulation.

3.因為第二共同電極線V_COM2為浮接狀態，而容易有水平串擾(horizontal cross-talk)現象產生。 3. Since the second common electrode line V _COM2 is in a floating state, it is easy to have a horizontal cross-talk phenomenon.

綜上所述，目前採用單晶穴間隙畫素結構的半穿反液晶顯示器仍需一種更佳的克服灰階反轉問題的技術方案。 In summary, at present, a transflective liquid crystal display using a single crystal aperture gap pixel structure still needs a better technical solution to overcome the gray scale inversion problem.

有鑑於上述既有單晶穴間隙畫素結構的半穿反液晶顯示器所採的降低反射區電壓驅動方法衍生出的技術問題，本發明主要發明目的係提供一種確保反射區及穿透區之穿透率完全相同的半穿反液晶顯示器的驅動方法，此外本發明採用此種驅動電路，該半穿反液晶顯示器具有低成本、高良率、無殘影及無水平串擾(horizontal cross-talk)等優點。 In view of the above-mentioned technical problems arising from the method of driving the voltage of the reflection-reducing region in the transflective liquid crystal display having the single crystal aperture gap structure, the main object of the present invention is to provide a path for ensuring the reflection region and the penetration region. The driving method of the transflective liquid crystal display having the same transmittance, and the present invention adopts the driving circuit, which has low cost, high yield, no image sticking and no horizontal cross-talk, etc. advantage.

欲達上述目的所使用的主要技術手係令該半穿反液晶顯示器驅動方法係於其下板之各畫素中加入一多工器，配合調變掃描訊號及不同電壓資料訊號，以分別控制各畫素的穿透區與反射區的電壓，進而調整穿透區與反射區的VT曲線及VR曲線一致。 The main technical hand used to achieve the above purpose is to enable the semi-transflective liquid crystal display driving method to add a multiplexer to each pixel of the lower panel, together with the modulated scanning signal and different voltage data signals, to separately control The voltage of the penetrating zone and the reflecting zone of each pixel is adjusted to be consistent with the VT curve and the VR curve of the penetrating zone and the reflecting zone.

較佳地，本發明所使用多工器的設計係包含有二種，其中一種係於各畫素的穿透區內形成單一薄膜電晶體，其閘極係連接至本畫素掃描線，再於反射區內形成二個串聯連接的薄膜電晶體，而此兩串聯連接薄膜電晶體的閘極係分別連接本畫素的掃描線及本畫素的下一條掃描線；是以，配合依序輸入至本畫素及下一畫素掃描線的調變掃描訊號，即可控制穿透區及反射區的啟閉順序及開啟時間，由於穿透區與反射區啟閉順序及開啟時間不同，即能分別對穿透區及反射區寫入不同電壓資料訊號。是以，本發明的各畫素反射區電壓與穿透區電壓即能在顯示相同灰階時寫入不相同電壓的資料訊號，實現調整穿透區與反射區的VT曲線及VR曲線一致的目的。 Preferably, the design of the multiplexer used in the present invention comprises two types, one of which is formed in a penetrating region of each pixel to form a single thin film transistor, the gate of which is connected to the pixel scanning line, and then Forming two series connected thin film transistors in the reflective region, and the gates of the two series connected thin film transistors are respectively connected to the scanning line of the pixel and the next scanning line of the pixel; The modulation scan signal input to the pixel and the next pixel scan line can control the opening and closing sequence and the opening time of the penetration zone and the reflection zone. Since the opening and closing sequence and the opening time of the penetration zone and the reflection zone are different, That is, different voltage data can be written into the penetrating zone and the reflecting zone respectively. number. Therefore, the pixel reflection region voltage and the transmissive region voltage of the present invention can write data signals of different voltages when displaying the same gray scale, thereby realizing the adjustment of the VT curve and the VR curve of the penetration region and the reflection region. purpose.

較佳地，本發明另一種多工器設計方式係於下板形成複數子掃描線，以與原複數掃描線交錯排列，故各畫素即對應有一條掃描線及一條子掃描線，再將反射區內的單一薄膜電晶體閘極與穿透區的單一薄膜電晶體閘極分別連接至本畫素的子掃描線及掃描線，配合依序送入的調變掃描訊號，控制穿透區與反射區的薄膜電晶體啟閉順序及開啟時間不同，而對穿透區與反射區的儲存電容寫入不同電壓訊號。是以，各畫素反射區電與穿透區電壓即能在顯示相同灰階時寫入不相同電壓的資料訊號，實現調整穿透區與反射區的VT曲線及VR曲線一致的目的。 Preferably, another multiplexer design method of the present invention is to form a plurality of sub-scanning lines on the lower plate to be staggered with the original complex scanning lines, so that each pixel has a scanning line and a sub-scanning line, and then A single thin film transistor gate in the reflection region and a single thin film transistor gate of the penetration region are respectively connected to the sub-scanning line and the scanning line of the pixel, and the modulated scanning signal sequentially sent to control the penetration region The opening and closing sequence and the opening time of the thin film transistor are different from those of the reflective region, and different voltage signals are written to the storage capacitors of the transmissive region and the reflective region. Therefore, the pixel reflection power and the penetration region voltage can write different data signals when displaying the same gray level, thereby achieving the purpose of adjusting the VT curve and the VR curve of the penetration region and the reflection region.

請參閱圖八，為一本發明單晶穴間隙之半穿反液晶顯示器20係包含有一半穿反液晶面板21、一時序控制器22、一掃描驅動電路23、一資料驅動電路24、一公共電壓產生電路25及一伽瑪電壓產生器26。 Referring to FIG. 8 , a transflective liquid crystal display 20 for a single crystal cavity gap of the present invention includes a half-transflective liquid crystal panel 21 , a timing controller 22 , a scan driving circuit 23 , a data driving circuit 24 , and a common The voltage generating circuit 25 and a gamma voltage generator 26.

上述半穿反液晶面板21係包含有一上板(圖中未示)及一下板211，其間夾設有液晶層(圖中未示)，而該下板211則形成有共電極(V_com)及複數呈橫縱交錯排列的掃描線(G₁~G_N)及資料線D₁~D_M，其中掃描線G₁~G_N與資料線D₁~D_M交會處定義為一畫素212；再請配合圖九所示，係本發明下板211第一較佳實施例之單一畫素等效電路圖，其包含有一穿透區A_T、一反射區A_R及一多工器。其中下板211的複數掃描線G₁~G_N及資料線D₁~D_M分別與掃描驅動電路23及資料驅動電路24連接，由掃描驅動電路23週期性地依序輸出調變掃描訊號至複數掃描線G₁~G_N，而資料驅動電路24則針對各畫素212所欲顯示灰階分別輸出二組不同電壓資料訊號的至各畫素212所對應的資料線D_m(m為1~M中之一)。又該共電極(V_com)係連接至該公共電壓產生電路25，以提供各畫素212相同的低電壓準位。 The transflective liquid crystal panel 21 includes an upper plate (not shown) and a lower plate 211 with a liquid crystal layer (not shown) interposed therebetween, and the lower plate 211 is formed with a common electrode (V _com ). And a plurality of scanning lines (G ₁ to G _N ) and data lines D ₁ to D _M arranged in a horizontal and vertical staggered manner, wherein intersections of the scanning lines G ₁ to G _N and the data lines D ₁ to D _M are defined as one pixel 212 Further, please refer to FIG. 9 , which is a single pixel equivalent circuit diagram of the first preferred embodiment of the lower plate 211 of the present invention, which includes a penetration area A _T , a reflection area A _R and a multiplexer. The plurality of scanning lines G ₁ to G _N and the data lines D ₁ to D _{M of the} lower plate 211 are respectively connected to the scan driving circuit 23 and the data driving circuit 24, and the scanning driving circuit 23 periodically outputs the modulated scanning signals to the sequence. The plurality of scanning lines G ₁ to G _N , and the data driving circuit 24 outputs two sets of different voltage data signals to the data lines D _m corresponding to the pixels 212 for each pixel 212 to display gray scales (m is 1) One of ~M). Again, the common electrode (V _com ) is coupled to the common voltage generating circuit 25 to provide the same low voltage level for each pixel 212.

於本實施例中各畫素的多工器係包含有：一穿透區薄膜電晶體TFT1，係形成於穿透區A_T中，其汲極D係與一穿透區儲存電容C_ST1及一穿透區液晶電容C_LC1連接，而閘極G係連接至下板211本畫素掃描線G_n(n為1~N中之一)，至於源極S則連接至下板211本畫素資料線D_m。 In the embodiment, the multiplexer of each pixel includes: a transmissive area thin film transistor TFT1 formed in the transmissive area A _T , and the drain D and the transmissive area storage capacitor C _ST1 and A penetrating region liquid crystal capacitor C _{LC1 is} connected, and a gate G is connected to the lower plate 211 of the present pixel scanning line G _n (n is one of 1 to N), and the source S is connected to the lower plate 211. Prime data line D _m .

一反射區第一薄膜電晶體TFT2，係形成於反射區AR中，其源極S係連接至下板211本畫素資料線D_m，而閘極G連接至本畫素掃描線G_n。 A first reflective region thin film transistor TFT2, lines formed in the reflective region AR, a source S is connected to the lower plate lines 211 pixel data line D _m, while the gate is connected to the G pixels present scan line G _n.

一反射區第二薄膜電晶體TFT3，係形成於反射區A_R中，其源極S係連接至該反射區第一薄膜電晶體TFT2的汲極D，而閘極G係連接至本畫素的下一畫素掃描線G_n+1，至於汲極D則連接至一反射區儲存電容C_ST2及一反射區液晶電容C_LC2。 a reflective region second thin film transistor TFT3 is formed in the reflective region A _R , the source S is connected to the drain D of the first thin film transistor TFT 2 of the reflective region, and the gate G is connected to the pixel The next pixel scan line G _n+1 , and the drain D is connected to a reflective area storage capacitor C _ST2 and a reflective area liquid crystal capacitor C _LC2 .

請配合參閱圖十，係為本實施例配合使用的調變掃描訊號及資料訊號波形圖，由於反射區第一及第二薄膜電晶體TFT2,TFT3的閘極G分別連接本畫素掃描線G_n及本畫素的下一畫素掃描線G_n+1，故本波形圖揭示本畫素前一掃描線G_n-1、本畫素掃描線G_n及下一畫素掃描線G_n+1的波形。由此波形圖可知，掃描驅動電路23輸出至各掃描線G₁~G_N的掃描訊號，其脈波長度共佔有2H時間，其中0H-0.5H時間為第一高電位訊號P1而1H-2H第二高電位訊號P2，又前後掃描線G_n,G_n+1的掃描訊號係保持1H時間差；是以，本畫素反射區第一及第二薄膜電晶體TFT2,TFT3的閘極G會在本畫素掃描訊號G_n於1H-1.5H之間第二高電位P2及下一掃描訊號0H-0.5H的第一高電位P1時間中導通，將此0.5H時間差中送入至本畫素資料線的電壓資料訊號V_R寫入反射區的儲存電容C_ST2中；再者，由於穿透區的薄膜電晶體TFT1閘極G係同樣連接至本畫素掃描線G_n，因此穿透區的薄膜電晶體TFT1係呈現導通的開啟狀態，故在本掃描訊號G_n的1H-1.5H會一併將對應反射區的電壓資料訊號V_R寫入至穿透區儲存電容C_ST2，而於1.5H-2.0H將對應穿透區電壓資料訊號V_T寫入穿透區儲存電容C_ST1，令反射區與穿透區儲存電容C_ST1,C_ST2儲存有呈現同一灰階值的不同電壓值V_R,V_T；因此，調整穿透區與反射區的VT曲線及VR曲線一致。 Please refer to FIG. 10 for the modulation scan signal and data signal waveform used in this embodiment. Since the first and second thin film transistors TFT2 of the reflective region, the gate G of the TFT3 is respectively connected to the pixel scan line G. _n and the next pixel scan line G _n+1 of the present pixel, so the waveform diagram reveals the previous scan line G _n-1 , the pixel scan line G _n and the next pixel scan line G _{n . +1} waveform. As can be seen from the waveform diagram, the scan signal outputted by the scan driving circuit 23 to each of the scanning lines G ₁ to G _{N has} a pulse length of 2H, wherein the 0H-0.5H time is the first high potential signal P1 and 1H-2H. a second high potential signal P2, and the scanning line G _n-front, the scanning signal line G _{n + 1} 1H holding time difference; is, this gate and the second region of the first reflective pixel thin film transistor TFT2, TFT3 G will be very The first scanning potential signal G _n is turned on during the first high potential P2 between 1H-1.5H and the first high potential P1 of the next scanning signal 0H-0.5H, and the 0.5H time difference is sent to the picture. The voltage data signal V _{R of the} data line is written into the storage capacitor C _ST2 of the reflection region; further, since the gate transistor G1 of the transmissive region is also connected to the pixel scanning line G _n , the penetration is The thin film transistor TFT1 of the region is turned on, so that the voltage information signal V _{R of the} corresponding reflection region is written to the transmissive region storage capacitor C _ST2 at 1H-1.5H of the scanning signal G _n . Write the corresponding transmissive area voltage data signal V _T to the transmissive area storage capacitor C _ST1 at 1.5H-2.0H to store the reflective area and the transmissive area. Capacitors C _ST1 , C _ST2 store different voltage values V _R , V _T that exhibit the same gray scale value; therefore, the VT curve and the VR curve of the adjustment penetration region and the reflection region are identical.

上述實施例中調變掃描訊號可進一步藉由以下方式獲得之，請配合參閱圖十一，即將下板211的複數掃描線G₁~G_N依其形成位置順序分為奇數掃描線G₁,G₃...與偶數掃描線G₂,G₄...G_n，其中奇數掃描線G₁,G₃...的出線端係形成於下板211基板的左側，而偶數掃描線G₂,G₄...G_n的出線端則形成於下板211基板的右側，因此可再增加一掃描驅動電路23a，令二個掃描驅動電路23,23a分別連接奇數掃描線G₁,G₃...及偶數掃描線G₂,G₄...G_n。此外，再請配合參閱圖十二，再配合一提供一第一時序訊號OE_L及一第二時序訊號OE_R的時序控制器22a，其中第一時序訊號OE_L與第二時序訊號OE_R頻率相同，時序相差1H，其中脈波佔0.5H。該第一及第二時序訊號係分別輸出至二掃描驅動電路23,23a，令各掃描驅動電路23,23a將原本佔有1H高電位的掃描訊號調整成2H高電位掃描訊號G₁’,G₂’,G₃’.....G_n’，再分別與順序對應的第一及第二時序訊號OE_L,OE_R相減，而得出如同圖十所示的調變掃描訊號G₁,G₂,G₃.....G_n。 In the above embodiment, the modulated scan signal can be further obtained by the following method. Referring to FIG. 11 , the complex scan lines G ₁ G G _{N of the} lower plate 211 are divided into odd scan lines G ₁ according to the position sequence. G ₃ ... and even scanning lines G ₂ , G ₄ ... G _n , wherein the outgoing ends of the odd scanning lines G ₁ , G ₃ ... are formed on the left side of the lower plate 211 substrate, and the even scanning lines G _2, G ₄ ... G _n is the outlet end of the lower plate 211 is formed on the right side of the substrate, thus further increasing the scan driving circuit 23a, so that two scan driving circuits respectively connected 23,23a odd scan lines G ₁ , G ₃ ... and even scan lines G ₂ , G ₄ ... G _n . In addition, please refer to FIG. 12, together with a timing controller 22a that provides a first timing signal OE_L and a second timing signal OE_R, wherein the first timing signal OE_L and the second timing signal OE_R have the same frequency. The timing differs by 1H, with the pulse wave occupying 0.5H. The first and second timing signals are respectively output to the two scan driving circuits 23, 23a, so that the scan driving circuits 23, 23a adjust the scanning signals originally occupying the high potential of 1H to the 2H high-potential scanning signals G ₁ ', G ₂ ', G ₃ '.....G _n ', and then subtracted from the first and second timing signals OE_L, OE_R corresponding to the order, respectively, to obtain the modulated scanning signal G ₁ , G as shown in FIG. ₂ , G ₃ ..... G _n .

再者，在本實施例由於必須分別提供不同電壓資料訊號V_R,V_T至反射區與穿透區，因此資料驅動電路24提高至二倍操作頻率，才能分別於1H時間內輸出二組不同電壓資料訊號V_R,V_T至各條資料訊號線D_m。請配合參閱圖十三所示，由於設計倍頻的資料驅動電路較為複雜，故欲寫入反射區及穿透區相同灰階值而提供至各資料線不同電壓方式，可藉由直接調整伽瑪電壓產生器26所提供予資料驅動電路24不同灰階值之伽瑪電壓γ 0,γ 1，令資料驅動電路24不必增加操作頻率，而能同樣讓資料驅動電路24分別輸出對應電壓資料訊號至反射區及穿透區。 Furthermore, in this embodiment, since different voltage data signals V _R , V _T must be separately supplied to the reflection area and the penetration area, the data driving circuit 24 is increased to twice the operating frequency, and the two groups of different outputs can be respectively output in 1H time. Voltage data signals V _R , V _T to each data signal line D _m . Please refer to Figure 13. As the data driving circuit of the designed multiplier is more complicated, it is necessary to write the same gray scale value of the reflective area and the transmissive area to provide different voltage modes for each data line. The gamma voltage γ 0, γ 1 provided by the voltage generator 26 to the data driving circuit 24 has different gray scale values, so that the data driving circuit 24 does not have to increase the operating frequency, and the data driving circuit 24 can also output the corresponding voltage data signal. To the reflection zone and the penetration zone.

誠如圖十四所示，單晶穴間隙式半穿反液晶顯示器在未加入補償技術前所模擬穿透區及反射區的電壓及灰階曲線圖，由圖中可知若對單一畫素的穿透區及反射區寫入相同電壓，則會分別呈現不同灰階值。因此，本發明藉由穿射區及反射區的不同灰階的電壓差，調整同一條資料線寫入二種不同的電壓資料訊號，令單一畫素穿透區及反射區呈現相同的灰階值。配合圖十五所示，經採用本發明驅動方法所得到穿透區及反射區在呈現任一灰階值時，其VT曲線與VR曲線能完全相同。 As shown in Figure 14, the voltage and gray-scale curves of the penetrating zone and the reflection zone of the single crystal hole-type transflective liquid crystal display before the compensation technique is added, as shown in the figure, if the single pixel is When the penetrating zone and the reflecting zone are written with the same voltage, they will respectively have different grayscale values. Therefore, the present invention adjusts the same data line to write two different voltage data signals by the voltage difference of different gray levels in the penetration area and the reflection area, so that the single pixel penetration area and the reflection area exhibit the same gray level. value. As shown in Fig. 15, the VT curve and the VR curve of the penetration region and the reflection region obtained by the driving method of the present invention can be exactly the same when any gray scale value is presented.

以上為本發明下板第一較佳實施例，以下謹進一步參閱圖十六說明本發明下板其中一畫素212a的第二較佳實施例。 The above is a first preferred embodiment of the lower panel of the present invention. A second preferred embodiment of one of the pixels 212a of the lower panel of the present invention will be described hereinafter with reference to FIG.

本實施例的下板畫素212a與第一較佳實施例結構大致相同，惟下板的複數掃描線G₁~G_N再水平交錯形成有複數子掃描線G₁’~G_N’，故各畫素212a即對應有一條掃描線G_n及一條子掃描線G_n’；其中複數掃描線G₁~G_N及複數子掃描線G₁’~G_N’則與掃描驅動電路(圖中未示)連接，至於本實施例單一畫素212a的多工器係進一步包含有：一穿透區薄膜電晶體TFT1，係形成於穿透區A_T中並與本畫素掃描線G_n、資料線D_m、穿透區儲存電容C_ST1及穿透區液晶電容C_LC1連接，受本畫素掃描線G_n的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線D_m的電壓資料寫入穿透區儲存電容C_ST1中；及一反射區薄膜電晶體TFT2，係形成於反射區A_R中並與本畫素子掃描線G_n’、資料線D_m、反射區儲存電容C_ST2及反射區液晶電容C_LC2連接，受本畫素子掃描線G_n’的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線D_m的電壓資料寫入反射區儲存電容C_ST2中。 The lower panel pixel 212a of the present embodiment has substantially the same structure as the first preferred embodiment, but the plurality of scanning lines G ₁ to G _{N of the} lower panel are horizontally staggered to form a plurality of sub-scanning lines G ₁ '~G _N ', i.e., corresponding to each pixel 212a has a scanning line G _n and a sub-scanning line G _n '; wherein a plurality of scan lines G ₁ ~ G _N and a plurality of scan line G _1' ~ G _N 'and the scan driving circuit (FIG. not shown) are connected, as for the multiplexer-based single pixel 212a of the present embodiment further comprises: a thin film transistor TFT1 transmissive region being formed on the transmissive region a _T and the present scan line pixels G _n, The data line D _m , the transmissive area storage capacitor C _ST1 and the transmissive area liquid crystal capacitor C _{LC1 are} connected, and are driven and turned on by the modulated scan signal of the pixel scanning line G _n , and the current pixel data line D is turned on. The voltage data of _m is written into the transmissive area storage capacitor C _ST1 ; and a reflective area thin film transistor TFT 2 is formed in the reflective area A _R and is adjacent to the picture scanning line G _n ', the data line D _m , and the reflective area The storage capacitor C _ST2 and the reflection area liquid crystal capacitor C _{LC2 are} connected, and are driven and turned on by the modulation scan signal of the picture scanning line G _n ', and Turn on the voltage data of the current data line D _m at the time and write it into the reflection area storage capacitor C _ST2 .

請配合參閱圖十七，係為本實施例配合使用的調變掃描訊號及資料訊號波形圖。該掃描驅動電路(圖中未示)係先後依序交替輸出調變掃描訊號至各畫素的子掃描線G_n’及掃描線G_n。其中各子掃描訊號G_n’及各掃描訊號G_n係包含0.5H高電位訊號，相鄰的子掃描訊號G_n’及掃描訊號G_n係為0.5H的時間差，因此同一畫素的子掃描訊號G_n’及掃描訊號G_n的高電位訊號總時間為1H。由於單一畫素的子掃描訊號G_n’的高電位訊號較掃描訊號G_n早0.5H時間，又其反射區薄膜電晶體TFT2閘極G係連接至子掃描線G_n’，故該反射區薄膜電晶體TFT2閘極先導通，並將此時本畫素資料線D_m上的電壓資料訊號V_R寫入至反射區儲存電容C_ST2，並持續0.5H時間，之後穿透區的薄膜電晶體TFT1閘極G被掃描線G_n的高電位訊號驅動而導通，並將此時本畫素資料線D_m上的對應電壓資料訊號V_T寫入至穿透區儲存電容C_ST1。此外，如圖十八所示，掃描驅動電路亦可維持輸出1H高電位訊號至各掃描線G_n，但仍維持輸出0.5H高電位訊號至各子掃描線G_n’，令單一畫素的子掃描訊號G_n’與掃描訊號G_n有0.5H時間的重疊。 Please refer to FIG. 17 for the modulation scan signal and data signal waveform used in this embodiment. The scan driving circuit (not shown) alternately outputs the modulated scan signal to the sub-scanning line G _n ' and the scanning line G _{n of} each pixel in sequence. Each sub-scanning signal G _n 'and each scanning signal G _n includes a 0.5H high-potential signal, and the adjacent sub-scanning signal G _n 'and the scanning signal G _n are 0.5H time difference, so the sub-scan of the same pixel The total time of the high-level signal of the signal G _n ' and the scanning signal G _n is 1H. Since the high-potential signal of the sub-scanning signal G _n ' of the single pixel is 0.5H earlier than the scanning signal G _n , and the reflective film transistor TFT 2 gate G is connected to the sub-scanning line G _n ', the reflective area The gate of the thin film transistor TFT2 is turned on first, and the voltage data signal V _R on the pixel data line D _m is written to the reflective area storage capacitor C _ST2 for 0.5H time, and then the thin film of the penetrating region crystal TFT1 gate G is driven scanning line G _n is high potential signal is turned on, and at this time a voltage corresponding to the data signals present on the V _T pixels written to the data line D _m to penetrate the storage capacitor C _ST1. In addition, as shown in FIG. 18, the scan driving circuit can also maintain the output 1H high-potential signal to each scanning line G _n , but still maintain the output 0.5H high-potential signal to each sub-scanning line G _n ', so that a single pixel The sub-scanning signal G _n ' has a 0.5H time overlap with the scanning signal G _n .

由圖十七及圖十八的波形圖可知，由於必須分別提供不同電壓資料訊號V_T,V_R至反射區與穿透區，因此資料驅動電路提高至二倍操作頻率，分別於1H時間內輸出二組不同電壓資料訊號V_T,V_R至各條資料訊號線D_m，故為簡化設計倍頻的資料驅動電路，亦藉由直接調整伽瑪電壓產生器所提供予資料驅動電路不同灰階值之伽瑪電壓，讓資料驅動電路不必增加操作頻率，同樣讓資料驅動電路分別輸出對應電壓資料訊號至反射區及穿透區。 It can be seen from the waveform diagrams of FIG. 17 and FIG. 18 that since different voltage data signals V _T , V _R must be separately supplied to the reflection area and the penetration area, the data driving circuit is increased to twice the operating frequency, respectively, in 1H time. Two sets of different voltage data signals V _T , V _{R are} outputted to each data signal line D _m , so the data driving circuit for simplifying the design of the frequency multiplication is also provided by directly adjusting the gamma voltage generator to the data driving circuit. The gamma voltage of the order value does not require the data driving circuit to increase the operating frequency, and the data driving circuit respectively outputs the corresponding voltage data signal to the reflection area and the penetration area.

誠如上述本發明半穿反液晶顯示器的第二較佳實例，由於其下板掃描線較第一較佳實施例下板掃描線的二倍，會直接突顯下板周邊線路佈局面積不足之問題；因此，如圖十九所示，為本發明第二實施例下板掃描線G₁~G_N與子掃描線G₁’~G_N’的佈局圖案示意圖。本實施例中下板211對應顯示區域213的各條子掃描線G₁’~G_N’線段及各條掃描線G₁~G_N線段以第一道金屬製程成形之，而在下板21顯示區域213範圍外的各條子掃描線G₁’~G_N’線段及各條掃描線G₁~G_N線段則交替以第二道金屬製程成形之。舉例來說，下板顯示區域213範圍內的各條掃描線G₁~G_N線段仍以第一道金屬製程成形，而下板顯示區域213範圍外的各條子掃描線G₁’~G_N’線段則以第二道金屬製程成形之，其中以第一及第二道金屬製程成形的各條子掃描線G₁’~G_N’交界處，再以導電孔214貫穿電連接。由於第一及第二道金屬製程係以絕緣層隔離，在下板顯示區域213範圍外的各條子掃描線G₁’~G_N’線段及各條掃描線G₁~G_N線段橫向間距可縮短，在有限面積上提高佈線密度。雖然各掃描線G₁~G_N及子掃描線G₁’~G_N’係因第一及第二道金屬製程所成形，而造成其RC延遲時間並不相同，但由於本發明穿透區與反射區的電壓原本就不同，而且每個畫素所看到的狀況都一樣，故不會因RC延遲時間不同造成顯像畫面不均勻(mura)問題。 As the second preferred embodiment of the above-described semi-transparent liquid crystal display device of the present invention, since the scanning line of the lower board is twice as large as the scanning line of the lower board of the first preferred embodiment, the problem that the layout area of the peripheral line of the lower board is insufficient is directly emphasized. ; Thus, as shown in FIG nineteen, schematic layout pattern plate oriented scanning lines G ₁ ~ G _N and the sub-scanning line G ₁ '~ G _N' of the second embodiment of the invention. In this embodiment the lower plate 211 corresponding to the respective display area 213 striped scanning lines G ₁ '~ G _N' segment and all scan lines G ₁ ~ G _N channel segment to a first metal forming process, the display area 21 and the lower plate Each of the sub-scanning lines G ₁ '~G _N ' line segments outside the range of 213 and the respective scanning lines G ₁ to G _N line segments are alternately formed by a second metal process. For example, each of the scanning lines G ₁ -G _{N in the} range of the lower panel display area 213 is still formed by the first metal process, and the sub-scanning lines G ₁ '~G _N outside the range of the lower panel display area 213 are formed. The line segment is formed by a second metal process, wherein the intersections of the respective sub-scan lines G ₁ '~G _N ' formed by the first and second metal processes are electrically connected through the conductive holes 214. Since the first and second metal processes are separated by an insulating layer, the lateral spacing of each of the sub-scanning lines G ₁ '~G _N ' outside the lower display area 213 and the scanning lines G ₁ -G _N can be shortened. Increase the wiring density over a limited area. Although the scanning lines G ₁ to G _N and the sub-scanning lines G ₁ '~G _N ' are formed by the first and second metal processes, the RC delay time is not the same, but the penetration area of the present invention The voltage with the reflection area is originally different, and the condition seen by each pixel is the same, so the mura problem of the development picture is not caused by the RC delay time.

綜上所述，本發明的半穿反液晶顯示器驅動方法係於其下板之各畫素中加入一多工器，配合調變掃描訊號及不同電壓資料訊號，以分別控制各畫素的穿透區與反射區的電壓，進而調整穿透區與反射區的VT曲線及VR曲線一致，此外本發明採用此種驅動電路，該半穿反液晶顯示器具有低成本、高良率、無殘影及無水平串擾(horizontal cross-talk)等優點。 In summary, the driving method for the transflective liquid crystal display of the present invention is to add a multiplexer to each pixel of the lower panel to match the modulated scanning signal and different voltage data signals to respectively control the wearing of each pixel. The voltage of the transmissive area and the reflective area are adjusted to match the VT curve and the VR curve of the transmissive area and the reflective area. In addition, the present invention adopts the driving circuit, which has low cost, high yield, no residual image and There is no advantage such as horizontal cross-talk.

10‧‧‧半穿反液晶顯示器 10‧‧‧Semi-anti-liquid crystal display

11‧‧‧上板 11‧‧‧Upper board

12‧‧‧下板 12‧‧‧ Lower board

121‧‧‧穿透區 121‧‧‧ penetration zone

122‧‧‧反射區 122‧‧‧Reflective zone

123‧‧‧反射層 123‧‧‧reflective layer

124‧‧‧絕緣凸塊 124‧‧‧Insulated bumps

20‧‧‧半穿反液晶顯示器 20‧‧‧Semi-transparent LCD

21‧‧‧半穿反液晶面板 21‧‧‧Semi-transparent LCD panel

211‧‧‧下板 211‧‧‧ Lower board

212,212a‧‧‧畫素 212,212a‧‧‧ pixels

213‧‧‧顯示區域 213‧‧‧Display area

22,22a‧‧‧時序控制器 22, 22a‧‧‧ timing controller

23,23a‧‧‧掃描驅動電路 23,23a‧‧‧Scan drive circuit

24‧‧‧資料驅動電路 24‧‧‧Data Drive Circuit

25‧‧‧公共電壓產生電路 25‧‧‧Common voltage generating circuit

26‧‧‧伽瑪電壓產生器 26‧‧‧Gamma Voltage Generator

214‧‧‧導電孔 214‧‧‧Electrical hole

圖一：係一種單晶穴間隙式半穿反液晶顯示器單畫素的縱向剖面圖。 Figure 1: is a longitudinal sectional view of a single pixel of a single-cell gap-type transflective liquid crystal display.

圖二：係另一種雙晶穴間隙式半穿反液晶顯示器單畫素的縱向剖面圖。 Figure 2: is a longitudinal cross-sectional view of another single-pixel gap-type transflective liquid crystal display.

圖三：係圖二模擬不同間隙大小的VR曲線及VT曲線圖。 Figure 3: Figure 2 shows the VR curve and VT curve of different gap sizes.

圖四：係另一種單晶穴間隙式半穿反液晶顯示器單畫素的等效電路圖。 Figure 4: An equivalent circuit diagram of a single pixel of a single-cell gap-type transflective liquid crystal display.

圖五：係實現圖四的液晶顯示器的VT曲線及VR曲線圖。 Figure 5: The VT curve and VR curve of the liquid crystal display of Figure 4 are implemented.

圖六：係又一種單晶穴間隙式半穿反液晶顯示器單畫素的等效電路圖。 Fig. 6 is an equivalent circuit diagram of a single pixel of a single-cell gap-type semi-transflective liquid crystal display.

圖七：係實現圖六的液晶顯示器的VT曲線及VR曲線圖。 Figure 7: The VT curve and VR curve of the liquid crystal display of Figure 6 are implemented.

圖八：係本發明單晶穴間隙式半穿反液晶顯示器第一較佳實施例的結構示意圖。 Figure 8 is a schematic view showing the structure of a first preferred embodiment of the single crystal hole gap type transflective liquid crystal display of the present invention.

圖九：係圖八單一畫素等效電路圖。 Figure 9: Figure 8 is a single pixel equivalent circuit diagram.

圖十：係圖八的調變掃描訊號及資料訊號波形圖。 Figure 10: Diagram of the modulation scan signal and data signal waveform of Figure 8.

圖十一：本發明單晶穴間隙式半穿反液晶顯示器另一結構示意圖。 Figure 11 is a schematic view showing another structure of the single crystal hole gap type transflective liquid crystal display of the present invention.

圖十二：圖十一的第一及第二時序訊號與奇/偶數掃描訊號波形圖。 Figure 12: The first and second timing signals and the odd/even scan signal waveforms of Figure 11.

圖十三：係圖八另一調變掃描訊號及資料訊號波形圖。 Figure 13: Figure 8 shows another waveform of the modulated scan signal and data signal.

圖十四：係圖一未加入補償技術前所模擬穿透區及反射區的電壓及灰階曲線圖。 Figure 14: Figure 1 shows the voltage and gray-scale plots of the simulated penetration and reflection zones before the compensation technique is added.

圖十五：係圖八模擬穿透區及反射區的電壓及灰階曲線圖。 Figure 15: Figure 8 shows the voltage and grayscale curves of the simulated penetration zone and the reflection zone.

圖十六：係本發明單晶穴間隙式半穿反液晶顯示器第二較佳實施例之單一畫素等效電路圖。 Figure 16 is a single pixel equivalent circuit diagram of a second preferred embodiment of the single crystal hole gap type transflective liquid crystal display of the present invention.

圖十七：係圖十六的調變掃描訊號及資料訊號波形圖。 Figure 17: Figure 16 shows the waveform of the modulated scan signal and data signal.

圖十八：係圖十六的另一調變掃描訊號及資料訊號波形圖。 Figure 18: Another modified scan signal and data signal waveform diagram of Figure 16.

圖十九：係實現圖十六下板掃描線G₁~G_N與子掃描線G₁’~G_N’的佈局圖案示意圖。 Fig. 19 is a schematic diagram showing the layout pattern of the scanning lines G ₁ to G _N and the sub-scanning lines G ₁ '~G _N ' of the lower panel of Fig. 16.

212‧‧‧畫素 212‧‧‧ pixels

Claims

一種單晶穴間隙式半穿反液晶顯示器的驅動方法，其中該半穿反液晶顯示器包含有一薄膜電晶體基板，其上定義複數矩陣排列畫素，各畫素包含有一反射區及一穿透區，其改良在於：該驅動方法係於下板之各畫素中加入一多工器，該多工器係分別與反射區儲存電容及穿透區儲存電容連接，該多工器藉由調變掃描訊號及不同電壓資料訊號，分別將不同電壓資料訊號寫入各畫素的反射區儲存電容及穿透區儲存電容，以調整穿透區與反射區的VT曲線及VR曲線一致。 A driving method for a single-cell hole-type transflective liquid crystal display, wherein the transflective liquid crystal display comprises a thin film transistor substrate on which a plurality of matrix array pixels are defined, each pixel comprising a reflective region and a transmissive region The improvement is that the driving method is to add a multiplexer to each pixel of the lower board, and the multiplexer is respectively connected to the storage capacitor of the reflective area and the storage capacitor of the penetration area, and the multiplexer is modulated by Scanning signals and different voltage data signals respectively write different voltage data signals into the reflection area storage capacitors and the penetration area storage capacitors of each pixel to adjust the VT curve and the VR curve of the penetration area and the reflection area.

如申請專利範圍第1項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中各多工器係包含有：一穿透區薄膜電晶體，係形成於穿透區中並與本畫素掃描線、資料線及穿透區儲存電容連接，受本畫素掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中；一反射區第一薄膜電晶體，係形成於反射區中並與本畫面掃描線及資料線連接，受本畫素掃描線的調變掃描訊號驅動而啟閉；及一反射區第二薄膜電晶體，係形成於反射區中並與該反射區第一薄膜電晶體串聯連接，並與本畫素的下一畫素掃描線及反射區儲存電容連接；受本畫素的下一畫素掃描線的調變掃描訊號驅動而啟閉，並與反射區第一薄膜電晶體同時開啟時，透過反射區第一薄膜電晶體將本畫素資料線的電壓資料寫入穿透區儲存電容中。 The method for driving a single-crystal hole-filled transflective liquid crystal display according to claim 1, wherein each multiplexer comprises: a penetrating region thin film transistor formed in the penetrating region and associated with The pixel scanning line, the data line and the transmission area storage capacitor connection are driven and turned on by the modulation scanning signal of the pixel scanning line, and the voltage data of the current pixel data line is turned into the penetration area for storage. The first thin film transistor in the reflective region is formed in the reflective region and connected to the scanning line and the data line of the picture, and is driven and turned on by the modulated scanning signal of the pixel scanning line; and a reflective area a thin film transistor formed in the reflective region and connected in series with the first thin film transistor of the reflective region, and connected to the next pixel scan line of the pixel and the storage capacitor of the reflective region; When the modulation scan signal of the pixel scan line is driven to be turned on and off, and is simultaneously turned on with the first thin film transistor in the reflective region, The first thin film transistor in the over-reflection region writes the voltage data of the pixel data line into the storage capacitor of the penetration region.

如申請專利範圍第1項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，係進一步於該下板形成有交錯水平排列的複數掃描線及複數子掃描線，以與複數資料線橫縱交叉，令各畫素對應有一條掃描線及子掃描線；其中又各多工器係包含有：一穿透區薄膜電晶體，係形成於穿透區中並與本畫素掃描線、資料線及穿透區儲存電容連接，受本畫素掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中；及一反射區薄膜電晶體，係形成於反射區中並與本畫素子掃描線、資料線及穿透區儲存電容連接，受本畫素子掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中。 The driving method of the single crystal hole gap type transflective liquid crystal display according to claim 1, wherein the lower plate is further formed with a plurality of scanning lines and a plurality of sub scanning lines arranged in a staggered horizontal arrangement to form a plurality of data lines. The horizontal and vertical intersections have a scanning line and a sub-scanning line corresponding to each pixel; wherein each multiplexer comprises: a penetrating region thin film transistor formed in the penetrating region and scanned with the pixel The data line and the transmission area storage capacitor connection are driven and turned on by the modulation scan signal of the picture scanning line, and the voltage data of the current pixel data line is turned into the transmission area storage capacitor; The reflective region thin film transistor is formed in the reflective region and is connected to the pixel scanning line, the data line and the transmission area storage capacitor of the picture, and is driven and turned on by the modulation scan signal of the picture scanning line, and will be turned on and off. The voltage data of the pixel data line is written into the storage capacitor of the penetration area.

如申請專利範圍第2項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中該下板複數掃描線係依序週期性接收一調變掃描訊號，各調變掃描訊號係為2H的驅動訊號，其包含有一0.5H第一高電位訊號、一0.5H的低電位訊號及一1H第二高電位訊號，並且前後條掃描線的調變掃描訊號間隔1H的時間差。 The method for driving a single-crystal-hole gap type transflective liquid crystal display according to the second aspect of the invention, wherein the plurality of scanning lines of the lower plate sequentially receive a modulated scanning signal in sequence, and each modulated scanning signal is The driving signal of 2H includes a 0.5H first high potential signal, a 0.5H low potential signal and a 1H second high potential signal, and the time difference between the modulated scanning signals of the front and rear scanning lines is 1H.

如申請專利範圍第4項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中產生該調變掃描訊號方式係先取得二組時序相差1H而脈波時間佔0.5H的時序訊號，再令包含有2H高電位訊號的奇數及偶數掃描訊號分別與此二組時序訊號相減。 The method for driving a single-crystal hole gap type transflective liquid crystal display according to claim 4, wherein the method of generating the modulated scan signal first obtains two sets of timing signals with a phase difference of 1H and a pulse time of 0.5H. Then, the odd and even scan signals including the 2H high potential signal are respectively subtracted from the two sets of timing signals.

如申請專利範圍第3項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中該下板複數子掃描線及掃描線係依序週期性接收一調變掃描訊號，該調變掃描訊號係為0.5H的驅動訊號，並且各畫素對應的子掃描線與掃描線的調變掃描訊號為間隔0.5H時間差。 The method for driving a single-crystal-hole gap type transflective liquid crystal display according to claim 3, wherein the plurality of sub-scanning lines and the scanning lines sequentially receive a modulated scanning signal in sequence, the modulation The scanning signal is a driving signal of 0.5H, and the sub-scanning line corresponding to each pixel and the modulated scanning signal of the scanning line are separated by a time interval of 0.5H.

如申請專利範圍第3項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中該下板複數子掃描線係依序週期性接收一第一調變掃描訊號，而複數掃描線係依序週期性接收第二調變訊號，其中第一調變訊號為0.5H的高電位訊號，而第二調變訊號為1H的高電位訊號，並且各畫素對應的子掃描線與掃描線的調變掃描訊號無時間差。 The method for driving a single-crystal hole-type transflective liquid crystal display according to claim 3, wherein the lower sub-multiple scanning lines sequentially receive a first modulated scanning signal, and the plurality of scanning lines are sequentially received. The second modulation signal is periodically received, wherein the first modulation signal is a high-potential signal of 0.5H, and the second modulation signal is a high-potential signal of 1H, and the sub-scanning lines and scans corresponding to each pixel There is no time difference between the line modulation scan signals.

如申請專利範圍第1項所述之單晶穴間隙式半穿反液晶顯示器的驅動方法，其中該半穿反液晶顯示器係進一步包含有一資料驅動電路及連接至該資料驅動電路的一伽瑪電壓產生器，其中該資料驅動電路係提供各畫素資料線的電壓資料訊號，而藉由直接調整伽瑪電壓產生器提供至該資料驅動電路不同灰階值之伽瑪電壓，讓資料驅動電路分別輸出對應電壓資料訊號至反射區及穿透區。 The method for driving a single-crystal hole-filled transflective liquid crystal display according to claim 1, wherein the transflective liquid crystal display further comprises a data driving circuit and a gamma voltage connected to the data driving circuit a generator, wherein the data driving circuit provides a voltage data signal of each pixel data line, and the data driving circuit is not provided by directly adjusting the gamma voltage generator The gamma voltage of the gray scale value causes the data driving circuit to respectively output the corresponding voltage data signal to the reflection area and the penetration area.

一種單晶穴間隙式半穿反液晶顯示器，係包含有一半穿反液晶面板、一時序控制器，一掃描驅動電路及一資料驅動電路；其改良在於：上述半穿反液晶面板係包含有一上板及一下板，其間夾設有液晶層，而該下板則形成有共電極及複數呈橫縱交錯排列的掃描線及資料線，其中掃描線與資料線交會處定義為一畫素，其中各畫素包含有一穿透區、一反射區及一多工器，該多工器係與本畫素掃描線及資料線連接；上述掃描驅動電路係連接至複數掃描線，以週期性地依序輸出調變掃描訊號至複數掃描線，驅動各畫素多工器，以決定反射區及穿透區的啟閉順序及開啟時間；上述資料驅動電路係連接至複數資料線，係針對相同灰階值輸出二組不同電壓的資料訊號至各畫素的開啟中的穿透區及反射區；及上述時序控制器係提供固定時序訊號予掃描驅動電路及資料驅動電路。 The invention relates to a single-cell gap type transflective liquid crystal display, which comprises a transflective liquid crystal panel, a timing controller, a scan driving circuit and a data driving circuit. The improvement is that the semi-transparent liquid crystal panel comprises an upper portion. a plate and a lower plate with a liquid crystal layer interposed therebetween, and the lower plate is formed with a common electrode and a plurality of scanning lines and data lines arranged in a horizontal and vertical staggered manner, wherein a intersection of the scanning line and the data line is defined as a pixel, wherein Each pixel includes a penetrating region, a reflecting region and a multiplexer, and the multiplexer is connected to the pixel scanning line and the data line; the scanning driving circuit is connected to the plurality of scanning lines to periodically The output output modulated scanning signal to the complex scanning line drives each pixel multiplexer to determine the opening and closing sequence and the opening time of the reflection area and the penetration area; the data driving circuit is connected to the plurality of data lines for the same gray The order value outputs two sets of different voltage data signals to the penetration area and the reflection area of each pixel opening; and the timing controller provides a fixed timing signal to the scan driving circuit and the data Moving circuit.

如申請專利範圍第9項所述一種單晶穴間隙式半穿反液晶顯示器，其中各多工器係包含有：一穿透區薄膜電晶體，係形成於穿透區中並與本畫素掃描線、資料線及穿透區儲存電容連接，受本畫素掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中；一反射區第一薄膜電晶體，係形成於反射區中並與本畫面掃描線及資料線連接，受本畫素掃描線的調變掃描訊號驅動而啟閉；及一反射區第二薄膜電晶體，係形成於反射區中並與該反射區第一薄膜電晶體串聯連接，並與本畫素的下一畫素掃描線及反射區儲存電容連接；受本畫素的下一畫素掃描線的調變掃描訊號驅動而啟閉，並與反射區第一薄膜電晶體同時開啟時，透過反射區第一薄膜電晶體將本畫素資料線的電壓資料寫入穿透區儲存電容中。 A single crystal hole gap type transflective liquid crystal display according to claim 9, wherein each multiplexer comprises: a penetrating region thin film transistor formed in the penetrating region and associated with the pixel Scanning line, data line and transmission area storage capacitor connection, modulated by the scanning line of the pixel The signal is driven to open and close, and the voltage data of the current data line of the current pixel is written into the storage capacitor of the penetration area; the first thin film transistor of a reflection area is formed in the reflection area and is scanned with the screen and The data line is connected and driven to be turned on and off by the modulated scanning signal of the pixel scanning line; and a second thin film transistor in the reflective region is formed in the reflective region and connected in series with the first thin film transistor of the reflective region, and Connected to the next pixel scan line of the pixel and the storage capacitor of the reflective region; driven and turned on by the modulated scan signal of the next pixel scan line of the pixel, and simultaneously opened with the first thin film transistor of the reflective region The voltage data of the pixel data line is written into the transmissive area storage capacitor through the first thin film transistor in the reflective region.

如申請專利範圍第9項所述之單晶穴間隙式半穿反液晶顯示器，其中該下板進一步形成與複數掃描線水平交錯的複數子掃描線，以與複數資料線橫縱交叉，令各畫素對應有一條掃描線及子掃描線；其中各多工器係包含有：一穿透區薄膜電晶體，係形成於穿透區中並與本畫素掃描線、資料線及穿透區儲存電容連接，受本畫素掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中；及一反射區薄膜電晶體，係形成於反射區中並與本畫素子掃描線、資料線及穿透區儲存電容連接，受本畫素子掃描線的調變掃描訊號驅動而啟閉，並將開啟當時本畫素資料線的電壓資料寫入穿透區儲存電容中。 The single crystal hole gap type transflective liquid crystal display according to claim 9, wherein the lower plate further forms a plurality of sub-scanning lines horizontally interlaced with the plurality of scanning lines to cross the plurality of data lines horizontally and vertically The pixel corresponds to a scan line and a sub-scan line; wherein each multiplexer comprises: a penetrating region thin film transistor formed in the penetrating region and intersecting with the pixel scan line, the data line and the penetrating region The storage capacitor connection is driven and turned on by the modulation scan signal of the pixel scan line, and the voltage data of the current pixel data line is turned into the storage capacitor of the penetration area; and a reflective area film transistor is Formed in the reflective area and connected with the picture scanning line, the data line and the transmission area storage capacitor of the picture, and are adjusted by the scanning line of the picture The variable scan signal is driven to turn on and off, and the voltage data of the current pixel data line at the time is written into the storage capacitor of the penetration area.

如申請專利範圍第10項所述之單晶穴間隙式半穿反液晶顯示器，其中該掃描驅動電路輸出調變掃描訊號係為2H的驅動訊號，其包含有一0.5H第一高電位訊號、一0.5H的低電位訊號及一1H第二高電位訊號，並且前後條掃描線的調變掃描訊號間隔1H的時間差。 The single crystal hole gap type transflective liquid crystal display according to claim 10, wherein the scan driving circuit outputs a driving signal whose modulation scanning signal is 2H, which comprises a 0.5H first high potential signal, and a The low potential signal of 0.5H and the second high potential signal of 1H, and the time difference of the modulated scanning signal interval of 1H of the front and rear scanning lines.

如申請專利範圍第12項所述之單晶穴間隙式半穿反液晶顯示器，其中：複數掃描線，係包含形成於下板兩相對側的奇數掃描線與偶數掃描線；該時序控制器，係提供一第一時序訊號及一第二時序訊號，其中第一時序訊號與第二時序訊號頻率相同，時序相差1H，其中脈波佔0.5H；該掃描驅動電路，係依序產生包含有2H高電位訊號的奇數及偶數掃描訊號，並將奇數及偶數掃描訊號分別與第一及第二時序訊號相減，輸出調變掃描訊號。 The single crystal hole gap type transflective liquid crystal display according to claim 12, wherein: the plurality of scan lines comprise odd-numbered scan lines and even-numbered scan lines formed on opposite sides of the lower plate; the timing controller, Providing a first timing signal and a second timing signal, wherein the first timing signal and the second timing signal have the same frequency, and the timing difference is 1H, wherein the pulse wave accounts for 0.5H; the scan driving circuit sequentially generates the There are odd and even scan signals of the 2H high potential signal, and the odd and even scan signals are respectively subtracted from the first and second timing signals, and the modulated scan signal is output.

如申請專利範圍第11項所述之單晶穴間隙式半穿反液晶顯示器，其中該下板複數子掃描線及掃描線係依序週期性接收一調變掃描訊號，該調變掃描訊號係為0.5H的驅動訊號，並且各畫素對應的子掃描線與掃描線的調變掃描訊號為間隔0.5H時間差。 The single crystal hole-type transflective liquid crystal display according to claim 11, wherein the lower sub-scanning line and the scanning line sequentially receive a modulated scanning signal in sequence, the modulated scanning signal system. It is a driving signal of 0.5H, and the sub-scanning line corresponding to each pixel and the modulated scanning signal of the scanning line are separated by a time interval of 0.5H.

如申請專利範圍第11項所述之單晶穴間隙式半穿反液晶顯示器，其中該下板複數子掃描線係依序週期性接收一第一調變掃描訊號，而複數掃描線係依序週期性接收第二調變訊號，其中第一調變訊號為0.5H的高電位訊號，而第二調變訊號為1H的高電位訊號，並且各畫素對應的子掃描線與掃描線的調變掃描訊號無時間差。 The single crystal hole-type transflective liquid crystal display according to claim 11, wherein the lower sub-scanning line sequentially receives a first modulated scanning signal, and the plurality of scanning lines are sequentially The second modulation signal is periodically received, wherein the first modulation signal is a high-potential signal of 0.5H, and the second modulation signal is a high-potential signal of 1H, and the sub-scanning lines and the scanning lines corresponding to each pixel are adjusted. There is no time difference between the variable scanning signals.

如申請專利範圍第9項所述之單晶穴間隙式半穿反液晶顯示器，其進一包含有：一伽瑪電壓產生器，係連接至該資料驅動電路，並提供至該資料驅動電路不同灰階值之伽瑪電壓，讓資料驅動電路分別輸出對應電壓資料訊號至反射區及穿透區；及一公共電壓產生電路，係連接至該共電極，以提供各畫素相同的低電壓準位。 The single crystal hole gap type transflective liquid crystal display according to claim 9, which further comprises: a gamma voltage generator connected to the data driving circuit and provided to the data driving circuit different gray The gamma voltage of the order value causes the data driving circuit to respectively output the corresponding voltage data signal to the reflection area and the penetration area; and a common voltage generating circuit is connected to the common electrode to provide the same low voltage level of each pixel .

一種如申請專利範圍第11項所述之單晶穴間隙式半穿反液晶顯示器，其中該半穿反液晶顯示器下板對應顯示區的各條子掃描線線段及各條掃描線線段以第一道金屬製程成形之，而在下板顯示區域範圍外的各條子掃描線線段及各條掃描線線段交替地以第二道金屬製程成形之，其中以第一道金屬製程與第二道金屬製程形成的掃描線段係以導電孔貫穿電連接之。 The single crystal hole-type transflective liquid crystal display according to claim 11, wherein the lower transflective liquid crystal display lower plate corresponds to each sub-scanning line segment of the display area and each scanning line segment is first The metal process is formed, and each of the sub-scanning line segments and the respective scanning line segments outside the display area of the lower plate are alternately formed by a second metal process, wherein the first metal process and the second metal process are formed. The scanning line segments are electrically connected through the conductive holes.

如申請專利範圍第17項所述之單晶穴間隙式半穿反液晶顯示器，其中下板顯示區域範圍外的各條子掃描線線段係以第二道金屬製程為之，而下板顯示區域範圍外各條掃描線線段以第一道金屬製程成形，其中下板顯示區域範圍內外子掃描線線段再以導電孔貫穿電連接之。 The single crystal hole-type transflective liquid crystal display according to claim 17, wherein each of the sub-scanning line segments outside the display area of the lower plate is The second metal process is used, and the scanning line segments outside the display area of the lower plate are formed by the first metal process, wherein the sub-scanning line segments in the lower panel display area are electrically connected through the conductive holes.