TWI409792B - Gamma voltage generation circuit - Google Patents
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Description
本發明是有關於一種伽瑪電壓產生電路，且特別是有關於一種可位移伽瑪電壓一個共同電壓準位的伽瑪電壓產生電路。The present invention relates to a gamma voltage generating circuit, and more particularly to a gamma voltage generating circuit for a common voltage level of a displaceable gamma voltage.
在現今資訊社會中，隨著資訊傳播媒體及各種電子顯示裝置被廣泛應用於工業用裝置或家用設備，使得電子顯示裝置越來越顯得重要，並且這些電子顯示裝置更持續地更新以適用於資訊社會中各種需求的功能。In today's information society, as information dissemination media and various electronic display devices are widely used in industrial devices or household appliances, electronic display devices are becoming more and more important, and these electronic display devices are more continuously updated to be suitable for information. The function of various needs in society.
一般而言，電子顯示裝置顯示並傳輸各項資訊給使用者。意即，這些電子顯示裝置將電子資訊信號轉換成使用者視覺上可辨識的光學資訊信號。In general, an electronic display device displays and transmits various information to a user. That is, these electronic display devices convert electronic information signals into optical information signals that are visually identifiable by the user.
在目前的顯示裝置或系統，像是映像管顯示器(Cathode-Ray Tube,CRT)或是液晶顯示器(Liquid Crystal Display,LCD)，其輸入電壓及顯示輸出之間並非線性關係，並且輸入電壓及顯示輸出之間的關係透過伽瑪曲線(gamma curve)來描述。以液晶顯示器而言，則可透過伽瑪曲線找到對應各灰階的輸出電壓(亦即伽瑪電壓)，利用這些伽瑪電壓控制液晶面板顯示正確的灰階，則液晶顯示器可正確的顯示影像。In current display devices or systems, such as a Cathode-Ray Tube (CRT) or a Liquid Crystal Display (LCD), the input voltage and the display output are nonlinearly related, and the input voltage and display are displayed. The relationship between the outputs is described by a gamma curve. In the case of a liquid crystal display, the output voltage (ie, gamma voltage) corresponding to each gray scale can be found through the gamma curve. By using these gamma voltages to control the liquid crystal panel to display the correct gray scale, the liquid crystal display can correctly display the image. .
為了改良液晶顯示器的顯示效果，有些液晶面板會將像素切割為兩個子像素。而兩個子像素由於電路結構的關 係，可能會有共同電壓的準位不一樣的現象產生。在此情況之下，輸出同樣的伽瑪電壓至液晶面板時，兩個子像素的顯示效果可能會不一樣，因而影響到顯示的品質。請參照圖1，一個畫素由子畫素A及B所組成。子畫素A的共同電壓準位為VCOMA，子畫素B的共同電壓準位為VCOMB。並且，共同電壓準位VCOMA與VCOMB間的誤差△V會造成顯示面板的色偏(color shift)現象，以致於液晶顯示器的顯示品質會降低。In order to improve the display effect of the liquid crystal display, some liquid crystal panels cut the pixels into two sub-pixels. And the two sub-pixels are closed due to the circuit structure. Departments may have different levels of common voltage. In this case, when the same gamma voltage is output to the liquid crystal panel, the display effect of the two sub-pixels may be different, thus affecting the quality of the display. Referring to FIG. 1, a pixel is composed of sub-pixels A and B. The common voltage level of sub-pixel A is VCOMA, and the common voltage level of sub-pixel B is VCOMB. Moreover, the error ΔV between the common voltage levels VCOMA and VCOMB causes a color shift phenomenon of the display panel, so that the display quality of the liquid crystal display is lowered.
本發明提供一種一種伽瑪電壓產生電路，可位移伽瑪電壓一個共同電壓準位。The present invention provides a gamma voltage generating circuit that can shift a common voltage level of a gamma voltage.
本發明提供一種伽瑪電壓產生電路，其構成以產生多個伽瑪電壓。伽瑪產生電路包括偏移電壓產生器、電壓準位位移器、電阻串列。偏移電壓產生器依據第一代碼對第一輸入電壓與第二輸入電壓之間的壓差進行分壓以產生第一偏移電壓。電壓準位位移器耦接偏移電壓產生器，其包括第一電壓位移電路及第二電壓位移電路。第一電壓位移電路耦接偏移電壓產生器，將第一參考電壓向下位移一個第一偏移電壓並輸出作為第一準位位移電壓。第二電壓位移電路耦接偏移電壓產生器，將第二參考電壓向下位移一個第一偏移電壓並輸出作為一第二準位位移電壓。電阻串列包括多個串聯的電阻，每一電阻輸出一個伽瑪電壓，其中電阻串列的第一端耦接電壓準位位移器的第一輸出端， 電阻串列的第二端耦接電壓準位位移器的第二輸出端。The present invention provides a gamma voltage generating circuit configured to generate a plurality of gamma voltages. The gamma generating circuit includes an offset voltage generator, a voltage level shifter, and a resistor string. The offset voltage generator divides a voltage difference between the first input voltage and the second input voltage according to the first code to generate a first offset voltage. The voltage level shifter is coupled to the offset voltage generator and includes a first voltage shift circuit and a second voltage shift circuit. The first voltage displacement circuit is coupled to the offset voltage generator to shift the first reference voltage downward by a first offset voltage and output as the first level displacement voltage. The second voltage displacement circuit is coupled to the offset voltage generator to shift the second reference voltage downward by a first offset voltage and output as a second level displacement voltage. The resistor string includes a plurality of resistors connected in series, each resistor outputting a gamma voltage, wherein the first end of the resistor string is coupled to the first output of the voltage level shifter, The second end of the resistor string is coupled to the second output of the voltage level shifter.
在本發明之一實施例中，上述之電壓準位位移器的第一輸出端的電壓準位與第一準位位移電壓相同，並且電壓準位位移器的第二輸出端的電壓準位與第二準位位移電壓相同。In an embodiment of the invention, the voltage level of the first output end of the voltage level shifter is the same as the first level shift voltage, and the voltage level of the second output end of the voltage level shifter is second. The displacement voltage is the same.
在本發明之一實施例中，上述之偏移電壓產生器包括數位類比轉換器及第一分壓器。數位類比轉換器依據第一代碼對第一輸入電壓與第二輸入電壓之間的壓差進行分壓以產生一第一分壓。第一分壓器耦接數位類比轉換器，用以對第一分壓進行分壓產生第一偏移電壓。In an embodiment of the invention, the offset voltage generator includes a digital analog converter and a first voltage divider. The digital analog converter divides the voltage difference between the first input voltage and the second input voltage according to the first code to generate a first partial pressure. The first voltage divider is coupled to the digital analog converter for dividing the first partial voltage to generate a first offset voltage.
在本發明之一實施例中，上述之第一分壓器包括第一電阻及第二電阻，其中第一電阻串聯第二電阻。第一電阻的第一端接收第一分壓，第一電阻的第二端耦接第二電阻及輸出第一偏移電壓。In an embodiment of the invention, the first voltage divider includes a first resistor and a second resistor, wherein the first resistor is connected in series with the second resistor. The first end of the first resistor receives the first partial voltage, and the second end of the first resistor is coupled to the second resistor and outputs the first offset voltage.
在本發明之一實施例中，上述之第一分壓器包括第一電阻、第二電阻及運算放大器。第一電阻串聯第二電阻。第一電阻的第一端接收第一分壓，第一電阻的第二端耦接第二電阻及運算放大器的正輸入端。運算放大器的輸出端耦接其負輸入端及輸出第一偏移電壓。In an embodiment of the invention, the first voltage divider includes a first resistor, a second resistor, and an operational amplifier. The first resistor is connected in series with the second resistor. The first end of the first resistor receives the first divided voltage, and the second end of the first resistor is coupled to the second resistor and the positive input terminal of the operational amplifier. The output of the operational amplifier is coupled to its negative input terminal and outputs a first offset voltage.
在本發明之一實施例中，上述之數位類比轉換器依據第二代碼對第一輸入電壓與第二輸入電壓之間的壓差進行分壓以產生第二分壓，並且偏移電壓產生器更包括第二分壓器。第二分壓器耦接數位類比轉換器，且對第二分壓進行分壓以產生一第二偏移電壓。In an embodiment of the invention, the digital analog converter divides a voltage difference between the first input voltage and the second input voltage according to the second code to generate a second divided voltage, and the offset voltage generator It also includes a second voltage divider. The second voltage divider is coupled to the digital analog converter and divides the second divided voltage to generate a second offset voltage.
在本發明之一實施例中，上述之第二分壓器包括第一電阻及第二電阻，其中第一電阻串聯第二電阻。第一電阻的第一端接收第二分壓，第一電阻的第二端耦接第二電阻及輸出第二偏移電壓。In an embodiment of the invention, the second voltage divider comprises a first resistor and a second resistor, wherein the first resistor is connected in series with the second resistor. The first end of the first resistor receives the second voltage divider, and the second end of the first resistor is coupled to the second resistor and outputs the second offset voltage.
在本發明之一實施例中，上述之第二分壓器包括第一電阻、第二電阻及運算放大器。第一電阻串聯第二電阻。第一電阻的第一端接收第二分壓，第一電阻的第二端耦接第二電阻及運算放大器的正輸入端。運算放大器的輸出端耦接其負輸入端及輸出第二偏移電壓。In an embodiment of the invention, the second voltage divider includes a first resistor, a second resistor, and an operational amplifier. The first resistor is connected in series with the second resistor. The first end of the first resistor receives the second partial voltage, and the second end of the first resistor is coupled to the second resistor and the positive input terminal of the operational amplifier. The output of the operational amplifier is coupled to its negative input terminal and outputs a second offset voltage.
在本發明之一實施例中，上述之偏移電壓產生器依據第二代碼對第一輸入電壓與第二輸入電壓之間的壓差進行分壓以產生第二偏移電壓，且電壓準位位移器更包括第三電壓位移電路及第四電壓位移電路。第三電壓位移電路耦接偏移電壓產生器，將第一參考電壓向下位移一個第二偏移電壓以輸出第三準位位移電壓。第四電壓位移電路耦接偏移電壓產生器，將第二參考電壓向下位移一個第二偏移電壓以輸出第四準位位移電壓。In an embodiment of the invention, the offset voltage generator divides a voltage difference between the first input voltage and the second input voltage according to the second code to generate a second offset voltage, and the voltage level The shifter further includes a third voltage shift circuit and a fourth voltage shift circuit. The third voltage displacement circuit is coupled to the offset voltage generator to shift the first reference voltage downward by a second offset voltage to output a third level displacement voltage. The fourth voltage displacement circuit is coupled to the offset voltage generator to shift the second reference voltage downward by a second offset voltage to output a fourth level displacement voltage.
在本發明之一實施例中，上述之電壓準位位移器包括第一開關及第二開關。第一開關依據時序信號選擇並輸出第一準位位移電壓及第三準位位移電壓其一至電阻串列的第一端。第二開關依據時序信號選擇並輸出第二準位位移電壓及第四準位位移電壓其一至電阻串列的第二端。In an embodiment of the invention, the voltage level shifter includes a first switch and a second switch. The first switch selects and outputs the first level displacement voltage and the third level displacement voltage to the first end of the resistor string according to the timing signal. The second switch selects and outputs the second level displacement voltage and the fourth level displacement voltage to the second end of the resistor string according to the timing signal.
在本發明之一實施例中，上述之第一開關受控於時序信號以交替輸出第一準位位移電壓及第三準位位移電壓。 第二開關受控於時序信號以交替輸出第二準位位移電壓及第四準位位移電壓。In an embodiment of the invention, the first switch is controlled by the timing signal to alternately output the first level displacement voltage and the third level displacement voltage. The second switch is controlled by the timing signal to alternately output the second level displacement voltage and the fourth level displacement voltage.
在本發明之一實施例中，上述之第三電壓位移電路及第四電壓位移電路分別包括一運算放大器。第三電壓位移電路的運算放大器的正輸入端耦接第一參考電壓，第三電壓位移電路的運算放大器的負輸入端耦接第二偏移電壓，以及第三電壓位移電路的運算放大器的輸出端耦接第三電壓位移電路的運算放大器的負輸入端且輸出第三準位位移電壓。第四電壓位移電路的運算放大器的正輸入端耦接第二參考電壓，第四電壓位移電路的運算放大器的負輸入端耦接第二偏移電壓，以及第四電壓位移電路的運算放大器的輸出端耦接第四電壓位移電路的運算放大器的負輸入端且輸出第四準位位移電壓。In an embodiment of the invention, the third voltage shifting circuit and the fourth voltage shifting circuit respectively comprise an operational amplifier. The positive input terminal of the operational amplifier of the third voltage shifting circuit is coupled to the first reference voltage, the negative input terminal of the operational amplifier of the third voltage shifting circuit is coupled to the second offset voltage, and the output of the operational amplifier of the third voltage shifting circuit The terminal is coupled to the negative input terminal of the operational amplifier of the third voltage displacement circuit and outputs a third level displacement voltage. The positive input terminal of the operational amplifier of the fourth voltage shifting circuit is coupled to the second reference voltage, the negative input terminal of the operational amplifier of the fourth voltage shifting circuit is coupled to the second offset voltage, and the output of the operational amplifier of the fourth voltage shifting circuit The terminal is coupled to the negative input terminal of the operational amplifier of the fourth voltage shift circuit and outputs a fourth potential displacement voltage.
在本發明之一實施例中，上述之第一電壓位移電路及第二電壓位移電路分別包括一運算放大器。第一電壓位移電路的運算放大器的正輸入端耦接第一參考電壓，第一電壓位移電路的運算放大器的負輸入端耦接第一偏移電壓，以及第一電壓位移電路的運算放大器的輸出端耦接第一電壓位移電路的運算放大器的負輸入端且輸出第一準位位移電壓。第二電壓位移電路的運算放大器的正輸入端耦接第二參考電壓，第二電壓位移電路的運算放大器的負輸入端耦接第一偏移電壓，以及第二電壓位移電路的運算放大器的輸出端耦接第二電壓位移電路的運算放大器的負輸入端且輸出第二準位位移電壓。In an embodiment of the invention, the first voltage shifting circuit and the second voltage shifting circuit respectively comprise an operational amplifier. The positive input terminal of the operational amplifier of the first voltage shifting circuit is coupled to the first reference voltage, the negative input terminal of the operational amplifier of the first voltage shifting circuit is coupled to the first offset voltage, and the output of the operational amplifier of the first voltage shifting circuit The terminal is coupled to the negative input terminal of the operational amplifier of the first voltage displacement circuit and outputs a first level displacement voltage. The positive input terminal of the operational amplifier of the second voltage shifting circuit is coupled to the second reference voltage, the negative input terminal of the operational amplifier of the second voltage shifting circuit is coupled to the first offset voltage, and the output of the operational amplifier of the second voltage shifting circuit The terminal is coupled to the negative input terminal of the operational amplifier of the second voltage displacement circuit and outputs a second level displacement voltage.
在本發明之一實施例中，伽瑪電壓產生電路更包括數位類比轉換器，其耦接電阻串列的此些電阻，用以依據資 料碼輸出此些伽瑪電壓的其中之一。In an embodiment of the invention, the gamma voltage generating circuit further includes a digital analog converter coupled to the resistors of the resistor string for use in accordance with the The material code outputs one of these gamma voltages.
在本發明之一實施例中，上述之第一偏移電壓為正電壓。In an embodiment of the invention, the first offset voltage is a positive voltage.
在本發明之一實施例中，上述之第一偏移電壓為負電壓。In an embodiment of the invention, the first offset voltage is a negative voltage.
基於上述，本發明的伽瑪電壓產生電路，可依據第一代碼產生偏移電壓，並依據偏移電壓位移伽瑪電壓的準位。更者，伽瑪電壓產生電路依據第二代碼產生另一偏移電壓，並可依據另一偏移電壓位移伽瑪電壓的準位。藉此，透過位移伽瑪電壓，使不同共同電壓準位的畫素能顯示出相似或相同的效果。Based on the above, the gamma voltage generating circuit of the present invention can generate an offset voltage according to the first code and shift the level of the gamma voltage according to the offset voltage. Moreover, the gamma voltage generating circuit generates another offset voltage according to the second code, and can shift the level of the gamma voltage according to the other offset voltage. Thereby, by shifting the gamma voltage, pixels of different common voltage levels can exhibit similar or identical effects.
為讓本發明之上述特徵和優點能更明顯易懂，下文特舉實施例，並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.
圖2為繪示根據本發明第一實施例的伽瑪(gamma)電壓產生電路的電路圖。請參照圖2，伽瑪電壓產生電路100包括位移(offset)電壓產生器110、電壓準位位移器120、電阻串列140及數位類比轉換器(digital-to-analog converter,DAC)150。偏移電壓產生器110包括數位類比轉換器112及第一分壓器114。數位類比轉換器112在接收到致能信號△V_Enable後，則依據第一代碼C1將第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差進行 分壓以產生第一分壓△V_IC。2 is a circuit diagram showing a gamma voltage generating circuit in accordance with a first embodiment of the present invention. Referring to FIG. 2, the gamma voltage generating circuit 100 includes an offset voltage generator 110, a voltage level shifter 120, a resistor string 140, and a digital-to-analog converter (DAC) 150. The offset voltage generator 110 includes a digital analog converter 112 and a first voltage divider 114. After receiving the enable signal ΔV_Enable, the digital analog converter 112 performs a voltage difference between the first input voltage VREF_H and the second input voltage VREF_L according to the first code C1. The partial pressure is divided to generate a first partial pressure ΔV_IC.
進一步來說，假設第一代碼C1為10位元，亦即表示數位類比轉換器112為10位元，則數位類比轉換器112會將第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差分為1024(亦即2的10次方)等分，並且依據第一代碼C1的內容輸出對應的電壓準位。值得一提的是，當數位類比轉換器112的位元數越高時(例如12位元)，則第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差會分為較多等分(例如4096等分，即2的12次方等分)。反之，當數位類比轉換器112的位元數越低時(例如8位元)，則第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差分為較少等分(例如256等分，即2的8次方等分)。Further, assuming that the first code C1 is 10 bits, that is, the digital analog converter 112 is 10 bits, the digital analog converter 112 will apply a voltage between the first input voltage VREF_H and the second input voltage VREF_L. The difference is 1024 (that is, the 10th power of 2) is equally divided, and the corresponding voltage level is output according to the content of the first code C1. It is worth mentioning that when the number of bits of the digital analog converter 112 is higher (for example, 12 bits), the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L is divided into more equal parts. (For example, 4096 equal parts, that is, the 12th power of 2 is equally divided). Conversely, when the number of bits of the digital analog converter 112 is lower (for example, 8 bits), the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L is less equal (for example, 256 aliquots, That is, the 8th power of 2 is equally divided).
第一分壓器114包括電阻Rx及Ry，其中電阻Rx串聯電阻Ry。電阻Rx的第一端C耦接數位類比轉換器112以接收第一分壓△V_IC，電阻Rx的第二端D耦接電阻Ry並輸出第一偏移電壓△V至第一電壓準位位移器120，藉此分壓器114可對第一分壓△V_IC進行分壓以產生第一偏移電壓△V。而第一分壓△V_IC、電阻Rx及Ry的關係可以下列式子表示：
其中，Ry/(Rx+Ry)可視為分壓器114的分壓比。據此，偏移電壓產生器110可依據第一代碼C1將第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差進行分壓以 產生第一偏移電壓△V。Among them, Ry / (Rx + Ry) can be regarded as the voltage dividing ratio of the voltage divider 114. Accordingly, the offset voltage generator 110 may divide the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L according to the first code C1. A first offset voltage ΔV is generated.
值得一提的是，由於成本的考量，數位類比轉換器112可能會使用低位元數的數位類比轉換器，所以第一分壓△V_IC可能與理想的第一偏移電壓△V不相符，此時可透過分壓器114的分壓比取得理想的第一偏移電壓△V。舉例來說，若理想的第一偏移電壓△V為第一分壓△V_IC的百分之一，則可設計電阻Rx及Ry的電阻值比值為99：1，亦即分壓器114的分壓比設計為1/100。依據上述，第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差會先經由數位類比轉換器112進行第一次的分壓，並且再經由分壓器114進行第二次的分壓，藉此可對第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差進行更細微的分壓動作，以取得理想的第一偏移電壓△V。It is worth mentioning that due to cost considerations, the digital analog converter 112 may use a low bit number digital analog converter, so the first partial voltage ΔV_IC may not match the ideal first offset voltage ΔV, this The ideal first offset voltage ΔV can be obtained by the voltage division ratio of the voltage divider 114. For example, if the ideal first offset voltage ΔV is one percent of the first divided voltage ΔV_IC, the resistance ratio ratio of the resistors Rx and Ry can be designed to be 99:1, that is, the voltage divider 114 The partial pressure ratio is designed to be 1/100. According to the above, the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L is first divided by the digital analog converter 112, and then divided by the voltage divider 114 for the second time. Thereby, a more fine voltage division operation between the first input voltage VREF_H and the second input voltage VREF_L can be performed to obtain a desired first offset voltage ΔV.
在本發明的實施例中，數位類比轉換器112、電阻串列140及數位類比轉換器150為設置於源極驅動器內，並且分壓器140及電壓準位電壓準位位移器120為配置於源極驅動器外的軟性印刷電路板。因此，第一分壓△V_IC的傳送路徑會較長，並且第一分壓△V_IC可能會受到雜訊的影響而位移。為了降低第一分壓△V_IC在傳送過程中雜訊的影響，第一分壓△V_IC的電壓可設計為高於雜訊的電壓。因此，在經由分壓器114分壓運作後，第一分壓△V_IC會分壓成第一偏移電壓△V，並且雜訊會因分壓運作而降低或消除。In the embodiment of the present invention, the digital analog converter 112, the resistor string 140 and the digital analog converter 150 are disposed in the source driver, and the voltage divider 140 and the voltage level voltage level shifter 120 are disposed in the embodiment. A flexible printed circuit board outside the source driver. Therefore, the transmission path of the first divided voltage ΔV_IC may be long, and the first partial pressure ΔV_IC may be displaced by the influence of noise. In order to reduce the influence of the first partial voltage ΔV_IC during the transmission, the voltage of the first partial voltage ΔV_IC can be designed to be higher than the voltage of the noise. Therefore, after the partial pressure operation by the voltage divider 114, the first partial pressure ΔV_IC is divided into the first offset voltage ΔV, and the noise is reduced or eliminated due to the partial pressure operation.
第一電壓準位位移器120包括第一電壓位移電路131 及第二電壓位移電路132。第一電壓位移電路131包括運算放大器OP1及電阻RA、RB、RC及RD，其中電阻RA、RB、RC及RD的電阻值相同。運算放大器OP1的正輸入端透過電阻RC耦接第一參考電壓GMAH且透過電阻RD耦接至接地電壓，運算放大器OP1的負輸入端透過電阻RA耦接第一偏移電壓△V，運算放大器OP1的輸出端透過電阻RB耦接其負輸入端且輸出第一準位位移電壓VH。電壓位移電路131所輸出的第一準位位移電壓VH會等於第一參考電壓GMAH減去第一偏移電壓△V，亦即第一準位位移電壓VH會等於第一參考電壓GMAH向下位移一個第一偏移電壓△V。The first voltage level shifter 120 includes a first voltage shift circuit 131 And a second voltage shift circuit 132. The first voltage shift circuit 131 includes an operational amplifier OP1 and resistors RA, RB, RC, and RD, wherein the resistors RA, RB, RC, and RD have the same resistance value. The positive input terminal of the operational amplifier OP1 is coupled to the first reference voltage GMAH through the resistor RC and coupled to the ground voltage through the resistor RD. The negative input terminal of the operational amplifier OP1 is coupled to the first offset voltage ΔV through the resistor RA, and the operational amplifier OP1 The output terminal is coupled to its negative input terminal through a resistor RB and outputs a first level displacement voltage VH. The first level displacement voltage VH outputted by the voltage displacement circuit 131 is equal to the first reference voltage GMAH minus the first offset voltage ΔV, that is, the first level displacement voltage VH is equal to the first reference voltage GMAH. A first offset voltage ΔV.
第二電壓位移電路132包括運算放大器OP2及電阻RE、RF、RG及RH，其中電阻RE、RF、RG及RH的電阻值相同。運算放大器OP2的正輸入端透過電阻RG耦接第二參考電壓GMAL且透過電阻RH耦接至接地電壓，運算放大器OP2的負輸入端透過電阻RE耦接第一偏移電壓△V，運算放大器OP2的輸出端透過電阻RF耦接其負輸入端且輸出第二準位位移電壓VL。電壓位移電路132所輸出的第二準位位移電壓VL會等於第二參考電壓GMAL減去第一偏移電壓△V，亦即第二準位位移電壓VL會等於第二參考電壓GMAL向下位移一個第一偏移電壓△V。The second voltage shift circuit 132 includes an operational amplifier OP2 and resistors RE, RF, RG, and RH, wherein the resistors RE, RF, RG, and RH have the same resistance value. The positive input terminal of the operational amplifier OP2 is coupled to the second reference voltage GMAL through the resistor RG and coupled to the ground voltage through the resistor RH. The negative input terminal of the operational amplifier OP2 is coupled to the first offset voltage ΔV through the resistor RE, and the operational amplifier OP2 The output terminal is coupled to its negative input terminal via a resistor RF and outputs a second level displacement voltage VL. The second level displacement voltage VL output by the voltage displacement circuit 132 is equal to the second reference voltage GMAL minus the first offset voltage ΔV, that is, the second level displacement voltage VL is equal to the second reference voltage GMAL being displaced downward. A first offset voltage ΔV.
第一電壓準位位移器120會將運算放大器OP1的輸出端作為其第一輸出端O1以輸出第一準位位移電壓VH至電阻串列140的第一端A，並且電壓位移器120會將運算 放大器OP2的輸出端作為其第二輸出端O2以輸出第二準位位移電壓VL至電阻串列140的第二端B。電阻串列140包括多個串聯的電阻R1~R64，電阻R1~R64會對第一準位位移電壓VH及第二準位位移電壓VL之間的壓差進行分壓以輸出多個分壓，其中此些分壓會作為伽瑪電壓V0~V63。數位類比轉換器150耦接電阻串列140的電阻R1~R64，並依據資料碼CA決定輸出電阻R1~R64所提供的伽瑪電壓V0~V63的其中之一作為驅動電壓，以驅動液晶顯示對應灰階的亮度。以此方式，當兩個畫素(或子畫素)的共同電壓準位不同時，可依據第一偏移電壓△V位移各伽瑪電壓的準位以讓兩個畫素於相同灰階所顯示的亮度接近甚至相同。The first voltage level shifter 120 will use the output terminal of the operational amplifier OP1 as its first output terminal O1 to output the first level displacement voltage VH to the first end A of the resistor string 140, and the voltage shifter 120 will Operation The output of the amplifier OP2 serves as its second output terminal O2 to output a second level displacement voltage VL to the second terminal B of the resistor string 140. The resistor string 140 includes a plurality of resistors R1 R R64 connected in series, and the resistors R1 R R64 divide the voltage difference between the first level displacement voltage VH and the second level displacement voltage VL to output a plurality of divided voltages. These partial voltages are used as gamma voltages V0~V63. The digital analog converter 150 is coupled to the resistors R1 R R64 of the resistor string 140, and determines one of the gamma voltages V0 to V63 provided by the output resistors R1 R R64 as a driving voltage according to the data code CA to drive the liquid crystal display correspondingly. The brightness of the grayscale. In this way, when the common voltage levels of the two pixels (or sub-pixels) are different, the positions of the gamma voltages can be shifted according to the first offset voltage ΔV to make the two pixels in the same gray level. The displayed brightness is close to or even the same.
並且，由於第一準位位移電壓VH及第二準位位移電壓VL為依據第一偏移電壓△V而產生，並且第一偏移電壓△V為依據第一代碼C1而產生，所以提供伽瑪電壓V0~V63的多個伽瑪曲線可依據依據第一代碼C1而產生。此外，當不同畫素(或子畫素)的共同電壓的準位不同時，可依據第一代碼C1輸出不同準位的參考電壓以調整對應伽瑪電壓的準位，以使不同畫素於相同灰階所顯示的亮度接近甚至相同。透過傳送適當的伽瑪電壓至液晶顯示面板的畫素中，可避免液晶顯示器的色偏現象。舉例來說，在液晶顯示面板的一個畫素中具有接收不同共同電壓的兩個子畫素，當驅動畫素中的兩個子畫素時，其中一個子畫素可依據上述多個伽瑪曲線的其中之一來驅動，並且另一個子畫 素可依據上述多個伽瑪曲線的其中另一來驅動，因此液晶顯示器可避免色偏現象。並且，透過位移伽瑪電壓一個適當的偏移電壓，可避免顯示器的干擾(corsstalk)現象，其中此適當的偏移電壓為對應顯示器的掃描週期。Moreover, since the first level displacement voltage VH and the second level displacement voltage VL are generated according to the first offset voltage ΔV, and the first offset voltage ΔV is generated according to the first code C1, the gamma is provided. The plurality of gamma curves of the voltages V0 to V63 may be generated according to the first code C1. In addition, when the levels of the common voltages of different pixels (or sub-pixels) are different, the reference voltages of different levels may be output according to the first code C1 to adjust the level of the corresponding gamma voltage, so that different pixels are The brightness shown by the same gray level is close to or even the same. By transmitting an appropriate gamma voltage to the pixels of the liquid crystal display panel, the color shift of the liquid crystal display can be avoided. For example, in a pixel of the liquid crystal display panel, there are two sub-pixels that receive different common voltages. When driving two sub-pixels in the pixel, one of the sub-pixels may be based on the plurality of gamma. One of the curves to drive, and another sub-picture The prime can be driven according to the other of the plurality of gamma curves described above, so that the liquid crystal display can avoid the color shift phenomenon. Moreover, by interfering with a suitable offset voltage of the gamma voltage, the corsstalk phenomenon of the display can be avoided, wherein the appropriate offset voltage is the scan period of the corresponding display.
值得一提的是，由於伽瑪電壓位移的基準點可以參照兩畫素中較高的共同電壓或較低的共同電壓，所以第一偏移電壓△V即可對應地為一負電壓或一正電壓。此外，圖2中所示為6位元的伽瑪電壓產生器(亦即電阻串列140的電阻數為2的6次方)，若要使用8位元的伽瑪電壓產生器，則增加電阻串列140中串聯的電阻數至256顆(亦即2的8次方)，且其他位元數(例如10位元)的伽瑪電壓產生器則依此類推。It is worth mentioning that, since the reference point of the gamma voltage displacement can refer to a higher common voltage or a lower common voltage of the two pixels, the first offset voltage ΔV can be correspondingly a negative voltage or a Positive voltage. In addition, a 6-bit gamma voltage generator is shown in FIG. 2 (that is, the resistance series of the resistor string 140 is 2 to the 6th power), and if an 8-bit gamma voltage generator is to be used, the increase is performed. The number of resistors connected in series in the resistor string 140 is 256 (that is, the 8th power of 2), and the gamma voltage generator of other bit numbers (for example, 10 bits) is equivalent.
圖3為繪示根據本發明第二實施例的伽瑪電壓產生電路的電路圖。請參照圖2及圖3，其不同之處在於伽瑪電壓產生電路200的第一分壓器116更包括運算放大器OP3。運算放大器OP3的正輸入端耦接電阻Rx的第二端，運算放大器OP3的輸出端耦接其負輸入端且輸出第一偏移電壓△V。其中，運算放大器OP3的耦接方式可視為一電壓隨耦器，在電阻Rx及Ry對第一分壓△V_IC進行分壓後，將分壓後的電壓輸出作為第一偏移電壓△V。藉此，可降低偏移電壓產生器110與電壓準位位移器120之間的負載效應。3 is a circuit diagram showing a gamma voltage generating circuit in accordance with a second embodiment of the present invention. Please refer to FIG. 2 and FIG. 3, except that the first voltage divider 116 of the gamma voltage generating circuit 200 further includes an operational amplifier OP3. The positive input terminal of the operational amplifier OP3 is coupled to the second end of the resistor Rx, and the output terminal of the operational amplifier OP3 is coupled to the negative input terminal thereof and outputs a first offset voltage ΔV. The coupling mode of the operational amplifier OP3 can be regarded as a voltage follower. After the first voltage division ΔV_IC is divided by the resistors Rx and Ry, the voltage output after the voltage division is used as the first offset voltage ΔV. Thereby, the load effect between the offset voltage generator 110 and the voltage level shifter 120 can be reduced.
圖4為繪示根據本發明第三實施例的伽瑪電壓產生電路的電路圖。請參照圖2及圖4，其不同之處在於伽瑪電壓產生電路300的偏移電壓產生器310、電壓準位位移器320。偏移電壓產生器310包括數位類比轉換器312、第一分壓器314a及第二分壓器314b。數位類比轉換器312在接收到致能信號△V_Enable後，則依據第一代碼C1將第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差進行分壓以產生第一分壓△V1_IC，並依據第二代碼C2對第一輸入電壓VREF_H與第二輸入電壓VREF_L之間的壓差進行分壓以產生第二分壓△V2_IC。4 is a circuit diagram showing a gamma voltage generating circuit in accordance with a third embodiment of the present invention. Please refer to FIG. 2 and FIG. 4 , which differs in the offset voltage generator 310 and the voltage level shifter 320 of the gamma voltage generating circuit 300 . The offset voltage generator 310 includes a digital analog converter 312, a first voltage divider 314a, and a second voltage divider 314b. After receiving the enable signal ΔV_Enable, the digital analog converter 312 divides the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L according to the first code C1 to generate a first partial voltage ΔV1_IC, And dividing the voltage difference between the first input voltage VREF_H and the second input voltage VREF_L according to the second code C2 to generate a second divided voltage ΔV2_IC.
分壓器314a及314b耦接數位類比轉換器312。分壓器314a對第一分壓△V1_IC進行分壓以產生第一偏移電壓△Va，並且分壓器314b對第二分壓△V2_IC進行分壓以產生第一偏移電壓△Vb。分壓器314a包括電阻Rx1及Ry1，其中電阻Rx1的第一端C接收第一分壓△V1_IC，並且由電阻Rx1的第二端D輸出第一偏移電壓△Va。分壓器314b包括電阻Rx2及Ry2，電阻Rx2的第一端E接收第二分壓△V2_IC，並且由電阻Rx2的第二端F輸出第二偏移電壓△Vb。其中，分壓器314a及314b的電路結構及運作可參照分壓器114的說明，在此則不再贅述。Voltage dividers 314a and 314b are coupled to digital analog converter 312. The voltage divider 314a divides the first divided voltage ΔV1_IC to generate a first offset voltage ΔVa, and the voltage divider 314b divides the second divided voltage ΔV2_IC to generate a first offset voltage ΔVb. The voltage divider 314a includes resistors Rx1 and Ry1, wherein the first terminal C of the resistor Rx1 receives the first divided voltage ΔV1_IC, and the second terminal D of the resistor Rx1 outputs the first offset voltage ΔVa. The voltage divider 314b includes resistors Rx2 and Ry2, the first terminal E of the resistor Rx2 receives the second divided voltage ΔV2_IC, and the second terminal F of the resistor Rx2 outputs the second offset voltage ΔVb. The circuit structure and operation of the voltage dividers 314a and 314b can be referred to the description of the voltage divider 114, and will not be described herein.
電壓準位位移器320包括第一電壓位移電路331、第二電壓位移電路332、第三電壓位移電路333、第四電壓位移電路334、第一開關340及第二開關342。第一電壓位移 電路331耦接偏移電壓產生器310，以將第一參考電壓GMAH向下位移一個第一偏移電壓△Va，並輸出作為第一準位位移電壓VHa。第二電壓位移電路332同樣耦接偏移電壓產生器310，以將第二參考電壓GMAL向下位移一個第一偏移電壓△Va並輸出作為第二準位位移電壓VLa。第三電壓位移電路333耦接偏移電壓產生器310，以將第一參考電壓GMAH向下位移一個第二偏移電壓△Vb，並輸出作為第三準位位移電壓VHb。第四電壓位移電路334耦接偏移電壓產生器310，以將第二參考電壓GMAL向下位移一個第二偏移電壓△Vb並輸出作為第四準位位移電壓VLb。The voltage level shifter 320 includes a first voltage shift circuit 331, a second voltage shift circuit 332, a third voltage shift circuit 333, a fourth voltage shift circuit 334, a first switch 340, and a second switch 342. First voltage shift The circuit 331 is coupled to the offset voltage generator 310 to shift the first reference voltage GMAH downward by a first offset voltage ΔVa and output as the first level displacement voltage VHa. The second voltage shift circuit 332 is also coupled to the offset voltage generator 310 to shift the second reference voltage GMAL downward by a first offset voltage ΔVa and output as the second level shift voltage VLa. The third voltage shift circuit 333 is coupled to the offset voltage generator 310 to shift the first reference voltage GMAH downward by a second offset voltage ΔVb and output as the third level shift voltage VHb. The fourth voltage shift circuit 334 is coupled to the offset voltage generator 310 to shift the second reference voltage GMAL downward by a second offset voltage ΔVb and output as the fourth level shift voltage VLb.
第一開關340依據時序信號S1選擇並輸出第一準位位移電壓VHa或第三準位位移電壓VHb至電阻串列140的第一端A，並且第一開關340的輸出端會作為電壓準位位移器320的輸出端O3。第二開關342依據時序信號S1選擇並輸出第二準位位移電壓VLa或第四準位位移電壓VLb至電阻串列140的第二端B，並且第二開關342的輸出端會作為電壓準位位移器320的輸出端O4。進一步來說，第一開關340受控於時序信號S1交替輸出第一準位位移電壓VHa或第三準位位移電壓VHb至電阻串列140的第一端A，且第二開關342受控於時序信號S1交替輸出第二準位位移電壓VLa或第四準位位移電壓VLb至電阻串列140的第二端B。在一實施例中，伽瑪電壓產生電路300使用於液晶顯示器，並且液晶顯示器運作於120赫 茲(Hz)的圖框速率。相較於液晶顯示器運作於60赫茲的圖框速率，液晶顯示器運作於120赫茲的圖框速率下具有更短的顯示期間以掃描顯示器的掃描線。由於顯示期間在液晶顯示器運作於120赫茲的圖框速率下可能會過短，電壓位移電路331~334可能無法輸出單一顯示期間所需求的準位位移電壓VHa、VLa、VHb及VLb的電壓準位。藉此，第一開關340及第二開關342交替輸出對應準位位移電壓至電阻串列140的第一端A及第二端B，以位移伽瑪電壓V0~V63為所需求的電壓準位。圖5為伽瑪電壓產生電路300的信號時序圖。請參照圖5，參數n為一正奇數，以致於第n個顯示期間為受伽瑪電壓產生器300所驅動的液晶顯示器的一奇數顯示期間，並且每一第n-1個顯示期間及每一第n+1個顯示期間為顯示器的一偶數顯示期間。電壓位移電路331~334運作於信號TP1的控制。進一步來說，在偶數顯示期間且信號TP1為高準位時，第一電壓位移電路331及第二電壓位移電路332設定第一準位位移電壓VHa及第二準位位移電壓VLa，並且第三電壓位移電路333及第四電壓位移電路334透過開關340及342輸出第三準位位移電壓VHb及第四準位位移電壓VLb至電阻串列140。在奇數顯示期間且信號TP1為高準位時，第一電壓位移電路331及第二電壓位移電路332透過開關340及342輸出第一準位位移電壓VHa及第二準位位移電壓VLa至電阻串列140，並且第三電壓位移電路333及第四電壓位移電路334設定第三準位位移電壓VHb及第四準位位移 電壓VLb。藉此，即使顯示期間過短，伽瑪電壓V0~V63仍可位移至需求的電壓準位。The first switch 340 selects and outputs the first level displacement voltage VHa or the third level displacement voltage VHb to the first end A of the resistor string 140 according to the timing signal S1, and the output end of the first switch 340 acts as a voltage level. The output O3 of the shifter 320. The second switch 342 selects and outputs the second level shift voltage VLa or the fourth level shift voltage VLb to the second end B of the resistor string 140 according to the timing signal S1, and the output of the second switch 342 acts as a voltage level. The output terminal O4 of the shifter 320. Further, the first switch 340 is controlled by the timing signal S1 to alternately output the first level displacement voltage VHa or the third level displacement voltage VHb to the first end A of the resistor string 140, and the second switch 342 is controlled by The timing signal S1 alternately outputs the second level displacement voltage VLa or the fourth level displacement voltage VLb to the second end B of the resistor string 140. In an embodiment, the gamma voltage generating circuit 300 is used for a liquid crystal display, and the liquid crystal display operates at 120 Hz. The frame rate of (Hz). Compared to the frame rate at which the liquid crystal display operates at 60 Hz, the liquid crystal display operates at a frame rate of 120 Hz with a shorter display period to scan the scan line of the display. Since the display period may be too short at a frame rate at which the liquid crystal display operates at 120 Hz, the voltage shift circuits 331 to 334 may not be able to output the voltage levels of the level displacement voltages VHa, VLa, VHb, and VLb required during a single display period. . Thereby, the first switch 340 and the second switch 342 alternately output the corresponding level displacement voltages to the first end A and the second end B of the resistor string 140 to shift the gamma voltages V0~V63 to the required voltage levels. . FIG. 5 is a signal timing diagram of the gamma voltage generating circuit 300. Referring to FIG. 5, the parameter n is a positive odd number, so that the nth display period is an odd display period of the liquid crystal display driven by the gamma voltage generator 300, and each n-1th display period and each An n+1th display period is an even display period of the display. The voltage shift circuits 331-334 operate on the control of the signal TP1. Further, during the even display period and the signal TP1 is at the high level, the first voltage shift circuit 331 and the second voltage shift circuit 332 set the first level shift voltage VHa and the second level shift voltage VLa, and the third The voltage shift circuit 333 and the fourth voltage shift circuit 334 output the third level shift voltage VHb and the fourth level shift voltage VLb to the resistor string 140 through the switches 340 and 342. During the odd display period and the signal TP1 is at the high level, the first voltage shift circuit 331 and the second voltage shift circuit 332 output the first level shift voltage VHa and the second level shift voltage VLa to the resistor string through the switches 340 and 342. Column 140, and the third voltage shift circuit 333 and the fourth voltage shift circuit 334 set the third level displacement voltage VHb and the fourth level displacement Voltage VLb. Thereby, even if the display period is too short, the gamma voltages V0 to V63 can be shifted to the required voltage level.
第一電壓位移電路331包括運算放大器OPa1及電阻Ra、Rb、Rc及Rd。第二電壓位移電路332包括運算放大器OPa2及電阻Re、Rf、Rg及Rh。第三電壓位移電路333包括運算放大器OPb1及電阻Ri、Rj、Rk及Rl。第四電壓位移電路334包括運算放大器OPb2及電阻Rm、Rn、Ro及Rp。其中，第一電壓位移電路331、第二電壓位移電路332、第三電壓位移電路333及第四電壓位移電路334的電路結構及運作可參照第一電壓位移電路131或第二電壓位移電路132的說明，在此則不再贅述。The first voltage shift circuit 331 includes an operational amplifier OPa1 and resistors Ra, Rb, Rc, and Rd. The second voltage shift circuit 332 includes an operational amplifier OPa2 and resistors Re, Rf, Rg, and Rh. The third voltage shift circuit 333 includes an operational amplifier OPb1 and resistors Ri, Rj, Rk, and R1. The fourth voltage shift circuit 334 includes an operational amplifier OPb2 and resistors Rm, Rn, Ro, and Rp. The circuit structure and operation of the first voltage displacement circuit 331 , the second voltage displacement circuit 332 , the third voltage displacement circuit 333 , and the fourth voltage displacement circuit 334 may refer to the first voltage displacement circuit 131 or the second voltage displacement circuit 132 . The description will not be repeated here.
因為第一偏移電壓△Va為依據第一代碼C1而產生，第二偏移電壓△Vb為依據第二代碼C2而產生，所以提供伽瑪電壓V0~V63的多個伽瑪曲線可依據依據第一代碼C1及第二代碼C2而產生。當不同畫素(或子畫素)的共同電壓的準位不同時，可依據第一代碼C1或第二代碼C2輸出不同準位的參考電壓以調整對應伽瑪電壓的準位，以使不同畫素於相同灰階所顯示的亮度接近甚至相同。透過傳送適當的伽瑪電壓至液晶顯示面板的畫素中，可避免液晶顯示器的色偏現象。舉例來說，在液晶顯示面板的一個畫素中具有接收不同共同電壓的兩個子畫素，當驅動畫素中的兩個子畫素時，其中一個子畫素可依據上述多個伽瑪曲線的其中之一來驅動，並且另一個子畫素可依據上述多個伽瑪曲線的其中另一來驅動，因此液晶顯示器可避免色偏 現象。並且，透過位移伽瑪電壓一個適當的偏移電壓，可避免顯示器的干擾(corsstalk)現象，其中此適當的偏移電壓為對應顯示器的掃描週期。Because the first offset voltage ΔVa is generated according to the first code C1, and the second offset voltage ΔVb is generated according to the second code C2, the plurality of gamma curves providing the gamma voltages V0 VV63 can be based on The first code C1 and the second code C2 are generated. When the levels of the common voltages of different pixels (or sub-pixels) are different, the reference voltages of different levels may be output according to the first code C1 or the second code C2 to adjust the level of the corresponding gamma voltage to make different The brightness displayed by the pixels in the same gray level is close to or even the same. By transmitting an appropriate gamma voltage to the pixels of the liquid crystal display panel, the color shift of the liquid crystal display can be avoided. For example, in a pixel of the liquid crystal display panel, there are two sub-pixels that receive different common voltages. When driving two sub-pixels in the pixel, one of the sub-pixels may be based on the plurality of gamma. One of the curves is driven, and the other sub-pixel can be driven according to one of the plurality of gamma curves described above, so the liquid crystal display can avoid color shift phenomenon. Moreover, by interfering with a suitable offset voltage of the gamma voltage, the corsstalk phenomenon of the display can be avoided, wherein the appropriate offset voltage is the scan period of the corresponding display.
圖6為繪示根據本發明第四實施例的伽瑪電壓產生電路的電路圖。請參照圖4及圖6，其不同之處在於伽瑪電壓產生電路400的第一分壓器316a更包括運算放大器OPa3及第二分壓器316b更包括運算放大器OPb3。運算放大器OPa3的耦接方式可視為一電壓隨耦器，在電阻Rx1及Ry1對第一分壓△V1_IC進行分壓後，將分壓輸出作為第一偏移電壓△Va。同理，運算放大器OPb3的耦接方式亦可視為一電壓隨耦器，在電阻Rx2及Ry2對第二分壓△V2_IC進行分壓後，將分壓輸出作為第二偏移電壓△Vb。藉此，可降低偏移電壓產生器310與電壓準位位移器320及第二電壓準位位移器322間的負載效應。FIG. 6 is a circuit diagram showing a gamma voltage generating circuit according to a fourth embodiment of the present invention. Please refer to FIG. 4 and FIG. 6 , except that the first voltage divider 316 a of the gamma voltage generating circuit 400 further includes an operational amplifier OPa3 and a second voltage divider 316b, and further includes an operational amplifier OPb3. The coupling mode of the operational amplifier OPa3 can be regarded as a voltage follower. After the resistors Rx1 and Ry1 divide the first divided voltage ΔV1_IC, the divided output is used as the first offset voltage ΔVa. Similarly, the coupling mode of the operational amplifier OPb3 can also be regarded as a voltage follower. After the resistors Rx2 and Ry2 divide the second divided voltage ΔV2_IC, the divided output is used as the second offset voltage ΔVb. Thereby, the load effect between the offset voltage generator 310 and the voltage level shifter 320 and the second voltage level shifter 322 can be reduced.
綜上所述，本發明的伽瑪電壓產生電路，會依據第一代碼產生偏移電壓，並依據偏移電壓位移伽瑪電壓的準位。再者，伽瑪電壓產生電路會依據第二代碼產生另一偏移電壓，並可依據另一偏移電壓位移伽瑪電壓的準位。藉此，可透過位移的伽瑪電壓，使不同共同電壓準位的畫素能顯示出相似或相同的效果。並且，在偏移電壓產生器中增設電壓隨耦器，以降低其與電壓準位位移器間的負載效應。In summary, the gamma voltage generating circuit of the present invention generates an offset voltage according to the first code and shifts the level of the gamma voltage according to the offset voltage. Furthermore, the gamma voltage generating circuit generates another offset voltage according to the second code, and can shift the level of the gamma voltage according to another offset voltage. Thereby, the gamma voltage of the displacement can be used to make the pixels of different common voltage levels show similar or the same effect. Also, a voltage follower is added to the offset voltage generator to reduce the load effect between it and the voltage level shifter.
雖然本發明已以實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作些許之更動與潤飾，故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
100、200、300‧‧‧伽瑪電壓產生電路100, 200, 300‧‧‧ gamma voltage generating circuit
110、310‧‧‧偏移電壓產生器110, 310‧‧‧Offset voltage generator
112、150、312‧‧‧數位類比轉換器112, 150, 312‧‧‧ digital analog converter
114、116、314a、314b‧‧‧分壓器114, 116, 314a, 314b‧‧ ‧ voltage divider
120、320‧‧‧電壓準位位移器120, 320‧‧‧Voltage level shifter
131、132、331、332、333、334‧‧‧電壓位移電路131, 132, 331, 332, 333, 334‧‧‧ voltage displacement circuits
140‧‧‧電阻串列140‧‧‧Resistance series
340、342‧‧‧開關340, 342‧‧ ‧ switch
Rx、Ry、Rx1、Ry1、Rx2、Ry2、RA~RH、Ra~Rp、R1~R64‧‧‧電阻Rx, Ry, Rx1, Ry1, Rx2, Ry2, RA~RH, Ra~Rp, R1~R64‧‧‧ resistance
VREF_H、VREF_L‧‧‧輸入電壓VREF_H, VREF_L‧‧‧ input voltage
C1、C2‧‧‧代碼C1, C2‧‧‧ code
CA‧‧‧資料碼CA‧‧‧ data code
△V_Enable‧‧‧致能信號△V_Enable‧‧‧Enable signal
△V_IC、△V1_IC、△V2_IC‧‧‧分壓△V_IC, △V1_IC, △V2_IC‧‧‧ partial pressure
△V、△Va、△Vb‧‧‧偏移電壓△V, △Va, △Vb‧‧‧ offset voltage
A、B、C、D、E、F、O1、O2、O3、O4‧‧‧端點A, B, C, D, E, F, O1, O2, O3, O4‧‧‧ endpoints
GMAH、GMAL‧‧‧參考電壓GMAH, GMAL‧‧‧ reference voltage
V0~V63‧‧‧伽瑪電壓V0~V63‧‧‧ gamma voltage
VH、VL、VHa、VLa、VHb、VLb‧‧‧準位位移電壓VH, VL, VHa, VLa, VHb, VLb‧‧ ‧ level displacement voltage
OP1、OP2、OP3、OPa1、OPa2、OPa3、OPb1、OPb2、OPb3‧‧‧運算放大器OP1, OP2, OP3, OPa1, OPa2, OPa3, OPb1, OPb2, OPb3‧‧‧Operational Amplifier
S1‧‧‧時序信號S1‧‧‧ timing signal
圖1繪示具有兩個不同共同電壓準位的子畫素的畫素。Figure 1 illustrates a pixel of a sub-pixel with two different common voltage levels.
圖2為繪示根據本發明第一實施例的伽瑪電壓產生電路的電路圖。2 is a circuit diagram showing a gamma voltage generating circuit in accordance with a first embodiment of the present invention.
圖3為繪示根據本發明第二實施例的伽瑪電壓產生電路的電路圖。3 is a circuit diagram showing a gamma voltage generating circuit in accordance with a second embodiment of the present invention.
圖4為繪示根據本發明第三實施例的伽瑪電壓產生電路的電路圖。4 is a circuit diagram showing a gamma voltage generating circuit in accordance with a third embodiment of the present invention.
圖5為圖4的伽瑪電壓產生電路的信號時序圖。FIG. 5 is a signal timing diagram of the gamma voltage generating circuit of FIG. 4.
圖6為根據本發明第四實施例的伽瑪電壓產生電路的電路圖。Fig. 6 is a circuit diagram of a gamma voltage generating circuit in accordance with a fourth embodiment of the present invention.
100‧‧‧伽瑪電壓產生電路100‧‧‧Gamma voltage generation circuit
110‧‧‧偏移電壓產生器110‧‧‧Offset voltage generator
112、150‧‧‧數位類比轉換器112, 150‧‧‧Digital Analog Converter
114‧‧‧分壓器114‧‧ ‧ Voltage divider
120‧‧‧電壓準位位移器120‧‧‧Voltage level shifter
131、132‧‧‧電壓位移電路131, 132‧‧‧ voltage displacement circuit
140‧‧‧電阻串列140‧‧‧Resistance series
Rx、Ry、RA~RH、R1~R64‧‧‧電阻Rx, Ry, RA~RH, R1~R64‧‧‧ resistance
VREF_H、VREF_L‧‧‧輸入電壓VREF_H, VREF_L‧‧‧ input voltage
C1‧‧‧代碼C1‧‧‧ code
CA‧‧‧資料碼CA‧‧‧ data code
△V_Enable‧‧‧致能信號△V_Enable‧‧‧Enable signal
△V_IC‧‧‧分壓△V_IC‧‧‧ partial pressure
△V‧‧‧偏移電壓△V‧‧‧ offset voltage
A、B、C、D、O1、O2‧‧‧端點A, B, C, D, O1, O2‧‧‧ endpoints
GMAH、GMAL‧‧‧參考電壓GMAH, GMAL‧‧‧ reference voltage
V0~V63‧‧‧伽瑪電壓V0~V63‧‧‧ gamma voltage
VH、VL‧‧‧準位位移電壓VH, VL‧‧ ‧ level displacement voltage
OP1、OP2‧‧‧運算放大器OP1, OP2‧‧‧Operational Amplifier
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US9230346B2 (en) | 2014-05-21 | 2016-01-05 | Himax Technologies Limited | Programmable gamma circuit for gamma correction |
| CN110867163A (en) * | 2019-10-30 | 2020-03-06 | 深圳吉迪思电子科技有限公司 | Gamma voltage generation circuit, generation method and display device |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI230366B (en) * | 2001-06-07 | 2005-04-01 | Hitachi Ltd | Display apparatus and driving device for displaying |
| TW200623019A (en) * | 2004-12-28 | 2006-07-01 | Samsung Electronics Co Ltd | Gamma voltage generating apparatus and method of testing a gamma voltage |
| TW200634705A (en) * | 2005-03-23 | 2006-10-01 | Au Optronics Corp | Gamma voltage generator and LCD utilizing the same |
| TW200735026A (en) * | 2006-03-13 | 2007-09-16 | Himax Display Inc | Gamma voltage generator |
| US20080278470A1 (en) * | 2007-05-11 | 2008-11-13 | Chang-Jin Im | Method for generating a gamma voltage, driving circuit therefor, and display device |
| TW200923890A (en) * | 2007-11-21 | 2009-06-01 | Chi Mei Optoelectronics Corp | Gamma voltage generating module, display apparatus and control method thereof |
| TW200926136A (en) * | 2007-10-12 | 2009-06-16 | Samsung Electronics Co Ltd | Method and apparatus for generating gradation voltage for X-axis symmetric gamma inversion |
-
2010
- 2010-02-26 TW TW99105696A patent/TWI409792B/en not_active IP Right Cessation
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI230366B (en) * | 2001-06-07 | 2005-04-01 | Hitachi Ltd | Display apparatus and driving device for displaying |
| TW200623019A (en) * | 2004-12-28 | 2006-07-01 | Samsung Electronics Co Ltd | Gamma voltage generating apparatus and method of testing a gamma voltage |
| TW200634705A (en) * | 2005-03-23 | 2006-10-01 | Au Optronics Corp | Gamma voltage generator and LCD utilizing the same |
| TW200735026A (en) * | 2006-03-13 | 2007-09-16 | Himax Display Inc | Gamma voltage generator |
| US20080278470A1 (en) * | 2007-05-11 | 2008-11-13 | Chang-Jin Im | Method for generating a gamma voltage, driving circuit therefor, and display device |
| TW200926136A (en) * | 2007-10-12 | 2009-06-16 | Samsung Electronics Co Ltd | Method and apparatus for generating gradation voltage for X-axis symmetric gamma inversion |
| TW200923890A (en) * | 2007-11-21 | 2009-06-01 | Chi Mei Optoelectronics Corp | Gamma voltage generating module, display apparatus and control method thereof |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105023551A (en) * | 2014-04-25 | 2015-11-04 | 奇景光电股份有限公司 | Offset amount reduction circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| TW201129963A (en) | 2011-09-01 |
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