TWI401664B - Driving circuit for display panel - Google Patents
Driving circuit for display panel Download PDFInfo
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- TWI401664B TWI401664B TW98110646A TW98110646A TWI401664B TW I401664 B TWI401664 B TW I401664B TW 98110646 A TW98110646 A TW 98110646A TW 98110646 A TW98110646 A TW 98110646A TW I401664 B TWI401664 B TW I401664B
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Description
本發明係有關於一種驅動電路,其係尤指一種顯示面板之驅動電路。The present invention relates to a driving circuit, and more particularly to a driving circuit for a display panel.
按,現今科技蓬勃發展,資訊商品種類推陳出新,滿足了眾多民眾不同的需求。早期顯示器多半為陰極射線管(Cathode Ray Tube,CRT)顯示器,由於其體積龐大與耗電量大,而且所產生的輻射線,對於長時間使用顯示器的使用者而言有危害身體的疑慮,因此,現今市面上的顯示器漸漸將由液晶顯示器(Liquid Crystal Display,LCD)取代舊有的CRT顯示器。液晶顯示器具有輕薄短小、低輻射與耗電量低等優點,也因此成為目前市場主流。According to the current development of technology, the variety of information products has been updated to meet the different needs of many people. Most of the early displays were cathode ray tube (CRT) displays. Due to their large size and power consumption, and the radiation generated, they are harmful to users who use the display for a long time. Today's displays on the market will gradually replace the old CRT monitors with liquid crystal displays (LCDs). Liquid crystal displays have the advantages of being thin and light, low in radiation and low in power consumption, and thus have become the mainstream in the current market.
承上所述,液晶顯示器依照資料訊號控制液晶單元的透光率,以顯示影像。由於主動矩陣型液晶顯示器採用主動控制開關裝置,因此該類液晶顯示器於顯示動畫方面具有優勢,而薄膜電晶體(thin film transistor,TFT)則為主要用於主動矩陣型液晶顯示器的關裝置。As described above, the liquid crystal display controls the light transmittance of the liquid crystal unit according to the data signal to display an image. Since the active matrix type liquid crystal display adopts an active control switching device, such a liquid crystal display has an advantage in displaying animation, and a thin film transistor (TFT) is a closing device mainly used for an active matrix type liquid crystal display.
請參閱第一圖,係為習知技術之液晶顯示器之驅動系統的示意圖。如圖所示,驅動系統包含一顯示面板10’、一掃描驅動電路12’、一資料驅動電路14’、一時序控制電路16’與一參考電壓產生電路18’。顯示面板10’用以顯示影像,掃描驅動電路12’用以產生並傳送一掃描訊號至顯示面板10’,以驅動顯示面板10’之一薄膜電晶體,資料驅動電路14’用以產生並傳送一資料訊號至顯示面板10’,以依據資料訊號而顯示影像,時序控制電路16’產生一時序控制訊號,並分別傳送時序控制訊號至掃描驅動電路12’與資料驅動電路14’,以控制掃描驅動電路12’與資料驅動電路14分別傳送掃描訊號與資料訊號至顯示面板10’,以顯示影像。此外,參考電壓產生電路18’產生一參考電壓,並傳送參考電壓至資料驅動電路14’,使資料驅動電路14’依據時序控制訊號與參考電壓而產生資料訊號。Please refer to the first figure, which is a schematic diagram of a driving system of a liquid crystal display of the prior art. As shown, the drive system includes a display panel 10', a scan drive circuit 12', a data drive circuit 14', a timing control circuit 16' and a reference voltage generating circuit 18'. The display panel 10' is configured to display images, and the scan driving circuit 12' is configured to generate and transmit a scan signal to the display panel 10' to drive a thin film transistor of the display panel 10', and the data driving circuit 14' is used to generate and transmit A data signal is sent to the display panel 10' to display the image according to the data signal. The timing control circuit 16' generates a timing control signal and respectively transmits the timing control signal to the scan driving circuit 12' and the data driving circuit 14' to control the scanning. The driving circuit 12' and the data driving circuit 14 respectively transmit the scanning signal and the data signal to the display panel 10' to display the image. In addition, the reference voltage generating circuit 18' generates a reference voltage and transmits the reference voltage to the data driving circuit 14', so that the data driving circuit 14' generates a data signal according to the timing control signal and the reference voltage.
其中,請參閱第二圖,係為習知技術之參考電壓產生電路之示意圖。如圖所示,對應於RGB之數位顯示資料例如分別由6位元所構成時,參考電壓產生電路18’可輸出分別對應於26 =64種灰階等級顯示之64種類比電壓V0~V63。參考電壓產生電路18’係由串聯連接電阻R0~R7之電阻分壓電路所構成。電阻R0~R7之各電阻係串聯連接8個電阻。即如第三圖所示,將8個電阻R01、R02、…、R08串聯連接而構成電阻R0,其餘電阻R1~R7也分別呈現與此電阻R0同樣之構成。因此,參考電壓產生電路18’係由64個電阻所構成,而產生電壓V0~V63。Please refer to the second figure, which is a schematic diagram of a reference voltage generating circuit of the prior art. As shown in the figure, when the digital display data corresponding to RGB is composed of, for example, 6 bits, the reference voltage generating circuit 18' can output 64 kinds of specific voltages V0 to V63 corresponding to 2 6 = 64 gray scale levels, respectively. . The reference voltage generating circuit 18' is constituted by a resistor dividing circuit in which resistors R0 to R7 are connected in series. Each of the resistors R0 to R7 is connected in series to eight resistors. That is, as shown in the third figure, eight resistors R01, R02, ..., and R08 are connected in series to form a resistor R0, and the remaining resistors R1 to R7 also have the same configuration as the resistor R0. Therefore, the reference voltage generating circuit 18' is composed of 64 resistors, and voltages V0 to V63 are generated.
惟查,由於參考電壓產生電路18’為了產生64個不同的電壓準位,而必須使用約64個電阻,如此,將增加參考電壓產生電路18’的面積,進而增加顯示裝置的面積。再者,為了減少參考電壓產生電路18’的面積,所以,必須使用阻值較大的電阻,但增加電阻的阻值,將會影響資料驅動電路14’的驅動能力。再者,資料驅動電路14’透過該些電阻驅動顯示面板10’時,必須消耗大量的能量在電阻上,而浪費顯示裝置的功率。However, since the reference voltage generating circuit 18' must use about 64 resistors in order to generate 64 different voltage levels, the area of the reference voltage generating circuit 18' will be increased, thereby increasing the area of the display device. Further, in order to reduce the area of the reference voltage generating circuit 18', it is necessary to use a resistor having a large resistance value, but increasing the resistance of the resistor affects the driving ability of the data driving circuit 14'. Further, when the data driving circuit 14' drives the display panel 10' through the resistors, it is necessary to consume a large amount of energy on the resistor, thereby wasting power of the display device.
因此,如何針對上述問題而提出一種新穎顯示面板之驅動電路,其可在不影響資料驅動電路14’之驅動能力的情況下,減少使用電阻的數量,進而減少顯示裝置的面積,可解決上述之問題。Therefore, how to solve the above problem is to provide a novel display panel driving circuit, which can reduce the number of used resistors and reduce the area of the display device without affecting the driving capability of the data driving circuit 14', thereby solving the above problem. problem.
本發明之目的之一,在於提供一種顯示面板之驅動電路,其利用一預充電源先對顯示裝置之電容進行充電,而縮短驅動時間。One of the objects of the present invention is to provide a driving circuit for a display panel that uses a precharge source to charge a capacitor of a display device to shorten a driving time.
本發明之目的之一,在於提供一種顯示面板之驅動電路,其利用一預充電源先對顯示裝置之電容進行充電,而避免能量消耗於電阻上,進而節省顯示裝置的功率。One of the objectives of the present invention is to provide a driving circuit for a display panel that first charges a capacitor of a display device by using a precharge source to avoid energy consumption on the resistor, thereby saving power of the display device.
本發明之顯示面板之驅動電路包含一預充電源、一預充開關、一緩衝電路與複數阻抗元件。預充開關耦接於預充電源與顯示面板之一電容之間;緩衝電路用以緩衝一資料訊號,而產生一緩衝訊號;複數阻抗元件相互串聯,並耦接於緩衝電路,且依據緩衝訊號而於該些阻抗元件間產生複數驅動訊號;其中,驅動電路導通預充開關,使預充電源對電容充電後,再以該些驅動訊號之其中之一對電容充電,以縮短驅動時間,並可避免能量消耗於電阻上,進而節省顯示裝置的功率。The driving circuit of the display panel of the present invention comprises a precharge source, a precharge switch, a buffer circuit and a plurality of impedance elements. The precharge switch is coupled between the precharge source and one of the capacitors of the display panel; the buffer circuit is configured to buffer a data signal to generate a buffer signal; the plurality of impedance components are connected in series and coupled to the buffer circuit, and according to the buffer signal And generating a plurality of driving signals between the impedance components; wherein the driving circuit turns on the pre-charge switch, so that the pre-charging source charges the capacitor, and then charges the capacitor with one of the driving signals to shorten the driving time, and Energy consumption can be avoided on the resistor, thereby saving power of the display device.
茲為使 貴審查委員對本發明之結構特徵及所達成之功效有更進一步之瞭解與認識,謹佐以較佳之實施例及配合詳細之說明,說明如後:請參閱第四圖,其為本發明之液晶顯示器之驅動系統的示意圖。如圖所示,驅動系統包含一顯示面板10、一掃描驅動電路12、一資料驅動電路14、一時序控制電路16與一珈瑪(Gamma)電路18。顯示面板10用以顯示影像,掃描驅動電路12用以產生並傳送一掃描訊號至顯示面板10,以驅動顯示面板10之一薄膜電晶體,資料驅動電路14用以產生並傳送一資料訊號至顯示面板10,以依據資料訊號而顯示影像,時序控制電路16產生一時序控制訊號,並分別傳送時序控制訊號至掃描驅動電路12與資料驅動電路14,以控制掃描驅動電路12與資料驅動電路14分別傳送掃描訊號與資料訊號至顯示面板10,以顯示影像。此外,珈瑪電路18產生一參考電壓,並傳送參考電壓至資料驅動電路14,使資料驅動電路14依據時序控制訊號與參考電壓而產生資料訊號。In order to provide a better understanding and understanding of the structural features and the efficacies of the present invention, please refer to the preferred embodiment and the detailed description as follows: please refer to the fourth figure, which is A schematic diagram of a drive system for a liquid crystal display of the invention. As shown, the drive system includes a display panel 10, a scan drive circuit 12, a data drive circuit 14, a timing control circuit 16, and a gamma circuit 18. The display panel 10 is configured to display images. The scan driving circuit 12 is configured to generate and transmit a scan signal to the display panel 10 to drive a thin film transistor of the display panel 10. The data driving circuit 14 is configured to generate and transmit a data signal to the display. The panel 10 displays the image according to the data signal, and the timing control circuit 16 generates a timing control signal, and respectively transmits the timing control signal to the scan driving circuit 12 and the data driving circuit 14 to control the scan driving circuit 12 and the data driving circuit 14 respectively. The scan signal and the data signal are transmitted to the display panel 10 to display the image. In addition, the gamma circuit 18 generates a reference voltage and transmits a reference voltage to the data driving circuit 14, so that the data driving circuit 14 generates a data signal according to the timing control signal and the reference voltage.
請參閱第五圖,係為本發明之一較佳實施例之方塊圖。如圖所示,本發明之顯示面板之驅動電路係應用於資料驅動電路14中,以接收珈瑪電路18所產生的64個電壓準位,由於本發明之驅動電路可接收8位元的訊號,所以,資料驅動電路14需使用8個驅動電路,以接收並處理64個電壓準位,在此本實施例僅以一個驅動電路進行說明。本發明之驅動電路包含一第一預充電源AVDD、一第一預充開關140、一緩衝電路142與複數阻抗元件143,144,146,148。第一預充開關140耦接於預充電源AVDD與顯示面板10之一電容100之間,緩衝電路142,用以緩衝一資料訊號,而產生一緩衝訊號,複數阻抗元件143,144,146,148相互串聯,並耦接於緩衝電路142,該些阻抗元件143,144,146,148依據緩衝訊號而於該些阻抗元件143,144,146,148間產生複數驅動訊號,驅動電路係先導通第一預充開關140,使第一預充電源AVDD對電容100進行充電後,再以該些驅動訊號之其中之一對電容100充電。即請一併參閱第六圖,其為驅動電路之驅動時序圖,如圖所示,虛線代表驅動電路不用預充方式對電容100充電,實線為本發明之驅動電路以預充方式對電容100充電,由圖中可知,本發明之驅動電路於T1至T2期間係先以第一預充電源AVDD對電容100進行充電,於T2至T3期間時,係以驅動訊號對電容100進行充電,如此,本發明之驅動電路於T3時就已經完成驅動顯示面板10,而可縮短驅動電路對電容100充電的時間,並縮短了資料驅動電路14對顯示面板10的驅動時間,進而增加顯示裝置的效率。再者,由於縮短驅動電路對電容100充電的時間,而可減少能量消耗於該些阻抗元件143,144,146,148上的時間,進而節省功率。其中,阻抗元件143,144,146,148為一電阻。Please refer to the fifth figure, which is a block diagram of a preferred embodiment of the present invention. As shown, the driving circuit of the display panel of the present invention is applied to the data driving circuit 14 to receive 64 voltage levels generated by the gamma circuit 18. The driving circuit of the present invention can receive 8-bit signals. Therefore, the data driving circuit 14 needs to use eight driving circuits to receive and process 64 voltage levels, and the present embodiment is described by only one driving circuit. The driving circuit of the present invention comprises a first pre-charge source AVDD, a first pre-charge switch 140, a buffer circuit 142 and a plurality of impedance elements 143, 144, 146, 148. The first pre-charge switch 140 is coupled between the pre-charge source AVDD and the capacitor 100 of the display panel 10. The buffer circuit 142 is configured to buffer a data signal to generate a buffer signal, and the plurality of impedance elements 143, 144, 146. The 148 are connected in series and coupled to the buffer circuit 142. The impedance elements 143, 144, 146, 148 generate a plurality of driving signals between the impedance elements 143, 144, 146, and 148 according to the buffering signal, and the driving circuit is first turned on. The first pre-charge switch 140 charges the capacitor 100 after the first pre-charge source AVDD charges the capacitor 100, and then charges the capacitor 100 with one of the driving signals. That is, please refer to the sixth figure, which is the driving timing diagram of the driving circuit. As shown in the figure, the dotted line represents the driving circuit charging the capacitor 100 without pre-charging. The solid line is the driving circuit of the invention pre-charging the capacitor 100 charging, as can be seen from the figure, the driving circuit of the present invention first charges the capacitor 100 with the first pre-charging source AVDD during T1 to T2, and charges the capacitor 100 with the driving signal during the period from T2 to T3. In this way, the driving circuit of the present invention has completed driving the display panel 10 at T3, thereby shortening the time for the driving circuit to charge the capacitor 100, and shortening the driving time of the data driving circuit 14 to the display panel 10, thereby increasing the display device. effectiveness. Moreover, since the time during which the driving circuit charges the capacitor 100 is shortened, the time spent on the impedance elements 143, 144, 146, 148 can be reduced, thereby saving power. The impedance elements 143, 144, 146, 148 are a resistor.
此外,本發明之顯示面板之驅動電路更包含一類比數位轉換電路15,用以轉換一輸入訊號,而產生資料訊號。其中,類比數位轉換電路15係耦接珈瑪電路18,以接收珈瑪電路18所產生之一校正資料作為輸入訊號,而珈瑪電路18係依據一珈瑪曲線而產生校正資料。再者,類比數位轉換電路15更耦接一記憶單元20,記憶單元20用以儲存複數畫素資料,類比數位轉換電路15係接收該些畫素資料與校正資料作為輸入訊號,而產生資料訊號。其中,記憶單元20為一隨機存取記憶體(random access memory,RAM)。In addition, the driving circuit of the display panel of the present invention further includes an analog-to-digital conversion circuit 15 for converting an input signal to generate a data signal. The analog digital conversion circuit 15 is coupled to the gamma circuit 18 to receive the correction data generated by the gamma circuit 18 as an input signal, and the gamma circuit 18 generates the correction data according to a gamma curve. Furthermore, the analog-to-digital conversion circuit 15 is further coupled to a memory unit 20 for storing complex pixel data, and the analog digital conversion circuit 15 receives the pixel data and the correction data as input signals to generate data signals. . The memory unit 20 is a random access memory (RAM).
請復參閱第五圖,於該些阻抗元件143,144,146,148間係分別設置一第一開關150、一第二開關152與一第三開關154。類比數位轉換電路15可依據記憶單元20所儲存之畫素資料,而產生一控制訊號,以導通/截止第一開關150、第二開關152或第三開關154。再者,類比數位轉換電路15係會先控制第一預充開關140或第二預充開關141導通,以先對電容100進行充電,當一段時間過了,則控制第一預充開關140或第二預充開關141截止,並導通第一開關150、第二開關152或第三開關154之其中之一,以接續對電容100進行充電。Referring to the fifth figure, a first switch 150, a second switch 152 and a third switch 154 are respectively disposed between the impedance elements 143, 144, 146, and 148. The analog digital conversion circuit 15 can generate a control signal to turn on/off the first switch 150, the second switch 152 or the third switch 154 according to the pixel data stored in the memory unit 20. Furthermore, the analog digital conversion circuit 15 first controls the first pre-charge switch 140 or the second pre-charge switch 141 to be turned on to charge the capacitor 100 first. When a period of time passes, the first pre-charge switch 140 is controlled. The second pre-charge switch 141 is turned off, and turns on one of the first switch 150, the second switch 152 or the third switch 154 to continuously charge the capacitor 100.
又,緩衝電路142包含一第一緩衝器1420與一第二緩衝器1421。第一緩衝器1420係用以緩衝資料訊號,而產生一第一緩衝訊號,第二緩衝器係用以緩衝資料訊號,而產生一第二緩衝訊號,該些阻抗元件143,144,146,148係藉由第一緩衝器1420與第二緩衝器1421所產生之第一緩衝訊號與第二緩衝訊號間的電壓差,而產生驅動訊號。其中,第一緩衝器1420與一第二緩衝器1421為一運算放大器。Moreover, the buffer circuit 142 includes a first buffer 1420 and a second buffer 1421. The first buffer 1420 is for buffering the data signal to generate a first buffer signal, and the second buffer is for buffering the data signal to generate a second buffer signal, the impedance elements 143, 144, 146, 148. The driving signal is generated by the voltage difference between the first buffer signal and the second buffer signal generated by the first buffer 1420 and the second buffer 1421. The first buffer 1420 and the second buffer 1421 are an operational amplifier.
另外,由於顯示面板10之液晶需進行極性反轉,以避免累積電荷,而影響顯示品質,所以,本發明之驅動電路更包含一第二預充電源VSS與一第二預充開關141,驅動電路依據顯示面板10之液晶極性反轉,而透過第一預充開關140與第二預充開關141,以提供第一預充電源AVDD或第二預充電源VSS至電容100。其中,第一預充電源AVDD與第二預充電源VSS係可耦接至顯示裝置中任何的電源端。In addition, since the liquid crystal of the display panel 10 needs to be reversed in polarity to avoid accumulating charges and affect display quality, the driving circuit of the present invention further includes a second pre-charge source VSS and a second pre-charge switch 141 for driving. The circuit passes through the first pre-charge switch 140 and the second pre-charge switch 141 according to the polarity of the liquid crystal of the display panel 10 to provide the first pre-charge source AVDD or the second pre-charge source VSS to the capacitor 100. The first pre-charge source AVDD and the second pre-charge source VSS can be coupled to any power terminal in the display device.
請參閱第七圖,係為本發明之另一較佳實施例之方塊圖。如圖所示,本實施例與第五圖之實施例不同之處,在於本實施例之第一預充電源AVDD與第二預充電源VSS係耦接分別耦接於第一緩衝器1420之輸出端與第二緩衝器1421之輸出端,如此,驅動電路在以第一預充電源AVDD或第二預充電源VSS進行預充的過程中,不會因預充的時間過長,而發生過充的現象,並且簡化切換時間的控制。Please refer to the seventh figure, which is a block diagram of another preferred embodiment of the present invention. As shown in the figure, the embodiment is different from the embodiment of the fifth embodiment in that the first pre-charge source AVDD and the second pre-charge source VSS are coupled to the first buffer 1420 respectively. The output end and the output end of the second buffer 1421, so that the driving circuit is not pre-charged in the process of pre-charging with the first pre-charge source AVDD or the second pre-charge source VSS Overcharge phenomenon and simplify control of switching time.
綜上所述,本發明之顯示面板之驅動電路係透由一預充開關而以一預充電源對一顯示面板之一電容進行充電,之後再以依據緩衝訊號而於該些阻抗元件間產生複數驅動訊號之其中之一對電容充電,以縮短驅動時間,並可避免能量消耗於電阻上,進而節省顯示裝置的功率。In summary, the driving circuit of the display panel of the present invention charges a capacitor of a display panel with a precharge source through a precharge switch, and then generates between the impedance components according to the buffer signal. One of the complex drive signals charges the capacitor to reduce the drive time and avoid energy consumption on the resistor, thereby saving power of the display device.
本發明係實為一具有新穎性、進步性及可供產業利用者,應符合我國專利法所規定之專利申請要件無疑,爰依法提出發明專利申請,祈 鈞局早日賜准專利,至感為禱。The invention is a novelty, progressive and available for industrial use, and should meet the requirements of the patent application stipulated in the Patent Law of China, and the invention patent application is filed according to law, and the prayer bureau will grant the patent as soon as possible. prayer.
惟以上所述者,僅為本發明之一較佳實施例而已,並非用來限定本發明實施之範圍,舉凡依本發明申請專利範圍所述之形狀、構造、特徵及精神所為之均等變化與修飾,均應包括於本發明之申請專利範圍內。However, the above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and the shapes, structures, features, and spirits described in the claims are equivalently changed. Modifications are intended to be included in the scope of the patent application of the present invention.
10’...顯示面板10’. . . Display panel
12’...掃描驅動電路12’. . . Scan drive circuit
14’...資料驅動電路14’. . . Data drive circuit
16’...時序控制電路16’. . . Timing control circuit
18’...參考電壓產生電路18’. . . Reference voltage generating circuit
10...顯示面板10. . . Display panel
100...電容100. . . capacitance
12...掃描驅動電路12. . . Scan drive circuit
14...資料驅動電路14. . . Data drive circuit
140...第一預充開關140. . . First pre-charge switch
141...第二預充開關141. . . Second precharge switch
142...緩衝電路142. . . Buffer circuit
1420...第一緩衝器1420. . . First buffer
1421...第二緩衝器1421. . . Second buffer
143...阻抗元件143. . . Impedance component
144...阻抗元件144. . . Impedance component
146...阻抗元件146. . . Impedance component
148...阻抗元件148. . . Impedance component
15...類比數位轉換電路15. . . Analog digital conversion circuit
150...第一開關150. . . First switch
152...第二開關152. . . Second switch
154...第三開關154. . . Third switch
16...時序控制電路16. . . Timing control circuit
18...珈瑪電路18. . . Karma circuit
20...記憶單元20. . . Memory unit
第一圖為習知技術之液晶顯示器之驅動系統的示意圖;The first figure is a schematic diagram of a driving system of a liquid crystal display of the prior art;
第二圖為習知技術之參考電壓產生電路之示意圖;The second figure is a schematic diagram of a reference voltage generating circuit of the prior art;
第三圖為習知技術之詳細參考電壓產生電路之示意圖;The third figure is a schematic diagram of a detailed reference voltage generating circuit of the prior art;
第四圖為本發明之液晶顯示器之驅動系統的示意圖;The fourth figure is a schematic diagram of a driving system of the liquid crystal display of the present invention;
第五圖為本發明之一較佳實施例之方塊圖;Figure 5 is a block diagram of a preferred embodiment of the present invention;
第六圖為第五圖之一較佳實施例之驅動時序圖;以及Figure 6 is a driving timing diagram of a preferred embodiment of the fifth figure;
第七圖為本發明之另一較佳實施例之方塊圖。Figure 7 is a block diagram of another preferred embodiment of the present invention.
100...電容100. . . capacitance
140...第一預充開關140. . . First pre-charge switch
141...第二預充開關141. . . Second precharge switch
142...緩衝電路142. . . Buffer circuit
1420...第一緩衝器1420. . . First buffer
1421...第二緩衝器1421. . . Second buffer
143...阻抗元件143. . . Impedance component
144...阻抗元件144. . . Impedance component
146...阻抗元件146. . . Impedance component
148...阻抗元件148. . . Impedance component
15...類比數位轉換電路15. . . Analog digital conversion circuit
150...第一開關150. . . First switch
152...第二開關152. . . Second switch
154...第三開關154. . . Third switch
18...珈瑪電路18. . . Karma circuit
20...記憶單元20. . . Memory unit
Claims (11)
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TW98110646A TWI401664B (en) | 2009-03-31 | 2009-03-31 | Driving circuit for display panel |
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TW98110646A TWI401664B (en) | 2009-03-31 | 2009-03-31 | Driving circuit for display panel |
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TWI401664B true TWI401664B (en) | 2013-07-11 |
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Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW491986B (en) * | 1998-12-15 | 2002-06-21 | Sanyo Electric Co | Liquid crystal driving semiconductor circuit |
TW521240B (en) * | 1998-12-10 | 2003-02-21 | Sanyo Electric Co | Liquid crystal driving integrated circuit |
TW522370B (en) * | 2000-09-05 | 2003-03-01 | Sharp Kk | Multi-format active matrix displays |
US20060061532A1 (en) * | 2001-01-16 | 2006-03-23 | Nec Electronics Corporation | Method and driving circuit for driving liquid crystal display, and portable electronic device |
CN1309569C (en) * | 2002-01-28 | 2007-04-11 | 夏普株式会社 | Capacitive load driving circuit, capacitive load driving method, and apparatus using the same |
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2009
- 2009-03-31 TW TW98110646A patent/TWI401664B/en active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
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TW521240B (en) * | 1998-12-10 | 2003-02-21 | Sanyo Electric Co | Liquid crystal driving integrated circuit |
TW491986B (en) * | 1998-12-15 | 2002-06-21 | Sanyo Electric Co | Liquid crystal driving semiconductor circuit |
TW522370B (en) * | 2000-09-05 | 2003-03-01 | Sharp Kk | Multi-format active matrix displays |
US20060061532A1 (en) * | 2001-01-16 | 2006-03-23 | Nec Electronics Corporation | Method and driving circuit for driving liquid crystal display, and portable electronic device |
CN1309569C (en) * | 2002-01-28 | 2007-04-11 | 夏普株式会社 | Capacitive load driving circuit, capacitive load driving method, and apparatus using the same |
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