TWI392906B - Display panel having bump structure for test and method of examining chip bonding condition of display panel - Google Patents
Display panel having bump structure for test and method of examining chip bonding condition of display panel Download PDFInfo
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Description
本發明係關於一種具有檢測用凸塊結構之顯示面板以及檢測顯示面板之晶片壓合狀態之方法，尤指一種顯示面板，其具有遞減之水平切面截面積設計的檢測用凸塊結構，可量化出顯示面板之晶片壓合狀態的結果。The present invention relates to a display panel having a bump structure for detecting and a method of detecting a wafer bonding state of a display panel, and more particularly to a display panel having a decreasing bump horizontal cross-sectional area design for detecting a bump structure, which can be quantified The result of the wafer press-fit state of the display panel.
COG(chip on glass)技術係指將晶片直接與玻璃基板上之連接墊接合的技術，而由於COG技術具有低成本的優勢，因此目前已廣泛地應用在顯示面板的晶片接合製作上。現行COG技術主要包括使用金屬焊接與異方性導電膠(ACF)兩種方式，然而在線路佈局的密度不斷提升的狀況下，上述兩種COG技術具有佈局密度上的限制，而容易產生短路問題。The COG (chip on glass) technology refers to a technique of bonding a wafer directly to a connection pad on a glass substrate, and since COG technology has a low cost advantage, it has been widely used in wafer bonding production of a display panel. The current COG technology mainly includes the use of metal welding and anisotropic conductive adhesive (ACF). However, under the condition that the density of the line layout is increasing, the above two COG technologies have limitations in layout density and are prone to short-circuit problems. .
近來，有使用非導電性膠接合晶片與顯示面板的技術被提出，然而於進行導電凸塊與連接墊的壓合製程時，使用非導電性膠接合晶片與顯示面板的技術不易判斷出導電凸塊與連接墊之接合狀況，因此其良率與可靠度均有待進一步提升。Recently, a technique of bonding a wafer and a display panel using a non-conductive adhesive has been proposed. However, in the process of performing a bonding process of a conductive bump and a connection pad, it is difficult to determine the conductive bump using a technique of bonding a wafer and a display panel using a non-conductive adhesive. The bonding condition between the block and the connection pad, so its yield and reliability have to be further improved.
本發明之目的之一在於提供一種具有檢測用凸塊結構之顯示面板以及檢測顯示面板之晶片壓合狀態之方法，以提升壓合製程的良率與顯示面板的可靠度。It is an object of the present invention to provide a display panel having a bump structure for detecting and a method of detecting a wafer bonding state of the display panel to improve the yield of the pressing process and the reliability of the display panel.
為達上述目的，本發明提供一種檢測用凸塊結構。上述檢測用凸塊結構設置於晶片上，且檢測用凸塊結構包括基座與反光薄膜。基座係設置於晶片之表面，基座具有底部、頂部與側面，且基座由底部至頂部具有遞減的水平切面截面積。反光薄膜係設置於基座之頂部與側面。In order to achieve the above object, the present invention provides a bump structure for detection. The detecting bump structure is disposed on the wafer, and the detecting bump structure includes a pedestal and a reflective film. The pedestal is disposed on the surface of the wafer, the pedestal has a bottom, a top and a side, and the pedestal has a decreasing horizontal section cross-sectional area from bottom to top. The reflective film is disposed on the top and sides of the base.
為達上述目的，本發明提供一種具有檢測用凸塊結構之顯示面板。上述顯示面板包括透光基板、晶片以及非導電性膠體。透光基板包括檢測區。晶片包括檢測用凸塊結構，對應透光基板之檢測區。檢測用凸塊結構包括基座與反光薄膜。基座設置於晶片之表面，基座具有底部、頂部與側面，且基座由底部至頂部具有遞減的水平切面截面積。反光薄膜設置於基座之頂部與側面。非導電性膠體，將晶片黏著於透光基板上。基座之頂部的反光薄膜藉由非導電性膠體與晶片之黏著而壓合於透光基板之表面。To achieve the above object, the present invention provides a display panel having a bump structure for detection. The display panel includes a light transmissive substrate, a wafer, and a non-conductive colloid. The light transmissive substrate includes a detection area. The wafer includes a bump structure for detection corresponding to a detection region of the light-transmitting substrate. The bump structure for detection includes a susceptor and a reflective film. The pedestal is disposed on the surface of the wafer, the pedestal has a bottom, a top and a side, and the pedestal has a decreasing horizontal section cross-sectional area from bottom to top. The reflective film is disposed on the top and sides of the base. A non-conductive colloid that adheres the wafer to the light-transmissive substrate. The reflective film on the top of the pedestal is pressed against the surface of the transparent substrate by adhesion of the non-conductive colloid to the wafer.
為達上述目的，本發明提供一種檢測顯示面板之晶片壓合狀態之方法，包括下列步驟：提供透光基板，其包括檢測區；提供晶片，晶片包括檢測用凸塊結構，檢測用凸塊結構包括：基座，設置於晶片之表面，基座具有底部、頂部與側面，且基座由底部至頂部具有遞減的水平切面截面積；以及反光薄膜，設置於基座之頂部與側面；將晶片之檢測用凸塊結構對應透光基板之檢測區，再利用非導電性膠體將晶片黏著於透光基板之正面，並對晶片進行壓合製程，以使檢測用凸塊結構之基座產生形變；以及進行檢測製程，由透光基板之背面觀察位於基座之頂部的反光薄膜的面積，以判斷壓合製程的壓合效果。In order to achieve the above object, the present invention provides a method for detecting a wafer bonding state of a display panel, comprising the steps of: providing a light-transmitting substrate including a detecting region; providing a wafer, the wafer including the detecting bump structure, and the detecting bump structure The method includes a base disposed on a surface of the wafer, the base has a bottom, a top and a side, and the base has a decreasing horizontal sectional area from the bottom to the top; and a reflective film disposed on the top and the side of the base; The detecting bump structure corresponds to the detection area of the transparent substrate, and then the non-conductive colloid is used to adhere the wafer to the front surface of the transparent substrate, and the wafer is subjected to a pressing process to deform the base of the detecting bump structure. And performing a detection process, and observing the area of the reflective film located at the top of the pedestal from the back side of the transparent substrate to determine the pressing effect of the sizing process.
為達上述目的，本發明提供一種製作檢測用凸塊結構之方法，包括下列步驟：提供晶片；於晶片上形成感光性材料層；利用灰階光罩對感光性材料層進行曝光暨顯影製程，以形成基座，其中基座具有底部、頂部與側面，且基座由底部至頂部具有遞減的水平切面截面積；以及於基座之頂部與側面形成反光薄膜。In order to achieve the above object, the present invention provides a method for fabricating a bump structure for detecting, comprising the steps of: providing a wafer; forming a photosensitive material layer on the wafer; and exposing and developing the photosensitive material layer by using a gray scale mask, To form a pedestal, wherein the pedestal has a bottom, a top and a side, and the pedestal has a decreasing horizontal kerf cross-sectional area from bottom to top; and a reflective film is formed on the top and sides of the pedestal.
本發明利用具有遞減之水平切面截面積設計的檢測用凸塊結構，可量化出壓合製程的結果，藉此確認導電凸塊結構與連接墊的壓合是否有效，而可避免壓合過度或壓合不足的問題，因此可有效提升壓合製程的良率與顯示面板之晶片接合結構的可靠度。The invention utilizes the detection bump structure with the decreasing horizontal section sectional area design, can quantify the result of the pressing process, thereby confirming whether the pressing of the conductive bump structure and the connection pad is effective, and avoiding excessive pressing or The problem of insufficient press-fitting can effectively improve the yield of the press-bonding process and the reliability of the wafer bonding structure of the display panel.
為使熟習本發明所屬技術領域之一般技藝者能更進一步了解本發明，下文特列舉本發明之數個較佳實施例，並配合所附圖式，詳細說明本發明的構成內容及所欲達成之功效。The present invention will be further understood by those skilled in the art to which the present invention pertains. The effect.
請參考第1圖至第3圖。第1圖至第3圖為本發明一較佳實施例製作檢測用凸塊結構之方法示意圖。如第1圖所示，首先提供一晶片10。接著於晶片10上形成一材料層，其中材料層以使用感光性材料層12為較佳，例如感光性聚亞醯胺，但不以此為限。如第2圖所示，隨後定義材料層的圖案，其中本實施例之感光性材料層12係利用一灰階光罩14對感光性材料層12進行一曝光暨顯影製程，以形成一基座16，其中基座16具有底部16A、頂部16B與側面16C，且基座16由底部16A至頂部16B具有遞減的水平切面截面積。另外，若材料層非使用感光性材料，亦可利用其它圖案化製程加以定義。如第3圖所示，接著，於基座16之頂部16B與側面16C形成一反光薄膜18，即形成本實施之檢測用凸塊結構。Please refer to Figures 1 to 3. 1 to 3 are schematic views showing a method of fabricating a bump structure for detection according to a preferred embodiment of the present invention. As shown in Fig. 1, a wafer 10 is first provided. A material layer is then formed on the wafer 10, wherein the material layer is preferably a photosensitive material layer 12, such as photosensitive polyimide, but not limited thereto. As shown in FIG. 2, the pattern of the material layer is subsequently defined. The photosensitive material layer 12 of the present embodiment performs an exposure and development process on the photosensitive material layer 12 by using a gray scale mask 14 to form a pedestal. 16, wherein the base 16 has a bottom portion 16A, a top portion 16B and a side surface 16C, and the base portion 16 has a decreasing horizontal section cross-sectional area from the bottom portion 16A to the top portion 16B. In addition, if the material layer is not a photosensitive material, it can be defined by other patterning processes. As shown in Fig. 3, a reflective film 18 is formed on the top portion 16B and the side surface 16C of the susceptor 16, i.e., the bump structure for detection of the present embodiment is formed.
本發明之檢測用凸塊結構的基座16的水平切面由底部16A至頂部16B具有遞減的截面積，因此當晶片10與顯示面板進行壓合製程時，可由顯示面板之透光基板的背面觀察導電凸塊結構的基座16之頂部16B的面積變化，作為判斷壓合製程結構的指標。在上述實施例中，基座16之水平切面截面積係為不連續遞減，例如，基座16之側面16C係呈現階梯狀結構，且階梯之層數、頂部16B、底部16A與側面16C之間的尺寸比例並不為圖式中所繪示的範例為限，而可依情況作變更。另外，本發明之檢測用凸塊結構的設計並不以此為限，而可具有其它不同的設計。The horizontal section of the pedestal 16 of the detecting bump structure of the present invention has a decreasing cross-sectional area from the bottom portion 16A to the top portion 16B, so that when the wafer 10 and the display panel are subjected to a pressing process, the back surface of the light-transmitting substrate of the display panel can be observed. The area of the top portion 16B of the pedestal 16 of the conductive bump structure changes as an index for judging the embossing process structure. In the above embodiment, the horizontal section cross-sectional area of the pedestal 16 is discontinuously decreasing. For example, the side 16C of the susceptor 16 has a stepped structure, and the number of steps, the top 16B, the bottom 16A and the side 16C. The size ratio is not limited to the examples shown in the drawings, but may be changed as appropriate. In addition, the design of the bump structure for detection of the present invention is not limited thereto, and may have other different designs.
請參考第4圖。第4圖為本發明另一較佳實施例之檢測用凸塊結構之示意圖，其中為簡化說明並比較兩實施例之異同，本實施例與前述實施例使用相同之標號標示相同之元件，並不再對相同部分重覆贅述。如第4圖所述，本實施例之檢測用凸塊結構的基座16亦具有底部16A、頂部16B與側面16C，且基座16由底部16A至頂部16B具有遞減的水平切面截面積，然而在本實施例中，基座16之水平切面截面積係為連續遞減，換言之，基座16具有圓錐狀結構，亦具有作為判斷壓合製程結構的指標的作用。Please refer to Figure 4. 4 is a schematic view showing a structure of a bump for detecting according to another preferred embodiment of the present invention. In order to simplify the description and compare the similarities and differences between the two embodiments, the same reference numerals are used to denote the same components in the embodiment. The same part will not be repeated. As shown in FIG. 4, the base 16 of the detecting bump structure of this embodiment also has a bottom portion 16A, a top portion 16B and a side surface 16C, and the base portion 16 has a decreasing horizontal section cross-sectional area from the bottom portion 16A to the top portion 16B. In the present embodiment, the horizontal section cross-sectional area of the susceptor 16 is continuously decreasing. In other words, the susceptor 16 has a conical structure and also functions as an index for judging the embossing process structure.
請參考第5圖至第7圖。第5圖至第7圖繪示了本發明一較佳實施例之一種檢測顯示面板之晶片壓合狀態之方法。如第5圖所示，首先，提供一透光基板30。透光基板30為顯示面板(例如液晶顯示面板)之薄膜電晶體基板，其包括至少一銲接區30A與至少一檢測區30B，且銲接區30A內設置有與顯示面板之內部導線例如資料線或閘極線電性連接之連接墊32，而檢測區30則為一透光區域。Please refer to Figures 5 to 7. 5 to 7 illustrate a method of detecting a wafer bonding state of a display panel according to a preferred embodiment of the present invention. As shown in Fig. 5, first, a light-transmitting substrate 30 is provided. The transparent substrate 30 is a thin film transistor substrate of a display panel (for example, a liquid crystal display panel), and includes at least one soldering area 30A and at least one detecting area 30B, and the internal wiring of the display panel, such as a data line or The gate line is electrically connected to the connection pad 32, and the detection area 30 is a light transmissive area.
如第6圖所示，隨後，提供一晶片40，其中晶片40包括至少一導電凸塊結構42與至少一檢測用凸塊結構44。導電凸塊結構42包括基座42A與導電薄膜42B，其中導電薄膜42B與晶片40內部之電路電性連接，而檢測用凸塊結構44則係用於判斷壓合製程之結果。檢測用凸塊結構44包括基座46與反光薄膜48，其中基座46設置於晶片40之表面，且基座46具有底部46A、頂部46B與側面46C，且基座46由底部46A至頂部46B具有遞減的水平切面截面積。在本實施例中，基座46具有階梯狀結構，但並不以此為限，基座46的形狀亦可為如第4圖所示之圓錐結構，或其它各種由底部46A至頂部46B具有遞減的水平切面截面積之結構設計。反光薄膜48係設置於基座46之頂部46B與側面46C上。檢測用凸塊結構44之基座46可由感光性材料，例如感光性聚亞醯胺構成，並利用灰階光罩加以定義，但不以此為限。反光薄膜48可為金屬薄膜或其它材料形成之薄膜，且為簡化製程檢測用凸塊結構44之基座46與反光薄膜48可分別與導電凸塊結構42之基座42A與導電薄膜42B利用相同材料，並以相同製程一併加以製作，而不需增加額外製程。As shown in FIG. 6, a wafer 40 is then provided, wherein the wafer 40 includes at least one conductive bump structure 42 and at least one bump structure 44 for inspection. The conductive bump structure 42 includes a pedestal 42A and a conductive film 42B, wherein the conductive film 42B is electrically connected to a circuit inside the wafer 40, and the detecting bump structure 44 is used to determine the result of the embossing process. The detecting bump structure 44 includes a pedestal 46 and a light reflecting film 48, wherein the pedestal 46 is disposed on the surface of the wafer 40, and the pedestal 46 has a bottom portion 46A, a top portion 46B and a side surface 46C, and the pedestal 46 has a bottom portion 46A to a top portion 46B. Has a decreasing horizontal section cross-sectional area. In this embodiment, the base 46 has a stepped structure, but not limited thereto. The shape of the base 46 may also be a conical structure as shown in FIG. 4, or other various types from the bottom 46A to the top 46B. The structural design of the decreasing horizontal section cross-sectional area. The reflective film 48 is disposed on the top 46B and the side 46C of the base 46. The pedestal 46 of the bump structure 44 for detection may be formed of a photosensitive material such as photosensitive polyimide, and is defined by a gray scale mask, but is not limited thereto. The reflective film 48 may be a film formed of a metal film or other material, and the pedestal 46 and the reflective film 48 for simplifying the process detecting bump structure 44 may be the same as the pedestal 42A and the conductive film 42B of the conductive bump structure 42, respectively. Materials are produced in the same process without additional processing.
如第7圖所示，將晶片40之導電凸塊結構42對應連接墊32，並將檢測用凸塊結構46對應透光基板30之檢測區30B。接著再利用一非導電性膠體50將晶片40黏著於透光基板40之正面，並對晶片40進行一壓合製程，以使導電凸塊結構42之導電薄膜42B與連接墊32接觸並電性連接，即形成本實施例之具有檢測用凸塊結構之顯示面板。As shown in FIG. 7, the conductive bump structure 42 of the wafer 40 is connected to the pad 32, and the detecting bump structure 46 corresponds to the detecting region 30B of the light-transmitting substrate 30. Then, the non-conductive colloid 50 is used to adhere the wafer 40 to the front surface of the transparent substrate 40, and a bonding process is performed on the wafer 40, so that the conductive film 42B of the conductive bump structure 42 is in contact with the connection pad 32 and is electrically connected. The connection is formed to form the display panel having the bump structure for detection of the present embodiment.
在壓合製程中，檢測用凸塊結構44之基座46會被透光基板30壓縮而產生形變，而由於基座46由底部46A至頂部46B具有遞減的水平切面截面積，因此頂部46B的面積會隨著壓合的程度而有不同的變化，而位於基座46表面的反光薄膜48亦會受到擠壓而使其表面產生類似研磨效果而改變其表面特性，例如反光程度會因擠壓而改變。換句話說，當壓合的深度愈深時，基座46之頂部46B的面積會愈大，且位於基座46之頂部46B的反光薄膜48的反光程度亦會因擠壓而改變。接著進行一檢測製程，由透光基板30之背面觀察位於基座46之頂部46B的反光薄膜48。由於壓合製程的壓合效果會反應在基座46之頂部46B的面積，且位於基座46之頂部46B的反光薄膜48在經過擠壓後會產生反光程度的變化，因此於檢測製程中可利用如電子顯微鏡觀察出檢測用凸塊結構44之基座46的頂部46B的反光薄膜48所產生反光區域的尺寸得知壓合後基座46的頂部46B的反光薄膜48之面積，藉此推論出基座46剩餘的高度，如此一來，即可判斷出導電凸塊結構42的壓合是否合格。若於檢測製程中所觀察出之檢測用凸塊結構44之基座46的頂部46B的反光薄膜48之面積符合預先設定之標準，即表示顯示面板的的壓合製程合格，反之則表示壓合製程不合格需進行重工製程。In the squeezing process, the pedestal 46 of the bump structure 44 for detection is compressed by the transparent substrate 30 to deform, and since the pedestal 46 has a decreasing horizontal cross-sectional area from the bottom 46A to the top 46B, the top 46B The area will vary with the degree of press-fitting, and the reflective film 48 on the surface of the susceptor 46 will also be squeezed to cause a similar abrasive effect on the surface to change its surface characteristics, for example, the degree of reflection will be squeezed. And change. In other words, as the depth of the press is deeper, the area of the top 46B of the base 46 will be larger, and the degree of reflection of the reflective film 48 at the top 46B of the base 46 will also change due to the pressing. Next, a detection process is performed to observe the reflective film 48 located at the top 46B of the susceptor 46 from the back side of the transparent substrate 30. Since the pressing effect of the pressing process is reflected in the area of the top portion 46B of the susceptor 46, and the reflective film 48 located at the top 46B of the susceptor 46 undergoes a change in the degree of glare after being squeezed, it can be detected in the inspection process. The area of the light-reflecting film 48 produced by the light-reflecting film 48 of the top portion 46B of the susceptor 46 of the detecting bump structure 44 as observed by an electron microscope is used to determine the area of the light-reflecting film 48 of the top portion 46B of the pedestal 46 after the pressing, thereby deducing The remaining height of the pedestal 46 is taken out, so that it can be judged whether the pressing of the conductive bump structure 42 is acceptable. If the area of the reflective film 48 of the top portion 46B of the pedestal 46 of the detecting bump structure 44 observed in the detecting process conforms to a preset standard, it means that the pressing process of the display panel is acceptable, and vice versa. If the process is unqualified, a rework process is required.
綜上所述，本發明利用具有遞減之水平切面截面積設計的檢測用凸塊結構，可量化出壓合製程的結果，藉此確認導電凸塊結構與連接墊的壓合是否有效，而可避免壓合過度或壓合不足的問題，因此可有效提升壓合製程的良率與顯示面板之晶片接合結構的可靠度。In summary, the present invention utilizes the detection bump structure having a decreasing horizontal section cross-sectional area design, and can quantify the result of the pressing process, thereby confirming whether the pressing of the conductive bump structure and the connection pad is effective, and The problem of excessive press-fitting or insufficient press-fitting is avoided, so that the yield of the press-bonding process and the reliability of the wafer bonding structure of the display panel can be effectively improved.
以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所做之均等變化與修飾，皆應屬本發明之涵蓋範圍。The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should be within the scope of the present invention.
10．．．晶片10. . . Wafer
12．．．感光性材料層12. . . Photosensitive material layer
14．．．灰階光罩14. . . Gray scale mask
16．．．基座16. . . Pedestal
16A．．．底部16A. . . bottom
16B．．．頂部16B. . . top
16C．．．側面16C. . . side
18．．．反光薄膜18. . . Reflective film
30．．．透光基板30. . . Light transmissive substrate
30A．．．銲接區30A. . . Weld zone
30B．．．檢測區30B. . . Detection area
32．．．連接墊32. . . Connection pad
40．．．晶片40. . . Wafer
42．．．導電凸塊結構42. . . Conductive bump structure
42A．．．基座42A. . . Pedestal
42B．．．導電薄膜42B. . . Conductive film
44．．．檢測用凸塊結構44. . . Detection bump structure
46．．．基座46. . . Pedestal
46A．．．底部46A. . . bottom
46B．．．頂部46B. . . top
46C．．．側面46C. . . side
48．．．反光薄膜48. . . Reflective film
50．．．非導電性膠體50. . . Non-conductive colloid
第1圖至第3圖為本發明一較佳實施例製作檢測用凸塊結構之方法示意圖。1 to 3 are schematic views showing a method of fabricating a bump structure for detection according to a preferred embodiment of the present invention.
第4圖為本發明另一較佳實施例之檢測用凸塊結構之示意圖。4 is a schematic view showing a structure of a bump for detecting according to another preferred embodiment of the present invention.
第5圖至第7圖繪示了本發明一較佳實施例之一種檢測顯示面板之晶片壓合狀態之方法。5 to 7 illustrate a method of detecting a wafer bonding state of a display panel according to a preferred embodiment of the present invention.
10．．．晶片10. . . Wafer
16．．．基座16. . . Pedestal
16A．．．底部16A. . . bottom
16B．．．頂部16B. . . top
16C．．．側面16C. . . side
18．．．反光薄膜18. . . Reflective film
Claims (6)
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| TW98109617A TWI392906B (en) | 2009-03-24 | 2009-03-24 | Display panel having bump structure for test and method of examining chip bonding condition of display panel |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200713609A (en) * | 2005-09-07 | 2007-04-01 | Ind Tech Res Inst | Chip structure, chip package structure and manufacturing thereof |
| TW200807669A (en) * | 2006-07-28 | 2008-02-01 | Taiwan Tft Lcd Ass | Contact structure having a compliant bump and a testing area and manufacturing method for the same |
| US20080030668A1 (en) * | 2006-05-25 | 2008-02-07 | Nec Lcd Technologies, Ltd. | Image display device |
| TW200812084A (en) * | 2006-08-16 | 2008-03-01 | Au Optronics Corp | Display panel and method of manufacturing the same |
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2009
- 2009-03-24 TW TW98109617A patent/TWI392906B/en active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200713609A (en) * | 2005-09-07 | 2007-04-01 | Ind Tech Res Inst | Chip structure, chip package structure and manufacturing thereof |
| US20080030668A1 (en) * | 2006-05-25 | 2008-02-07 | Nec Lcd Technologies, Ltd. | Image display device |
| TW200807669A (en) * | 2006-07-28 | 2008-02-01 | Taiwan Tft Lcd Ass | Contact structure having a compliant bump and a testing area and manufacturing method for the same |
| TW200812084A (en) * | 2006-08-16 | 2008-03-01 | Au Optronics Corp | Display panel and method of manufacturing the same |
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