TWI350061B - Methods and systems for generating a clock signal, and a phase locked loop - Google Patents
Methods and systems for generating a clock signal, and a phase locked loopInfo
- Publication number
- TWI350061B TWI350061B TW096129574A TW96129574A TWI350061B TW I350061 B TWI350061 B TW I350061B TW 096129574 A TW096129574 A TW 096129574A TW 96129574 A TW96129574 A TW 96129574A TW I350061 B TWI350061 B TW I350061B
- Authority
- TW
- Taiwan
- Prior art keywords
- generating
- systems
- methods
- clock signal
- locked loop
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/16—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop
- H03L7/18—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop
- H03L7/197—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division
- H03L7/1974—Indirect frequency synthesis, i.e. generating a desired one of a number of predetermined frequencies using a frequency- or phase-locked loop using a frequency divider or counter in the loop a time difference being used for locking the loop, the counter counting between numbers which are variable in time or the frequency divider dividing by a factor variable in time, e.g. for obtaining fractional frequency division for fractional frequency division
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US86463906P | 2006-11-07 | 2006-11-07 | |
US86836206P | 2006-12-04 | 2006-12-04 | |
US11/737,467 US7894564B2 (en) | 2006-11-07 | 2007-04-19 | Phase modulation method for spread spectrum clock generator |
Publications (2)
Publication Number | Publication Date |
---|---|
TW200822566A TW200822566A (en) | 2008-05-16 |
TWI350061B true TWI350061B (en) | 2011-10-01 |
Family
ID=39359688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW096129574A TWI350061B (en) | 2006-11-07 | 2007-08-10 | Methods and systems for generating a clock signal, and a phase locked loop |
Country Status (3)
Country | Link |
---|---|
US (1) | US7894564B2 (zh) |
CN (1) | CN101102108B (zh) |
TW (1) | TWI350061B (zh) |
Families Citing this family (26)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7970042B2 (en) * | 2008-01-11 | 2011-06-28 | Lexmark International, Inc. | Spread spectrum clock interoperability control and inspection circuit |
JP4628434B2 (ja) * | 2008-02-06 | 2011-02-09 | 株式会社リコー | 発振周波数制御回路、その発振周波数制御回路を有するdc−dcコンバータ及び半導体装置 |
US20100098134A1 (en) * | 2008-10-22 | 2010-04-22 | Glenn Dixon | Method and apparatus for using a spread spectrum intermediate frequency channel within an electronic device |
US9335971B1 (en) * | 2009-02-27 | 2016-05-10 | Calamp Corp. | High entropy random bit source |
US8422536B2 (en) * | 2010-05-05 | 2013-04-16 | Lsi Corporation | Spread spectrum clock signal generator method and system |
CN101841329A (zh) * | 2010-06-12 | 2010-09-22 | 中兴通讯股份有限公司 | 锁相环、压控装置及方法 |
US8816780B2 (en) | 2010-07-27 | 2014-08-26 | Mediatek Inc. | Apparatus and method for calibrating timing mismatch of edge rotator operating on multiple phases of oscillator |
US8493107B2 (en) * | 2010-07-27 | 2013-07-23 | Mediatek Inc. | Clock generator for generating output clock having non-harmonic relationship with input clock and related clock generating method thereof |
US8742864B2 (en) | 2010-11-04 | 2014-06-03 | Qualcomm Incorporated | Method and digital circuit for generating a waveform from stored digital values |
US8913704B2 (en) * | 2011-07-01 | 2014-12-16 | Infineon Technologies Ag | Method and system for jitter reduction |
GB2492848A (en) * | 2011-07-15 | 2013-01-16 | Softkinetic Sensors Nv | Optical distance measurement |
US9661348B2 (en) | 2012-03-29 | 2017-05-23 | Intel Corporation | Method and system for generating side information at a video encoder to differentiate packet data |
US8618967B2 (en) * | 2012-03-30 | 2013-12-31 | Broadcom Corporation | Systems, circuits, and methods for a sigma-delta based time to digital converter |
US8975975B2 (en) | 2012-03-30 | 2015-03-10 | Intel Corporation | Spread spectrum clocking method for wireless mobile platforms |
CN104022762B (zh) * | 2013-02-28 | 2018-05-08 | 德克萨斯仪器股份有限公司 | 相位平均的脉冲宽度调制器 |
TWI503670B (zh) * | 2013-10-07 | 2015-10-11 | Giga Byte Tech Co Ltd | 應用於高速匯流排裝置之功率輸出級控制系統之裝置與方法 |
CN104571254B (zh) * | 2013-10-14 | 2016-06-15 | 技嘉科技股份有限公司 | 应用于高速总线装置的功率输出级控制***的装置与方法 |
CN105871358B (zh) * | 2015-01-23 | 2018-10-26 | 瑞昱半导体股份有限公司 | 展频时脉产生方法及装置 |
CN105049002B (zh) * | 2015-07-02 | 2018-07-31 | 深圳市韬略科技有限公司 | 一种电磁兼容的展频装置和产生展频时钟信号的方法 |
KR102467526B1 (ko) | 2015-10-16 | 2022-11-17 | 삼성디스플레이 주식회사 | 표시 장치 |
CN106406425A (zh) * | 2016-09-05 | 2017-02-15 | 乐视控股(北京)有限公司 | Emmc访问方法及装置 |
US10084457B2 (en) * | 2017-01-18 | 2018-09-25 | Integrated Device Technology, Inc. | Frequency synthesizer with tunable accuracy |
KR101898585B1 (ko) | 2017-03-14 | 2018-09-14 | 주식회사 하이빅스 | 디지털 제어 발진기 기반 확산 스펙트럼 클럭 발생 장치 |
CN109299026A (zh) * | 2017-07-24 | 2019-02-01 | 芯籁半导体股份有限公司 | 一种信号处理***及其方法 |
CN110214418B (zh) * | 2019-04-23 | 2022-12-27 | 京东方科技集团股份有限公司 | 展频电路的参数确定方法及装置、时钟展频方法及装置 |
TWI722590B (zh) | 2019-10-02 | 2021-03-21 | 瑞昱半導體股份有限公司 | 目標時脈調整方法及其無線裝置 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5488627A (en) * | 1993-11-29 | 1996-01-30 | Lexmark International, Inc. | Spread spectrum clock generator and associated method |
US6731667B1 (en) * | 1999-11-18 | 2004-05-04 | Anapass Inc. | Zero-delay buffer circuit for a spread spectrum clock system and method therefor |
US6744277B1 (en) * | 2001-05-06 | 2004-06-01 | Altera Corporation | Programmable current reference circuit |
JP2002341959A (ja) * | 2001-05-15 | 2002-11-29 | Rohm Co Ltd | クロック信号発生方法及び装置 |
DE60328925D1 (de) * | 2002-12-24 | 2009-10-01 | Fujitsu Microelectronics Ltd | Jittergenerator |
WO2005117267A1 (ja) | 2004-05-26 | 2005-12-08 | Rohm Co., Ltd | システムクロック発生回路 |
-
2007
- 2007-04-19 US US11/737,467 patent/US7894564B2/en active Active
- 2007-08-10 TW TW096129574A patent/TWI350061B/zh active
- 2007-08-30 CN CN2007101459861A patent/CN101102108B/zh active Active
Also Published As
Publication number | Publication date |
---|---|
US7894564B2 (en) | 2011-02-22 |
CN101102108B (zh) | 2011-09-14 |
CN101102108A (zh) | 2008-01-09 |
US20080107154A1 (en) | 2008-05-08 |
TW200822566A (en) | 2008-05-16 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI350061B (en) | Methods and systems for generating a clock signal, and a phase locked loop | |
TWI315941B (en) | Systems and method for automatic quadrature phase imbalence compensation using a delay locked loop | |
EP1847012A4 (en) | Fractional-N OFFSET PHASE LOOP | |
TWI346461B (en) | Phase frequency detector and phase-locked loop | |
WO2010093158A3 (ko) | 지연고정루프 기반의 클럭 복원부가 구비된 수신부 장치 | |
GB2434930B (en) | Delay-locked loop circuits | |
TWI346459B (en) | A phase-locked loop circuit apparatus and method for operating the phase-locked loop circuit | |
EP2596584A4 (en) | DIGITAL PHASE CONTROL CIRCUIT PUSHING SYSTEM | |
EP2351223A4 (en) | METHODS, ALGORITHMS, CIRCUITS, AND SYSTEMS FOR DETERMINING REFERENCE CLOCK FREQUENCY AND / OR LOCKING A LOOP OSCILLATOR | |
EP1989777A4 (en) | SYSTEM AND METHOD FOR GENERATING A SEPARATE SIGNAL | |
EP2174442A4 (en) | METHOD AND SYSTEM FOR MULTI-POINT SIGNAL GENERATION WITH PHASE SYNCHRONIZED LOCAL BEARINGS | |
EP1898811A4 (en) | DEVICES, SYSTEMS, AND METHODS FOR CREATING PERIPHERAL FISTULE | |
EP2178734A4 (en) | METHOD AND SYSTEMS FOR VITALIZING A GPS SIGNAL | |
IL190589A (en) | Signal processor containing signal generator @ and restorer @ level | |
GB0821772D0 (en) | Soft reference switch for phase locked loop | |
EP1912398A4 (en) | PHASE CONTROL DEVICE, PULSE MASTER GENERATOR AND FAULT DETECTOR WITH THE PHASE CONTROL DEVICE | |
EP2436119A4 (en) | PHASE LOCKED LOOP USING A MULTIPHASE OSCILLATOR | |
GB0605480D0 (en) | Phase-locked loops | |
EP2070230A4 (en) | SPREADING SPECTRUM CLOCK GENERATOR WITH ARRIVAL INTERFACE TECHNOLOGY | |
GB0622948D0 (en) | A digital phase locked loop | |
EP2421180A4 (en) | METHOD, DEVICE AND SYSTEM FOR GENERATING AND RECEIVING MODULATED POLARIZATION SIGNAL IN PHASE | |
TWI340545B (en) | Methods, circuits, and systems for generating delayed high-frequency clock signals used in spread-spectrum clocking | |
EP2120328B8 (en) | Complex phase locked loop | |
EP1803216A4 (en) | SIGMA-DELTA PHASE LOCKED LOOP | |
HUP0800389A2 (en) | Method for transforming a loop reactor |