TWI349360B - A chip packaging structure and a method of forming the same - Google Patents

A chip packaging structure and a method of forming the same

Info

Publication number
TWI349360B
TWI349360B TW096139401A TW96139401A TWI349360B TW I349360 B TWI349360 B TW I349360B TW 096139401 A TW096139401 A TW 096139401A TW 96139401 A TW96139401 A TW 96139401A TW I349360 B TWI349360 B TW I349360B
Authority
TW
Taiwan
Prior art keywords
forming
same
packaging structure
chip packaging
chip
Prior art date
Application number
TW096139401A
Other languages
Chinese (zh)
Other versions
TW200919692A (en
Inventor
Chi Liang Hsieh
Sem Wei Lin
Che Yu Li
Original Assignee
Advanced Semiconductor Eng
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Semiconductor Eng filed Critical Advanced Semiconductor Eng
Priority to TW096139401A priority Critical patent/TWI349360B/en
Publication of TW200919692A publication Critical patent/TW200919692A/en
Application granted granted Critical
Publication of TWI349360B publication Critical patent/TWI349360B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05554—Shape in top view being square
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
TW096139401A 2007-10-19 2007-10-19 A chip packaging structure and a method of forming the same TWI349360B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW096139401A TWI349360B (en) 2007-10-19 2007-10-19 A chip packaging structure and a method of forming the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW096139401A TWI349360B (en) 2007-10-19 2007-10-19 A chip packaging structure and a method of forming the same

Publications (2)

Publication Number Publication Date
TW200919692A TW200919692A (en) 2009-05-01
TWI349360B true TWI349360B (en) 2011-09-21

Family

ID=44727196

Family Applications (1)

Application Number Title Priority Date Filing Date
TW096139401A TWI349360B (en) 2007-10-19 2007-10-19 A chip packaging structure and a method of forming the same

Country Status (1)

Country Link
TW (1) TWI349360B (en)

Also Published As

Publication number Publication date
TW200919692A (en) 2009-05-01

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Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees