TWI342474B - Voltage regulator - Google Patents

Voltage regulator Download PDF

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TWI342474B
TWI342474B TW96131206A TW96131206A TWI342474B TW I342474 B TWI342474 B TW I342474B TW 96131206 A TW96131206 A TW 96131206A TW 96131206 A TW96131206 A TW 96131206A TW I342474 B TWI342474 B TW I342474B
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voltage
signal
voltage regulator
transistor
coupled
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TW96131206A
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Chinese (zh)
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TW200910043A (en
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L Erbito Rogelio Jr
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Vanguard Int Semiconduct Corp
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1342474 九、發明說明: 【發明所屬之技術領域】 本發明係有關於電壓調整器(voltage regulator ),特 別是有關於具有起始(start-up )電路的電壓調整器。 【先前技術】 對電子應用產品而言,電壓調整器可提供並維持固定 的電壓位準。其中,低壓降(low dropout,LDO )電壓調 整器為直流線性(DC linear)電壓調整器,並且具有非常 小之輸入電壓與輸出電壓的電壓差以及較低的輸出雜訊。 第1圖係顯示傳統低壓降電壓調整器100。低壓降電 壓調整器100包括能隙(bandgap)電路110、放大器120、 回授電路130以及導通元件(pass device ) 140,其中回授 電路130包括電阻R1以及電阻R2。輸入電壓Vin分別耦 接至能隙電路110、放大器120以及導通元件140,其中輸 入電壓Vin為能隙電路110以及放大器120的供應電壓。 能隙電路110根據輸入電壓Vin而產生參考電壓Vref。放大 器120接收參考電壓Vref以及回授信號VFB並產生控制信 號Vg以控制導通元件140。導通元件140根據輸入電壓 Vin以及信號Vg而產生輸出電壓Vout。回授電路130根據 輸出電壓vout而產生回授信號VFB。因此,藉由比較參考 電壓Vref以及回授信號VFB,低壓降電壓調整器100可根 據參考電壓vref以及回授信號VFB的差值而控制導通元件 140以提供輸出電壓Vout給負載電路150使用。1342474 IX. Description of the Invention: [Technical Field] The present invention relates to a voltage regulator, and more particularly to a voltage regulator having a start-up circuit. [Prior Art] For electronic applications, the voltage regulator provides and maintains a fixed voltage level. Among them, the low dropout (LDO) voltage regulator is a DC linear voltage regulator with a very small voltage difference between the input voltage and the output voltage and low output noise. Figure 1 shows a conventional low dropout voltage regulator 100. The low dropout voltage regulator 100 includes a bandgap circuit 110, an amplifier 120, a feedback circuit 130, and a pass device 140, wherein the feedback circuit 130 includes a resistor R1 and a resistor R2. The input voltage Vin is coupled to the bandgap circuit 110, the amplifier 120, and the pass element 140, respectively, wherein the input voltage Vin is the supply voltage of the bandgap circuit 110 and the amplifier 120. The bandgap circuit 110 generates a reference voltage Vref according to the input voltage Vin. The amplifier 120 receives the reference voltage Vref and the feedback signal VFB and generates a control signal Vg to control the conduction element 140. The pass element 140 generates an output voltage Vout based on the input voltage Vin and the signal Vg. The feedback circuit 130 generates a feedback signal VFB based on the output voltage vout. Therefore, by comparing the reference voltage Vref with the feedback signal VFB, the low dropout voltage regulator 100 can control the pass element 140 to provide the output voltage Vout to the load circuit 150 based on the difference between the reference voltage vref and the feedback signal VFB.

Client's Docket N〇.:VISS003 TTs Docket No:0516-A41215twf/Nikey 1342474 在第1圖中,參考電壓1是根據輸入電壓ι而產 。因此,當輸人電壓vin受到雜訊干擾時,參考電塵v =到雜訊影響而導致參考電壓vref的電壓值會改變rr ===壓^無法得到想要的電壓值。為了改善㈣ 凋效旎(例如:線性調整(line regulation)),可 將輸出電壓vj接至能隙電路11〇以作為能隙電路ιι〇 的供應電壓。因此,參考電壓Vref不會受到輸入電壓v. 的雜訊干擾。 ln 。然而,當電壓調整器在初始狀態(initia]state)時,輸 出電壓V。"為低電壓位準,使得能隙電路11〇的供應電壓 太低而無法使犯隙電路1 1 〇能開始動作。因此,參考電壓 Vref將維持在低電壓位準,而輸出電壓v〇ut亦將維持在低 電壓位準。所以,當能隙電路110的供應電壓為輸出電壓 ▽。111%,其將導致電壓調整器不容易被啟動(卩0〜以叩)。 因此,需要一種起動(startup)電路以解決上述問題。 【發明内容】 本發明提供一種電壓調整器,包括··一輸入端,用以 接收一輸入電壓;一導通元件,具有一控制閘,用以根據 上述輸入電壓以及由上述控制閘所接收的一控制信號而產 生一輸出電壓;一回授電路,用以根據上述輸出電壓而產 生回授號,一能隙電路,用以根據上述輸出電屋而產 生一參考電壓;一放大器,用以根據上述回授信號以及上 述參考電壓而產生一第一信號;以及一起動電路,用以根 據上述參考信號以及上述第一信號而產生上述控制信號。Client's Docket N〇.:VISS003 TTs Docket No:0516-A41215twf/Nikey 1342474 In Figure 1, the reference voltage 1 is produced according to the input voltage ι. Therefore, when the input voltage vin is disturbed by noise, the reference voltage f = to the influence of the noise causes the voltage value of the reference voltage vref to change rr === pressure ^ can not get the desired voltage value. In order to improve (4) the effect (for example, line regulation), the output voltage vj can be connected to the bandgap circuit 11〇 as the supply voltage of the bandgap circuit ιι. Therefore, the reference voltage Vref is not disturbed by the noise of the input voltage v. Ln. However, when the voltage regulator is in the initial state, the voltage V is output. " is a low voltage level, so that the supply voltage of the bandgap circuit 11〇 is too low to enable the gap circuit 1 1 to start operating. Therefore, the reference voltage Vref will remain at the low voltage level and the output voltage v〇ut will remain at the low voltage level. Therefore, when the supply voltage of the bandgap circuit 110 is the output voltage ▽. 111%, which will cause the voltage regulator not to be activated (卩0~叩). Therefore, a startup circuit is needed to solve the above problem. SUMMARY OF THE INVENTION The present invention provides a voltage regulator comprising: an input terminal for receiving an input voltage; a conduction component having a control gate for receiving an input voltage and a control device Controlling the signal to generate an output voltage; a feedback circuit for generating a feedback number according to the output voltage, a bandgap circuit for generating a reference voltage according to the output electric house; an amplifier for The feedback signal and the reference voltage are generated to generate a first signal; and the driving circuit is configured to generate the control signal according to the reference signal and the first signal.

Client's Docket N〇.:V1SS003 rrr*s Docket No:〇516-A41215twf/Nikey 1342474 再者,本發明提供一種電壓調整器,包括:一輸入端, 用以接收一輸入電壓;一導通元件,耦接於上述輸入端以 及一輸出端之間,具有一控制閘以接收一控制信號,並根 據上述控制信號以及上述輸入電壓而輸出一輸出電壓;一 回授電路,用以根據上述輸出電壓而產生一回授信號;一 能隙電路,用以根據上述輸出電壓而產生一參考電壓;一 放大器,用以根據上述回授信號以及上述參考電壓而產生 一第一信號;以及一起動電路,用以產生上述控制信號。 上述起動電路包括一第一電流源,耦接於上述輸入端以及 上述控制閘之間;一第一電晶體,耦接於上述控制閘以及 一節點之間,具有一第一閘極;一第一開關,耦接於上述 節點以及上述輸出端之間;一第二開關,耦接於上述節點 以及一接地端之間;一第三開關,耦接於上述放大器以及 上述第一閘極之間;以及一第四開關,耦接於上述第一閘 極以及上述接地端之間。其中,當上述電壓調整器在初始 狀態時,上述第一、第四開關導通而上述第二、第三開關 不導通,以及當上述電壓調整器在操作狀態時,上述第二、 第三開關導通而上述第一、第四開關不導通。 【實施方式】 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉出較佳實施例,並配合所附圖式,作詳 細說明如下: 實施例:Client's Docket N〇.:V1SS003 rrr*s Docket No:〇516-A41215twf/Nikey 1342474 Furthermore, the present invention provides a voltage regulator comprising: an input terminal for receiving an input voltage; and a conduction component coupled Between the input terminal and an output terminal, there is a control gate for receiving a control signal, and outputting an output voltage according to the control signal and the input voltage; a feedback circuit for generating a voltage according to the output voltage a feedback signal; a bandgap circuit for generating a reference voltage according to the output voltage; an amplifier for generating a first signal according to the feedback signal and the reference voltage; and a driving circuit for generating The above control signal. The starter circuit includes a first current source coupled between the input terminal and the control gate; a first transistor coupled between the control gate and a node, having a first gate; a switch coupled between the node and the output terminal; a second switch coupled between the node and a ground; a third switch coupled between the amplifier and the first gate And a fourth switch coupled between the first gate and the ground. Wherein, when the voltage regulator is in an initial state, the first and fourth switches are turned on and the second and third switches are not turned on, and when the voltage regulator is in an operating state, the second and third switches are turned on. The first and fourth switches are not turned on. The above and other objects, features, and advantages of the present invention will become more fully understood from the <RTIgt

Client’s Docket No.:VISS003 TT5s Docket No:0516-A41215twf/Nikey 7 1342474 第2圖係顯示根據本發明一實施例所述之電壓調整哭 200。電愿調整器2〇〇包括能隙電路21〇、放大器22〇、回 权電路230、導通元件240以及起動電路260。回授電路 230包括電阻扪以及電阻尺2,其中電阻R1係耦接於導通 兀件240,而電阻R2係耦接於電阻R1以及接地端 • 之間。從電壓調整器200之輸入端所接收到的輸入電壓Vin 分別耦接至放大器220、導通元件240以及起動電路26〇^ 其中輸入電壓^^為放大器220以及起動電路26〇的供應 電壓。能隙電路210根據輸出電壓v〇ut而產生參考電壓 Vref&gt;。放大器220接收參考電壓Vref以及回授信號VFB並產 生信號^至起動電路260。放大器220具有負輸入端以及 正輸入端,分別用以接收參考電壓Vref以及回授信號Vfb。 因此,敌大器220係根據回授信號vFB以及參考電壓Vref 之間的误差而產生信號Si。在本發明一實施例中,放大器 220可以是誤差放大器 (error amplifier)。 此外,起動電路260包括電流源L、電流源l2、電晶 »體262、電晶體264、反向器施以及開關η·。電流 源12搞接於輸入電壓Vin,而電晶體262耦接於電流^ ‘以及接地端GND之間。其中,參考電壓耦接至電晶體 262的閘極並控制電晶體262以產生信號心。反向器a% 接收信號s2以產生信號S3。電晶體264㈣於電流源^ 以及開關272之間。開關271係耦接於節點268以及輪出 電壓V〇ut之間,而開關273係耦接於放大器22〇以及電晶 體264的閘極之間,以及開關274係輕接於電晶體冰白曰勺曰Client's Docket No.: VISS003 TT5s Docket No: 0516-A41215twf/Nikey 7 1342474 Fig. 2 shows a voltage adjustment cry 200 according to an embodiment of the present invention. The power regulator 2A includes an energy gap circuit 21A, an amplifier 22A, a return circuit 230, a conduction element 240, and a start circuit 260. The feedback circuit 230 includes a resistor 扪 and a resistor 2, wherein the resistor R1 is coupled to the conductive member 240, and the resistor R2 is coupled between the resistor R1 and the ground terminal. The input voltage Vin received from the input terminal of the voltage regulator 200 is coupled to the amplifier 220, the conducting element 240, and the starting circuit 26, respectively, wherein the input voltage is the supply voltage of the amplifier 220 and the starting circuit 26A. The bandgap circuit 210 generates a reference voltage Vref&gt; based on the output voltage v〇ut. Amplifier 220 receives reference voltage Vref and feedback signal VFB and generates a signal to start circuit 260. The amplifier 220 has a negative input terminal and a positive input terminal for receiving the reference voltage Vref and the feedback signal Vfb, respectively. Therefore, the enemy 220 generates the signal Si based on the error between the feedback signal vFB and the reference voltage Vref. In an embodiment of the invention, amplifier 220 can be an error amplifier. Further, the starting circuit 260 includes a current source L, a current source l2, an electro-optical body 262, a transistor 264, an inverter, and a switch η. The current source 12 is coupled to the input voltage Vin, and the transistor 262 is coupled between the current ^' and the ground GND. The reference voltage is coupled to the gate of the transistor 262 and controls the transistor 262 to generate a signal heart. The inverter a% receives the signal s2 to generate the signal S3. The transistor 264 (d) is between the current source ^ and the switch 272. The switch 271 is coupled between the node 268 and the turn-off voltage V〇ut, and the switch 273 is coupled between the amplifier 22 and the gate of the transistor 264, and the switch 274 is lightly connected to the transistor. Spoon

Client's Docket N〇.;VISS003 TT's Docket No:0516-A41215twf/Nikey 8 1342474 閘T以及接地端GND之間。其中,開關271以及開關274 的導通與不導通係由信號&amp;所控制,而開關272以及開關 273的‘通與不導通係由信號&amp;所控制。起動電路根 據麥考電壓Vref以及信號S〗而產生控制信號Vg,其中控制 信號Vg耦接至導通元件24〇的控制閘。導通元件24〇根據 輸入電壓vln以及控制信號%而產生輸出電壓v〇ut’其中 導通το件240為P型金氧半導體(metal 〇xide semiconductor,MOS)電晶體。在本發明一實施例中,導 通元件240可以是PNP雙極性(bip〇lar)電晶體。回授電 路230耦接於導通元件240 (即電壓調整器200之輸出端) 以及接地端GND之間,並根據輸出電壓vout而產生回授 信號VFB。 舉例來說’當輸入電壓V in的電壓位準為零時,電壓調 整器200中全部信號的電壓位準皆為零。在初始狀態中, 當輸入電壓Vin開始上升時,導通元件240的控制閘仍維 持在低電壓位準,使得導通元件240的閘極對源極電壓增 加,即控制閘的電壓對輸入電壓Vin的電壓差。接著,輸 入電壓Vin繼續增加。當導通元件240的閘極對源極電壓 大於臨界電壓(threshold voltage)時,輸入電壓Vin會透 過導通元件240對負載電路250進行充電,則輸出電壓Vout 將增加。然而,實際上,輸出電壓ν_的電壓值太小而無 法啟動能隙電路210,使得參考電壓Vref仍然維持在低電 壓位準而無法使電晶體262導通,因此信號S2變成為高電 壓位準。當信號S2為高電壓位準時,經由反向器266,則Client's Docket N〇.;VISS003 TT's Docket No:0516-A41215twf/Nikey 8 1342474 Between the gate T and the ground GND. The conduction and non-conduction of the switch 271 and the switch 274 are controlled by the signal &amp; and the "on and off" of the switch 272 and the switch 273 are controlled by the signal &amp; The starting circuit generates a control signal Vg according to the McCaw voltage Vref and the signal S, wherein the control signal Vg is coupled to the control gate of the conducting element 24A. The conducting element 24A generates an output voltage v〇ut' according to the input voltage vln and the control signal %, wherein the conducting member 240 is a P-type metal oxide semiconductor (MOS) transistor. In an embodiment of the invention, the conductive element 240 can be a PNP bipolar transistor. The feedback circuit 230 is coupled between the conduction element 240 (ie, the output of the voltage regulator 200) and the ground GND, and generates a feedback signal VFB according to the output voltage vout. For example, when the voltage level of the input voltage V in is zero, the voltage levels of all signals in the voltage regulator 200 are all zero. In the initial state, when the input voltage Vin starts to rise, the control gate of the conduction element 240 remains at the low voltage level, so that the gate-to-source voltage of the conduction element 240 increases, that is, the voltage of the control gate to the input voltage Vin Voltage difference. Then, the input voltage Vin continues to increase. When the gate-to-source voltage of the pass element 240 is greater than the threshold voltage, the input voltage Vin charges the load circuit 250 through the pass element 240, and the output voltage Vout will increase. However, in practice, the voltage value of the output voltage ν_ is too small to activate the bandgap circuit 210, so that the reference voltage Vref is still maintained at a low voltage level and the transistor 262 cannot be turned on, so the signal S2 becomes a high voltage level. . When the signal S2 is at a high voltage level, via the inverter 266, then

Client's Docket N〇.:VISS003 TT's Docket No:0516-A41215twi/Nikey ~變為低電壓位準。 號s再者,信號S2控制開關271以及開關274導通,而信 導通3控制間關272以及開關273不導通。由於開關273不 260。敌大益220所輸出的信號Sl不會被傳送到起動電路 性連4而由於開關271導通,電壓調整器200的輸出端將電 的門妾至節點268。再者,由於開關274導通,電晶體264 曰-極被導通至接地端GND,因此電晶體264導通。當電 264以及開關271都導通時,輸入電壓透過電流 、1以及連接成二極體的導通元件240對負載電路250進 行充電。 ' 、接著,輸出電壓Vcut逐漸增加,使得能隙電路21〇能 被啟,,以產生參考電壓Vref。當參考電壓vref到達想要 的電壓值時,電晶體262將會導通。因此,信號s2會變為 低電壓位準’而信號S3會變為高電壓位準。同時,信號 ~控制開關271以及開關274不導通,而信號S3控制開關 272以及開關273導通。因此’經由開關273,放大器220 所輸出的信號S!將被傳送到起動電路260以產生控制信號 Vg。其中,電晶體264可配置成源極隨耦電路( source follower circuit)或是緩衝電路(buffer circuit)。最後, 能隙電路210、放大器220、回授電路230、導通元件240 以及起動電路260形成一回饋迴路(feedback loop)以調 整輸出電壓Vout。其中,輸出電壓vout等於p + 。因 此,電壓調整器200可根據參考電壓Vref以及電阻R1與電 阻R2的比例而產生輸出電壓vout。Client's Docket N〇.:VISS003 TT's Docket No:0516-A41215twi/Nikey ~ becomes a low voltage level. Further, the signal S2 controls the switch 271 and the switch 274 to be turned on, and the signal conduction 3 controls the switch 272 and the switch 273 to be non-conductive. Since the switch 273 is not 260. The signal Sl output by the enemy Da 220 is not transmitted to the start circuit connection 4, and since the switch 271 is turned on, the output of the voltage regulator 200 will be powered to the node 268. Furthermore, since the switch 274 is turned on, the transistor 264 is turned on to the ground GND, so the transistor 264 is turned on. When both the power 264 and the switch 271 are turned on, the input voltage is passed through the current, 1 and the pass element 240 connected to the diode to charge the load circuit 250. Then, the output voltage Vcut is gradually increased, so that the bandgap circuit 21 can be turned on to generate the reference voltage Vref. When the reference voltage vref reaches the desired voltage value, the transistor 262 will be turned on. Therefore, the signal s2 will become a low voltage level and the signal S3 will become a high voltage level. At the same time, the signal ~ control switch 271 and the switch 274 are not turned on, and the signal S3 controls the switch 272 and the switch 273 to be turned on. Thus, via switch 273, the signal S! output by amplifier 220 will be passed to start circuit 260 to produce control signal Vg. The transistor 264 can be configured as a source follower circuit or a buffer circuit. Finally, the bandgap circuit 210, the amplifier 220, the feedback circuit 230, the pass element 240, and the start circuit 260 form a feedback loop to adjust the output voltage Vout. Wherein, the output voltage vout is equal to p + . Therefore, the voltage regulator 200 can generate the output voltage vout according to the reference voltage Vref and the ratio of the resistor R1 to the resistor R2.

Client's Docket N〇.:VISS003 TT's Docket No:0516-A41215twf/Nikey 10 1342474 如第2圖所顯示,電晶體262以及電晶體264分別為 NMOS電晶體以及PMOS電晶體。此外,開關272以及開 關274可以是NMOS電晶體。 在本發明實施例中,當電壓調整器200在初始狀態 時,開關271以及開關274導通而開關272以及開關273 不導通。輸入電壓Vin透過電流源L、電晶體264與開關 271以及透過連接成二極體的導通元件240對電壓調整器 200的輸出端進行充電。當輸出電壓乂_具有足夠的電壓 值可啟動能隙電路210時(即電壓調整器200在操作狀 態),開關271以及開關274不導通而開關272以及開關 273導通。因此,電壓調整器200將形成回饋迴路以調整 出所設計之輸出電壓Vout的電壓值。 本發明雖以較佳實施例揭露如上,然其並非用以限定 本發明的範圍,任何熟習此項技藝者,在不脫離本發明之 精神和範圍内,當可做些許的更動與潤飾,因此本發明之 保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 第1圖係顯示示傳統低壓降電壓調整器;以及 第2圖係顯示根據本發明一實施例所述之電壓調整 器。 【主要元件符號說明】 100、200〜電壓調整器 110、210〜能隙電路 120、220〜放大器 130、230〜回授電路Client's Docket N〇.:VISS003 TT's Docket No:0516-A41215twf/Nikey 10 1342474 As shown in Fig. 2, the transistor 262 and the transistor 264 are an NMOS transistor and a PMOS transistor, respectively. Additionally, switch 272 and switch 274 can be NMOS transistors. In the embodiment of the present invention, when the voltage regulator 200 is in the initial state, the switch 271 and the switch 274 are turned on and the switch 272 and the switch 273 are not turned on. The input voltage Vin is supplied to the output terminal of the voltage regulator 200 through the current source L, the transistor 264 and the switch 271, and through the conduction element 240 connected to the diode. When the output voltage 乂_ has a sufficient voltage value to activate the bandgap circuit 210 (i.e., the voltage regulator 200 is in an operational state), the switch 271 and the switch 274 are not conducting and the switch 272 and the switch 273 are turned on. Therefore, voltage regulator 200 will form a feedback loop to adjust the voltage value of the designed output voltage Vout. The present invention has been described above with reference to the preferred embodiments thereof, and is not intended to limit the scope of the present invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a view showing a conventional low-dropout voltage regulator; and Fig. 2 is a view showing a voltage regulator according to an embodiment of the present invention. [Main component symbol description] 100, 200~ voltage regulator 110, 210~ bandgap circuit 120, 220~ amplifier 130, 230~ feedback circuit

Client's Docket N〇.:VISS003 TT’s Docket No:0516-A41215twf/Nikey i 】 1342474 140、240〜導通元件 150、250〜負載電路 260〜起動電路 262、264〜電晶體 266〜反向器 268〜節點 271-274〜開關 GND〜接地端 II、〜電流源 Rl、R2〜電阻 S】、S2、S3〜信號 VFB〜回授信號 Vg〜控制信號 vm〜輸入電壓 〜輸出電壓 Vref〜參考電壓Client's Docket N〇.:VISS003 TT's Docket No:0516-A41215twf/Nikey i 】 1342474 140, 240~ conduction element 150, 250~ load circuit 260~ start circuit 262, 264~ transistor 266~ reverser 268~ node 271 -274~Switch GND~ Ground Terminal II, ~ Current Source Rl, R2~Resistor S], S2, S3~Signal VFB~Responsive Signal Vg~Control Signal vm~Input Voltage~Output Voltage Vref~Reference Voltage

Client’s Docket No.:VISS003 TT's Docket No:0516-A41215twf/NikeyClient’s Docket No.:VISS003 TT's Docket No:0516-A41215twf/Nikey

Claims (1)

1342474 案號096131206 99年12月15日 修正本 十、申請專利範圍: 1. 一種電壓調整器,包括: 一輸入端’用以接收一輸入電壓; 一導通元件,具有一控制閘,用以根據上述輸入電壓 以及由上述控制閘所接收的一控制信號而產生一輪出電 壓; 一回授電路,用以根據上述輸出電壓而產生一回授俨 號; 又0 一能隙電路,用以根據上述輸出電壓而產生一表考 壓; / 一放大器,用以根據上述回授信號以及上述參考電壓 而產生一第一信號;以及 一起動電路,用以根據上述參考信號以及上述第—信 號而產生上述控制信號。 2. 如申凊專利範圍第1項所述之電壓調整器,其中上 述導通元件為PMOS電晶體以及PNP雙極性電晶體之一 者。 3. 如申凊專利範圍第1項所述之電壓調整器,其中上 述回授電路係耦接於上述導通元件以及一接地端之間。 、1如申請專利範圍第3項所述之電壓調整器,其令上 ^回授電路具有—第—電阻以及—第二電阻,以及上述第 電阻係輕接於上述導通元件,而上述第二電阻係麵接於 上述第一電阻以及上述接地端之間。 如申明專利範圍第4項所述之電壓調整器,其中上 VlSSO〇3/〇5i6.A4,2l5twfi 13424741342474 Case No. 096131206 Revised December 15, 1999, the scope of the patent application: 1. A voltage regulator comprising: an input terminal 'for receiving an input voltage; a conduction component having a control gate for The input voltage and a control signal received by the control gate generate a round-out voltage; a feedback circuit for generating a feedback signal according to the output voltage; and a 0-gap circuit for Outputting a voltage to generate a meter test pressure; / an amplifier for generating a first signal according to the feedback signal and the reference voltage; and a driving circuit for generating the above according to the reference signal and the first signal control signal. 2. The voltage regulator of claim 1, wherein the conductive element is one of a PMOS transistor and a PNP bipolar transistor. 3. The voltage regulator of claim 1, wherein the feedback circuit is coupled between the conductive element and a ground. 1. The voltage regulator according to claim 3, wherein the upper feedback circuit has a first resistance and a second resistance, and the first resistance is lightly connected to the conduction element, and the second The resistor is connected between the first resistor and the ground. A voltage regulator as claimed in claim 4, wherein the upper VlSSO〇3/〇5i6.A4, 2l5twfi 1342474 述電壓調整器係根據上述參考信號以及上述第一電阻與第 二電阻的比例而產生上述輸出電壓。 6. 如申請專利範圍第1項所述之電壓調整器,其中上 述放大器包括一正輸入端以及一負輸入端,分別用以接收 上述回授信號以及上述參考電壓。 7. 如申請專利範圍第6項所述之電壓調整器,其中上 述放大器係根據上述回授信號以及上述參考電壓的一誤差 而產生上述第一信號。 、 8. 如申請專利範圍第7項所述之電壓調整器,其中上 述放大器為誤差放大器。 9. 如申請專利範圍第丨項所述之電壓調整器,其中上 述起動電路包括: 一第一電流源,耦接於上述輸入端以及上述控制閘之 間; 一第二電流源,耦接於上述輸入端; 一第一電晶體,耦接於上述第二電流源以及一接地端 之間’用以輸出—第二信號,以及具有-第-閘極用以接 收上述參考信號; 一反向器,用以接收上述第二信號而產生一第三信號; 第一電晶體,耦接於上述第一電流源以及一節點之 間’具有一第二閘極; -第三電晶體’耦接於上述節點以及上述接地端之 間’具有-第三閘極以接收上述第三信號; 第四電晶體’ _接於上述第二閘極以及上述接地端 VISS003/0516*A41215twfl 14 ?Q vft替換頁i 之間二具有一第四閘極以接收上述第二信號; 間 間 呈第開關,麵接於上述節點以及上述輸出電壓之 ^有一第-控制端以接收上述第二信號;以及 一第二開關,耦接於上述第二閘極以及 具有-第二控制端以接收上述第三信號。 &quot;之 10.如申δ月專利範圍第9項所述之電壓調整器,其中當 t述第-開關導通時,上述第二開關不導通,以及當上ς 第-開關導通時,上述第—開關不導通。 …η.如申請專利範圍第9項所述之電壓調整器,其中上 述第,電晶體為PMOS電晶體,以及上述第一電晶體、上 述第二電晶體與上述第四電晶體為NMOS電晶體。 12. —種電壓調整器,包括: 一輸入端,用以接收一輸入電壓; 一導通元件,耦接於上述輸入端以及一輸出端之間, 具有一控制閘以接收一控制信號,並根據上述控制信號以 及上述輸入電壓而輸出一輸出電壓; 一回授電路,用以根據上述輸出電壓而產生一回授 號; ° 一能隙電路,用以根據上述輸出電壓而產生一參考電 壓; &gt; 一放大器,用以根據上述回授信號以及上述參考電壓 而產生一第一信號;以及 一起動電路,用以產生上述控制信號,包括 第一電流源,麵接於上述輸入端以及上述控制 VISS003/0516-Α41215twfl 1342474 ---------1 年月日修正替換I, 199, ί ή I 閘之間; 一第一電晶體,耦接於上述控制閘以及一節點之 間,具有一第一閘極; 一第一開關,耦接於上述節點以及上述輸出端之 間; 一第二開關,耦接於上述節點以及一接地端之間; ' 一第三開關,耦接於上述放大器以及上述第一閘 極之間;以及 • 一第四開關,耦接於上述第一閘極以及上述接地 端之間, 其中,當上述電壓調整器在初始狀態時,上述第一、 • 第四開關導通而上述第二、第三開關不導通,以及當上述 . 電壓調整器在操作狀態時,上述第二、第三開關導通而上 述第一、第四開關不導通。 13. 如申請專利範圍第12項所述之電壓調整器,其申 上述導通元件為PMOS電晶體以及ΡΝΡ雙極性電晶體之一 籲者。 14. 如申請專利範圍第12項所述之電壓調整器,其中 上述第一電晶體為PMOS電晶體。 15. 如申請專利範圍第12項所述之電壓調整器,其中 上述回授電路係耦接於上述輸出端以及上述接地端之間。 16. 如申請專利範圍第15項所述之電壓調整器,其中 上述回授電路具有一第一電阻以及一第二電阻,以及上述 第一電阻係耦接於上述輸出端,而上述第二電阻係耦接於 VISS003/0516-A41215twfl 16 1342474 … :41¾界爾丨 上述第一電阻以及上述接地端之間。 .......- Η.如申請專利範圍第16項所述之電壓調整器,其中 上述電壓調整器係根據上述參考信號以及上述第一電阻與 第一電阻的比例而產生上述輸出電壓。 18.如申請專利範圍第12項所述之電壓調整器,其中 上述放大器包括一正輸入端以及一負輸入端,分別用以接 收上述回授信號以及上述參考電壓。 如申請專利範圍第a項所述之電壓調整器,其中 上述放大器係根據上述回授信號以及上述參考電壓的一誤 差而產生上述第一信號。 20.如申請專利範圍第19項所述之電壓調整器,其中 上述放大器為誤差放大器。 21如申請專利範圍第12項所述之電壓調整器,其中 上述起動電路根據上述參考電壓而控制上述第一、第二、 第三以及第四開關。 22. 如申請專利範圍第Η項所述之電壓調整器,其中 上述起動電路更包括: 一第二電流源’耦接於上述輸入端;以及 一第二電晶體,耦接於上述第二電流源以及上述接地 端之間,具有一第二閘極耦接至上述參考電壓, 其中’上述起動電路根據上述參考電壓而產生一第二 信號以控制上述第一、第四開關。 23. 如申請專利範圍第22項所述之電壓調整器,其中 上述起動電路更包括一反向器,用以根據上述第二信號而 VISS003/0516-A4121 $twfl 17 1342474The voltage regulator generates the output voltage based on the reference signal and a ratio of the first resistor to the second resistor. 6. The voltage regulator of claim 1, wherein the amplifier comprises a positive input terminal and a negative input terminal for receiving the feedback signal and the reference voltage. 7. The voltage regulator of claim 6, wherein the amplifier generates the first signal based on the feedback signal and an error of the reference voltage. 8. The voltage regulator of claim 7, wherein the amplifier is an error amplifier. 9. The voltage regulator of claim 2, wherein the starting circuit comprises: a first current source coupled between the input terminal and the control gate; and a second current source coupled to The first input transistor; a first transistor coupled between the second current source and a ground terminal for outputting a second signal, and having a -th gate for receiving the reference signal; The second transistor is configured to receive the second signal to generate a third signal; the first transistor is coupled between the first current source and a node to have a second gate; the third transistor is coupled Between the above node and the ground terminal, 'having a third gate to receive the third signal; a fourth transistor ' _ connected to the second gate and the ground terminal VISS003/0516*A41215twfl 14 ?Q vft replacement Between the pages i, a fourth gate has a fourth gate for receiving the second signal; a first switch is disposed between the node and the output voltage, and has a first control terminal for receiving the second signal; and a Second switch coupled to the second gate, and having - a second control terminal for receiving said third signal. [10] The voltage regulator according to claim 9, wherein when the first switch is turned on, the second switch is not turned on, and when the upper switch is turned on, the foregoing - The switch is not conducting. The voltage regulator according to claim 9, wherein the first transistor is a PMOS transistor, and the first transistor, the second transistor, and the fourth transistor are NMOS transistors. . 12. A voltage regulator comprising: an input for receiving an input voltage; a conducting component coupled between the input and an output, having a control gate for receiving a control signal, and The control signal and the input voltage output an output voltage; a feedback circuit for generating a back according to the output voltage; a bandgap circuit for generating a reference voltage according to the output voltage; &gt An amplifier for generating a first signal according to the feedback signal and the reference voltage; and a driving circuit for generating the control signal, comprising a first current source, being connected to the input end, and the control VISS003 /0516-Α41215twfl 1342474 ---------1 year and month to replace the replacement I, 199, ί I between the gates; a first transistor coupled between the above control gate and a node, a first switch coupled between the node and the output; a second switch coupled to the node and a ground a third switch coupled between the amplifier and the first gate; and a fourth switch coupled between the first gate and the ground, wherein the voltage regulator In the initial state, the first, fourth switch is turned on and the second and third switches are not turned on, and when the voltage regulator is in the operating state, the second and third switches are turned on and the first The fourth switch is not conducting. 13. The voltage regulator of claim 12, wherein the conducting component is a PMOS transistor and a ΡΝΡ bipolar transistor. 14. The voltage regulator of claim 12, wherein the first transistor is a PMOS transistor. 15. The voltage regulator of claim 12, wherein the feedback circuit is coupled between the output terminal and the ground terminal. 16. The voltage regulator of claim 15, wherein the feedback circuit has a first resistor and a second resistor, and the first resistor is coupled to the output terminal, and the second resistor The system is coupled between the first resistor and the ground terminal of the VISS003/0516-A41215twfl 16 1342474 ... : 413⁄4B. The voltage regulator according to claim 16, wherein the voltage regulator generates the output voltage according to the reference signal and a ratio of the first resistor to the first resistor . 18. The voltage regulator of claim 12, wherein the amplifier comprises a positive input terminal and a negative input terminal for receiving the feedback signal and the reference voltage, respectively. The voltage regulator of claim a, wherein the amplifier generates the first signal based on the feedback signal and an error of the reference voltage. 20. The voltage regulator of claim 19, wherein the amplifier is an error amplifier. The voltage regulator according to claim 12, wherein the starting circuit controls the first, second, third and fourth switches in accordance with the reference voltage. The voltage regulator of claim 2, wherein the starting circuit further comprises: a second current source 'coupled to the input end; and a second transistor coupled to the second current A second gate is coupled between the source and the grounding terminal to the reference voltage, wherein the starting circuit generates a second signal to control the first and fourth switches according to the reference voltage. 23. The voltage regulator of claim 22, wherein the starting circuit further comprises an inverter for VISS003/0516-A4121 $twfl 17 1342474 according to the second signal. 產生一第三信號以控制上述第二、第三開關。 24.如申請專利範圍第22項所述之電壓調整器,其中 上述第二電晶體為NMOS電晶體。 VISS003/0516-A41215twfl 18A third signal is generated to control the second and third switches. 24. The voltage regulator of claim 22, wherein the second transistor is an NMOS transistor. VISS003/0516-A41215twfl 18
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Publication number Priority date Publication date Assignee Title
TWI573005B (en) * 2015-05-13 2017-03-01 晶豪科技股份有限公司 Low drop output voltage regulator and output buffer including low drop output voltage regulator

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US8502514B2 (en) 2010-09-10 2013-08-06 Himax Technologies Limited Voltage regulation circuit
TWI411902B (en) * 2010-09-27 2013-10-11 Himax Tech Ltd Voltage regulation circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI573005B (en) * 2015-05-13 2017-03-01 晶豪科技股份有限公司 Low drop output voltage regulator and output buffer including low drop output voltage regulator

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