1336111 P950239 22550twf.doc/006 九、發明說明： ‘ 【發明所屬之技術領域】 本發明是有關於一種電晶體元件的製造方法，且特別 是有關於一種臨場修補電漿損害基底的方法。 【先前技術】 由於積體電路產業的蓬勃發展’元件的積集度也隨之 a益提高。在這樣的趨勢之下’如何避免元件微縮所導致 % 的短通道效應’以及元件間彼此緊鄰所造成的漏電與短路 等問題，一直是業界研究的重點。 一般來說，為了讓相鄰電晶體的閘極可以隔離開來， 閘極的兩側會設置有間隙壁(Spacer)。而且，間隙壁也可以 用來作為形成t €體之_/祕㈣雜(heavy doping) 罩幕。以目則的製程進程看來，間隙壁已經可以稱得上是 母個電晶體的必備構件之一了。 迄今常見的間隙壁形成作法為，先在已經形成閘極的 f底上沈積-層_壁材料層。然後，在電㈣刻反應腔 室中’進行非等向性餘刻製程。非等向性姓刻製程的原理 為’對於基底所在的基板施以偏壓，此偏壓會吸引帶正電 的離子並且使其加速，而後義擊基底，以去除部分間隙壁 t料層並於閘極的侧壁形成-關隙壁。然而，電漿侧 衣权部也同時伴隨著_些問題，其中之一就是電漿損害 (plasma damage)的發生。 電聚飯刻的特性就是以高能量粒子轟擊基底，這些粒 子除了大部分帶正電的離子之外，還包括了微量的紫外光 5 P950239 22550twf.doc/〇〇5 二合二射。當這些具有高能量的粒子撞擊基底時’ ϊ基表面並且會對元件特性造成魅。因此，如 塑害的基底’使得電晶體效能所受到的影 響降到敢低，是值得研究的問題。 【發明内容】 =發=的目的就是在提供—種臨場修補錢損害基底 41=:法可以用來移除在間隙壁形成的過程當中， 又到电漿轟擊而受損的基底表面。 體元件的製造 的基底表面， 本發明的另—目的就是在提供一種電晶 方法，此方法可以修整受到電漿轟擊而損害 以確保電晶體元件的效能。 本發明提出-種臨場修補電漿财基底的方法，此方 法適用已形成構件，且形成此構件的步驟包括-含電漿之 ^钱刻衣程。此方法包括，在進行主似彳製程之機台進行 軟式電漿侧製程，轉除部份基底。軟式電_刻製程 所使用之電力為低於戰之該含德之絲刻製程 力。 依照本發明的實施例所述之臨場修補電聚損害基底的 方法’上，之軟式電漿蝕刻製程是用以形成間“。依照 本發明的實施例所狀臨場修㈣聚損害基底的方法，: 述之間隙壁之材質包括—氧化/^或氮化⑦且上述之軟式 漿蝕刻製程所使用之電力例如是50至150w。 依照本發明的實施例所述之臨場修補電漿損宏美底 方法，其中該主侧製程是用以形成·結構且^式電 1336111 P950239 22550twf.doc/006 裝钱刻製程較狀電力為G至蕭。 依照本發明的實施例所 方法，上述之軟式電讓钱刻製 讓損害基底的 物、氧氣與惰性氣體。 的氣體例如是氟化 依的實施例所述之臨場修 方去’上述之氟化物例如是氟烴化物。成基底的 依照本發明的實施例所述之臨場 方法，上述之氟煙化物例如是咖= 貝告基底的 方法^述之氣烴化物的流量範圍例如基底的 方法之臨場修補電漿損害基底的 範圍例如是30〜50s_。 方法所述之臨場修補電浆損害基底的 在上述之惰性氣體例如是氬氣。 - 依，本發明的實施例所述之臨場修補電聚損害基底的 太级述之乳氣的流量範圍例如是100〜200sccm。 括下提Γ種電晶體""件的製造方法，此方法包 結提!基底。然後，於基底上形成閘極 之側壁形成：漿之主韻刻製程於問極結構 杆仙=3氣或氧化石夕的間隙壁。之後，在進 底Λ機台進行軟式電衆钱刻製程，以移除部份基 列，式電水钱刻製程所使用之電力為低於鳩之該主 刻製程之電力。繼之，於基底上形成源極Λ及極區。 依照本發明的實施例所述之電晶體元件的製造方法， 7 1336111 P950239 22550twf.doc/006 上述之軟式電漿蝕刻製程所使用之電力例如是5〇 150W。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之軟式電漿蝕刻製程所使用的氣體例如是氟化物、 氣與惰性氣體。 依照本發明的實施例所述之電晶體元件製造方 上述之氟化物例如是氟烴化物。 衣 依照本發明的實施例所述之電晶體元件的製造方法， 上述之氟烴化物例如是CJ?4、CHF>3 ' CH2F2或。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之氟烴化物的流量範圍例如是piOsccm。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之氧氣的流量範圍例如是3〇〜5〇sccm。 、依照本發明的實施例所述之電晶體元件的製造方法， 上述之惰性氣體例如是氬氣。 依照本發明的實施例所述之電晶體元件的製造方法， 上述之氬氣的流量範圍例如是1〇〇〜2〇〇sccm。 本，明利用軟式電驗刻製程來移除於贿壁蚀刻製程 番曰又觸害的基底表面’以確保經過接續製程後所形成的 電曰曰體元件可以具有高可#性與的效能。 為讓本發明之上述和其他目的、特徵和優點能更明顯 下文特舉只施例，並配合所附圖式，作詳細說明如 下0 【實施方式】 8 P950239 22550twf.d〇c/〇〇6 圖1A至圖ic是依照本發明實施例所繪示之電晶體元 件的製造流程剖面示意圖。 請參照圖1Α，提供基底100，基底100例如是矽基底 或其他合適之半導體材料。然後，於基底100上形成閘極 結構102。閘極結構1〇2是由閘介電層1〇4與閘極導體層 所組成。在一實施例中’閘介電層1〇4之材質例如^ 氧化矽；閘極導體層106例如是由多晶矽層與金屬矽化物 層所組成。上述，閘極結構102的形成方法例如是，先在 基底100上形成氧化矽材料層（未繪示），其形成方法例如 是熱氧化法。然後，在氧化材料層上先後形成多晶矽材料 層（未繪示)與金屬矽化物材料層（未繪示）。接著，進行微影 製权與餘刻製程，以圖案化氧化材料層、多晶石夕材料層與 金屬矽化物材料層，而分別形成閘介電層1〇4與閘極導體 層 106。 再來’請參照圖1Β，於閘極結構1〇2之側壁形成一對 間隙壁108。間隙壁1〇8的材質例如是二氧化矽或是氮化 石夕。間隙壁108的形成方法例如是先在基底1〇〇上形成一 層間隙壁材料層（未繪示）。間隙壁材料層的形成方法例如 是化學氣相沉積法。繼之’移除部份間隙壁材料層，以於 閘極結構102之側壁形成一對間隙壁108。移除部份間隙 壁材料層的方法例如是進行非等向性主蝕刻製程。其中， 非等向性蝕刻製程例如是電漿蝕刻製程。舉例來說，電衆 钱刻製程的步驟例如是，首先，將基底100置於電衆麵刻 反應腔室（未繪示）中，然後，對基底1〇〇施加偏壓，以於 P950239 22550twf.d〇c/006 反應，室内形成一外加電場。電漿當中帶正電的離子，會 f為這個與基底1GG相垂直的電場的驅動以及加速，而義 辇基底100。部份間隙壁材料層因此被移除而形成間隙壁 Γ/ί—實施例中’間隙壁材料層之材質為氧化石夕；反應 =例如是氟烴化物如CF4、CHF3、舰，或卿、氧 =2)以及雜氣體如氬氣之混合氣體；電 _ 瓦(W);壓力為10毫托。 門隙，除了可以是單層結構外，在-實施例中， =::=是雙層的結構’例如是由氧切補償間 卻也同時破壞;=戶=面=，上述的編刻製程 吸晨Γ基底100表面的原子鍵結，使得邱柃 = 的電漿損害，尤其是：= 中，在形成間隙壁心^ :::110的移除方法例如是進行軟式電 :伤二 工“水餘刻製程是指對基底10 :玉人 漿蝕刻製程中所使用的雷六、〜衣：二微的蝕刻。軟式電 ⑽之姓刻力的電在力餘刻形成間隙壁 程所使用的電力二 =例中，軟式電漿蝕刻製程所使用 7力。在一實 用的電力範圍：艺，=中瓦=電3刻製程所使 製財所使用的反應氣體例如是含有稀薄 P950239 22550twf.doc/006 氣體如氟化物、氧氣以及惰氣所混合的氣體，或是氧氣以 及惰氣所混合的氣體。氟化物例如是氟烴化物氣體，例如 疋CF4、CHF3、CHJ2或CH#。惰氣可以是氬氣。軟式電 漿姓刻製程的壓力係大於先前钱刻形成間隙壁之姓刻 製程者，以減少轟擊基底1〇〇之粒子的方向性。在一實施 例當中，氟烴化物氣體的流量範圍例如是beseem ;氧氣 的，量範圍例如是在30〜50Sccm之間；氬氣的流量範圍例 如疋在100〜200sccm之間；其壓力為100毫托至2〇〇毫托。 由於在形成間隙壁108的钱刻步驟中，未被閘極結構 所覆盍的部伤基底表面HQ會受到電漿的.轟擊而受到 才貝害，此軟式電漿蝕刻製程即可以輕微蝕刻基底表面 110，以移除受損的基絲面HO，確保後續製程完成的電 f2件效能以及可靠度。此外，值得一提的是，此乾式 程與賴_壁⑽的倾，是在同—麵刻反應 t虽中完成。如此的設計’―方面可以降低製程的成本， =面也避免了“在各解導體設備之_運送過程 受微塵粒子等不潔物污染的可能性β 接著，於基底1〇〇上形成源極/没極區112 如是進行離子植入製程。後續完成ϊ 曰曰體;°件之製程為習知技術者所周知，在此不再贅述。 軌m时糊巾’ 随製歡魏行軟式雷 並不二=漿=之軟式電_製程 刻形成_構之主 1336111 P950239 22550twf.doc/006 $只把例巾’軟式電驗刻製 %之主蝕刻製程之畲士 ^ ^ 』电刀疋低於川 程所+ θ力。在一貝施例尹，軟式電漿蝕刻製 疋吻收之主姓刻製程之電力。在一實 瓦之5式/^刻製程所使用的電力範圍例如是在 如^財所使_反應氣體例 a疋3有稀㈣統物的混合氣體如氟化物、氧氣以及惰1336111 P950239 22550twf.doc/006 IX. Description of the invention: ‘Technical field to which the invention pertains. The present invention relates to a method of fabricating a transistor element, and more particularly to a method of repairing a substrate by repairing a plasma. [Prior Art] Due to the booming development of the integrated circuit industry, the degree of integration of components has also increased. Under such a trend, how to avoid the short channel effect caused by component shrinkage and the leakage and short circuit caused by the close proximity of components have been the focus of industry research. Generally, in order to isolate the gates of adjacent transistors, spacers (Spacers) are provided on both sides of the gate. Moreover, the spacers can also be used as a hood/heavy doping mask. According to the process of the process, the spacers can already be regarded as one of the necessary components of the mother transistor. A conventional method of forming a spacer is to deposit a layer of a layer of material on the bottom of the f which has formed a gate. Then, an anisotropic remnant process is performed in the electric (four) etching chamber. The principle of the anisotropic process is to 'bias the substrate on which the substrate is placed. This bias attracts the positively charged ions and accelerates them, and then the base is removed to remove part of the spacers. A sidewall is formed on the sidewall of the gate. However, the plasma sidewear department is also accompanied by some problems, one of which is the occurrence of plasma damage. The characteristic of electric rice engraving is to bombard the substrate with high-energy particles. In addition to most of the positively charged ions, these particles also contain trace amounts of ultraviolet light. 5 P950239 22550twf.doc/〇〇5 Two-in-two. When these high-energy particles hit the substrate, they ’ the surface of the ruthenium and cause fascination with the characteristics of the component. Therefore, it is worthwhile to study the fact that the substrate of plastic damage has reduced the impact on the performance of the transistor to a low level. SUMMARY OF THE INVENTION The purpose of === is to provide a kind of on-site repair money damage base 41=: The method can be used to remove the surface of the substrate damaged by the plasma bombardment during the formation of the spacer. The surface of the substrate from which the body member is fabricated, another object of the present invention is to provide an electro-crystallization method which can be trimmed by plasma bombardment to ensure the effectiveness of the crystal element. SUMMARY OF THE INVENTION The present invention provides a method of repairing a plasma substrate, which is applicable to formed components, and the step of forming the member includes a plasma-containing process. The method includes performing a soft plasma side process on a machine that performs a main process, and removing a portion of the substrate. The power used in the soft electric engraving process is lower than that of the war. According to the method for repairing the electro-polymer damage substrate according to the embodiment of the present invention, the soft plasma etching process is used to form a method. According to the embodiment of the present invention, the method for damaging the substrate is performed. The material of the spacer includes - oxidizing / nitriding or nitriding 7 and the power used in the soft etch process described above is, for example, 50 to 150 W. The method for repairing the plasma damage macroscopic method according to the embodiment of the present invention , wherein the main side process is used to form a structure and the electric power is 1336111 P950239 22550twf.doc/006. The method of charging the process is G to Xiao. According to the method of the embodiment of the present invention, the above soft electric money is made. The gas which is etched to damage the substrate, the oxygen and the inert gas is, for example, the fluorinated embodiment described above. The above-mentioned fluoride is, for example, a fluorocarbon. The substrate is in accordance with an embodiment of the present invention. In the method of the present invention, the above-mentioned fluorine smog compound is, for example, a flow rate range of a gas hydrocarbon compound described in the method of the base material, for example, a method of repairing the plasma damage substrate by the method of the substrate. It is 30~50s_. The method described in the present invention repairs the plasma damage to the substrate in the above-mentioned inert gas, such as argon gas. - According to the embodiment of the present invention, the on-site repair electropolymerization damages the base of the milk. The flow rate range is, for example, 100 to 200 sccm. The method for manufacturing a transistor "" is provided, and the method is applied to the substrate. Then, the sidewall of the gate is formed on the substrate: the main charm of the slurry The process is to ask the pole structure of the pole structure = 3 gas or oxidized stone. After that, the soft-cutting process is carried out on the bottom-feeding machine to remove some of the base columns, and the electric water-curing process is used. The electric power is lower than the electric power of the main engraving process. Then, the source crucible and the polar region are formed on the substrate. The method for manufacturing the transistor element according to the embodiment of the invention, 7 1336111 P950239 22550twf.doc /006 The electric power used in the soft plasma etching process is, for example, 5 〇 150 W. According to the method of manufacturing the transistor device according to the embodiment of the present invention, the gas used in the soft plasma etching process is, for example, fluoride. Gas and inertia The above-mentioned fluoride is, for example, a fluorocarbonate. The method for producing a crystal element according to an embodiment of the present invention, the above-mentioned fluorocarbon compound, for example. It is CJ?4, CHF>3'CH2F2 or. According to the manufacturing method of the transistor element according to the embodiment of the present invention, the flow rate range of the above fluorocarbonate is, for example, piOsccm. The electricity according to the embodiment of the present invention In the method of producing a crystal element, the flow rate of the oxygen gas is, for example, 3 〇 to 5 〇 sccm. According to the method for producing a transistor element according to the embodiment of the present invention, the inert gas is, for example, argon. According to the method of manufacturing a transistor according to the embodiment of the present invention, the flow rate of the argon gas is, for example, 1 〇〇 to 2 〇〇 sccm. Ben, Ming uses a soft electro-engraving process to remove the surface of the substrate that is affected by the brittle wall etching process to ensure that the electrical body components formed after the subsequent process can have high performance. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the accompanying claims. 1A to 1 are schematic cross-sectional views showing a manufacturing process of a transistor element according to an embodiment of the invention. Referring to Figure 1, a substrate 100 is provided, such as a germanium substrate or other suitable semiconductor material. Then, a gate structure 102 is formed on the substrate 100. The gate structure 1〇2 is composed of a gate dielectric layer 1〇4 and a gate conductor layer. In one embodiment, the material of the gate dielectric layer 1〇4 is, for example, yttrium oxide; the gate conductor layer 106 is composed of, for example, a polysilicon layer and a metal halide layer. As described above, the gate structure 102 is formed by, for example, forming a ruthenium oxide material layer (not shown) on the substrate 100, and the formation method is, for example, a thermal oxidation method. Then, a polycrystalline germanium material layer (not shown) and a metal telluride material layer (not shown) are successively formed on the oxidized material layer. Next, a lithography and a remnant process are performed to pattern the oxidized material layer, the polycrystalline material layer and the metal hydride material layer to form the thyristor layer 〇4 and the gate conductor layer 106, respectively. Referring again to Fig. 1A, a pair of spacers 108 are formed on the side walls of the gate structure 1〇2. The material of the spacer 1 8 is, for example, cerium oxide or cerium nitride. The spacer 108 is formed by, for example, forming a layer of spacer material (not shown) on the substrate 1A. The method of forming the spacer material layer is, for example, a chemical vapor deposition method. A portion of the spacer material layer is then removed to form a pair of spacers 108 on the sidewalls of the gate structure 102. The method of removing a portion of the spacer material layer is, for example, an anisotropic main etching process. The anisotropic etching process is, for example, a plasma etching process. For example, the step of the electric power engraving process is, for example, first, the substrate 100 is placed in a power engraving reaction chamber (not shown), and then the substrate 1 is biased to P950239 22550twf. .d〇c/006 reacts to form an applied electric field in the chamber. The positively charged ions in the plasma will f drive and accelerate the electric field perpendicular to the substrate 1GG, and the substrate 100. Part of the spacer material layer is thus removed to form a spacer Γ/ί—in the embodiment, the material of the spacer material layer is oxidized oxide; the reaction = for example, a fluorocarbon such as CF4, CHF3, ship, or qing, Oxygen = 2) and a mixed gas of a heterogas such as argon; electricity _ watt (W); pressure is 10 mTorr. In addition to the single-layer structure, in the embodiment, =::= is a two-layer structure', for example, it is also destroyed by oxygen-cutting compensation; = household = surface =, the above-mentioned engraving process Absorbing the atomic bonds on the surface of the base 100, causing the plasma damage of Qiu柃 =, especially: =, in the formation of the gap wall ^ ::: 110 removal method is for example: soft electric: injury two The water remnant process refers to the etching of the ray six, ~ clothing: two micro-wiring used in the substrate 10: jade pulp etching process. The electric power of the soft electric (10) is used to form the gap wall process. In the second power example, the soft plasma etching process uses 7 forces. In a practical power range: art, = medium watts = electric 3 etch process, the reaction gas used for making money is, for example, containing a thin P950239 22550twf.doc /006 A gas such as a mixture of fluoride, oxygen, and inert gas, or a mixture of oxygen and inert gas. The fluoride is, for example, a fluorocarbon gas such as 疋CF4, CHF3, CHJ2 or CH#. It is argon. The pressure system of the soft plasma surname process is larger than the previous money formation. The name of the wall is engraved to reduce the directionality of the particles hitting the substrate. In one embodiment, the flow rate of the fluorocarbon gas is, for example, beseem; the amount of oxygen is, for example, between 30 and 50 Sccm. The flow rate of argon gas is, for example, between 100 and 200 sccm; the pressure is from 100 mTorr to 2 Torr. Due to the portion of the gap forming the spacer 108, the portion not covered by the gate structure The HQ of the damaged substrate surface is subjected to the impact of the plasma. The soft plasma etching process can slightly etch the substrate surface 110 to remove the damaged base surface HO, ensuring the electrical process of the subsequent process. Efficiency and reliability. In addition, it is worth mentioning that the drying process and the walling of the wall (10) are completed in the same-surface reaction t. This design can reduce the cost of the process. It is also avoided that "the process of transporting the respective conductors is contaminated by impurities such as dust particles. Next, the source/no-pole region 112 is formed on the substrate 1 to perform an ion implantation process. Subsequent completion of the 曰曰 body; ° part of the process is well known to those skilled in the art, and will not be repeated here. When the rail m is a paste towel' with the soft-lei of the Wei-Wei line is not two = pulp = soft electric _ process engraving formation _ the main body 1336111 P950239 22550twf.doc / 006 $ only the case towel 'soft type inspection engraving% The master etch process gentleman ^ ^ 』 electric knife 疋 lower than the Chuan Cheng + θ force. In a case of Yin, the soft plasma etching system is used to seal the power of the main name. The range of electric power used in a real-type 5/^ engraving process is, for example, a mixed gas such as fluoride, oxygen, and inert in the case of a chemical gas such as a reaction gas.
St的^體，或是氧氣以及惰氣所混合的氣體。氟化 ，例如疋氣煙化物氣體，例如是CF4、CHF3、CH2f2或 H3F。惰乳可以是氬氣。軟式電漿敍刻製程的壓力係大於 先前形成祕結構之絲㈣程者，喊少縣基底腦 it子的方向性。在—實施例當中，氟烴化物氣體的流量 =圍例如{ 1〜10sccm ; Λ氣的流量範圍例如是在 50sccm之間，氯氣的流量範圍例如是在刚〜細sccm 之間；其壓力為100毫托至2〇〇毫托。 本發明之電晶體元件的製造方法，係以軟式電祕刻 製程修補於閘極結構或間隙壁製程中所造成之破損基底表 面，以確保經過後續製程所完成的電晶體元件效能不受影 響0 、此外，由於修補基底的電漿蝕刻製程與閘極結構蝕刻 或間隙壁形成製程係於同一個電漿蝕刻反應腔室當中即可 先後完成’因此，可以節省製程成本。 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何熟習此技藝者，在不脫離本發明之精神和範 圍内，當可作些許之更動與潤傅，因此本發明之保護範圍 12 1336111 P950239 22550twf.doc/006 當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1A至圖1C是依照本發明實施例所繪示之電晶體元 件的製造流程剖面示意圖。 【主要元件符號說明】 100 .基底 102 :閘極結構The body of St, or the gas mixed with oxygen and inert gas. Fluoride, such as a helium gas, is, for example, CF4, CHF3, CH2f2 or H3F. The inertia may be argon. The pressure system of the soft plasma engraving process is larger than that of the silk (4) that previously formed the secret structure, and the direction of the sub-brain of the Shaoxian County is called. In the embodiment, the flow rate of the fluorocarbon gas is, for example, {1 to 10 sccm; the flow rate of the helium gas is, for example, between 50 sccm, and the flow rate of the chlorine gas is, for example, between just and fine sccm; the pressure is 100. Motto to 2 〇〇 mTorr. The method for manufacturing the transistor component of the present invention repairs the surface of the damaged substrate caused by the gate structure or the spacer process by a soft electric engraving process to ensure that the performance of the transistor component completed by the subsequent process is not affected. In addition, since the plasma etching process of the repair substrate and the gate structure etching or the spacer formation process are completed in the same plasma etching reaction chamber, the process cost can be saved. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and those skilled in the art can make some modifications and inferiority without departing from the spirit and scope of the present invention. Scope of protection 12 1336111 P950239 22550twf.doc/006 The person defined in the scope of the patent application is subject to change. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A to FIG. 1C are schematic cross-sectional views showing a manufacturing process of a transistor element according to an embodiment of the invention. [Main component symbol description] 100. Substrate 102: Gate structure
104 :閘介電層 106:閘極導體層 108 :間隙壁 110 :受損之基底表面 112 :源極/汲極104: gate dielectric layer 106: gate conductor layer 108: spacer 110: damaged substrate surface 112: source/drain
1313