1332257 九、發明說明： .【發明所屬之技術領域】 本發明提供一種靜電放電防護電路及其製造方法。 【先前技術】 靜電放電（Electro Static Discharge，ESD)是造成大多 數電子元件或者電子系統受到過度電性應力（Electrical Overstress, EOS)破壞的主要因素。靜電放電可能會對半導 體元件等形成永久性的毁壞，因此影響積體電路之電路功 能，而使得電子產品工作不正常。而靜電放電的產生，一 般在於電子元件或系統在製造、生産、組裝、測試、存放 或搬運過程中，靜電會累積在人體、儀器或儲放設備之内， 甚至電子元件本身也會有靜電的積累。當人體、儀器或儲 放設備與電子元件之間接觸時，將會形成一靜電放電路 徑，使得電子元件或系統遭到不可預期之損害。為了防護 靜電放電電流對電子元件所造成之損害，採用靜電放電防 護電路（Electro Static Discharge Protection Circuit)得以實 現。 請參閲圖1，其係一種先前技術具有傳統靜電放電防 護電路的液晶顯示器的示意圖。該液晶顯示器1包括具一 定間距平行分佈之複數掃描線12、與該掃描線12垂直且 相互平行分佈之複數資料線13。圖中虛線區域11為顯示 區域，該顯示區域11周邊分佈有公共電極14。每一掃描 線12與公共電極14之間及每一資料線13與公共電極14 之間均設置有一靜電放電防護電路10。 6 1332257 * 請參閱圖2，其係圖1所示液晶顯示器之靜電放電防 -護電路示意圖。該靜電放電防護電路10設置於一第一電源 線101及一第二電源線102之間。該第一電源線101及該 第二電源線102可為圖1中的掃描線12與公共電極14， 或者資料線13與公共電極14。該靜電放電防護電路10包 括一靜電放電電路110、一第一控制電路120及一第二控 制電路130。該第二控制電路130與第一控制電路120串 _聯，該第一控制電路120包括一場效電晶體121，該場效 電晶體121之閘極及汲極相連，該第二控制電路13〇包括 一場效電晶體131，該場效電晶體131之閘極及汲極相連。 該靜電放電電路110包括一場效電晶體111，該場效電晶 體111之源極與該場效電晶體121之閘極及汲極相連，並 且一併連接至該第一電源線101，該場效電晶體U1之没 極與該場效電晶體131之閘極及汲極相連，並且一併連接 至該第一電源線10 2，該場效電晶體111之閘極與場效電 春晶體121及場效電晶體1；31之源極相連。 當該第一電源線101與第二電源線102之間電位差超 過第一控制電路120或第二控制電路13〇所設定之電位差1332257 IX. Description of the invention: [Technical field to which the invention pertains] The present invention provides an electrostatic discharge protection circuit and a method of manufacturing the same. [Prior Art] Electrostatic Discharge (ESD) is a major factor causing damage to most electronic components or electronic systems due to Electrical Overstress (EOS). Electrostatic discharge may permanently damage semiconductor components and the like, thus affecting the circuit function of the integrated circuit, which makes the electronic product work abnormally. The generation of electrostatic discharge is generally caused by the accumulation of static electricity in the human body, instrument or storage device during the manufacture, production, assembly, testing, storage or handling of electronic components or systems. Even the electronic components themselves may have static electricity. accumulation. When a human body, instrument or storage device is in contact with an electronic component, an electrostatic discharge circuit path is formed, causing unpredictable damage to the electronic component or system. In order to protect the electronic components from damage caused by the electrostatic discharge current, an Electro Static Discharge Protection Circuit can be used. Please refer to Fig. 1, which is a schematic diagram of a prior art liquid crystal display having a conventional electrostatic discharge protection circuit. The liquid crystal display 1 includes a plurality of scanning lines 12 arranged in parallel at a predetermined interval, and a plurality of data lines 13 perpendicular to the scanning lines 12 and distributed in parallel with each other. The dotted line area 11 in the figure is a display area, and the common electrode 14 is distributed around the display area 11. An electrostatic discharge protection circuit 10 is disposed between each of the scan lines 12 and the common electrode 14 and between each of the data lines 13 and the common electrode 14. 6 1332257 * Please refer to FIG. 2 , which is a schematic diagram of the electrostatic discharge protection circuit of the liquid crystal display shown in FIG. 1 . The ESD protection circuit 10 is disposed between a first power line 101 and a second power line 102. The first power line 101 and the second power line 102 can be the scan line 12 and the common electrode 14, or the data line 13 and the common electrode 14 in FIG. The ESD protection circuit 10 includes an ESD circuit 110, a first control circuit 120, and a second control circuit 130. The second control circuit 130 is coupled to the first control circuit 120. The first control circuit 120 includes a field effect transistor 121. The gate of the field effect transistor 121 is connected to the drain, and the second control circuit 13〇 A potential transistor 131 is included, and the gate and drain of the field effect transistor 131 are connected. The ESD circuit 110 includes a field effect transistor 111. The source of the field effect transistor 111 is connected to the gate and the drain of the field effect transistor 121, and is connected to the first power line 101. The gate of the effect transistor U1 is connected to the gate and the drain of the field effect transistor 131, and is also connected to the first power line 102. The gate of the field effect transistor 111 and the field effect spring crystal 121 and the source of the field effect transistor 1; 31 are connected. When the potential difference between the first power line 101 and the second power line 102 exceeds the potential difference set by the first control circuit 120 or the second control circuit 13?
時，該場效電晶體in開啓，電荷藉由該場效電晶體1U 釋放。因此’無論是來自外界的靜電電壓或者電子元件本 身之瞬間靜電高壓都可由靜電放電防護電路10進行電荷 釋放。 何 惟’該靜電放電防護電路10存在如下缺點：其進行電 荷釋放時無顯示信息’因此無法確定發生靜電放電之時間 7 1332257 ..【發明内容】 有鑑於此’有必要提供一種具有顯示功能之靜電放電 防護電路。同時有必要提供一種上述靜電放電防護電路之 製造方法。 一種靜電放電防護電路，其包括一矽基板、一鐵薄膜、 一納米碳管層及一透明遮罩，該鐵薄膜及該奈米碳管層依 次層疊設置於該矽基板表面，該透明遮罩收容該鐵薄膜及 該奈米碳官層並與該矽基板密封，該透明遮罩的内表面塗 覆有螢光粉。 一種靜電放電防護電路的製造方法，其包括以下步 驟v驟a.提供-石夕基板；步驟b.應用物理氣相沉積法於 該石夕基板的表面沉積一鐵薄膜；步驟c.依所需靜電放電防 護電路的形狀，對該鐵薄膜進行银刻圖案化；步驟d.應用 化學氣相沉積法於該鐵薄膜上形成奈米碳管詹；步驟e.切 # ^ ’使切割後的每—塊#基板均包括―鐵薄膜及 ::反S層’步驟f.提供-透明遮罩；步驟g.在透明遮 f内表面沈積塗佈螢光粉，然後將該透明遮罩與石夕基板密 種靜電放電JI方蹲雷，々 隻電路的製造方法，其包括 IS ο 4曰 μ 驟：步驟a.提供—矽基 … ' 重摻雜磷Μ等施主元^ .於财基板的—表面上 施主摻雜層表面應用物理/成施主摻雜層；步驟C·於該 該鋁薄膜·牛鉀^ 礼相沉積法沉積铭金屬層以形成 步驟d.應用物理氣相沉積法於該石夕基板的另一 8 1332257 表面上沉積-鐵薄膜；步驟e.依所需靜電放電防護電路的 -形狀’對該鐵薄膜進行钱刻圖案化；步驟f.應用化學氣相 •沉積法於該鐵薄膜上形成奈米碳管層；步驟g.切割該石夕 基，，使切割後的每一塊石夕基板均包括一鐵薄膜及一奈米 石反吕層’步驟h.提供一透明遮罩；步驟L在透明遮罩内表 面沈積塗佈營光粉，然後將該透明遮罩與石夕基板密封。 相較於先前技術，本發明靜電放電防護電路將瞬間打 修進來的鬲壓靜電利用場發射效應釋放掉，利用場發射效應 激發出可見光，靜電放電能量轉換為光能量，同時能得知 何時發生尚壓靜電放電，即可以利用軟體監控靜電放電發 生的時間點，進而回溯靜電放電發生的原因，以改善靜電 放電所帶來的傷害。 【實施方式】 請參閱圖3,其係本發明靜電放電防護電路的第一實 施方式之剖面示意圖。該靜電放電防護電路2〇包括一矽基 鲁板201、一鐵薄膜202、一奈米碳管層2〇3及一透明遮罩 204。該鐵薄膜202及該奈米碳管層203依次層疊設置於該 石夕基板201表面’該鐵薄膜202及該奈米碳管層2〇3之面 積略小於該矽基板201之面積，該奈米碳管層2〇3係由複 數沉積於該鐵薄膜202表面之奈米碳管構成。該透明遮罩 204收容該鐵薄膜202及該奈米碳管層203並與該矽基板 201密封，該透明遮罩204的表面呈弧形，該透明遮罩204 的内表面均勻塗覆有螢光粉205。 該靜電放電防護電路20可在液晶顯示器中使用，尤其 9 1332257 適合在液晶顯示器的製造過程中使用，例如陣列製程 (Array)及模組製程（Module)等等。在使用時，只需將有靜 電產生的部位與該靜電放電防護電路20電連接即可。 當液晶顯示器在使用或製造過程中有靜電產生且靜電 放電發生時，這些靜電放電發生的部位將瞬間產生的高壓 打到靜電放電防護電路20，激發電子束（Electr〇J1Beam)& 奈米碳管尖端場發射（Field Emission)，轟擊營光粉205使 其發出可見光，電子束紫外線能量轉換成可見光能量，靜 •電放電能量因而釋放。並且可利用軟體監控記錄靜電放電 發生的時間點，回溯靜電放電發生的原因，進而改善靜電 放電所帶來的傷害。由於場發射需達到一定的阈值電壓 (Threshold Voltage)才會發生’因此平時狀態並不會發生場 發射，也不會發出可見光。 請參閲圖5，其係本發明靜電放電防護電路的第二實 施方式之剖面示意圖。該靜電放電防護電路3〇與第一實施 鲁方式的靜電放電防護電路2〇大致相同，其區別在於：該石夕 基板201與該鐵薄膜202相背的另一表面上依次層疊設置 一施主摻雜層307及一鋁薄膜308，該鋁薄膜308及該施 主摻雜層307與該矽基板201的面積相同。該施主摻雜層 307及該鋁薄膜308起到了降低該矽基板201的電阻值的 作用’因此該第二實施方式的靜電放電防護電路3〇的閾值 電壓低於第一實施方式。 該第一實施方式的靜電放電防護電路20的製造方法 包括以下步驟： 1332257 •步驟a .提供一矽基板201。 .·步驟b .應用物理氣相沉積法於該矽基板201的表面 沉積一鐵薄獏202。 一步驟c.依所需靜電放電防護電路2〇之形狀，對該鐵 薄膜202進行餘刻圖案化。 /驟d .應用化學氣相沉積法於該鐵薄膜上通入 甲燒（CH4 )、氫氣（& )及氮氣（N2 )。有以下化學反應 籲發生.CH4+H2=C+3H2，反應生成之碳元素於該鐵薄膜 2〇2 f面上生長成為複數奈米碳管，最後形成奈米碳管層 2〇3。氮氣的作用是增大化學反應速度及保證奈米碳管生長 過程中具有良好的取向性。 步驟e :切割該矽基板2〇1，使切割後的每一矽基板 2〇1均包括一鐵薄膜2〇2及一奈米碳管層2〇3。 步驟f:提供一透明遮罩204,該透明遮罩2〇4為塑膠 射出透明遮罩或玻璃加熱衝壓透明遮罩。該透明遮罩2〇4 鲁的表面呈弧形。 步驟g :在該透明遮罩204的内表面沈積塗佈螢光粉 2〇5，然後將該透明遮罩204與該矽基板2〇1密封。 乃 該第二實施方式的靜電放電防護電路3〇的製造方法 與上述步驟大致相同，其區別在於：在步驟a與步 間還包括以下步驟： 步驟h:於該矽基板201的一表面上重摻雜磷或砷 施主元素，形成施主摻雜層3〇7。 步驟i:於該施主摻雜層307表面應用物理氣相;厂 1月 11 1332257 法沉積鋁金屬以形成鋁薄膜308，使得該鋁薄臈308與該 f夕基板201實現歐姆接觸。 • 其中’步驟b中該鐵薄膜202沉積在該矽基板201的 另一表面上。 相較於先前技術’本發明靜電放電防護電路2〇、3〇 將瞬間打進來的高壓靜電利用場發射效應釋放掉。利用場 發射效應激發出可見光，靜電放電能量轉換為光能量，從 春而能得知何時發生高壓靜電放電，即可以利用軟體監控靜 電放電發生的時間點’進而回溯靜電放電發生的原因，以 改善靜電放電所帶來的傷害。 综上所述’本創作確已符合發明專利之要件，麦依法 提出申請專利。惟’以上所述者僅係本發明之較佳實施方 式’本發明之範圍並不以上述實施方式爲限，舉凡熟習本 案技藝之人士援依本發明之精神所作之等效修飾或變化， 皆應涵蓋於以下申請專利範圍内。 籲【圖式簡單說明】 圖1係一種先前技術具有傳統靜電放電防護電路的液晶顯 示器的示意圖。 圖2係圖1所示液晶顯示器之靜電放電防護電路示意圖。 圖3係本發明靜電放電防護電路的第一實施方式之剖面示 意圖。 圖4係本發明靜電放電防護電路的第二實施方式之剖面示 意圖。 12 1332257 【主要元件符號說明】 靜電放電防護電路 20 靜電放電防護電路 30 Ϊ夕基板 201 螢光粉 205 鐵薄膜 202 施主摻雜層 307 奈米碳管層 203 鋁薄膜 308 透明遮罩 204At this time, the field effect transistor is turned on, and the charge is released by the field effect transistor 1U. Therefore, either the electrostatic voltage from the outside or the instantaneous electrostatic high voltage of the electronic component itself can be discharged by the electrostatic discharge protection circuit 10. How the 'electrostatic discharge protection circuit 10 has the following disadvantages: there is no display information when the charge is discharged', so it is impossible to determine the time at which the electrostatic discharge occurs 7 1332257. [Invention] In view of this, it is necessary to provide a display function. Electrostatic discharge protection circuit. At the same time, it is necessary to provide a method of manufacturing the above electrostatic discharge protection circuit. An electrostatic discharge protection circuit comprising a substrate, an iron film, a carbon nanotube layer and a transparent mask, wherein the iron film and the carbon nanotube layer are sequentially stacked on the surface of the substrate, the transparent mask The iron film and the carbon carbon layer are housed and sealed with the crucible substrate, and the inner surface of the transparent mask is coated with phosphor powder. A method for manufacturing an electrostatic discharge protection circuit, comprising the steps of: a. providing - a stone substrate; step b. applying a physical vapor deposition method to deposit an iron film on the surface of the substrate; step c. The shape of the electrostatic discharge protection circuit, the silver film is patterned by silver etching; step d. forming a carbon nanotube on the iron film by chemical vapor deposition; step e. cutting #^ 'make each cut - Block # substrate includes "iron film and:: anti-S layer" step f. provide - transparent mask; step g. deposit coating phosphor on the inner surface of the transparent mask, and then the transparent mask and Shi Xi Substrate close-type electrostatic discharge JI Fang Lei, the manufacturing method of the circuit only, including IS ο 4曰μ Step: Step a. Provide - 矽 base... 'Heavily doped phosphorus Μ and other donor elements ^. Applying a physical/doped donor doping layer on the surface of the donor doping layer on the surface; Step C· depositing the inscribed metal layer on the aluminum thin film, bovine potassium, and phase deposition to form a step d. applying physical vapor deposition to the stone a thin film of iron is deposited on the surface of another 8 1332257 substrate; step e. The shape of the electric discharge protection circuit is shaped to describe the iron film; step f. applying a chemical vapor deposition method to form a carbon nanotube layer on the iron film; and step g. cutting the stone base, Having each of the slabs after the cutting includes an iron film and a nano-small layer of the reverse layer. [Step h. providing a transparent mask; step L depositing a coating varnish on the inner surface of the transparent mask, and then The transparent mask is sealed with the Shishi substrate. Compared with the prior art, the electrostatic discharge protection circuit of the present invention releases the instantaneous static electricity from the field emission effect, and uses the field emission effect to excite visible light, and the electrostatic discharge energy is converted into light energy, and at the same time, it can be known when it occurs. Still electrostatic discharge, that is, the software can be used to monitor the time point of electrostatic discharge, and then the cause of electrostatic discharge can be traced back to improve the damage caused by electrostatic discharge. [Embodiment] Please refer to Fig. 3, which is a cross-sectional view showing a first embodiment of the electrostatic discharge protection circuit of the present invention. The ESD protection circuit 2 includes a ruthenium plate 201, an iron film 202, a carbon nanotube layer 2〇3, and a transparent mask 204. The iron film 202 and the carbon nanotube layer 203 are sequentially stacked on the surface of the stone substrate 201. The area of the iron film 202 and the carbon nanotube layer 2〇3 is slightly smaller than the area of the germanium substrate 201. The carbon nanotube layer 2〇3 is composed of a plurality of carbon nanotubes deposited on the surface of the iron film 202. The transparent mask 204 receives the iron film 202 and the carbon nanotube layer 203 and is sealed with the ruthenium substrate 201. The surface of the transparent mask 204 is curved, and the inner surface of the transparent mask 204 is evenly coated with arsenal. Light powder 205. The ESD protection circuit 20 can be used in a liquid crystal display, especially 9 1332257, which is suitable for use in the manufacturing process of a liquid crystal display, such as an array process (Array) and a module process (Module). In use, it is only necessary to electrically connect the portion where the static electricity is generated to the electrostatic discharge protection circuit 20. When static electricity is generated during the use or manufacturing process of the liquid crystal display and electrostatic discharge occurs, the portion where the electrostatic discharge occurs generates an instantaneous high voltage to the electrostatic discharge protection circuit 20, and the electron beam (Electr〇J1Beam)& The field Emission of the tube bombards the camping powder 205 to emit visible light, and the electron beam ultraviolet energy is converted into visible light energy, and the static electric discharge energy is released. Moreover, software monitoring can be used to record the time at which the electrostatic discharge occurs, and the cause of the electrostatic discharge can be traced back, thereby improving the damage caused by the electrostatic discharge. Since the field emission needs to reach a certain threshold voltage (Threshold Voltage), it will not occur. Therefore, the field emission will not occur and the visible light will not be emitted. Referring to Figure 5, there is shown a cross-sectional view of a second embodiment of the electrostatic discharge protection circuit of the present invention. The ESD protection circuit 3〇 is substantially the same as the ESD protection circuit 2〇 of the first embodiment, and the difference is that the other surface of the X-ray substrate 201 opposite to the iron film 202 is sequentially stacked with a donor doping. The impurity layer 307 and an aluminum film 308, the aluminum film 308 and the donor doping layer 307 have the same area as the germanium substrate 201. The donor doping layer 307 and the aluminum thin film 308 function to lower the resistance value of the germanium substrate 201. Therefore, the threshold voltage of the electrostatic discharge protection circuit 3A of the second embodiment is lower than that of the first embodiment. The method of manufacturing the ESD protection circuit 20 of the first embodiment includes the following steps: 1332257 • Step a. A substrate 201 is provided. Step b. An iron thin crucible 202 is deposited on the surface of the tantalum substrate 201 by physical vapor deposition. A step c. The iron film 202 is patterned in the shape of the desired electrostatic discharge protection circuit 2'. /Step d. A chemical vapor deposition method is used to introduce a methane (CH4), a hydrogen (&), and a nitrogen (N2) onto the iron film. The following chemical reaction is called. CH4+H2=C+3H2, and the carbon element formed by the reaction grows into a plurality of carbon nanotubes on the surface of the iron film 2〇2 f, and finally forms a carbon nanotube layer 2〇3. The role of nitrogen is to increase the chemical reaction rate and ensure good orientation during the growth of the carbon nanotubes. Step e: cutting the tantalum substrate 2〇1 so that each of the tantalum substrates 2〇1 after cutting includes an iron thin film 2〇2 and a carbon nanotube layer 2〇3. Step f: providing a transparent mask 204, which is a plastic injection transparent mask or a glass heated stamping transparent mask. The surface of the transparent mask 2〇4 Lu is curved. Step g: depositing a coating phosphor 2〇5 on the inner surface of the transparent mask 204, and then sealing the transparent mask 204 with the crucible substrate 2〇1. The manufacturing method of the ESD protection circuit 3A of the second embodiment is substantially the same as the above steps, and the difference is that the step is further included between the steps a and the steps: Step h: Heavy on a surface of the crucible substrate 201 The phosphorus or arsenic donor element is doped to form a donor doped layer 3〇7. Step i: applying a physical gas phase to the surface of the donor doping layer 307; the aluminum alloy 308 is deposited by the factory on January 11 1332257 to form an aluminum thin film 308, so that the aluminum thin crucible 308 is in ohmic contact with the substrate 201. • wherein the iron film 202 is deposited on the other surface of the ruthenium substrate 201 in step b. The high-voltage static electricity that is instantaneously injected is released by the field emission effect as compared with the prior art 'electrostatic discharge protection circuit 2〇, 3〇 of the present invention. The field emission effect is used to excite visible light, and the electrostatic discharge energy is converted into light energy. From the spring, it can be known when high-voltage electrostatic discharge occurs, that is, the software can be used to monitor the time point at which the electrostatic discharge occurs, thereby reversing the cause of the electrostatic discharge to improve. Damage caused by electrostatic discharge. In summary, this creation has indeed met the requirements of the invention patent, and Mai filed a patent application. It is to be understood that the foregoing description of the preferred embodiments of the present invention are not intended to It should be covered by the following patent application. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic view of a prior art liquid crystal display having a conventional electrostatic discharge protection circuit. 2 is a schematic diagram of an electrostatic discharge protection circuit of the liquid crystal display shown in FIG. 1. Fig. 3 is a cross-sectional view showing a first embodiment of the electrostatic discharge protection circuit of the present invention. Fig. 4 is a cross-sectional view showing a second embodiment of the electrostatic discharge protection circuit of the present invention. 12 1332257 [Description of main components] Electrostatic discharge protection circuit 20 Electrostatic discharge protection circuit 30 基板 基板 substrate 201 Fluorescent powder 205 Iron film 202 Donor doping layer 307 Carbon nanotube layer 203 Aluminum film 308 Transparent mask 204
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