TWI332212B - Semiconductor memory device with temperature sensing device - Google Patents

Semiconductor memory device with temperature sensing device Download PDF

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Publication number
TWI332212B
TWI332212B TW096100337A TW96100337A TWI332212B TW I332212 B TWI332212 B TW I332212B TW 096100337 A TW096100337 A TW 096100337A TW 96100337 A TW96100337 A TW 96100337A TW I332212 B TWI332212 B TW I332212B
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signal
output
thermal sensor
temperature
unit
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TW096100337A
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TW200739579A (en
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Kyung-Hoon Kim
Patrick B Moran
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Hynix Semiconductor Inc
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/04—Arrangements for writing information into, or reading information out from, a digital store with means for avoiding disturbances due to temperature effects
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406—Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40626—Temperature related aspects of refresh operations
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4072—Circuits for initialization, powering up or down, clearing memory or presetting
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/20—Memory cell initialisation circuits, e.g. when powering up or down, memory clear, latent image memory

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)

Description

1332212 九、發明說明： 【發明所屬之技術領域】 本發明係關於一種半導體記憶體裝置；且更明確地說， 係關於具有溫度感測裝置之半導體記憶體裝置。 【先前技術】 半導體記憶體裝置大體上具備用於儲存資料的複數個單 元’其中每一單元包括一用於切換至傳輸電荷之電晶體及 :用於儲存電荷（亦即，資料）之電容器。術語，資料儲存，在 單位單元中意謂電荷積聚於電容器中之情況β因此，原則 上有可能在無任何電功率消耗的情況下將資料儲存於單位 單元中。 不良地，自MOS電晶體與電容器之ρΝ接面產生漏電 机著時間的前進，所儲存之初始電荷的量減少且資料 σ肖失因此，為了防止資料丟失，在讀取儲存於單元中 資料的操作後，需要根據讀取資料以初始電荷來對單元 進行再充電。 藉由週期性地重複再充電操作來保存儲存於記憶體之單 ^單7L中的資料。再充電操作通常被稱為再新操作。再新 操作由動態隨機存取記憶體（DRAM)控制器控制。為了再 新操作，DRAM週期性地消耗電功率。因為需要低電功率 消耗，所以在諸如包括筆記型電腦、pDA或蜂巢式電話之 仃動裝置的電池操作系統中如何減小電功率消耗為 的問題。 需要用於精確地感測DRAM中之溫度且輸出所感測之資 H7570.doc 1332212 置。作為在再新操作期間減小電功率消耗之方法中 者，通常執行根據溫度來改變 度降低時，可在裸作之週期在溫 …、’、之，月況下在dram中將資料保 先’判定複數個溫度範圍。接著，在低溫度範 :内…於控制再新操作的低頻率再新時脈。再新時脈 在再新操作中致能的信號。因此，因為再新操作係在 低溫下以較小頻率來執行的’所以電功率消耗減少。 隨著半導體記憶體裝置之整合速率或操作速度增加，半 導體記憶體裝置產生更多熱。熱使半導體記憶體裝置之内 部溫度增加’且影響正常操作。因此’需要用於精確地感 測DRAM内之溫度且輸出所感測資訊的裝置，亦即’熱感 測器。 圖1為在半導體記憶體裝置中之一習知熱感測器的方塊 圖。該熱感測器包括一溫度感測單元1〇、一多用途暫存器 (MPR)單元20及一輸出驅動器3〇。溫度感測單元1〇感測溫 φ 度以回應於驅動信號〇DTS_EN。儲存溫度感測單元10之輸 出信號TM_VAL[0:N]之MPR單元20輸出所儲存之值 MPR[0:N]以回應於一輸出啟動信號rd_〇dtS。輸出驅動 器30輸出溫度信號ODTS—DT[0:N]。 圖2為圖1 _描述之MPR單元20之示意電路圖。MPR單元 20包括用於將輸出信號TM_VAL[0:N]儲存於位元單元中之 複數個鎖存單元。該複數個鎖存單元具有大體上相同的結 構。描述一鎖存單元。 _ 第一鎖存單元包括一鎖存器22及一傳輸閘TG1。鎖存器 117570.doc 1332212 22鎖存輸出信號TM_VAL[0:N]。傳輸閘TG1傳輸鎖存器22 之輸出資料以回應於輸出啟動信號RD_ODTS。 圖3為用於描述圖1所示之熱感測器之操作的時序圖。信 號TEMP之值（亦即，T ' T+1等等）表示半導體記憶體裝置 内部的當前溫度。 溫度感測單元10感測估計為T度的當前溫度以回應於第 [N]個驅動信號〇DT_EN[N]。MPR單元20將溫度感測單元 之輸出k號儲存為第[N]個溫度值。在輸出信號自溫度 感測單元10被輸入之前，MPR單元20已將先前輸出信號儲 存為第[N-1]個溫度值。 在第[N]個驅動信號之輸入時序後的預定時間時，輸入 輸出啟動信號RD_ODT。MPR單元20輸出所儲存之值 MPR[N]以回應於輸出啟動信號RDJDDT。輸出驅動器30輸 出表示T度之溫度信號ODTS_DT[N] » 雖然熱感測器輸出估計為T度的當前溫度，但半導體記 憶體裝置之溫度已自T度改變至（丁+2)度。熱感測器實際上 不可表示半導體記憶體裝置之當前溫度。 根據電子裝置工程聯合委員會（JEDEC)之規範，在裝.置 之溫度小於85°C度時，需要以64 ms之週期來執行再新操 作。在裝置之溫度大於85°C度時，需要以32 ms之週期來 執行再新操作。' 在MPR單元20將第[N]個溫度值儲存為83°C度且當前溫 度增加使得超過85°C度時，熱感測器輸出表示83°C度之溫 度h说ODTS—DT[N]。以64 ms之週期來執行矣新操作。然 117570.doc < S > 山 2212 而，當前溫度實際上超過85t度，且需要以32 ms之週期 .來執行再新操作。歸因於不適當的再新操作，資料可丢 失。 在輸入隨後之驅動信號之前，熱感測器保持儲存於 ocr _ 早7^之/Ja度值。習知熱感測器不可精確地表示半導體記 憶體裝置之溫度改變。 ° 【發明内容】 φ 根據本發明之半導體記憶體裝置之熱感測器感測裝置之 备則溫度且確認溫度值是否有效。 根據本發明之一實施例’熱感測器包括：一溫度感測單 兀，其用於感測溫度以回應於驅動信號；一儲存單元，其 用於儲存溫度感測單元之輸出信號且輸出溫度值；及一初 °早几’其用於在自驅動信號之啟動開始的預定時間後 初始化儲存單元。 ， 根據本發明之另一實施例，半導體記憶體裝置之一驅動 • 方法包括驅動熱感測器以回應於驅動信號，在自驅動信號 之啟動開始的預定時間後請求再次驅動，及再次驅動熱感 測器以再次回應於驅動信號輸入。 【實施方式】 在自其驅動之時序開始經過預定時間後，根據本發明之 半導體記憶體裝置之熱感測器輸出一對於再次驅動的請求 乜號熱感測器在預定時間時經由再次驅動來感測半導體 記隐體裝置之溫度。半導體記憶體裝置穩定地執行與溫度 有關之操作，諸如再新操作。藉此改良半導體記憶體裝置 117570.doc 1332212 之可靠性。 在下文中，將參看附圖來詳細描述根據本發明之半導體 記憶體裝置。 圖4為根據本發明之半導體記憶體裝置中之熱感測器的 方塊圖。熱感測器包括一溫度感測單元100、一具備MPR 單元200及輸出驅動器300之儲存單元及初始化單元400。 溫度感測單元100感測溫度以回應於驅動信號 ODTS_EN。儲存溫度感測單元1〇〇之輸出信號 TM_VAL[0:N]的MPR單元200輸出所儲存的值MPR[0:N]以 回應於輸出啟動信號RD—ODTS。MPR單元200初始化所儲 存之值MPR[0:N]以回應於初始化信號RST。輸出驅動器 3 00驅動MPR單元200之作為溫度信號〇DTS_DT[0:N]之輸 出MPR[0:N]。在驅動信號〇DTS—EN之啟動後在預定時間 時’初始化單元400初始化MPR單元200。 因此’在驅動信號〇DTS_EN之啟動後在預定時間時， 初始化所儲存之溫度值。經由經初始化之溫度值，將當前 溫度未經反映告知晶片組，從而產生新的驅動信號。亦 即’熱感測器可請求晶片組藉由初始化溫度值來產生新的 驅動信號。 圖5為圖4所描述之溫度感測單元ι〇〇之方塊圖。溫度感 測單元100包括溫度感測器120、電壓供應者i40及轉換器 單元160。溫度感測器120感測溫度以回應於驅動信號 ODTS_EN。電壓供應者140供應上限電壓及下限 電壓VL_LMT »轉換器單元16〇基於上限電壓vu LMT及下 117570.doc (S ) 1332212 週期為自MPR早元200儲存新的溫度值開始直至初始化信 號RST被啟動為止。 其後’輸入該輸出啟動信號RD_〇DTS。MPR單元2〇〇及 輸出驅動器300輸出經初始化之值（亦即，對於新操作的請 求信號）’作為溫度信號ODTS—DT。不接收溫度值而接收 請求信號的晶片組再次產生驅動信號ODTS一EM。再次驅 動熱感測器’且MPR单元200儲存新的溫度值。當輸入該 輸出啟動信號RD_ODTS時，感測且輸出當前溫度。 根據本發明之半導體記憶體裝置之熱感測器包括用於初 始化]VIPR單元之初始化單元。在其驅動之時序後在預定時 間時’熱感測器初始化溫度值》熱感測器輸出經初始化之 值’作為對於再次驅動的請求信號以表示溫度值未經感測 預定時間。 因此’使用由熱感測器感測之精確溫度值的半導體記憶 體裝置穩定地執行與溫度變化有關之内部操作，諸如再新 等等。結果’改良半導體記憶體裝置之可靠性。 雖然在上述實施例中MPR單元輸出所儲存之值以回應於 輸出啟動號’但輸出驅動器亦可經啟動以回應於輸出啟 動h號且輸出所儲存之值β在上述實施例中，初始化單元 啟動初始化信號以回應於驅動信號。另外，可根據本發明 之其他實施例來改變初始化單元。可基於熱感測器操作之 開始或結束來啟動初始化信號。 雖然已相對於特定實施例來描述本發明，但熟習此項技 術者將易於瞭解’在不脫離如在以下申請專利範圍中定義 117570.doc 1332212 的本發明之精神及範疇的情況下，可進行各種改變及修改。 【圖式簡單說明】 圖1為半導體記憶體裝置中之習知熱感測器的方塊圖。 圖2為圖1所描述之MPR單元之示意電路圖。 圖3為圖1所描述之熱感測器之信號時序圖。 圖4為根據本發明之半導體記憶體裝置之熱感測器的方 塊圖。 圖5為圖4所描述之溫度感測單元之方塊圖。 圖6為圖4所描述之初始化單元之示意電路圖。 圖7為圖6所描述之初始化單元之信號時序圖。 圖8為圖4所描述之MPR單元之示意電路圖。 圖9為圖4所描述之熱感測器之信號時序圓。. 【主要元件符號說明】 10 溫度感測單元 20 MPR單元 22 鎖存器 30 輸出驅動器 100 溫度感測單元 120 溫度感測器 140 電壓供應者 160 轉換器單元 200 MPR單元 210-250 鎖存單元 212 鎖存器 U7570.doc 15 1332212 300 輸出驅動器 400 初始化單元 420 鎖存器 440 週期信號產生器 442 反相器鏈 460 計數器 480 信號產生器 482 反相器鏈 A 輸出信號 B 週期信號 D 輸出信號 E 重設信號 11 第一反相器 12 第二反相器 13 第三反相器 14 第四反相器 ND1 第一 NAND閘 ND2 第二NAND閘 ND3 第三NAND閘 ND4 第四NAND閘 ND5 第五NAND閘 RST 初始化信號 TGI 傳輸閘 TG2 傳輸閘 117570.doc 16- (s133. The invention relates to a semiconductor memory device; and more particularly to a semiconductor memory device having a temperature sensing device. [Prior Art] A semiconductor memory device is generally provided with a plurality of cells for storing data, wherein each cell includes a transistor for switching to transfer charge and a capacitor for storing charge (i.e., data). The term, data storage, means the accumulation of charge in a capacitor in a unit cell. Therefore, it is in principle possible to store data in a unit cell without any electrical power consumption. Poorly, the leakage motor travels from the MOS transistor to the ρ junction of the capacitor, and the amount of initial charge stored is reduced and the data σ is lost. Therefore, in order to prevent data loss, the data stored in the unit is read. After the operation, the unit needs to be recharged with the initial charge according to the read data. The data stored in the single 7L of the memory is saved by periodically repeating the recharging operation. The recharging operation is often referred to as a renew operation. The new operation is controlled by a dynamic random access memory (DRAM) controller. For re-operation, the DRAM periodically consumes electrical power. Since low electric power consumption is required, how to reduce the electric power consumption in a battery operating system such as a trigger including a notebook computer, a pDA, or a cellular phone. It is required to accurately sense the temperature in the DRAM and output the sensed H7570.doc 1332212. As a method of reducing the electric power consumption during the re-operation, it is usually performed when the degree of change is changed according to the temperature, and the data can be saved in the dram in the period of the naked period, in the case of the moon, Determine a plurality of temperature ranges. Then, in the low temperature range: in... control the new frequency of the new operation to renew the clock. Renewed clock A signal that is enabled in a new operation. Therefore, since the renewed operation is performed at a lower frequency at a lower temperature, the electric power consumption is reduced. As the integration rate or operating speed of the semiconductor memory device increases, the semiconductor memory device generates more heat. The heat increases the internal temperature of the semiconductor memory device' and affects normal operation. Therefore, a device for accurately sensing the temperature in the DRAM and outputting the sensed information is required, that is, a 'thermal sensor. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a block diagram of one conventional thermal sensor in a semiconductor memory device. The thermal sensor comprises a temperature sensing unit 1 , a multi-purpose register (MPR) unit 20 and an output driver 3 . The temperature sensing unit 1 senses the temperature φ degrees in response to the drive signal 〇DTS_EN. The MPR unit 20 storing the output signal TM_VAL[0:N] of the temperature sensing unit 10 outputs the stored value MPR[0:N] in response to an output enable signal rd_〇dtS. The output driver 30 outputs a temperature signal ODTS_DT[0:N]. 2 is a schematic circuit diagram of the MPR unit 20 depicted in FIG. MPR unit 20 includes a plurality of latch units for storing output signals TM_VAL[0:N] in the bit cells. The plurality of latch units have substantially the same structure. Describe a latch unit. The first latch unit includes a latch 22 and a transfer gate TG1. Latch 117570.doc 1332212 22 latches the output signal TM_VAL[0:N]. The output of the latch TG1 transfers the latch 22 in response to the output enable signal RD_ODTS. FIG. 3 is a timing chart for describing the operation of the thermal sensor shown in FIG. 1. The value of the signal TEMP (i.e., T ' T+1, etc.) represents the current temperature inside the semiconductor memory device. The temperature sensing unit 10 senses the current temperature estimated to be T degrees in response to the [N]th drive signal 〇DT_EN[N]. The MPR unit 20 stores the output k number of the temperature sensing unit as the [N]th temperature value. Before the output signal is input from the temperature sensing unit 10, the MPR unit 20 has stored the previous output signal as the [N-1]th temperature value. The input/output enable signal RD_ODT is input at a predetermined time after the input timing of the [N]th drive signal. The MPR unit 20 outputs the stored value MPR[N] in response to the output enable signal RDJDDT. The output driver 30 outputs a temperature signal TDTS_DT[N] representing T degrees. Although the thermal sensor output is estimated to be the current temperature of T degrees, the temperature of the semiconductor memory device has changed from T degrees to (D + 2) degrees. The thermal sensor does not actually represent the current temperature of the semiconductor memory device. According to the JEDEC specification, when the temperature of the device is less than 85 °C, it is necessary to perform the renew operation in a period of 64 ms. When the temperature of the device is greater than 85 ° C, it is necessary to perform a new operation in a period of 32 ms. When the MPR unit 20 stores the [N]th temperature value at 83 ° C degrees and the current temperature increases so as to exceed 85 ° C degrees, the thermal sensor output indicates a temperature of 83 ° C degrees. ODTS - DT [N ]. Perform new operations in a 64 ms cycle. However, 117570.doc < S > Mountain 2212, the current temperature actually exceeds 85t degrees, and the need to perform a new operation with a period of 32 ms. Data can be lost due to improper re-operations. The thermal sensor remains stored at ocr_ early 7^/Ja degrees before the subsequent drive signal is input. Conventional thermal sensors do not accurately represent temperature changes in semiconductor memory devices. [Explanation] φ The thermal sensor of the semiconductor memory device according to the present invention senses the temperature of the device and confirms whether the temperature value is valid. According to an embodiment of the present invention, a thermal sensor includes: a temperature sensing unit for sensing temperature in response to a driving signal; a storage unit for storing an output signal of the temperature sensing unit and outputting The temperature value; and an initial time 'it is used to initialize the storage unit after a predetermined time from the start of the self-driving signal. According to another embodiment of the present invention, a method of driving a semiconductor memory device includes driving a thermal sensor in response to a driving signal, requesting re-driving after a predetermined time from the start of the self-driving signal, and driving the heat again The sensor responds to the drive signal input again. [Embodiment] After a predetermined time elapses from the timing of driving thereof, the thermal sensor of the semiconductor memory device according to the present invention outputs a request for the re-drive request, the thermal sensor is driven again at a predetermined time. The temperature of the semiconductor stealth device is sensed. The semiconductor memory device stably performs temperature-related operations such as re-operation. Thereby, the reliability of the semiconductor memory device 117570.doc 1332212 is improved. Hereinafter, a semiconductor memory device according to the present invention will be described in detail with reference to the accompanying drawings. Figure 4 is a block diagram of a thermal sensor in a semiconductor memory device in accordance with the present invention. The thermal sensor includes a temperature sensing unit 100, a storage unit having an MPR unit 200 and an output driver 300, and an initialization unit 400. The temperature sensing unit 100 senses the temperature in response to the drive signal ODTS_EN. The MPR unit 200 storing the output signal TM_VAL[0:N] of the temperature sensing unit 1 outputs the stored value MPR[0:N] in response to the output enable signal RD_ODTS. The MPR unit 200 initializes the stored value MPR[0:N] in response to the initialization signal RST. The output driver 00 drives the output MPR[0:N] of the MPR unit 200 as the temperature signal 〇DTS_DT[0:N]. The initialization unit 400 initializes the MPR unit 200 at a predetermined time after the activation of the drive signal 〇DTS_EN. Therefore, the stored temperature value is initialized at a predetermined time after the activation of the drive signal 〇DTS_EN. The current temperature is not reflected to the wafer set via the initialized temperature value, thereby generating a new drive signal. That is, the thermal sensor can request the chip set to generate a new drive signal by initializing the temperature value. FIG. 5 is a block diagram of the temperature sensing unit ι〇〇 depicted in FIG. The temperature sensing unit 100 includes a temperature sensor 120, a voltage supplier i40, and a converter unit 160. The temperature sensor 120 senses the temperature in response to the drive signal ODTS_EN. The voltage supplier 140 supplies the upper limit voltage and the lower limit voltage VL_LMT. The converter unit 16 〇 is based on the upper limit voltage vu LMT and the lower 117570.doc (S ) 1332212 cycle is to store a new temperature value from the MPR early 200 until the initialization signal RST is activated. until. Thereafter, the output enable signal RD_〇DTS is input. The MPR unit 2 and the output driver 300 output an initialized value (i.e., a request signal for a new operation) as a temperature signal ODTS_DT. The chip set that receives the request signal without receiving the temperature value again generates the drive signal ODTS_EM. The thermal sensor is driven again' and the MPR unit 200 stores the new temperature value. When the output enable signal RD_ODTS is input, the current temperature is sensed and output. The thermal sensor of the semiconductor memory device according to the present invention includes an initialization unit for initializing the VIPR unit. At the predetermined time after the timing of its driving, the 'thermal sensor initializing temperature value' thermal sensor outputs the initialized value' as a request signal for re-driving to indicate that the temperature value has not been sensed for a predetermined time. Therefore, the semiconductor memory device using the accurate temperature value sensed by the thermal sensor stably performs internal operations related to temperature changes, such as renewing and the like. As a result, the reliability of the semiconductor memory device was improved. Although in the above embodiment the MPR unit outputs the stored value in response to the output enable number 'but the output driver can also be activated in response to the output enable h number and output the stored value β in the above embodiment, the initialization unit is activated. The initialization signal is responsive to the drive signal. Additionally, the initialization unit can be changed in accordance with other embodiments of the present invention. The initialization signal can be initiated based on the beginning or end of the thermal sensor operation. Although the present invention has been described with respect to the specific embodiments, it will be readily understood by those skilled in the art that the invention can be carried out without departing from the spirit and scope of the invention as defined by the 117570.doc 1332212 in the scope of the following claims. Various changes and modifications. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a conventional thermal sensor in a semiconductor memory device. 2 is a schematic circuit diagram of the MPR unit depicted in FIG. 1. 3 is a signal timing diagram of the thermal sensor depicted in FIG. 1. Figure 4 is a block diagram of a thermal sensor of a semiconductor memory device in accordance with the present invention. Figure 5 is a block diagram of the temperature sensing unit depicted in Figure 4. Figure 6 is a schematic circuit diagram of the initialization unit depicted in Figure 4. Figure 7 is a signal timing diagram of the initialization unit depicted in Figure 6. Figure 8 is a schematic circuit diagram of the MPR unit depicted in Figure 4. Figure 9 is a signal timing circle of the thermal sensor depicted in Figure 4. [Main Component Symbol Description] 10 Temperature Sensing Unit 20 MPR Unit 22 Latch 30 Output Driver 100 Temperature Sensing Unit 120 Temperature Sensor 140 Voltage Provider 160 Converter Unit 200 MPR Unit 210-250 Latch Unit 212 Latch U7570.doc 15 1332212 300 Output Driver 400 Initialization Unit 420 Latch 440 Periodic Signal Generator 442 Inverter Chain 460 Counter 480 Signal Generator 482 Inverter Chain A Output Signal B Periodic Signal D Output Signal E Heavy Let signal 11 first inverter 12 second inverter 13 third inverter 14 fourth inverter ND1 first NAND gate ND2 second NAND gate ND3 third NAND gate ND4 fourth NAND gate ND5 fifth NAND Gate RST Initialization Signal TGI Transmission Gate TG2 Transmission Gate 117570.doc 16- (s

Claims (1)

UJ2212 曰修正本 第096100337號專利申請案 -'中文申請專利範圍替換i(99年7月） ‘ 十、申請專利範圍： 一種用於一半導體記憶體裝置中之熱感測器，其包含： 度感；則單元，其用於感測一溫度以回應於一驅動 信號； 儲存單几，其直接連接至該溫度感測單元，用於儲 存該溫度感測單元之複數個輸出且輸出複數個溫度值； 及 初始化單元，其用於接收該驅動信號，並產生一内 β時脈彳5號’該内料脈信號係於該驅動信號之啟動後 -預定時間之期間内產生’計時該内部時脈信號以產生 十夺數目以及當该計時數目達到一重設數目時週期 性地初始化該儲存單元。 2.如請求項1之熱感測器，其中該初始化單元包括： -鎖存器，其用於設定其輸出信號以回應於該驅動信 號且重設其輸出信號以回應於一重設信號； 週期L號產生|§ ’其用於在該鎖存器之該輸出信號 之啟動期間產生一週期信號； -計數器’其用於計數由該週期信號產生器產生之週 期信號的數目； 一初始化信號產生考，i田#; 狐压王益具用於產生一初始化信號及一 重設信號以回應於該計數器之一輸出；及 H相器’纟用於使該重設信號反相且將一經反 相之重設信號輸出至該計數器。 3·如請求項2之熱感測器，其中該鎖存器包括： 117570-990712.doc 1332212 一第二反相器，其用於使該驅動信號反相；及 一第一及一第二NAND閘，其交又耦接以分別接收該 第二反相器之一輸出及該重設信號。 4 ·如請求項3之熱感測器’其中該週期信號產生器包括： 一第三NAND閘’其用於接收該鎖存器之該輸出信號 及該週期信號；及 一第一反相器鏈，其用於延遲該第三NAND閘之一輪 出且輸出該週期信號。 5·如請求項4之熱感測器，其中該初始化信號產生器包 括： 一第四NAND閘’其用於接收該計數器之輸出； 一第三反相器，其用於使該第四NAND閘之一輸出反 相且輪出該初始化信號； 一第四反相器，其用於使該第四NAND閘之該輸出反 相； 一第二反相器鏈，其用於延遲該第四NAND閘之該輸 出；及 一第五NAND閘’其用於接收該第四反相器及該第二 反相器鏈之輪出且輸出該重設信號。 6. 如請求項5之熱感測器，其中該計數器計數該等週期信 號之該數目’輸出複數個計數信號且初始化該等計數信 號以回應於由該第一反相器延遲之該重設信號。 7. 如睛求項6之熱感測器，其中該儲存單元包括： 暫存器’其用於儲存該溫度感測單元之該等輸出， 117570-990712.doc 輸出複數個所儲存之值以回應於 化該等所儲存之值 動“號且初始 仔之值U回應於該初始 號丨及 早兀之該初始化信 輸出驅動器，其用於驅動 等溫度值。 f存盗之輸出，作為該 8. 如請求項7之熱感测器，其中該暫存器 度感測單元之該等輸出儲存於 、將 單元。 _仔於早凡位兀中之複數個鎖存 9. :凊求項8之熱感測器，其中該等鎖存單元當 包括： ^ -鎖存器’其用於鎖存該溫度感測單元之該等輪出且 經重設以回應於該初始化信號；及 一傳輸閘，其用於傳輸該鎖存器之—輸出以回應於該 輸出啟動信號。 Λ 10. 如請求項9之熱感測器，其中該溫度感測單元包括： 酿度感測器，其用於感測該溫度以回應於該驅動信 號； ° 電壓供應者’其用於供應一上限電壓及一下限電 壓；及 轉換益单元’其用於基於該上限電壓及該下限電壓 來將該溫度感測器之一類比輸出轉換為複數個數位信號 以回應於該驅動信號。 U.如請求項10之熱感測器，其中該轉換器單元包括一用於 追蹤在一位元中之該溫度感測器之該類比輸出且將該類 比輪出轉換為該等數位信號的追蹤式ADC ^ 117570-990712.doc 1332212 第096100337號專利申請案 中文圖式替換頁(98年7月） 年月日修正替好丨 …·'一 8L 琴UJ2212 曰Revised Patent Application No. 096100337 - 'Chinese Patent Application Substitution Replacement i (July 99)' X. Patent Application Range: A thermal sensor for use in a semiconductor memory device, comprising: a unit for sensing a temperature in response to a drive signal; a storage unit directly coupled to the temperature sensing unit for storing a plurality of outputs of the temperature sensing unit and outputting a plurality of temperatures And an initialization unit for receiving the driving signal and generating an internal β pulse 彳 5 'the internal material pulse signal is generated after the start of the driving signal - a predetermined time period The pulse signal is generated to generate a ten-digit number and the storage unit is periodically initialized when the number of timings reaches a reset number. 2. The thermal sensor of claim 1, wherein the initialization unit comprises: - a latch for setting an output signal thereof in response to the drive signal and resetting its output signal in response to a reset signal; L number generation | § ' it is used to generate a periodic signal during the start of the output signal of the latch; - counter ' is used to count the number of periodic signals generated by the periodic signal generator; an initialization signal is generated考,i田#; 狐压王益具 is used to generate an initialization signal and a reset signal in response to one of the counter outputs; and the H phase device '纟 is used to invert the reset signal and will be inverted The reset signal is output to the counter. 3. The thermal sensor of claim 2, wherein the latch comprises: 117570-990712.doc 1332212 a second inverter for inverting the drive signal; and a first and a second The NAND gate is coupled to receive an output of the second inverter and the reset signal, respectively. 4. The thermal sensor of claim 3, wherein the periodic signal generator comprises: a third NAND gate for receiving the output signal of the latch and the periodic signal; and a first inverter a chain for delaying one of the third NAND gates to rotate and outputting the periodic signal. 5. The thermal sensor of claim 4, wherein the initialization signal generator comprises: a fourth NAND gate 'for receiving an output of the counter; and a third inverter for causing the fourth NAND One of the gate outputs is inverted and the initialization signal is rotated; a fourth inverter for inverting the output of the fourth NAND gate; a second inverter chain for delaying the fourth The output of the NAND gate; and a fifth NAND gate 'for receiving the wheel of the fourth inverter and the second inverter chain and outputting the reset signal. 6. The thermal sensor of claim 5, wherein the counter counts the number of the periodic signals to output a plurality of count signals and initialize the count signals in response to the reset by the first inverter delay signal. 7. The thermal sensor of claim 6, wherein the storage unit comprises: a register for storing the output of the temperature sensing unit, 117570-990712.doc outputting a plurality of stored values in response The value of the stored value of the stored value and the value of the initial value U is echoed to the initialization signal output driver of the initial number, which is used to drive the equal temperature value. The thermal sensor of claim 7, wherein the output of the temporary memory sensing unit is stored in the unit. The plurality of latches in the early position are 9. 9. a thermal sensor, wherein the latching units include: a - latches for latching the rounds of the temperature sensing unit and resetting in response to the initialization signal; and a transfer gate The output of the latch is responsive to the output enable signal. Λ 10. The thermal sensor of claim 9, wherein the temperature sensing unit comprises: a brewing sensor for Sensing the temperature in response to the drive signal; ° voltage supplier' For supplying an upper limit voltage and a lower limit voltage; and a conversion benefit unit for converting the analog output of the temperature sensor into a plurality of digital signals based on the upper limit voltage and the lower limit voltage in response to the drive signal U. The thermal sensor of claim 10, wherein the converter unit includes an analog output for tracking the temperature sensor in a bit and converting the analog to the digital signal Tracking ADC ^ 117570-990712.doc 1332212 Patent Application No. 096100337 Replacement Page of Chinese Patterns (July 1998) Years and Months Corrected for a Good...·'One 8L Piano 117570-fig-980728.doc -4- 400 1332212 第096100337號專利申請案 中文圖式替換頁(99年3月） 手月日修正替換頁 an 3 |7 -117570-fig-980728.doc -4- 400 1332212 Patent Application No. 096100337 Chinese Graphic Replacement Page (March 99) Hand Month Day Correction Replacement Page an 3 |7 - 0DTS ΕΝ0DTS ΕΝ XIDCDCDCDCIXD RST 117570-FIG-990312.DOC 圖7XIDCDCDCDCIXD RST 117570-FIG-990312.DOC Figure 7
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