TWI324743B - Method and system to compensate for scanner system timing variability in a semiconductor wafer fabrication system - Google Patents

Method and system to compensate for scanner system timing variability in a semiconductor wafer fabrication system Download PDF

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TWI324743B
TWI324743B TW93106731A TW93106731A TWI324743B TW I324743 B TWI324743 B TW I324743B TW 93106731 A TW93106731 A TW 93106731A TW 93106731 A TW93106731 A TW 93106731A TW I324743 B TWI324743 B TW I324743B
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wafer
time
scanner
semiconductor wafer
seconds
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TW93106731A
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TW200506711A (en
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Hilario L Oh
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Asml Holding Nv
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Description

Ι3247Ώ 第093106731號專利申請案 中文說明書替換頁(99年9月) 及一掃描器系統’使得在該掃描 饵拖益系統中從預期標稱時序 之偏離可以被補償。這樣之時序 町厅偏離通常由掃描器系統曝 光時間中之變化而引起。本發明債測這樣之掃描器系統時 間偏離且動態地***額外時間,,延遲,,至該晶圓生產***中 以幫助補償,因此保持跨越該追料統至掃描系統介面之 晶圓流程之良好同步。Ι 3247Ώ Patent Application No. 093106731 The Chinese Specification Replacement Page (September 99) and a scanner system' enable deviations from the expected nominal timing in the scanning bait benefit system to be compensated. Such timings are often caused by changes in the exposure time of the scanner system. The scanner system of the present invention measures such time that the scanner system deviates and dynamically inserts additional time, delay, into the wafer production system to assist compensation, thus maintaining a good wafer flow across the trace system to the scanning system interface. Synchronize.

這些動態地***之延遲係為在預先計晝之"等待,,之外, 在該方法之非重要模組階段時加入至晶圓生產方法中,如 美國專利案號6,即56中所揭示的。該產生之半導體晶圓 製造系統可以維持一同步晶圓流程且因此達成改進之輸出 本發明之其他特點和優點將從該等較佳具體實施例以詳 細地提出之下列描述和隨附圖式而出現。 【實施方式】 圖2係為一半導體晶圓生產系統2〇〇之方塊圖,包括一追 蹤系統20,以及一掃描器系統3〇,。系統2〇,和3〇|可能與圖j中 系統20和30相同或可能包括不同和/或不同數目之模組以 及更多或更少機器人單元。 可以假设系統200具有如美國專利案號6,4丨8,356中所描 述之***"等待"時間之型式的補償。然而,對照在該I% 專利中所描述的,追蹤系統20,較佳也具有對從標稱掃描器 系統週期性之偏離,即是從標稱掃描器系統時脈週期性之 偏離,之補償。這樣之補償係為***時間”延遲,,之型式。 系統200較佳在電腦系統21〇之控制下操作,其的電腦可 91980-990607.doc IJ24/43These dynamically inserted delays are added to the wafer production method at the non-critical module stage of the method, as previously pre-calculated, as in U.S. Patent No. 6, 56 Revealed. The resulting semiconductor wafer fabrication system can maintain a synchronized wafer flow and thus achieve improved output. Other features and advantages of the present invention will be apparent from the following detailed description of the preferred embodiments and the accompanying drawings. appear. [Embodiment] FIG. 2 is a block diagram of a semiconductor wafer production system, including a tracking system 20, and a scanner system. The systems 2〇, and 3〇| may be identical to or may include different and/or different numbers of modules and more or fewer robotic units in Figure j. It can be assumed that system 200 has a type of insertion "wait" time type of compensation as described in U.S. Patent No. 6,4,8,356. However, as described in the I% patent, the tracking system 20 preferably also has a periodic deviation from the nominal scanner system, i.e., a deviation from the clock periodicity of the nominal scanner system. . Such compensation is the insertion time "delay," type. The system 200 is preferably operated under the control of the computer system 21, and its computer can be 91980-990607.doc IJ24/43

叶J $093106731喊專利申請案 —..—----------- 說明書替換頁("年9月)卜年州刺減 凟取β己憶體儲存(或可載b)m-電腦貪施上述系統 細作時執行之軟體220。電腦系統210可以容易地將實際掃 犏器系統30’時脈序列與一標稱時脈時序比較以偵測標稱週 ’月之偏離。當偵測到這樣之時序偏離時,在CPU執行之軟 體210導致***適當時間,,延遲”至追蹤系統2〇,(與,356專利 預先计畫’’等待"之***比較來說,甚至在系統2〇〇打開之前 引進至該晶圓生產方法中)。如在此所描述的,在例示的圖 2中,疋樣之***"延遲"改進由追蹤系統2〇,傳送晶圓之時序 以及由該掃描器系統3〇,接收晶圓之時序之間之一致,例如 晶圓從冷卻平板80傳送至掃描器系統30,和晶圓從掃描器系 統3〇’傳送至在追蹤系統2〇,之後曝光烘乾模組9〇。 追蹤系統20,顯示具有四個機器人站:LPR-230(或”Lpr.) 係為與載入晶圓至或取出系統2〇〇所相關連之裝載埠機器 人單元、CTR-230(或"CTR”)係為與塗覆器模組6〇相關連i 機器人單元、SIR_23〇(或”SIR”)係為與載入晶圓進出掃描器 系、’先30所相關連之機器人;以及DVR_23〇(或"dvr")係為— 般與顯影模組110相關連之機器人。所有四個機器人單元 LRP、CTR、SIR以及DVR較佳具有兩個手臂,例如由受= 者ASML公司所發展之機器人單元。雖然系統2〇〇將以參考 這些四個機器人站而描述’應該了解本發明可以以利用少 於或多於四個追蹤機器人站之晶圓生產系統,或不利用= 何雙臂機器人站之系統實施。 下面之表1將參考本發明而描述。在表丨中,列u i5(以暗 影顯示)表示與該掃描器系統30,相關連之方法步驟;該等^ 91980-990607.doc •10· 1324743 _ 第093106731號專利申請案 n κ — 中文說明書替換頁(99年9月).刃牛^歡火::土訟符爲 ----------…一 例如,表1之列1從左看至右,在一裝載埠方法步驟中, 一晶圓由一 LPR機器人機構(例如,LpR_23〇)從該裝載埠 LPx拾取且在一隨後方法模組放置,冷卻平板cp丨也許是 圖2中之模組50)。如行4所顯示之與拾取和放置相關連之傳 輸時間係為7.0秒。在行2,冷卻平板方法步驟發生之處理 和累贅時間總合係為24.0秒。 在列2之最後行中,20秒之預先計畫等待時間加入至該晶 圓處理及累贅時間,如美國專利案號6,418,356所描述的。 甚至在as圓生產系統200打開之前,決定在表丨之最後行 所顯不之預先計畫等待時間且加入至該晶圓方法處理時 間。這些係為加入至非重要模組階段之時間,如在,356專利 中描述的,以幫助解決在追蹤系統2〇,内之資源衝突。這些 先前技藝"等待"係與加入之"延遲"有所區別,其係為根據本 發明當需要時,在晶圓生產系統2〇〇之實際操作期間加入以 補償在掃描系統3〇·内從標稱週期性之偏離。 在處理模組ΧΡΙχ之累贅和預先計t等待時間及方法到期 之後,一機器人機構CTR-230花7.0秒傳輸該晶圓至下一方 法步驟’即是表1之列3中之baRCx。 在列3,根據該,356專利,使用44 〇秒之方法及累贅時間 以從該晶圓周邊移除烏嘴,在加上33 5秒之預先計畫時 間。可以看到一晶圓交換機器人移動發生,其中使用5.5秒 之傳輸時間以移動該晶圓至下一方法步驟,即是在表丨之列 4中之熱平板HP 1X烘乾該晶圓。 跳下至該等陰影列n_5,包括在掃描器系統3〇,内之方法 9I980-990607.doc •13- i324Hi〇673i號專利申請案 中文說明書替換頁(99年9月) 步驟及機器人移動,一IN-PED^-g'iTCi^機構sir_23〇 在一輸入台座(IN-PED)上放置一晶圓,該晶圓因此進入掃 描器系統30,。如表1所指示的,之後使用—晶圓搬動機器人 (例如,WHR-24〇)以傳輸該晶圓至對齊器階段(align),參 照圖2所顯示之例示系統2〇〇和表丨,列丨2。傳輸時間係為 12_5秒,為1.0秒處理加上累贅時間。需要零計畫等待。在 表1之列12,該晶圓現在經歷一對齊步驟,包括193〇秒處 理加上累贅時Μ ’而25.0秒係為預先計畫的。該對齊發生 在為DIR-240機器人機構之部份的階段。 曰在對齊、累贅和預先計畫之等待相_時,討論中之 晶圓現在經歷僅牵涉旋轉該DIR_24〇機器人之曝光步驟。移 動係為持有一對齊晶圓之該DIR-240機器人單元之一手臂 旋轉或移動至曝光該晶圓之位置,同時另—手臂可自由地 移動另-㈣至預㈣齊步驟。表〜指示該旋轉花65秒傳 輸夺間JS]時33.5秒係為曝光加上累贅時間,和零秒的等 待。Ye J $093106731Calling Patent Application—..----------- Manual Replacement Page ("Year September) Buzhou State Sucking and Retrieving β Remembrance Storage (or can carry b) The m-computer is greedy with the software 220 executed when the above system is elaborated. Computer system 210 can easily compare the actual scanner system 30' clock sequence to a nominal clock timing to detect a nominal week' When such a timing offset is detected, the software 210 executed by the CPU causes the insertion of the appropriate time, delay "to the tracking system 2", (in comparison with the insertion of the 356 patent pre-plan 'waiting', even Introduced to the wafer production method prior to system 2 opening.) As described herein, in the illustrated FIG. 2, the insertion "delay" is improved by the tracking system 2, transferring the wafer The timing and the coincidence between the timings of receiving the wafer by the scanner system 3, such as the transfer of wafers from the cooling plate 80 to the scanner system 30, and the transfer of wafers from the scanner system 3' to the tracking system 2〇, then expose the drying module 9〇. Tracking system 20, showing four robot stations: LPR-230 (or “Lpr.”) is associated with loading the wafer to or from the system 2 The loading robot unit, CTR-230 (or "CTR") is associated with the applicator module 6〇 i robot unit, SIR_23〇 (or “SIR”) is loaded with the wafer in and out of the scanner system , 'The first 30 related robots; and DVR_23〇 (or "dvr") The robot is generally associated with the developing module 110. All four robot units LRP, CTR, SIR, and DVR preferably have two arms, such as a robot unit developed by the ASML company. It will be described with reference to these four robot stations. It should be understood that the present invention can be implemented with a wafer production system that utilizes less than or more than four tracking robot stations, or a system that does not utilize a dual-arm robot station. 1 will be described with reference to the present invention. In the table, column u i5 (shown in shading) indicates the method steps associated with the scanner system 30; such ^ 91980-990607.doc •10· 1324743 _ 093106731 Patent application n κ — Chinese manual replacement page (September 99). Blade cow ^ Huanhuo:: The ground of the lawsuit is -----------... For example, the column 1 of Table 1 is from the left Looking to the right, in a loading method step, a wafer is picked up from the loading cassette LPx by an LPR robot mechanism (for example, LpR_23〇) and placed in a subsequent method module, and the cooling plate cp丨 may be in FIG. Module 50). As shown in line 4, related to pick and place The transmission time of the connection is 7.0 seconds. In line 2, the processing of the cooling plate method step and the accumulated time are 24.0 seconds. In the last row of column 2, 20 seconds of the pre-program waiting time is added to the crystal. Round processing and cumbersome time, as described in U.S. Patent No. 6,418,356. Even before the as-circle production system 200 is opened, it is decided to display the waiting time in the last row of the watch and add it to the wafer. time. These are the time to join the non-critical module phase, as described in the '356 patent, to help resolve resource conflicts within the tracking system. These prior art "waiting" are distinguished from the "delay" which is added during the actual operation of the wafer production system 2 as needed in accordance with the present invention to compensate for the scanning system 3 Deviation from the nominal periodicity. After the processing module's cumbersome and pre-tit wait time and method expiration, a robotic mechanism CTR-230 takes 7.0 seconds to transfer the wafer to the next step ’, which is the baRCx in column 3 of Table 1. In column 3, according to the 356 patent, a 44 sec second method is used and the cumbersome time is taken to remove the black nipple from the periphery of the wafer, with a pre-planning time of 33 5 seconds added. It can be seen that a wafer exchange robot movement occurs in which 5.5 seconds of transmission time is used to move the wafer to the next method step, i.e., the hot plate HP 1X in the watch list 4 dries the wafer. Skip to the shadow column n_5, including in the scanner system 3〇, the method 9I980-990607.doc •13- i324Hi〇673i Patent Application Chinese Manual Replacement Page (September 99) Steps and robot movement, An IN-PED^-g'iTCi^ mechanism sir_23 is placed on an input pedestal (IN-PED), and the wafer thus enters the scanner system 30. As indicated in Table 1, the wafer-handling robot (eg, WHR-24〇) is used to transfer the wafer to the aligner stage, with reference to the exemplary system 2〇〇 and Table 显示 shown in FIG. , column 丨 2. The transmission time is 12_5 seconds, which is 1.0 seconds of processing plus the accumulated time. Need a zero plan to wait. At column 12 of Table 1, the wafer now undergoes an alignment step, including 193 sec processing plus cumbersome ’ ' and 25.0 sec is pre-planned. This alignment occurs at the stage of being part of the DIR-240 robotic mechanism. In the case of alignment, cumbersome, and pre-planning waits, the wafer in question now undergoes an exposure step involving only rotating the DIR_24 robot. The movement is one in which the arm of the DIR-240 robotic unit holding a aligned wafer is rotated or moved to the position where the wafer is exposed, while the other arm is free to move the other-(four) to pre-(four) steps. Table ~ indicates that the rotation takes 65 seconds to transmit the intervening JS] when 33.5 seconds is the exposure plus the accumulated time, and zero seconds of waiting.

在表1之下—列中,該WHR—240機器人機構以i 2.4秒,! .〇 心處理加上累贅時間和零秒的等待時間,從在掃描器系統 么内之曝光階段卸下該晶圓。在表}之列W導向掃描器系 =〇’本身之最後1),該SIR_23峨器人機構從與該掃描 Ί 〇相關連之出去台座(0UT_PED)拾取在討論中之晶 愛^亥動作標稱花9·5秒傳輸時間,1.0秒處理和累贅時間和 Λ °玄曰曰圓現在完成在掃描器系統30,内處理而重新 入追敗糸統20,,如例示圖2所指示,例如從後曝光洪乾 91980.990607.d〇( 1324743 第093106731號專利申請案 中文說明書替換頁(99年9'月) 所代表的意義。進一步地,圖3 Α和3Β之許多例示區域以圖 3A和3B之上面部分識別指標,明顯地被舉出。 包括圖4A-4F之圖4,係為顯示討論中之該等二十五片晶 圓之製造方法。圖3A和3B以圖形詳細地描述圖4A-4F中所 計算和列舉之資料。如在此所描述的,圖4A_4F所顯示之許 夕等待時間和在圖3A和3B描繪為白色矩形係為等待時間 如在’3 56專利中所描述的,且為計畫好的"等待",加入至非 重要模組階段以減少與資源衝突相關連之問題。對照之In the lower column of Table 1, the WHR-240 robotic mechanism takes i 2.4 seconds! The core processing plus the accumulated time and zero seconds of waiting time is removed from the exposure stage within the scanner system. In the table 1 list, the W-oriented scanner system = 〇' itself, the last 1), the SIR_23 robot mechanism picks up the pedestal (0UT_PED) associated with the scanning Ί 拾 in the discussion Weighing 9·5 seconds of transmission time, 1.0 seconds of processing and cumbersome time and 曰曰 ° Xuanyuan circle is now completed in the scanner system 30, and re-entered the recovery system 20, as illustrated in the example of Figure 2, for example From the post-exposure Honggan 91980.990607.d〇 (1324743 No. 093106731, the Chinese manual replacement page (99 years 9' month) represents the meaning. Further, many of the illustrated areas of Figure 3 and 3Β are shown in Figures 3A and 3B The upper part of the identification index is clearly exemplified. Figure 4 including Figures 4A-4F is a diagram showing the manufacturing method of the twenty-five wafers in question. Figures 3A and 3B graphically describe Figure 4A in detail. The data calculated and enumerated in -4F. As described herein, the waiting time shown in Figures 4A-4F and the white rectangle depicted in Figures 3A and 3B are the waiting times as described in the '3 56 patent. And for the planned "waiting", add to the non-important model To reduce the problems associated with even the stage of resource conflicts in control of

下,圖4A-4F所顯示之許多***,,延遲"時間和在圖3八和邛 中描繪為黑色矩形係為根據本發明所***之時間"延遲"以 補償在掃描系統3G’中從標稱時序之偏離(例如,掃描器時脈 周期性之變動)。加入這些延遲至系…統雇中’如圖2所描緣Next, the many insertions shown in Figures 4A-4F, the delay & time and the black rectangle depicted in Figures 8 and 系 are the time "delay" inserted in accordance with the present invention to compensate in the scanning system 3G' The deviation from the nominal timing (for example, the periodicity of the scanner clock). Add these delays to the system...the job is as shown in Figure 2.

—圖行1表示晶圓號碼⑵片晶圓的資料被顯示. 订中)❼订2代表在該描述之例之中,從掃描器系統3 標稱4〇.〇秒時序或週期性之偏離。根據本發明,其係) 以***,’延遲”補償之這些掃描器系統30,之偏離。這樣 延遲"之***有效地幫助促逸扃a< 疋進在®追蹤系統20,準備好f 一晶圓至掃描器系統3〇,和當 ’ 枝 $田拎锸态系統30'準備好接必 樣—晶圓之間,和♦籍毋么,Λ 田知心益系統30丨準備好提供一需要il 乂處理之晶圓回追縱系統2〇,# a 元20和畲追蹤系統20·準備好描 這樣之晶圓於進一步處理之„pa 平侑好招 歹处理之間較佳時序之一致。 現在將描述在表丨、圖4a_4f 田和圖3A*3B之間之交互 用。讓我們從晶圓4開始,係從圖 又互 抵邛之第四片晶厦 91980.990607.doc •16- 1324743 第093106731號專利申請案 ~·— ··―一| • 中文說明書替換頁("年9月)丨4^年^月9 更汍钻換裒j 單元DIR-240移動6.5秒傳輸時間(參見表!,和圖4D,列4, 行48)。在約時間970,有一 2.98秒之延遲(圖4D,列4,行40)。 此係為在該曝光步驟之起始之延遲,和其係為在本發明要 補償之標稱曝光開始時間偏離或延遲(除了別的之外 > 在圖 3A中,曝光不會開始直到約時間975秒,且持續33_5秒(參 見EXPOSE,圖4D,列4 ’行5〇),曝光顯示為一延伸至時間 約1008秒之m形。在曝光之後不允許等待狀態(等待12 在圖4D ’列4,行5 1係為零秒)。 在6.5 之傳輸時間(參見表1和圖4d,列4,行52),機器 人單元DIR-240移動晶圓4至該卸下站! 〇秒(在圖4Ε,列4, 行53之DISCHARG)。沒有***等待狀態(例如,根據圖4Ε, 列4,行54,等待13係為零秒)。在約時間1015,在12.4秒傳 輸時間,機器人單元WHR-240移動晶圓4(表1,和圖4Ε,列 4,行55)至在掃描器系統3〇,之該〇UT_pEc^。根據圖4ε, 列4,行56,sa圓4在該站花了 1 〇秒,且之後由該機器人單 元SIR-230花了 9.5秒傳輸時間移動至該熱平板Ηρ3χ,例 如,圖2之後曝光烘乾模組9〇。注意,從圖4£ ’列4,行57 和58,沒有等待時間及延遲時間被***(例如,等待14係為 零秒’而延遲17係為零秒)。該95秒8111_24〇傳輸時間反映 在表1,和圖4 Ε,列4,行5 9。 如圖3Α由橫跨剛好在時間1〇4〇之前至約時間丨13〇之虛心 矩形所圖形地顯示的,接下來晶圓4維持在熱平板Ηρ3χ 94.0秒(參見表卜和圖4Ε,列4,行60)。在該後曝光烘培之 後,不允許等待狀態(例如,圖4Ε,列4,行61顯示等待15 9I980-990607.doc -19- I3T4743 第093106731號專利申請案 中文說明書替換頁(99年9月) 至追蹤系統之裝載谭LPx。之後晶圓4在圖3Β時間】4〇〇 稍微之後被推出追蹤系統20,。 飯如我們檢查圖3八和3Β顯示之其他晶圓,可以看到在接 近每4〇.〇秒,要被處理之該等二十五片晶圓其中之—進入 該系統流程。如圖4Α之行2所提醒的,從—標稱4〇 〇秒掃播 器時脈週期之掃描器時間偏離可以從—標稱約〇秒至^ 4 · I 4秒變化。#電腦系統2!㈣測從標稱掃描器系統時間之- Figure 1 shows the wafer number (2) wafer data is displayed. The subscription 2 represents the deviation from the scanner system 3 nominal 4 〇. 〇 second timing or periodicity in the example of the description. . In accordance with the present invention, these scanner systems 30 are compensated for insertion, 'delay' compensation. This delay " insertion effectively helps to promote the 扃a<<>> in the tracking system 20, ready for f The wafer-to-scanner system 3〇, and when the 'wedge $ field state system 30' is ready to be connected - between the wafers, and the ♦ 毋 Λ, Λ 田知心益*** 30丨 is ready to provide a need The il 乂 processed wafer backtracking system 2〇, #a元20 and 畲 tracking system 20· are ready to describe the preferred timing of the wafers for further processing. The interaction between the table, Figure 4a_4f field and Figure 3A*3B will now be described. Let us start from wafer 4, and the fourth piece of crystals from the map is 91980.990607.doc •16-1324743 No. 093106731 Patent application~····―一| • Chinese manual replacement page (" September) 丨4^年^月9 More 汍 裒 j Unit DIR-240 moves 6.5 seconds transmission time (see Table!, and Figure 4D, column 4, line 48). At about time 970, there is a delay of 2.98 seconds (Fig. 4D, column 4, line 40). This is the delay at the beginning of the exposure step, and it is the deviation or delay of the nominal exposure start time to be compensated by the present invention (among others). In Figure 3A, the exposure does not begin until about The time is 975 seconds and lasts for 33_5 seconds (see EXPOSE, Figure 4D, column 4 'row 5〇), and the exposure is displayed as an m-shape extending to a time of about 1008 seconds. Waiting state is not allowed after exposure (waiting 12 in Figure 4D) 'Column 4, line 5 1 is zero seconds.) At 6.5 transmission time (see Table 1 and Figure 4d, column 4, line 52), robot unit DIR-240 moves wafer 4 to the unloading station! (In Figure 4Ε, column 4, DISCHARG in line 53.) There is no insertion wait state (for example, according to Figure 4Ε, column 4, line 54, wait 13 for zero seconds). At about 1015, at 12.4 seconds, The robot unit WHR-240 moves the wafer 4 (Table 1, and Figure 4, column 4, row 55) to the 〇UT_pEc^ in the scanner system 3〇. According to Figure 4ε, column 4, row 56, sa circle 4 It took 1 second at the station, and then the robot unit SIR-230 took 9.5 seconds to move to the hot plate χρ3χ, for example Figure 2 is followed by exposing the drying module 9〇. Note that from Figure 4, column 4, lines 57 and 58, no waiting time and delay time are inserted (for example, waiting for 14 systems to be zero seconds) and delay 17 is zero. Second). The 95 seconds 8111_24 〇 transmission time is reflected in Table 1, and Figure 4 Ε, column 4, line 5 9. As shown in Figure 3, the imaginary rectangle is traversed just before the time of 1〇4〇 to about 13丨Graphically displayed, the wafer 4 is then maintained on a hot plate Ηρ3χ 94.0 seconds (see Table Bu and Figure 4Ε, column 4, line 60). After the post-exposure bake, no wait state is allowed (for example, Figure 4Ε , column 4, line 61 shows waiting 15 9I980-990607.doc -19- I3T4743 No. 093106731 patent application Chinese manual replacement page (September 99) to the tracking system loading Tan LPx. After wafer 4 in Figure 3 time 】 4〇〇 was slightly introduced after the tracking system 20, rice, as we check the other wafers shown in Figures 3 and 3, you can see the twenty-five pieces to be processed in close to every 4 〇. Among the wafers - enter the system process. As shown in Figure 2, line 2, from the - nominal 4 扫 second sweep The scanner clock cycle time deviates from the filter when! - nominal square seconds to about ^ 4 · I 4 sec. The computer system # 2 (iv) measurement of time from nominal scanner system

偏離,***一正常時間延遲至該系統流程,如圖仏叮所 示的。 J 預先计畫之"等待狀態"’如該,356專利所揭示的,加上根 據本發明之動態***"延遲",之結合促進整 叫追縱系㈣,之所需同步晶圓流程,儘管掃描器^,;: 内之時脈週期之偏離。例如’在約時間i2i7秒,動態地插 入延遲至晶an和4之移動(圖4F,列4,行69和圖犯,列4, 仃叫使得機器人單元DVR_230可以在—連續單〜交換 換動作#執行該等晶圓1、4和7之拾取及放置。 但是對於根據本發明之這些延遲之***在晶圓卜*和7 2和放置之請求令存在著衝突。這樣之衝突會引導至跨 越追紙糸統20·和掃福器系統3〇•晶圓流程之同步之遺失。垂 直地沿著許多時間例子檢查圖从㈣,可以 插:等待狀態和時間延遲,避免許多資源衝突,儘;有; 性之奮亂。根據本發明’延遲時間之決定可以由 例如美國專利案號Ml 8,356所揭示的這此分 軟體220而實施。 I-刀析技術之 9I9S0-990607.doc 21 1324743 ................................... 第093106731號專利申請案 中文說明書替換頁(99年9月) : ' Ρ I;: 1 « . . . ··«. 一 ·——,· •‘ ·-···' 五、中文發明摘要: 一種半導體晶圓製造系統,包括至少一追蹤系統和一掃 描器系統,藉由當這樣之偏離被偵測時,動態地引進時間 延遲而補償在該掃描器系統中從標稱週期性之偏離。較佳 地,先前技藝之靜態等待狀態也引進至該晶圓方法中以減 少資源衝突之可能性。儘管有這樣之偏離’因為維持了晶 圓流程之同步,該產生之半導體晶圓製造系統可以享受增 強之晶圓輸出率。 六、英文發明摘要: A semiconductor wafer fabrication system that includes at least a track system and a scanner system compensates for deviations from nominal periodicity in the scanner system by dynamically introducing time delays when such deviations are detected. Preferably prior art static wait states are also introduced into the wafer recipe to reduce probability of resource conflicts.Deviation, insert a normal time delay to the system flow, as shown in Figure 。. J pre-planned "waiting state" as disclosed in the '356 patent, plus the dynamic insertion &"delay" according to the present invention, which promotes the need for the synchronization system (4) The circular flow, despite the deviation of the clock cycle within the scanner ^, ;:. For example, 'at the time i2i7 seconds, dynamically insert the delay to the movement of the crystals an and 4 (Fig. 4F, column 4, line 69 and figure commit, column 4, squeaking so that the robot unit DVR_230 can be in - continuous single ~ exchange change action #Executing the picking and placement of the wafers 1, 4 and 7. However, there is a conflict between the insertion of the delays in accordance with the present invention on the wafers and the requests for placement and placement. Such conflicts lead to crossing The chase system 20· and the sweeper system 3〇•The disappearance of the wafer process synchronization. Vertically along many time examples check the graph from (4), you can insert: wait state and time delay, avoid many resource conflicts; In accordance with the present invention, the decision of the delay time can be implemented by the software 220 disclosed in, for example, U.S. Patent No. M. 8,356. I-Knocking Technology 9I9S0-990607.doc 21 1324743 .. ................................. No. 093106731 Patent Application Replacement Page (September 99): ' Ρ I;: 1 « . . . ··«. I·——,··' ·-····' V. Chinese Abstract: A semiconductor wafer system The system, including at least one tracking system and a scanner system, compensates for deviations from the nominal periodicity in the scanner system by dynamically introducing a time delay when such deviations are detected. Preferably, The static wait state of the prior art is also introduced into the wafer method to reduce the possibility of resource conflicts. Despite this deviation, the semiconductor wafer fabrication system can be enhanced by the maintenance of the wafer process. The output of the invention is a minimum of track system and a scanner system Static wait states are also introduced into the wafer recipe to Reduce probability of resource conflicts.

The resultant semiconductor wafer fabrication system can enjoy enhanced wafer throughput in that synchronization of wafer flow is maintained, despite such deviations. 91980-990607.doc 1324743The resultant semiconductor wafer fabrication system can enjoy enhanced wafer throughput in that synchronization of wafer flow is maintained, sometimes such deviations. 91980-990607.doc 1324743

第093106731號專利申請案 . 中文申請專利範圍替換本(99年Q 十、申請專利範圍: 1 · 一種補償一標稱掃描哭备 * “系統時脈週期性之偏離之方法, 该方法應用於包括至少一追縱系 一本连鲈a囿制/ 俾‘态系統之 半導體:圓製造系統中’該方法包括下: 統⑷回應從一掃描係系統時脈之訊號,操作該婦描器系 統時脈之訊號,操作該追縱系統; 導體日圓製?:先決定和***等待狀態以避免在該半 導體日曰®製坆系統令之資源衝突;以及 所二匕“在該掃据器時脈中之標稱時序之偏離且如 該偏離。 ***時間延遲以補償 2·二申請專利範圍第〗項之方法’其中該掃描器時 Γ母小時㈣晶圓㈣率之重複料操作於該半導 體晶圓製造系統。 千等 3.如申請專利範圍第1項之方法,其中該掃描器時脈以相等 母小時160片晶圓輸出率之重複迷率操作於該半 導體晶圓製造系統》 (如:請專利範圍第!項之方法,其中在步驟⑷之每個該時 ^待之位置及長度係藉由控制至少部份該半導體晶圓 製造系統之一電腦系統所決定。 5·如申請專利範圍第】項之方法,其中該半導體晶圓製造系 統包括至少兩個機器人站。 6.如申請專利範圍第1項之方法,其中該半導體晶圓製造系 9I980-990607.doc 1^^4743 統包括至少三個機器人站。 如申4專利範圍第丨項之方法,其 ^ 導體晶圓製造系 既包括至少四個機器人站。 8. 如申請專利範圍第1項之方法,其中步 電腦系_實1 I驟⑷和步驟⑷由- 9. 專利範圍第1項之方法’其中該追縱系統回應從該 該播=時脈之—訊號而操作’而該掃描器系統回應從 Μ掃“器系統時脈之一訊號而操作。 0 ’種半導體晶圓製造系統,包括: 一掃描器系統,回應從-掃描器系統時脈而操作. :追縱系統’回應從一追縱系統時脈之一訊號而操作; 小—移動裝置’用於在該半導體晶圓製造系統内移動至 y 一晶圓; 中^用於在該單—時脈半導體晶圓製造系統 :預先計畫之等待狀態以減少在該半導體晶圓製造 系、先中之資源衝突;以及 -動態插人裝置’用於如所需的在該半導體 插人時間延遲以補償在該一脈二 &quot;.二申請專利範圍第1G項之半導體晶圓製造系統,复中今 時脈以相等於至少每小時90片晶圓輪出率 速率操作於該半導體晶圓製造系統。 子 12.如申π專利相第1()項之半導體晶圓製造 掃描器時脈以相笙仏s &gt; 、'先其中該 相寺於至少每小時160片晶圆輸出率之重 91980-990607.doc 1324743 子复速率操作於該半導體晶圓製造系統。 ’士申Μ專矛j範圍第丨〇項之半導體晶圓製造系統尚包括 -電腦系統’控制至少部份該半導體晶圓製造系統。 14. 如申明專利範圍第ι〇項之半導體晶圓製造系統,其中用 於動態地***時間延遲之該動態***裝置包括-電腦系 統。 15. 如申請專利範圍第14項之半導體晶圓製造系統,其中該 電腦系統產生至少該掃描器系統時脈。 16. 如申請專利範圍第1〇項之半導體晶圓製造系統,其中用 於移動之該移動裝置包括至少兩個機器人站。 Π·如申請專利範圍第1〇項之半導體晶圓製造系統,其中用 於移動之該移動裝置包括至少三個機器人站。 種儲存電腦程式的電腦可讀取媒體,該電腦可讀取 媒體操作在—半導體晶圓製造系統中,該系統包括至少 回應從掃描益系統時脈之訊號操作之一掃描器系統以 及回應從追縱系統時脈之一訊號操作之一追縱系統, 當執行該電腦程式時實施下列步驟至少一個: ⑷決定從該掃福器系統時脈中標稱週期性之偏離;以及 (b)计算且如所需的在該半導體晶圓製造系統中動態 地***時間延遲以補償該等偏離。 19.如申印專利範圍第18項之電腦可讀取媒體,其中當執行 時該程式靜態地衫預先計晝之料狀態以減少在該半 導體晶圓生產系統内之資源衝突。 20·如申請專利範圍第18項之電腦可讀取媒體,其中當執行 91980-990607.doc 1324743 時該程式動態地決定從在該掃描系統時脈中標稱週期性 之偏離以及計算所需於補償該等偏離之時間延遲。Patent Application No. 093106731. Chinese Patent Application Range Replacement (99 years Q X, patent application scope: 1 · A method of compensating for a nominal scan crying* "systematic clock periodicity deviation, the method is applied to include At least one tracking system is a semiconductor system that is connected to the system: in a circular manufacturing system, the method includes the following: (4) responds to the signal from a scanning system system clock, when operating the scanner system Pulse signal, operate the tracking system; Conductor Japanese system?: First determine and insert the waiting state to avoid resource conflicts in the semiconductor corona system system; and the second "in the clock of the sweeper The deviation of the nominal timing and the deviation as described. Insertion time delay to compensate for the method of the application of the second paragraph of the patent application, wherein the scanner is at the time of the mother (four) wafer (four) rate of the repeat material operation on the semiconductor wafer Manufacturing System. The method of claim 1, wherein the scanner clock operates on the semiconductor wafer fabrication system with a repetition rate of 160 wafer output rates at equal parent hours ( For example, the method of the scope of the patent item, wherein the position and length of each of the steps (4) are determined by controlling at least a part of the computer system of the semiconductor wafer manufacturing system. The method of claim 5, wherein the semiconductor wafer fabrication system comprises at least two robot stations. 6. The method of claim 1, wherein the semiconductor wafer fabrication system is 9I980-990607.doc 1^^4743 The system includes at least three robot stations. The method of the fourth aspect of the patent application, the conductor wafer manufacturing system includes at least four robot stations. 8. The method of claim 1, wherein the step computer system _ Real 1 I (4) and Step (4) by - 9. The method of the first paragraph of the patent scope 'where the tracking system responds from the signal of the broadcast = clock - and the scanner system responds from the sweep" Operation of one of the system clocks. 0 'A semiconductor wafer fabrication system, including: A scanner system that operates in response to the slave-scanner system clock. : Tracking system's response from a tracking system clock Operate with one signal; a small-mobile device for moving to the y-wafer within the semiconductor wafer fabrication system; for use in the single-synchronous semiconductor wafer fabrication system: a predetermined waiting state to reduce the semiconductor crystal a circular manufacturing system, a resource conflict in the first; and a dynamic insertion device for delaying the semiconductor insertion time as required to compensate for the semiconductor crystal in the first pulse of the first pulse In a circular manufacturing system, a complex medium-to-nine clock operates at a semiconductor wafer fabrication system at a rate equivalent to at least 90 wafer round-out rates per hour. Sub-12. Semiconductor wafer fabrication scans as claimed in Shen π Patent Phase 1() The clock is operated in the semiconductor wafer fabrication system at a sub-recovery rate of 91980-990607.doc 1324743 at a rate of at least 160 wafer outputs per hour. The semiconductor wafer fabrication system of the syllabus of the syllabus is also included in the computer system to control at least part of the semiconductor wafer fabrication system. 14. The semiconductor wafer fabrication system of claim </ RTI> wherein the dynamic insertion device for dynamically inserting a time delay comprises a computer system. 15. The semiconductor wafer fabrication system of claim 14, wherein the computer system generates at least the scanner system clock. 16. The semiconductor wafer fabrication system of claim 1, wherein the mobile device for moving comprises at least two robot stations. The semiconductor wafer fabrication system of claim 1, wherein the mobile device for moving comprises at least three robot stations. A computer readable medium storing a computer program, the computer readable media operation in a semiconductor wafer fabrication system, the system including at least one of the scanner systems responding to the signal operation from the scanning benefit system clock and the response from the chase One of the vertical system clock operations, the tracking system, when performing the computer program, performs at least one of the following steps: (4) determining a deviation from the nominal periodicity in the clock of the sweeper system; and (b) calculating and Time delays are dynamically inserted in the semiconductor wafer fabrication system as needed to compensate for such deviations. 19. The computer readable medium of claim 18, wherein the program statically pre-plans the state of the material to reduce resource conflicts within the semiconductor wafer production system. 20. A computer readable medium as claimed in claim 18, wherein the program dynamically determines the deviation from the nominal periodicity in the clock of the scanning system and the calculations required when executing 91980-990607.doc 1324743 The time delay for compensating for such deviations.

91980-990607.doc91980-990607.doc

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TWI561054B (en) * 2011-04-26 2016-12-01 Kodak Alaris Inc Forward facing scanner

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TWI755177B (en) * 2020-11-27 2022-02-11 大陸商北京集創北方科技股份有限公司 Synchronous activation method of cascaded chips, sensing device and information processing device

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI561054B (en) * 2011-04-26 2016-12-01 Kodak Alaris Inc Forward facing scanner

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