TWI324430B - Start-up circuit with feedforward compensation for power converters - Google Patents

Start-up circuit with feedforward compensation for power converters Download PDF

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TWI324430B
TWI324430B TW95136700A TW95136700A TWI324430B TW I324430 B TWI324430 B TW I324430B TW 95136700 A TW95136700 A TW 95136700A TW 95136700 A TW95136700 A TW 95136700A TW I324430 B TWI324430 B TW I324430B
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circuit
signal
sampling
coupled
voltage
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TW95136700A
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TW200818670A (en
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Ta Yung Yang
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System General Corp
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1324430 九、發明說明: 【發明所屬之技術領域】 本發明係有關於一種功率轉換器,特別是指一種切換式功率轉換器之 控制電路。 【先前技術】 按,切換式功率轉換器為一種傳統技術,用於控制輸出功率以達到調 整之目的。一般而言,功率轉換器内建有多種保護功能,例如過電壓保護 -、過龟流保ί隻等,以保護功率轉換器及所連接之電路而避免受到永久性損 。輪出功率限制功能係一般常用於過負载保護與短路保護。 凊參閱第一圖,其為一傳統切換式功率轉換器之電路圖。如圖所示, 傳統切換式功率轉換器係使用_控制電路5G。當電源開啟,一輪入電壓 vDC經由一串聯之啟動電阻3〇充電一啟動電容幻,以提供一供應電壓 VCC啟動電容65耦接於控制電路50之供應端VCC。供應電壓Vcc達到 臨界電壓時’功轉㈣會開始運作且控機路5〇讀tb端OUT開始輪 出輪出切換讯號vPWM而驅動功率轉換器。功率轉換器啟動之後,—變 壓器20之輔助繞組透過一整流器60提供供應電壓vcc。 功率電Μ體10,其耦接於變壓器20之一次側繞組與控制電路5〇之 輸出端0UT ’功率電晶體10依據切換訊號VPWM切換變壓器2〇,以控制 功率轉換$之輸出功率…電阻15,其串聯於功率電晶體⑺,而決定功率 轉換器之最大輪出功^此方法係墟―修餐控制電路%之電流感 ’則端VS。若電壓Vs超過—最大臨界值,控制電路%將會禁能切換訊號 ,緣制功特翻之最墙㈣率。然而,最域㈣率會受到一 Μ’時間TD|響’此時間係指位在電流感測端vs之麵%被彳貞測高於 取大6^界糾,控制電路5G之城《 VPWM會翻過—延遲時間1〇後 才截止。延遲時間Td係依據輸人《Vix之變化而造鮮同之過功率保護。 甩阻35,其轉接於輸入電壓VDC與電流感測端vs之間以用於前 顧償。前饋補伽簡麯人電壓VDG與延遲時間Tc^造叙輸出功率 不一致。藉由恰當選擇電阻35之電阻值,即可在低線電壓(low line voltage) 與南線電壓(high Hne v。丨tage)輸人時取得—致之輸出功細卜由於電 阻3(^與電阻35會造成明顯的功率損耗’制是在高線電壓輪人時。所以 現今提議制-電阻進行前饋補償與啟動,其揭露於楊先生等人所提出之 6,611,439 #^ rpwM c〇ntr〇Her f〇r —11〇§ ^ 此外,楊先生等人所提出之美國專利第6,9〇6,934 5虎之 Integrated start-up circuit with reduced p0wer consumpti〇n」,更可降低 功率損耗。然而’美國專利第6 9〇6,934號所揭露之技術無法應用於美國專 利第6,611,439所揭露之電路。 因此’本發明提出一種功率轉換器之啟動電路,以解決上述習用技術 之問題’本發明為了節省功率與減少元件數目,係使用—電阻達成啟動、 前饋補償與安規之目的。 【發明内容】 本發明之主要目的,在於提供一種功率轉換器之啟動電路,其藉由使 用-電阻達成啟動、前饋補償與安規,以達到節省功率轉換器之功率損耗 與減少元件數量的目的。 本發明為了節省轉與降低元件數量,本發明使用—狀電阻進行啟 1324430 動和前饋補償。基於安規,功率轉換器必須設置洩放電阻,以洩放功率轉 . 換器之電磁千擾濾波益。本發明之電路包含一輸入端而耦接洩放電阻以用 於啟動;一分壓電路,其耦接於輸入端;一取樣保存電路,其耦接分壓電 路’以從分壓電路取樣與保存一電壓訊號;之後,一低通濾波器,其用於 過濾線頻漣波以及依據電壓訊號產生一偏移訊號,低通過濾器為一取樣過 • 濾器。偏移訊號係傳送至—限制電路,以產生一限制訊號,限制訊號用以 限制功率轉換器之一切換電流。 I 【實施方式】 兹為使貴審查委員對本發明之結構特徵及所達成之功效有更進一步 之瞭解與認識,謹佐以較佳之實施例及配合詳細之說明,說明如後: 請參閱第二圖,其係本發明之切換式功轉換器之電路圖。如圖所示, -控制電路100包含-啟動電路勘、一第一比較器11〇、一第二比較器 120、一反及閘160、一正反器18〇與一振盈器15〇。其中’振盈器15〇係 提供-脈波訊號PLS至正反器18〇。基於安規規定,功率轉換器必須設置 • 一茂放電阻(bleedingresistor) 70,用於沒放功率轉換器之電磁干擾濾波器 (EMI filter) ° 為了即省功率與降低元件數量,本發明進一步使㈣放電阻%於啟動 和前饋補償。舦電阻70 _接於一輸入雙^與控制電路·之一輸 . 入端V|N之間以用於啟動。一橋式電路90,其搞接於輸人電堡^與茂放 ’ 電阻7〇之間,橋式電路90更耗接於-變壓器25之-次側繞M。一旦功率 轉換益啟動時’輪入電壓Vac會透過泼放電阻7〇傳輪於啟動電路,並 且開始充電-啟_容69,以提供—供應雜I至控㈣路㈣之一供 7 應端VCC。當啟動電容69之電壓達到臨界電壓時’控制電路1〇〇會開始 運作並輸出-切換減VPWM。轉,變壓n 25之獅敝會透過一二極 體67而提供供應電壓Vcc。 啟動電路200所產生之一限制訊號Vumit用以決定一最大電流感測電 壓’其傳輸至第一比較器110之正輸入端。第二比較器12〇之正輸入端係 耗接至控制電路之-回授端FB,以用於功率轉換器之輸出調整…光 耦合器55,其耦接於變壓器25之二次側繞組與回授端FB之間,以形成一 回授控制迴路。功率轉換器之輸出電壓v〇透過一齊納二極體51與一電阻 53傳送至光耦合器55。變壓器25之二次側繞組透過一整流器57而輸出該 輪出電壓V〇。一濾波電容59,其耦接於整流器57與變壓器25之二次側 繞組。 第-比較器110與第二比較器120之負輸入端係搞接在一起並透過控 制電路100之一電流感測端VS而連接至一功率電晶體17之源極。第一比 較器110與第二比較器120之輸出端係分別搞接至反及閘16〇之兩輸入 端,而反及閘160之輸出端則耦接於正反器180之重置端。正反器18〇之 輪出端耦接於功率電晶體17之閘極並輸出切換訊號VpwM β功率電晶體i7 之汲極耦接至變壓器25之一次侧繞組。 一切換電流Ip流過一電阻19而導致在電阻19產生一感測電壓vs,第 一比較器no會比較感測電壓vs與限制訊號Vlimit之電壓。當感測電麼 vs大於限制訊號Vumit之電壓時’第一比較器11〇將輪出一低準位之邏輯 訊號至反及閘160之輸入端。因此’反及閘160將輸出一高準位之邏輯訊 號至正反器I8(m重置正反II⑽,而魏浦WuVpwM細截止功率電 丄以4430 . 晶體丨7。如此,即可達到限制輸出功率之目的β . 睛參_三® ’其為本發明之啟動電路之-難實施_電路圖。如 圖所不,控制電路卿之輸入端Vin透過茂放電阻70搞接於功率轉換器之 • 輪入電壓Vac。—二極體205,其叙接控制電路100之輸入端VlN與控制電 路100之供應端VCC,用於提供電源至功率轉換器之控制電路卿。一分 . 壓電路207,其包含電阻21〇、220,電阻210與電阻22〇相串聯。分壓電 . 路207透過一開關225而減輸入端VIN。-取樣保存電路23〇,其耗接分 # ㈣路207,以從分屋電路207取樣及保存一電壓訊號。-低通遽波器, 其祕取樣保存電路230,以依據電壓訊號產生一偏移訊號(〇細_朴 -限制電路25G ’其_接低通渡波器24G,以依據—參考訊號與偏移訊 號產生限制訊號VLIMIT。 限制電路250 ’其包含一加法器255與參考訊號260,參考訊號26〇耦 接至加法器255之正輸入端,偏移訊號則耦接至加法器255之負輸入端。 所以’限制訊號VLIM1T會依據偏移訊號之增加而減少,以用於限制功率轉 φ 換器之切換電流1p。因此,即可達到前饋補償之目的。且,輸入電壓v 増加時’係會降低功率轉換器之切換電流ιρ。由上述可知,本發明之啟動 電路為具有偵測之電路,其用以偵測線電墨(line v〇ltage )。 復參閱第三圖,取樣保存電路230包含一第一取樣開關231與一第一 * 電容235 ’第一取樣開關231耦接至分壓電路207,第一電容235則耦接至 - 第一取樣開關231 ’以產生電壓訊號。第一取樣開關231受控於一第一取 樣dfl?虎Si ’其分邊於功率轉換益之切換sfL號VpwM。另外,第一取樣訊辦· \亦控制開關225。低通濾波器240包含一第二取樣開關241與一第二電 谷245 ’第二取樣開關241耦接至取樣保存電路230之第一電容235,第二 電容245則耦接至第二取樣開關24卜以產生偏移訊號。第二取樣開關241 文控於一第二取樣訊號Sr其與第一取樣訊號S|同步。為了完成低通濾波, 第二電容245之電容值係高於第一電容235之電容值。 請參閱第四圖,其為本發明用於產生第一取樣訊號\與第二取樣訊號 心之一產生電路的電路圖。如圖所示,一計數器3〇〇之輸入端係耦接正反 益180之輸出端,以接收切換訊號VpwM,計數器3〇〇之輸出端則耦接於一 及閘310之輸入端,及閘31〇之另一輸入端亦耦接正反器18〇之輸出端, 以接收切換訊號VPWM,及閘310之輸出端則產生第一取樣訊號&。一第一 單擊電路(one-shot circuit) 350,其接收第一取樣訊號S|,第一單擊電路 350之輸出端耦接一第二單擊電路36〇之輸入端。第二單擊電路36〇產生 第二取樣訊號S2 ’其中第-單擊電路35〇如第五圖所示,依據第一取樣訊 號呂,之下降邊緣(faUingedge)決定一延遲時間T|,第二單擊電路則 決定第二取樣城n脈波紋T2。帛__取樣峨&鮮二取樣訊號 S2之波形圖如第五圖所示。 综合前述可知,限制訊號VUMIT之電壓為輸入電壓Vac之一函數,而 最大切換電流Ip之變化係與輸人電壓Vag之偏移量成反比。低通濾波器· 係濾除輸人電壓vAe之賴漣波,所簡放電阻7Q可麟啟動電路,以節 省功率。藉由適當地選擇触電阻7〇之電阻值,可在低線電壓以及高線電 壓輸入時’例如90 Vac與264 Vac,達到-致之限制輪出功率。 綜上所述’本發明係實為—具有新額性、進步性及可供產業利用者, 應符合我國專触所蚊之專射請要件無疑,綠法提出發明專利申 1324430 請,祈鈞局早日賜准專利,至感為禱。 惟以上所述者,僅為本發明之-較佳實施例而 明實施之,舉凡依本發”請專·圍所述之也、 砷所為之均等變化與修飾,均應包括於本發日^請專利^内 並非用來限定本發 特徵及精 1324430 【圖式簡單說明】 第一圖為一傳統切換式功率轉換器之電路圖; 第二圖為本發明之切換式功率轉換器之電路圖; 第三圖為本發明具前饋補償之啟動電路的電路圖; 第四圖為本發明產生取樣信號之產生電路的電路圖;及 第五圖為本發明之取樣信號的波形圖。 【主要元件符號說明】1324430 IX. Description of the Invention: [Technical Field] The present invention relates to a power converter, and more particularly to a control circuit of a switching power converter. [Prior Art] By pressing, the switching power converter is a conventional technique for controlling the output power for the purpose of adjustment. In general, the power converter has built-in protection functions, such as over-voltage protection - and over-current protection, to protect the power converter and the connected circuit from permanent damage. The turn-off power limit function is commonly used for overload protection and short-circuit protection. Referring to the first figure, it is a circuit diagram of a conventional switched power converter. As shown, the conventional switched power converter uses the _ control circuit 5G. When the power is turned on, a round-in voltage vDC is charged through a series of start resistors 3 一 to activate a capacitor to provide a supply voltage. The VCC start capacitor 65 is coupled to the supply terminal VCC of the control circuit 50. When the supply voltage Vcc reaches the threshold voltage, the power conversion (4) will start to operate and the control circuit 5 reads the tb terminal OUT to start the rotation of the switching signal vPWM to drive the power converter. After the power converter is started, the auxiliary winding of the transformer 20 is supplied with a supply voltage vcc through a rectifier 60. The power electric body 10 is coupled to the primary side winding of the transformer 20 and the output terminal of the control circuit 5'. The power transistor 10 switches the transformer 2〇 according to the switching signal VPWM to control the power conversion of the power output. It is connected in series with the power transistor (7), and determines the maximum round-trip power of the power converter. This method is the current sense of the utility-control circuit. If the voltage Vs exceeds the maximum threshold value, the control circuit % will disable the switching signal, and the edge of the system will turn over the wall (four) rate. However, the most (four) rate will be affected by a 'time TD| ring' this time is the position of the current sensing terminal vs. % is measured higher than the large 6^ boundary correction, the control circuit 5G city "VPWM Will turn over - the delay time is 1 〇 before the deadline. The delay time Td is based on the change of the Vix. The resistor 35 is switched between the input voltage VDC and the current sensing terminal vs for pre-emptive compensation. The feedforward complement gamma bender voltage VDG is inconsistent with the delay time Tc^. By properly selecting the resistance value of the resistor 35, it is possible to obtain the output power during the input of the low line voltage and the south line voltage (high Hne v. 丨tage) due to the resistance 3 (^ and Resistor 35 will cause significant power loss. The system is based on the high-voltage voltage. Therefore, the proposed current-resistance feedforward compensation and start-up is disclosed in the 6,611,439 #^ rpwM c〇ntr〇 proposed by Mr. Yang et al. Her f〇r—11〇§ ^ In addition, the US Patent No. 6,9〇6,934 5 Tiger's Integrated start-up circuit with reduced p0wer consumpti〇n, which is proposed by Mr. Yang et al., can reduce power loss. The technique disclosed in U.S. Patent No. 6,096,934 is not applicable to the circuit disclosed in U.S. Patent No. 6,611,439. Therefore, the present invention proposes a start-up circuit for a power converter to solve the above-mentioned problems of the prior art. The purpose of saving power and reducing the number of components is to use a resistor to achieve startup, feedforward compensation and safety regulation. SUMMARY OF THE INVENTION The main object of the present invention is to provide a power converter startup The road achieves the power loss and the number of components of the power converter by using the -resistance to achieve the start-up, feed-forward compensation and safety regulation. The present invention uses a resistor to reduce the number of components and reduce the number of components.启1324430 Motion and feedforward compensation. Based on the safety regulations, the power converter must be equipped with a bleeder resistor to bleed the power. The circuit of the present invention includes an input coupled to the bleeder resistor. For starting; a voltage dividing circuit coupled to the input end; a sampling and holding circuit coupled to the voltage dividing circuit to sample and store a voltage signal from the voltage dividing circuit; and thereafter, a low pass filter It is used to filter the line frequency chopping and generate an offset signal according to the voltage signal. The low pass filter is a sampled filter. The offset signal is transmitted to the limiting circuit to generate a limiting signal, and the limiting signal is used to Limiting the switching current of one of the power converters. I [Embodiment] In order to enable the reviewing committee to further understand and recognize the structural features and effects of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS The following is a description of the preferred embodiment and the detailed description. Referring to the second drawing, which is a circuit diagram of the switching power converter of the present invention, as shown, the control circuit 100 includes a start-up circuit. The first comparator 11 〇, a second comparator 120, a reverse gate 160, a flip-flop 18 〇 and a vibrator 15 〇, wherein the 'vibrator 15 提供 provides a pulse signal PLS to flip-flop 18〇. Based on safety regulations, the power converter must be set up • a bleeding resistor 70 for the EMI filter of the power converter. ° To save power and reduce components In terms of quantity, the present invention further enables (4) discharge resistance % for start-up and feed-forward compensation. The 舦 resistor 70 _ is connected to an input double ^ and the control circuit · one of the input terminals V|N for starting. A bridge circuit 90 is connected between the power transmission and the resistor 7 ,, and the bridge circuit 90 is further connected to the secondary side of the transformer 25 . Once the power conversion gain starts, the 'wheeling voltage Vac will pass through the discharge resistor 7〇 to the start circuit, and start charging-enable 69 to provide - supply the hybrid I to the control (four) way (four) for the 7 end VCC. When the voltage of the starting capacitor 69 reaches the threshold voltage, the control circuit 1 开始 starts to operate and outputs - switches minus VPWM. Turning, the n 25 lion's lion will supply the supply voltage Vcc through a diode 67. One of the limiting signals Vumit generated by the startup circuit 200 is used to determine a maximum current sensing voltage' which is transmitted to the positive input terminal of the first comparator 110. The positive input terminal of the second comparator 12 耗 is connected to the feedback terminal FB of the control circuit for output adjustment of the power converter... the optical coupler 55 is coupled to the secondary winding of the transformer 25 and Between the end FBs to form a feedback control loop. The output voltage v〇 of the power converter is transmitted to the optical coupler 55 through a Zener diode 51 and a resistor 53. The secondary side winding of the transformer 25 is output through a rectifier 57 to output the wheel-out voltage V?. A filter capacitor 59 is coupled to the secondary winding of the rectifier 57 and the transformer 25. The first comparator 110 is coupled to the negative input terminal of the second comparator 120 and coupled to the source of a power transistor 17 through a current sensing terminal VS of the control circuit 100. The output ends of the first comparator 110 and the second comparator 120 are respectively connected to the input terminals of the opposite gates 16, and the output terminals of the opposite gates 160 are coupled to the reset terminals of the flip-flops 180. The turn-off terminal of the flip-flop 18 is coupled to the gate of the power transistor 17 and outputs a switching signal VpwM. The drain of the power transistor i7 is coupled to the primary winding of the transformer 25. A switching current Ip flows through a resistor 19 to cause a sense voltage vs at the resistor 19, and the first comparator no compares the voltage of the sense voltage vs and the limit signal Vlimit. When the sense voltage is greater than the voltage of the limit signal Vumit, the first comparator 11 turns a low level logic signal to the input of the inverse gate 160. Therefore, the 'reverse gate 160 will output a high-level logic signal to the flip-flop I8 (m resets the positive and negative II (10), while the Weipu WuVpwM fine-cut power 丄 is 4430. The crystal 丨7. Thus, the limit can be reached. The purpose of the output power is β. 目参_三® 'is the starting circuit of the invention - difficult to implement _ circuit diagram. As shown in the figure, the input terminal Vin of the control circuit is connected to the power converter through the cascading resistor 70. • Wheeling voltage Vac.—Diode 205, which is connected to the input terminal V1N of the control circuit 100 and the supply terminal VCC of the control circuit 100, for providing a power supply to the control circuit of the power converter. 207, which comprises resistors 21〇, 220, and resistor 210 is connected in series with resistor 22〇. Piezoelectric. Circuit 207 reduces input terminal VIN through a switch 225. - Sample save circuit 23〇, which consumes points #(四)路207 Taking a voltage signal from the branching circuit 207 and storing a voltage signal. The low-pass chopper, the secret sampling and holding circuit 230, generates an offset signal according to the voltage signal (〇 _ - - limit circuit 25G _ Low-pass ferrite 24G, based on - reference signal and offset signal to generate restrictions The limit circuit 250' includes an adder 255 and a reference signal 260, the reference signal 26 is coupled to the positive input of the adder 255, and the offset signal is coupled to the negative input of the adder 255. The limit signal VLIM1T is reduced according to the increase of the offset signal, so as to limit the switching current 1p of the power converter. Therefore, the feedforward compensation can be achieved. Moreover, when the input voltage v is increased, the system will reduce the power. The switching current of the converter is ιρ. As can be seen from the above, the starting circuit of the present invention is a circuit with detection for detecting line ink (line v〇ltage). Referring to the third figure, the sampling and holding circuit 230 includes a The first sampling switch 231 is coupled to the first sampling capacitor 231, and the first sampling capacitor 231 is coupled to the voltage dividing circuit 207. The first capacitor 235 is coupled to the first sampling switch 231' to generate a voltage signal. The switch 231 is controlled by a first sampling dfl? Tiger Si' is switched between the power conversion benefits sfL number VpwM. In addition, the first sampling device also controls the switch 225. The low pass filter 240 includes a second Sampling switch 241 and one The second sampling switch 241 is coupled to the first capacitor 235 of the sampling and holding circuit 230, and the second capacitor 245 is coupled to the second sampling switch 24 to generate an offset signal. The second sampling switch 241 The second sampling signal Sr is synchronized with the first sampling signal S|. To complete the low-pass filtering, the capacitance of the second capacitor 245 is higher than the capacitance of the first capacitor 235. Please refer to the fourth figure, which is A circuit diagram for generating a circuit for generating a first sampled signal and a second sampled signal center. As shown in the figure, the input end of a counter 3 is coupled to the output of the positive and negative 180 to receive the switching signal VpwM, and the output of the counter 3 is coupled to the input of the AND gate 310, and The other input terminal of the gate 31 is also coupled to the output of the flip-flop 18〇 to receive the switching signal VPWM, and the output of the gate 310 generates the first sampling signal & A first one-shot circuit 350 receives the first sample signal S|, and an output of the first click circuit 350 is coupled to an input terminal of the second click circuit 36. The second click circuit 36 generates a second sampling signal S2', wherein the first-click circuit 35, as shown in the fifth figure, determines a delay time T| according to the falling edge (faUingedge) of the first sampling signal The second click circuit determines the second sampling city n-wave ripple T2.帛__Sampling 峨&Fresh sampling signal The waveform of S2 is shown in the fifth figure. As can be seen from the foregoing, the voltage of the limit signal VUMIT is a function of the input voltage Vac, and the change of the maximum switching current Ip is inversely proportional to the offset of the input voltage Vag. Low-pass filter · Filters the input voltage vAe. The simple resistor 7Q can start the circuit to save power. By appropriately selecting the resistance value of the contact resistor 7 ,, it is possible to limit the wheel power at low line voltage and high line voltage input, for example, 90 Vac and 264 Vac. In summary, the invention is based on the fact that the invention has the advantages of new quantity, progress and availability for the industry. It should be in accordance with the special requirements of the special touch mosquitoes in China. The Green Law proposes the invention patent application 1324430. The bureau gave patents as soon as possible, and felt prayed. However, the above description is only for the preferred embodiment of the present invention, and the equivalent changes and modifications of the arsenic according to the present invention should be included in the present day. The patent is not used to limit the features of the present invention and the fine 1324430 [Simplified description of the drawings] The first figure is a circuit diagram of a conventional switching power converter; the second figure is a circuit diagram of the switching power converter of the present invention; The third figure is a circuit diagram of a startup circuit with feedforward compensation according to the present invention; the fourth diagram is a circuit diagram of a generation circuit for generating a sampling signal according to the present invention; and the fifth diagram is a waveform diagram of a sampling signal of the present invention. 】

10 功率電晶體 15 電阻 17 功率電晶體 19 電阻 20 變壓器 25 變壓器 30 啟動電阻 35 電阻 40 電阻 50 控制電路 51 齊納二極體 53 電阻 55 光搞合器 57 整流器 59 濾波電容 60 整流器 65 啟動電容 67 二極體 69 啟動電容 70 洩放電阻 90 橋式電路 100 控制電路 110 第一比較器 120 第二比較器 150 振盪器 160 反及閘 180 正反器 200 啟動電路 205 二極體 207 分壓電路 210 電阻 220 電阻 225 開關 230 取樣保存電路 231 第一取樣開關 235 第一電容 240 低通滤波器 241 第二取樣開關 245 第二電容 250 限制電路 132443010 Power transistor 15 Resistor 17 Power transistor 19 Resistor 20 Transformer 25 Transformer 30 Starting resistor 35 Resistor 40 Resistor 50 Control circuit 51 Zener diode 53 Resistor 55 Light fitting 57 Rectifier 59 Filter capacitor 60 Rectifier 65 Starting capacitor 67 Diode 69 Startup Capacitor 70 Relief Resistor 90 Bridge Circuit 100 Control Circuit 110 First Comparator 120 Second Comparator 150 Oscillator 160 Inverting Gate 180 Reversing Device 200 Starting Circuit 205 Diode 207 Divider Circuit 210 resistor 220 resistor 225 switch 230 sample save circuit 231 first sampling switch 235 first capacitor 240 low pass filter 241 second sampling switch 245 second capacitor 250 limiting circuit 1324430

255 加法器 260 參考電壓 300 計數器 310 及閘 350 第一單擊電路 360 第二單擊電路 FB 回授端 GND 接地端 IP 切換電流 NS 二次側繞組 OUT 輸出端 PLS 脈波訊號 SI 第一取樣訊號 S2 第二取樣訊號 T1 延遲時間 T2 脈波寬度 VAC 輸入電壓 VCC 供應電壓 VIN 輸入端 VLIMIT 限制訊號 VO 輸出電壓 VPWM 切換訊號 VS 感測電壓 VCC供應端 VS 電流感測端255 Adder 260 Reference voltage 300 Counter 310 and gate 350 First click circuit 360 Second click circuit FB Feedback terminal GND Ground terminal IP Switching current NS Secondary winding OUT Output PLS Pulse signal SI First sampling signal S2 second sampling signal T1 delay time T2 pulse width VAC input voltage VCC supply voltage VIN input terminal VLIMIT limit signal VO output voltage VPWM switching signal VS sensing voltage VCC supply terminal VS current sensing terminal

Claims (1)

十、申請專利範圍: 1. 一種啟動電路,其包含有: 一輸入端,其透過一洩放電阻耦接一功率轉換器之一輸入電壓; 一二極體,其耦接該輸入端與該功率轉換器之一控制電路之一供 應端而提供電源至該控制電路; 一分壓電路’其透過一開關耦接該輸入端; 一取樣保存電路,其耦接該分壓電路,從該分壓電路取樣與保存 一電壓訊號; 一低通濾波器’其耦接該取樣保存電路,依據該電壓訊號產生一 偏移訊號;以及 一加法器’其耦接該低通濾波器,依據一參考訊號與該偏移訊號 產生一限制訊號; 其中’該限制訊號限制該功率轉換器之一切換電流。 2. 如申請專利範圍第1項所述之啟動電路,其中該分壓電路包含相 串聯之複數電阻。 3. 如申請專利範圍第1項所述之啟動電路,其中該取樣保存電路包 含: 一第一取樣開關,其耦接該分壓電路;以及 一第一電容’其耦接該第一取樣開關,而產生該電壓訊號; 其中’該第一取樣開關受控於一第一取樣訊號,其分離於該功率 轉換器之一切換訊號。 4. 如申請專利範圍第3項所述之啟動電路,其中該低通濾波器包含: 一第二取樣開關,其耦接該取樣保存電路之該第一電容;以及 一第二電容,其耦接該第二取樣開關,而產生該偏移訊號; 其中,該第二取樣開關受控於一第二取樣訊號,其與該第一取樣 訊號同步。 換頁 5. 如申請專利範圍第4項所述之啟動電路,其中該第二電容之 值鬲於該第一電容之電容值。 μ 6. —種啟動電路,其包含有: 一輸入端’其透過—触電阻減-功率轉換器之-輪入電壓. 一分壓電路,其耦接該輸入端; , -取樣保存電路,其純該分壓電路,自該分壓電路取樣與保 一電壓訊號; ’、’、子X. Patent application scope: 1. A startup circuit, comprising: an input terminal coupled to an input voltage of a power converter through a bleeder resistor; a diode coupled to the input terminal and the One of the power converters controls one of the supply terminals to supply power to the control circuit; a voltage dividing circuit 'couples the input terminal through a switch; and a sample storage circuit coupled to the voltage dividing circuit The voltage dividing circuit samples and stores a voltage signal; a low pass filter coupled to the sample holding circuit to generate an offset signal according to the voltage signal; and an adder 'coupled to the low pass filter, Generating a limit signal according to a reference signal and the offset signal; wherein 'the limit signal limits one of the power converters to switch current. 2. The start-up circuit of claim 1, wherein the voltage dividing circuit comprises a plurality of resistors connected in series. 3. The start-up circuit of claim 1, wherein the sample-storage circuit comprises: a first sampling switch coupled to the voltage dividing circuit; and a first capacitor coupled to the first sampling Switching to generate the voltage signal; wherein 'the first sampling switch is controlled by a first sampling signal, which is separated from one of the switching signals of the power converter. 4. The start-up circuit of claim 3, wherein the low pass filter comprises: a second sampling switch coupled to the first capacitor of the sample holding circuit; and a second capacitor coupled The second sampling switch is connected to generate the offset signal; wherein the second sampling switch is controlled by a second sampling signal, which is synchronized with the first sampling signal. PAGE 5. The start-up circuit of claim 4, wherein the value of the second capacitor is greater than the capacitance of the first capacitor. 6. 6. A start-up circuit comprising: an input terminal 'transmitting-touch resistance minus-power converter-wheeling voltage. A voltage dividing circuit coupled to the input terminal; - sampling and holding circuit , the pure voltage dividing circuit, sampling and maintaining a voltage signal from the voltage dividing circuit; ', ', child 一低通濾波器,其耦接該取樣保存電路,依據該電壓訊號產生一 偏移訊號;以及 一限制電路,其祕該低通紐ϋ,依據該絲峨產生一限制 訊號; 其中,δ玄限制訊號限制該功率轉換器之一切換電流。 7·如申請專利範圍第6項所述之啟動電路,其中該分壓電路包含複 數電阻。 8. 如申請專利範圍第6項所述之啟動電路,其中該取樣保存電路包 含: 一第一取樣開關,其耦接該分壓電路;以及a low-pass filter coupled to the sampling and holding circuit to generate an offset signal according to the voltage signal; and a limiting circuit for secretly generating a limiting signal according to the wire; wherein The limit signal limits the switching current of one of the power converters. 7. The start-up circuit of claim 6, wherein the voltage dividing circuit comprises a plurality of resistors. 8. The start-up circuit of claim 6, wherein the sample-storage circuit comprises: a first sampling switch coupled to the voltage dividing circuit; 一第一電容,其耦接該第一取樣開關,而產生該電壓訊號; 其中,該第一取樣開關受控於一第一取樣訊號,其分離於該功率 轉換器之一切換訊號。 9. 如申凊專利範圍第8項所述之啟動電路,其中該低通濾波器包含 有: 一第二取樣開關,其耦接該取樣保存電路之該第一電容;以及 一第一電容’其祕該第二取樣卿,而產生該偏移訊號; 其中,該第二取樣開關受控於一第二取樣訊號,其與該第一取樣 訊號同步。 15 1324430a first capacitor coupled to the first sampling switch to generate the voltage signal; wherein the first sampling switch is controlled by a first sampling signal separated from a switching signal of the power converter. 9. The start-up circuit of claim 8, wherein the low-pass filter comprises: a second sampling switch coupled to the first capacitor of the sample-storage circuit; and a first capacitor The second sampling switch is controlled by a second sampling signal, which is synchronized with the first sampling signal. 15 1324430 ίο. 如申請專利範圍第9項所述之啟動電路,其中該第 值高於該第一電容之電容值。Ίο. The start-up circuit of claim 9, wherein the first value is higher than a capacitance value of the first capacitor. 二電容之電容 11. 一種具偵測之啟動電路,其包含有: 一輸入端,其耦接一功率轉換器之一輸入電壓; 一分壓電路,其耦接該輸入端; 保存 一取樣保存電路,其耦接該分壓電路,從該分壓電路取樣與 —電壓訊號;以及 ' 一限制電路,其依據該電壓訊號產生一限制訊號;Capacitor with a capacitor 11. A starting circuit with detection includes: an input coupled to an input voltage of a power converter; a voltage dividing circuit coupled to the input; storing a sample a saving circuit coupled to the voltage dividing circuit, sampling a voltage signal from the voltage dividing circuit; and a limiting circuit generating a limiting signal according to the voltage signal; 其中’該限制訊號限制該功率轉換器之一切換電流。 12·如申請專利範圍第11項所述之啟動電路,其中該取樣保存電路 包含: —第一取樣保存開關,其耦接該分壓電路;以及 —第一電容,其耦接該第一取樣開關,而產生該電壓訊號; ^中,該第一取樣開關受控於一第一取樣訊號,其分離於該功 器之一切換訊號。 、Where the 'limit signal limits one of the power converters to switch current. 12. The start-up circuit of claim 11, wherein the sample-storage circuit comprises: a first sample-storage switch coupled to the voltage-dividing circuit; and a first capacitor coupled to the first The sampling switch generates the voltage signal; wherein, the first sampling switch is controlled by a first sampling signal, which is separated from one of the power switching signals. ,
TW95136700A 2006-10-03 2006-10-03 Start-up circuit with feedforward compensation for power converters TWI324430B (en)

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TWI423571B (en) * 2010-10-25 2014-01-11 Sitronix Technology Corp High voltage start-up device for switch mode power supplies
TWI449315B (en) * 2011-05-27 2014-08-11 Tatung Co Fly back power supply apparatus and digital control circuit and driving method thereof
TWI469491B (en) * 2011-09-14 2015-01-11 System General Corp Controllers

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TWI433105B (en) 2011-07-25 2014-04-01 Sitronix Technology Corp Start circuit
CN109245513B (en) * 2018-11-09 2024-04-09 深圳南云微电子有限公司 Starting circuit
TWI711248B (en) * 2020-04-17 2020-11-21 通嘉科技股份有限公司 Primary controller applied to a primary side of a power converter and operational method thereof

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Publication number Priority date Publication date Assignee Title
TWI423571B (en) * 2010-10-25 2014-01-11 Sitronix Technology Corp High voltage start-up device for switch mode power supplies
TWI449315B (en) * 2011-05-27 2014-08-11 Tatung Co Fly back power supply apparatus and digital control circuit and driving method thereof
TWI469491B (en) * 2011-09-14 2015-01-11 System General Corp Controllers

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