TWI299528B

TWI299528B - Metal oxide semiconductor field effect transistor and method of fabrication thereof

Info

Publication number: TWI299528B
Application number: TW95115542A
Authority: TW
Inventors: Chen Hua Tsai; Bang Chiang Lan; Yu Hsin Lin; Yi Cheng Liu; Cheng Tzung Tsai
Original assignee: United Microelectronics Corp
Priority date: 2006-05-02
Filing date: 2006-05-02
Publication date: 2008-08-01
Also published as: TW200743156A

Description

I299528twf*doc/e 九、發明說明：【發明所屬之技術領域】本發明是有關於—種半導體元件及其製造方法 =有關於-祕有應變層的金氧半場效電晶體及其製造【先前技術】古-直以來，半導體工業以及晶片製造是朝向高效能及间積集度發展。為了使相同的面積的電路發揮更多的效能，晶片的特徵尺寸及供電電壓（supply voltage)會隨^ 減小。一般而言，若其他的參數不變，每個元件所^耗的電力會隨著開關解增加而增加。因此，儘管供電電壓與電容負載減小了，晶片所消耗的電力卻逐漸增加。此外，當場效電晶體的尺寸縮小時，眾所週知的短通道效應 (short channel effect)會變得比較明顯，而使電力損耗的情形更加嚴重。改善短通道效應的方法包括設置源極與汲極淺延伸 (shallow source/drain extensions )。以一金氧半導體場效電晶體的製程為例，在定義閘極之後，先透過一罩幕來進行一狹長範圍且高劑量的離子植入，而在通道區（channel) 的兩側形成淺延伸。接著，在閘極的侧壁形成間隙壁，並於間隙壁以外的基底中形成源極與汲極層。之後進行回火製程以活化摻入的離子，並使淺延伸内的摻質向通道區擴散。雖然向通道區擴散的摻質可以改善例如電擊穿效應 (punch through)等問題，這些摻質擴散程度是難以控制 1299m twf.doc/e 的’而過量的摻f會破壞電晶體的效能。 :匕外，為了進一步改善短通道效應，習知技術是利用 .T入（hal〇lmplant)來抑制所謂的電擊穿效應。然而，先軍植入的離子會減小汲極電流（—η㈣咖），且在問 2尺寸不嶋小的情況下，此問題會制地賴，使電晶體的效能無法進一步提升。【發明内容】本發明之目的是提供―種金氧半場效電晶體的製造方法，以改善淺延伸_摻質向通道區過度擴散的問題。以柄明之另-目的是提供_種金氧半場效電晶體，提兩汲極電流。為達上述或是其他目的，本發明提出一種金氧半場效，晶體的製造方法。此方法是先提供—基底，基底上已形成有，極結構，之後，移除閘極結構_的部分基底，以 =成第-凹陷。接著，於第—凹陷中沉積源極與沒極延伸 ^ (extension)，並於閘極結構兩側形成間隙壁。然後，移除間隙壁以外的部分源極與汲極延伸層及部分基底，以源極與汲極延伸層形成第二_。繼之，於第二凹陷中沉積源極與汲極層。為達上述或是其他目的，本發明再提出一種金氧半場效電晶體。此金氧半場效電晶體包括—基底、間隙壁、源極與汲極延伸層及源極姐極層。其巾，基底上配置有間極結構，㈣隙壁位於此酿結構之側壁上。源極與汲極延伸層位於_伽下祕底巾，㈣、極與汲極層位於間I299528twf*doc/e IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD OF THE INVENTION The present invention relates to a semiconductor device and a method of fabricating the same, and to a metal oxide half field effect transistor having a strained layer and its manufacture [previously Technology] Since ancient times, the semiconductor industry and wafer fabrication have evolved toward high performance and inter-integration. In order to make the circuit of the same area more effective, the feature size of the wafer and the supply voltage will decrease. In general, if other parameters are constant, the power consumed by each component will increase as the switching solution increases. Therefore, although the supply voltage and the capacitive load are reduced, the power consumed by the wafer is gradually increased. In addition, when the size of the field effect transistor is reduced, the well-known short channel effect becomes more apparent, and the situation of power loss is more serious. Methods to improve the short channel effect include setting the source and drain extensions. Taking the process of a MOS field effect transistor as an example, after defining the gate, a narrow-range and high-dose ion implantation is performed through a mask, and shallow on both sides of the channel. extend. Next, a spacer is formed on the sidewall of the gate, and a source and a drain layer are formed in the substrate other than the spacer. A tempering process is then performed to activate the incorporated ions and diffuse the dopants in the shallow extension to the channel region. Although the dopant diffused into the channel region can improve problems such as punch through, the degree of diffusion of these dopants is difficult to control the '1299m twf.doc/e' and excessive doping f can destroy the transistor's performance. In addition, in order to further improve the short-channel effect, the conventional technique utilizes tha lm plant to suppress the so-called electric breakdown effect. However, the ions implanted by the first army will reduce the bungee current (—η(四) coffee), and in the case where the size of the 2 is not small, the problem will be solved, so that the performance of the electric crystal cannot be further improved. SUMMARY OF THE INVENTION It is an object of the present invention to provide a method for fabricating a gold oxide half field effect transistor to improve the problem of shallow extension _ dopant diffusion into the channel region. The other purpose is to provide a kind of gold-oxygen half-field effect transistor, and to raise two-pole current. To achieve the above or other objects, the present invention provides a method for producing a gold oxide half field effect crystal. The method first provides a substrate on which a pole structure has been formed, and then a portion of the substrate of the gate structure is removed to form a first-depression. Next, the source and the extension are deposited in the first recess, and a spacer is formed on both sides of the gate structure. Then, part of the source and drain extension layers and a portion of the substrate other than the spacer are removed, and the source and the drain extension layer form a second _. Then, the source and drain layers are deposited in the second recess. To achieve the above or other objects, the present invention further provides a gold oxide half field effect transistor. The MOS field effect transistor includes a substrate, a spacer, a source and a drain extension layer, and a source gate layer. The towel has a structure on the substrate, and (4) the gap wall is located on the side wall of the brewing structure. The source and the bungee extension layer are located in the _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _

12995®8twf*d〇c/e 隙壁以外的基底中。此外，源極與汲極層的深度大於源極與汲極延伸層的深度。源極與汲極延伸層及源極與汲極層均為應變層（strained layer)。在本發明之一貫施例中，上述之源極與汲極延伸層之結構例如是磊晶(epitaxy)，且源極與汲極延伸層之形成方法例如是選擇性磊晶沉積製程。，本發明之一實施例中，上述之源極與汲極層之結構例如是磊晶，且源極與汲極層之形成方法例如是選擇性石晶沉積製程。、隹本叙明之一實施例中，上述之源極與汲極延伸層之材料例如是矽鍺（silicongermaniumaU〇y，siGe)。此外，源極與汲極延伸層於鄰近基底之部分的鍺組成比 (C〇mP〇sition rati〇)可以大於遠離基底之部分的鍺组成比，且源極與汲極延伸層的鍺組成比例如是呈 (gradient)分佈。又 _在本發明之一實施例中，於形成源極與汲極延伸層之包括於第一凹陷中形成一層摻質擴散阻障層。二摻 = 材料例如切錯。此外，此摻質擴散阻障層例如含有Ν型摻質。爷明之—實施射，上述之祕與祕延伸層麵成源極與沒極離子。每摻雑而注入。此外，p型摻質例如是, 在本發明之—實施例中，上述之源極與聽層之材料 7 129952¾^^ 例如疋梦鍺。此外，源極與沒極層例如是含有p型摻質。 p型摻質例如是硼離子。另外，p型摻質例如是在形成該源極與汲極層時進行臨場摻雜而注入。、，在本發明之一實施例中，上述之源極與汲極延伸層之材料例如是矽碳（siHc〇n carb〇n aii〇y，sic)。此外，源極與汲極延伸層於鄰近基底之部分的碳組成比可以大於遠' 離基底之部分的碳組成比。另外，源極與汲極延伸層的碳組成比例如是呈梯度分佈。另—方面，於形成源極盘沒極，伸層之前’更包括於第-凹时形成—層換_散阻障 ^。摻質擴散阻障層之材料例如是矽碳。此外阻障層例如含有P型摻質。 L貝擴政在本發明之-實施例中’上述之源極與汲極延伸層 2有N型摻質。_摻_如是在形成源極與汲極延伸 =進仃臨場#雜而注人。此外，N型摻f例如是或砷離子。，本發明之-實_中，上述之源極與汲極層之材料例如疋砍碳。祕奴極相如含# N雜質。此 n貝例如疋麵成雜與祕層時進行臨場摻雜而注入。另外，N型摻質例如是_子或坤離子。在本發明之一實施例中，上述之金12995®8twf*d〇c/e in a substrate other than the gap. In addition, the depth of the source and drain layers is greater than the depth of the source and drain extension layers. The source and drain extension layers and the source and drain layers are both strained layers. In a consistent embodiment of the present invention, the structure of the source and drain extension layers described above is, for example, epitaxy, and the method of forming the source and drain extension layers is, for example, a selective epitaxial deposition process. In an embodiment of the invention, the structure of the source and drain layers is, for example, epitaxial, and the method of forming the source and drain layers is, for example, a selective crystal deposition process. In one embodiment of the present invention, the material of the source and drain extension layers is, for example, silicon germanium (U). In addition, the 锗 composition ratio (C〇mP〇sition rati〇) of the source and the drain extension layer adjacent to the substrate may be larger than the 锗 composition ratio of the portion away from the substrate, and the 锗 composition ratio of the source and the drain extension layer If it is a gradient distribution. Further, in an embodiment of the invention, a dopant diffusion barrier layer is formed in the first recess formed in the source and drain extension layers. Two doping = material such as cutting. Further, the dopant diffusion barrier layer contains, for example, a ruthenium type dopant. The Lord's - the implementation of the shot, the above secret and secret extension layer into the source and the immersion ion. Infused every time. Further, the p-type dopant is, for example, in the embodiment of the present invention, the material of the source and the listening layer described above, for example, a nightmare. Further, the source and the electrode layer are, for example, containing a p-type dopant. The p-type dopant is, for example, a boron ion. Further, the p-type dopant is implanted by, for example, performing field doping when the source and drain layers are formed. In one embodiment of the invention, the material of the source and drain extension layers is, for example, germanium carbon (siHc〇n carb〇n aii〇y, sic). Further, the carbon composition ratio of the source and the drain extension layer to a portion adjacent to the substrate may be greater than the carbon composition ratio of the portion far from the substrate. Further, the carbon composition ratio of the source and the drain extension layer is, for example, a gradient distribution. On the other hand, before the formation of the source disk is infinite, the layer is formed more than the first-concave-layer-transformation barrier. The material of the dopant diffusion barrier layer is, for example, germanium carbon. Further, the barrier layer contains, for example, a P-type dopant. L-Bay Expansion In the present invention - the above-mentioned source and drain extension layers 2 have an N-type dopant. _Incorporate _ If the source and the bungee are extended in the formation of the source. Further, the N-type doping f is, for example, or an arsenic ion. In the present invention, the material of the source and the drain layer described above is, for example, slash carbon. The secret slaves contain #N impurities. This n-shell is injected into the field when it is mixed into the impurity layer. In addition, the N-type dopant is, for example, a _ sub or a quinone ion. In an embodiment of the invention, the above gold

=-=散阻障層，位於源極與汲極延 J ^間^質擴散轉層之材料例如是 _ 散阻障層例如含有摻質。此r h貝擴在本發明之-實施例中，上述之金氧半場效電晶體更 12995^^tw^d〇c,e 包括一層摻質擴散阻障層，位於源極與汲極延伸層及基底之間。摻質擴散阻障層之材料例如是矽碳。此外，摻質擴散阻障層例如含有P型摻質。在本發明之一實施例中，上述之基底例如是矽基的 (silicon based)基底、純矽（pure silic〇n)的基底、絕緣層上有石夕（silicon on insulator，SOI)的基底、通道層含鍺 (gernianimn channel)的基底、具有區塊應變（⑹比也―）勺基底及具有種以上晶體方向（crystallographic orientation)的基底。由於本發明的金氧半場效電晶體的製造方法是在源極與汲極延伸層形成之前，先形成—層摻質擴散阻障層，因此在源極與汲極延伸層形成之後，阻擔摻質因回火活化而向通道H難。此外’目為絲與汲極延伸層於鄰近基底之部分的鍺組成比或碳組成_如大於遠離基底之部分 =鍺組成比或碳組成比，所以射因回火活化而向通道區擴政的程度可以受到控制。由於摻質向 =良好的控制，因此製程裕度得以提升。另4= 盘發明的金乳半場效電晶體的源極與汲極延伸層及源極極層及極電流及線性區間汲;:流氧半場效電晶體切錯切碳，所以可以增加金為讓本發明之上述和其他目的、特徵和優點能更明顯 Ι29952^άοο/€ 易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下。【實施方式】【第一實施例】，圖1Α至圖1G是本發明一實施例之金氧半場效電晶體的製造流程剖面圖。在第一實施例中，本發明的金氧半場效電晶體是以一 PMOS製程為例進行說明。請參照圖1Α，首先提供一基底1〇〇。基底1〇〇例如是矽基的（silicon based)基底、純矽的基底、絕緣層上有矽的基底、通道層含鍺的基底、具有區塊應變的基底及具有種以上晶體方向的基底。基底上已形成數個隔離結構102。隔離結構1〇2之材料例如是氧化碎。隔離結構102 之間的基底1〇〇上已形成有閘極結構。閘極結構1〇4 至少包括閘介電層l〇4a、閘極l〇4b、間隙壁l〇4c及閘極護層104d。其中閘介電層i〇4a之材料例如是氧化矽，閘極104b之材料例如是摻雜多晶矽，間隙壁1〇4()之材料例如是氧化矽，而閘極護層l〇4d的材料例如是氮化矽或氧化石夕。此外，閘極結構104下方的基底100是做為此金氧半場效電晶體的通道區106。接著，請參照圖1B，進行乾式蝕刻製程1〇8，而移除部分基底100,於閘極結構兩側的基底1〇〇中形成凹陷 no。乾式蝕刻製程108例如是反應性離子蝕刻（reactive ion etching，RIE)，乾式蝕刻製程1〇8的反應氣體例如是六氟化二碳(C2F6)及氦氣。 10 129951^ wf.doc/e 之後，請參照圖1C，於凹陷u 伸層112。源極與汲極延伸：开/成源極與汲極延來表示。其中W範圍是；^二或^以咖汲極延伸層m之結構例如是路 == 的形成方_是選擇性Μ沉積製程二鼠化夕上成長。換言之，石夕鍺僅會在凹陷110上成長，而不會在間隙壁1G4e、間極護層购及隔離結構102上成長。選擇性蟲晶沉積製程例如是氣相i晶製程（phase epitaxy)，其包括減壓化學氣相沉積蟲晶沉積法（reduced pressure chemical vapor deposition epitaxial deposition) ^ 系壓化學氣相沉積磊晶法（atmosphere chemical vapor deposition epitaxy )以及超高真空化學氣相沉積磊晶法 (ultra high vacuum chemical vapor deposition epitaxy )。值得一提的是，因為鍺的晶格常數大於矽，所以採用石夕錯為材料的源極與汲極延伸層112是一應變層 (strained layer)。換言之，源極與汲極延伸層112的矽鍺曰曰格因受到壓縮而產生非等向（anis〇tr〇pic )的結構，因而改變導帶（conduction band)及價帶（valence band)。由於當源極與汲極延伸層112與基底100結合時，可以針對導帶與價帶的不連續進行設計，以產生量子井（quantum well)及置入電場（built-in electric field)，因此使載子穿越源極與汲極延伸層112與基底1〇〇之介面的速率增加。 11 口 9妙费 doc/e 採用石夕錯為材料的源極與汲極延伸層112可以增進孟氧半場效電晶體的效能。〃:外源極與汲極延伸層112例如含有p型摻質。p 裏心貝例^是在形成源極與汲極延伸層112時進行臨場 ^ Ί雜而注入。與非臨場（ex-situ)摻雜比較，臨坊w可以使源極與汲極延伸層112具有更高的活化推質=-=Dissipation barrier layer, the material of the source and the drain extension layer, for example, the _ diffusion barrier layer, for example, contains dopants. In the embodiment of the present invention, the above-mentioned gold-oxygen half-field effect transistor further includes a layer of dopant diffusion barrier layer, and is located at the source and drain extension layers. Between the bases. The material of the dopant diffusion barrier layer is, for example, germanium carbon. Further, the dopant diffusion barrier layer contains, for example, a P-type dopant. In an embodiment of the invention, the substrate is, for example, a silicon based substrate, a pure silic substrate, and a silicon on insulator (SOI) substrate on the insulating layer. The channel layer contains a base of a gernianimn channel, a substrate having a block strain ((6) ratio), and a substrate having a crystallographic orientation. Since the gold oxide half field effect transistor of the present invention is formed by forming a layer diffusion diffusion barrier layer before the source and the drain extension layer are formed, after the source and the drain extension layer are formed, the resistance is formed. The dopant is difficult to channel H due to temper activation. In addition, the target composition ratio or carbon composition of the filament and the bungee extension layer adjacent to the substrate is greater than the distance from the substrate = the composition ratio of the crucible or the composition ratio of carbon, so that the projection is expanded by the tempering activation. The extent can be controlled. Process margin is improved due to good control of dopant orientation. Another 4 = the source and the drain extension layer and the source pole layer of the gold-plated half-effect transistor invented by the disk and the polar current and linear interval :;: the oxygen half-field effect transistor cuts the carbon by mistake, so the gold can be increased The above and other objects, features, and advantages of the present invention will be apparent from the description and appended claims appended claims [Embodiment] FIG. 1A to FIG. 1G are cross-sectional views showing a manufacturing process of a gold-oxygen half field effect transistor according to an embodiment of the present invention. In the first embodiment, the MOS field-effect transistor of the present invention is described by taking a PMOS process as an example. Referring to FIG. 1A, a substrate 1 is first provided. The substrate 1 is, for example, a silicon based substrate, a pure germanium substrate, a germanium-based substrate on the insulating layer, a channel layer germanium-containing substrate, a substrate having a strained substrate, and a substrate having a plurality of crystal orientations. A plurality of isolation structures 102 have been formed on the substrate. The material of the isolation structure 1〇2 is, for example, oxidized cullet. A gate structure has been formed on the substrate 1 between the isolation structures 102. The gate structure 1〇4 includes at least a gate dielectric layer 〇4a, a gate electrode 〇4b, a spacer wall 〇4c, and a gate pad layer 104d. The material of the gate dielectric layer i〇4a is, for example, tantalum oxide, the material of the gate 104b is, for example, doped polysilicon, the material of the spacer 1〇4 () is, for example, tantalum oxide, and the material of the gate protective layer l〇4d. For example, tantalum nitride or oxidized stone. In addition, the substrate 100 under the gate structure 104 is the channel region 106 that serves as the gold oxide half field effect transistor. Next, referring to FIG. 1B, a dry etching process 1〇8 is performed to remove a portion of the substrate 100, and a recess no is formed in the substrate 1〇〇 on both sides of the gate structure. The dry etching process 108 is, for example, reactive ion etching (RIE), and the reactive gas of the dry etching process 1〇8 is, for example, hexafluoride (C2F6) and helium. After 10 129951^wf.doc/e, please refer to FIG. 1C to extend the layer 112 in the recess u. Source and drain extension: open/source source and drain extension. Wherein the W range is; ^2 or ^ 以汲延伸延伸 m m m m m m 结构结构结构结构结构结构结构结构是是是是是是是是是是是是是是是是是是In other words, Shi Xiyu will only grow on the depression 110, and will not grow on the spacer 1G4e, the interlayer protection layer and the isolation structure 102. The selective insect crystal deposition process is, for example, a phase epitaxy, which includes a reduced pressure chemical vapor deposition epitaxial deposition ^ a pressure chemical vapor deposition epitaxy method ( Atmospheric chemical vapor deposition epitaxy and ultra high vacuum chemical vapor deposition epitaxy. It is worth mentioning that since the lattice constant of germanium is larger than that of germanium, the source and drain extension layer 112 using the material of the stone is a strained layer. In other words, the source and the drain extension layer 112 are compressed to produce an anisotropic structure, thereby changing the conduction band and the valence band. Since the source and the drain extension layer 112 are combined with the substrate 100, the discontinuity of the conduction band and the valence band can be designed to generate a quantum well and a built-in electric field. The rate at which the carrier passes through the interface between the source and drain extension layers 112 and the substrate 1 is increased. 11-port 9-fee doc/e The source and drain extension layer 112 using Shi Xi wrong material can improve the efficiency of the Meng oxygen half-field effect transistor. 〃: The extrinsic and drain extension layers 112 contain, for example, p-type dopants. The p-heart case ^ is injected in the presence of the source and the drain extension layer 112. Compared with ex-situ doping, Linfang w can make the source and drain extension layer 112 have higher activation quality.

0 aCtlVed〇Pant)濃度。此外，由於源極與汲極延伸層112 是以石夕鍺為材料的應變層，因此源極與沒極延伸層112會對通迢區1〇6施加一壓應力（对職）。此麗應力與上述之高活化摻質濃度會增加電晶體的飽和區間②極電流六(saturatio时egion drain c職m，地扣）及線㈣0 aCtlVed〇Pant) concentration. In addition, since the source and drain extension layers 112 are strained layers of the material of the stone, the source and the electrode extension layer 112 exert a compressive stress (work) on the junction area 1〇6. This singular stress and the above-mentioned high activation dopant concentration increase the saturation range of the transistor 2 pole current. (Saturatio, egion drain c, m buckle) and line (4)

流（linear-regi〇n drain current，碰n)。當然，p 型摻質也可以在形成源極與汲極延伸層112之後進行非臨場的換雜而注入。另外，P型摻質例如是硼離子。值得一提的是，在源極與汲触伸層1U形成讀，通f會進行摻質=火活化的步驟，而使p型摻質擴散向閘極結構1〇4下方的通道區106。為了有效控制P型摻質擴散的程度，在本實= 例中，於形成源極與汲極延伸層112之前，更包括於貝= 110中形成一層摻質擴散阻障層114,但本發明並不以== 限。摻質擴散阻障層114的材料例如是矽鍺。此外，換二擴散阻障層114例如含有N型摻質，以阻擋過量的p 質擴散向通道區100。摻質擴散阻障層114的形 / 如是上述之選擇性磊晶沉積製程。此外，在另一實施去例源極與汲極延伸層112於鄰近基底1〇〇之部分的錯纟且、’ 12 例如大於遠離基底HK)之部分的鍺組成比。這種近通運區1〇6的部分源極與汲極延伸I 112具有較多的原子，以阻擔過量的p型摻質擴散向通道區1〇6。另一方面，源極與汲極延伸層112的錯組成比例如是呈梯佈。由此可知，在源極與汲極延伸層112含有P型摻質可以利用源極與汲極延伸層112的錯分佈來 1〇6擴散的p型摻質數量。通逼£ 然後’清蒼照圖1 D，於關托έ士德1 A /1 T / U6° ^ U6 繼之’請參照圖1Ε，於隔離結構102 成層：r料例如是氧化上覆蓋- 源極與沒極延伸層112'，、==’w暴露間隙壁μ及及介電層_罩幕後，以職壁… ⑵。另-方面，由於本實而形成凹陷摻質擴散轉層114,因此乾式射電晶體更包括部分摻質擴散阻障層114。此^乾==更包括移除除，所使用的反應氣體例如移化硫（sf6)及氯氣（q2 )。 /、氣隨後，請參照圖1F，於凹陷122中沉積源極與汲極層 13 I299528twf doc/e =源輪及極層124的材料例層的結構例如是磊曰。疋夕鍺，且源極與汲極的材料是石夕鍺，因此^0與’由於f極與沒極層m =金氧半場效電晶體的性能。方法例如是上述之選擇性蟲晶沉積化及^ 124的形成成長，而不會在氧化矽或氮化矽上成‘。c矽上會在凹陷122上成長，而H 7錯僅及介電層m上成長。此外，源極與及 ==6 P型摻質。P型换所加1 B + 、戍位層124例如含有行許場Π .f 1疋在喊源極與汲極層124時進 U_sm〇摻雜而注入。與非臨使源極皱極層124具有更高的活化“『由於源極與汲極層124是以矽鍺為材料的庫變層，二::與:極層124會對通道區1〇6施加一應力。：應 &之呵活化摻質濃度會增加電晶體的飽和區間沒極 5及線性區間汲極電流。當然，也可以在形成源極與汲極層124之後進行非臨場的摻雜而注入。另外，源極與汲極層124的Ρ型摻質例如是蝴離子。繼之，請參照圖1G，移除閘極護層1〇4d及介電層 118。移除閘極護層104(1及介電層118的方法例如是溼^ 蝕刻製程，且此溼式蝕刻製程例如是以熱磷酸或氫氟酸為姓刻液。然後，於閘極結構102上的閘極104b及源極與汲極層124上形成金屬石夕化物層126，以降低後續形成的接觸窗（contact)與源極與汲極層124的接觸電阻及接觸窗與閘極104b的接觸電阻。金屬矽化物層126的材料例如是 14 12995辦 wf.doc/e 石夕錯化鎳（Ni(SiGe))。金屬石夕化物層126的形成方法例如是先在沉積-層鎳，然後進行一快速熱回火製程（r_ thermd麗31，腸），而形成之。上述之金屬石夕化物層 126的材似械方法是難制，⑽本發明並不以此接著，進行後續的.，以完成金氧半場效電晶體的製作。由於本發明在源極與沒極延伸層形成之前，先形成一層擴散阻障層，因此在源極與汲極延伸層形成之後，阻擔 P』摻！！回火活化而向通道區擴散。此外，因為源極與 =延伸躲㈣基紅部分的鍺組成_如大於遠離基 L的Γ成比’所以p型摻質因回火活化而向通道的程度受到良好的控制，因此製程裕度得以提【第二實施例】面圖圖2是本發明的另一實施例之金氧半場效電晶體的剖半場效電晶體主要包括基底2〇0、 204 'Fa1 216' 曰212及源極與汲極層224。基纟· 上有石夕的基底、通道層含鍺的基底、具有區i 2^Vw" &及具有—種以上晶體方向的基底。閘極結構下其賺罐2G2 1的基底2⑻上。閘極結構2 、刀土 & 200是此金氧半場效電晶體的通道區2〇5。 15 129952¾ wf.doc/e 間隙壁216位於閘極結構204之側壁上。源極與汲極延伸層212位於間隙壁216以下的基底2〇〇中，而源極與汲極層224位於間隙壁216以外的基底200中，且源極與汲極層224的深度大於源極與汲極延伸層212的深度。源極與 /及極延伸層212及源極與没極層224均為一種應變層 (strained layer )。以下詳細說明此兩種應變層的結構及優源極與汲極延伸層212之結構例如是磊晶，且源極與 • 汲極層224之結構也可以是磊晶。此外，源極與汲極延伸層212之材料例如是矽鍺，而源極與汲極層224之材料也可以是矽鍺。因為鍺的晶格常數大於矽，所以採用矽鍺為材料的源極與汲極延伸層212及源極與汲極層是一應變層。源極與汲極延伸層212及源極與汲極層224 會對通道區205施加-壓應力，從而增加電晶體的飽和區間没極電流及線性區間汲極電流。另外，源極與汲極延伸層212採用石夕鍺為材料可以使載子穿越源極與汲極延伸層 212與基底細之介面的速率增加，從而提高此金氧半場攀效電晶體的效能。另外，源極與汲極延伸層212例如含有p型摻質。此 p型摻質例如是硼離子。源極與汲極延伸層212於鄰近基底200之部分的鍺組成比例如大於遠離基底2〇〇之部分的鍺組成比，以阻擋源極與汲極延伸層212的p型摻質因受熱而擴散向通道區205，或至少控制p型摻質擴散向通道區205的數量。另外，源極與汲極延伸層212的鍺組成比 16 129952¾^^°°76 例如是呈梯度分佈。此外’本發明的金氧半場效電晶體更包括一層#貝擴散阻P羊層214’位於源極與沒極延伸層Μ〗及基底200之間。摻質擴散阻障層214的材料例如是矽鍺，且摻質擴散阻障層214例如含型摻f。由於換質擴散阻障層214的設置，因此可以進一步阻擔或控制？型換質因受熱而擴散向通道區205，或至少控制p型摻質擴散向通道區205的數量。#-方面，源極與汲極層224也可以 έ有P型#質，此P型接質例如是蝴離子。由於本發明的金氧半場效電晶體的源極與汲極延伸層及源極與汲極層均為應變層，因此源極與汲極延伸層及ς 極與汲極層會對通道區施喊應力，從而增加電晶體的飽和區間汲極電流及線性區間汲極電流。此外，因為源極斑汲極延伸層及源極與汲極層的材料均為㈣，所以可以㈣加^氧半場效電晶體的效能。再者，由於設置有摻質擴^ 2層，且·無極延伸層具⑽定的聽成比的分佈 ==因此可以阻_極與汲極延伸層_摻質因受献而 ^政向通碰’或至少控制這些摻質擴散向通道區的數量。弟三實施例】圖3A_3G是本發_又—實施例之 :體=程剖面圖。在第三實施例中，本發明= +琢效电晶體是以一 NMOS製程為例進行說明。請參照圖3A，首先提供一基底3〇〇。基底石夕基的基底、絕緣層上有㈣基底、通道層含鍺的=疋 17 12995¾ twf.doc/e =應已^及具有-種以上晶體方向的基底1 例如是氧切。隔離結構3G2之持料閘極_。閘極:構冓3:=^ 極304b、間隙壁304 /匕括閘w私層3叫、間之材料例如是氧切，閘極。: 3Q4d。其中閘t電層304a 矽，間隙壁304c之材料你，之材料例如是摻雜多晶的材料例如是氮化矽或氧疋氧化石夕’而閘極護層3〇4d 〇ππ H 及虱化矽。此外，閘極結構304下方參 %妾著，;參照= 氧 3io^m 3Π〇碳的組成結構通常以Si k之材㈣如7^碳。矽表示。其中表示’或直接以SlC來旧耗N疋介於0至1 〇 == 之f構例如是蟲晶。源極歸二;2Stream (linear-regi〇n drain current, touch n). Of course, the p-type dopant can also be implanted after the source and drain extension layers 112 are formed. Further, the P-type dopant is, for example, a boron ion. It is worth mentioning that the source forms a read with the germanium contact layer 1U, and the pass f performs the step of dopant=fire activation, and the p-type dopant is diffused to the channel region 106 below the gate structure 1〇4. In order to effectively control the degree of P-type dopant diffusion, in the present example, before forming the source and drain extension layer 112, a layer of dopant diffusion barrier layer 114 is further formed in the shell = 110, but the present invention Not limited to ==. The material of the dopant diffusion barrier layer 114 is, for example, germanium. In addition, the second diffusion barrier layer 114 contains, for example, an N-type dopant to block excess p-type diffusion into the channel region 100. The shape of the dopant diffusion barrier layer 114 is as described above for the selective epitaxial deposition process. Further, in another embodiment, the enthalpy composition ratio of the portion of the source and drain extension layers 112 adjacent to the substrate 1 纟 and the portion of < 12, for example, greater than the distance away from the substrate HK). A portion of the source and drain extension I 112 of the near-passage region 1 has more atoms to prevent excess p-type dopant from diffusing into the channel region 1〇6. On the other hand, the wrong composition ratio of the source and the drain extension layer 112 is, for example, a ladder. From this, it can be seen that the source and the drain extension layer 112 contain a P-type dopant. The number of p-type dopants which can be diffused by 1〇6 by the mis-distribution of the source and the drain extension layer 112 can be used. Passing £ and then 'Qing Cang Zhao Figure 1 D, in Guan Tuo De Shi De 1 A / 1 T / U6 ° ^ U6 followed by 'please refer to Figure 1Ε, layered in isolation structure 102: r material such as oxidized overlay - The source and the electrodeless extension layer 112', =='w expose the spacer μ and the dielectric layer _ after the mask, to the job wall... (2). On the other hand, since the recessed dopant diffusion layer 114 is formed in practice, the dry transistor further includes a partial dopant diffusion barrier layer 114. This dry == further includes removal of the reaction gases such as shifted sulfur (sf6) and chlorine (q2). /, Gas Subsequently, referring to FIG. 1F, a source and a drain layer are deposited in the recess 122. The structure of the material layer of the source wheel and the electrode layer 124 is, for example, Lei Lei. The material of the source and the bungee is Shi Xiyu, so ^0 and 'because of the performance of the f-pole and the electrodeless layer m = the gold-oxygen half-field effect transistor. The method is, for example, the selective crystal deposition described above and the formation of 126, without forming a yttrium oxide or tantalum nitride. The c 矽 will grow on the recess 122, and the H 7 will grow only on the dielectric layer m. In addition, the source is and the ==6 P-type dopant. The P-type switching plus 1 B + and the clamping layer 124 contain, for example, a row field Π .f 1 进 when the source and drain layers 124 are shunted, U_sm〇 is doped and implanted. The non-proximity source wrinkle layer 124 has a higher activation "" since the source and drain layers 124 are tantalum-based reservoir layers, two:: and: the polar layer 124 will be the channel region 1〇 6 Apply a stress.: Activated dopant concentration should increase the saturation range of the transistor and the linear range of the drain current. Of course, it can also be performed after the source and drain layers 124 are formed. In addition, the germanium dopant of the source and drain layer 124 is, for example, a butterfly ion. Next, referring to FIG. 1G, the gate cap layer 1〇4d and the dielectric layer 118 are removed. The method of the cap layer 104 (1 and the dielectric layer 118) is, for example, a wet etching process, and the wet etching process is, for example, hot phosphoric acid or hydrofluoric acid as a surname. Then, the gate on the gate structure 102 A metal-lithium layer 126 is formed on the electrode 104b and the source and drain layers 124 to reduce the contact resistance of the subsequently formed contact and the source and drain layer 124 and the contact resistance of the contact window and the gate 104b. The material of the metal telluride layer 126 is, for example, 14 12995 wf.doc/e 夕错错 nickel (Ni(SiGe)). The method for forming the object layer 126 is formed, for example, by depositing a layer of nickel and then performing a rapid thermal tempering process (r_thermd 31, intestine). The material-like method of the above-mentioned metal-stone layer 126 is Difficult to manufacture, (10) the present invention does not follow this, to carry out the subsequent process to complete the fabrication of the gold oxide half field effect transistor. Since the present invention forms a diffusion barrier layer before the formation of the source and the electrodeless extension layer, Therefore, after the source and the drain extension layer are formed, the P 』掺 ! ! 回回回 ! ! ! ! ! 。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。 Therefore, the degree of the p-type dopant is well controlled to the channel due to the tempering activation, so the process margin is improved. [Second Embodiment] FIG. 2 is a gold of another embodiment of the present invention. The half-field effect transistor of the oxygen half field effect transistor mainly comprises a substrate 2〇0, 204 'Fa1 216' 曰212 and a source and a drain layer 224. The base layer has a base of the stone, and the base layer of the channel layer contains a ruthenium. With zone i 2^Vw"& and with more than one crystal The substrate is oriented. Under the gate structure, it is made on the substrate 2 (8) of the can 2G2 1. The gate structure 2, the blade soil & 200 is the channel region of the gold oxide half field effect transistor 2〇5. 15 1299523⁄4 wf.doc/e The spacer 216 is located on the sidewall of the gate structure 204. The source and drain extension layer 212 are located in the substrate 2 below the spacer 216, and the source and drain layer 224 are located in the substrate 200 outside the spacer 216. The depth of the source and drain layers 224 is greater than the depth of the source and drain extension layers 212. The source and/or extension layers 212 and the source and gate layers 224 are both strained layers. The structure of the two strain layers and the structure of the source and drain extension layers 212 are, for example, epitaxial, and the structure of the source and drain layers 224 may also be epitaxial. Further, the material of the source and drain extension layer 212 is, for example, germanium, and the material of the source and drain layer 224 may be germanium. Since the lattice constant of germanium is larger than that of germanium, the source and drain extension layers 212 and the source and drain layers using germanium are a strain layer. The source and drain extension layers 212 and the source and drain layers 224 apply a compressive stress to the channel region 205, thereby increasing the immersion current and the linear interval 汲 current of the saturation region of the transistor. In addition, the source and drain extension layer 212 can be used as a material to increase the rate at which the carrier passes through the source and the drain extension layer 212 and the fine interface of the substrate, thereby improving the performance of the gold oxide half field effect transistor. . In addition, the source and drain extension layer 212 contains, for example, a p-type dopant. This p-type dopant is, for example, a boron ion. The composition ratio of the source and the drain extension layer 212 adjacent to the substrate 200 is, for example, greater than the germanium composition ratio of the portion away from the substrate 2〇〇 to block the p-type dopant of the source and drain extension layer 212 from being heated. Diffusion into the channel region 205, or at least controlling the amount of p-type dopant diffusion to the channel region 205. In addition, the 锗 composition ratio of the source and the drain extension layer 212 is, for example, a gradient distribution. Further, the MOS field-effect transistor of the present invention further comprises a layer of a diffusion barrier P layer 214' between the source and the electrode extension layer and the substrate 200. The material of the dopant diffusion barrier layer 214 is, for example, germanium, and the dopant diffusion barrier layer 214 is, for example, containing a type doped f. Due to the setting of the metasitic diffusion barrier layer 214, it can be further blocked or controlled? The type of heat is diffused into the channel region 205 by heat, or at least controls the amount of p-type dopant diffused into the channel region 205. In the #- aspect, the source and drain layers 224 may also have a P-type, and the P-type is, for example, a butterfly ion. Since the source and the drain extension layer and the source and drain layers of the MOS field-effect transistor of the present invention are strain layers, the source and drain extension layers and the drain and drain layers will apply to the channel region. Shout stress, thereby increasing the saturation interval of the transistor and the linear range of the drain current. In addition, since the source zonal extension layer and the material of the source and the drain layer are both (4), the efficiency of the oxygen half-field effect transistor can be increased. Furthermore, since the distribution of the dopant layer is provided, and the distribution of the ratio of the hearing ratio of the electrodeless extension layer (10) is ==, the resistance of the pole and the pole extension layer can be blocked. Touch or at least control the amount of diffusion of these dopants into the channel zone. Third Embodiment FIG. 3A-3G is a cross-sectional view of the present invention. In the third embodiment, the present invention = 琢 effect transistor is described by taking an NMOS process as an example. Referring to FIG. 3A, a substrate 3 is first provided. The base of the base stone, the insulating layer has (4) the base, the channel layer contains 锗 = 疋 17 129 953⁄4 twf.doc / e = should have and the substrate 1 having more than one crystal direction is, for example, oxygen cut. Isolation structure 3G2 holding material gate _. Gate: Structure 3: = ^ pole 304b, spacer 304 / 闸闸 w private layer 3, the material between them is, for example, oxygen cutting, gate. : 3Q4d. Wherein the gate t electrical layer 304a 矽, the material of the spacer 304c, such as a doped polycrystalline material such as tantalum nitride or yttrium oxide oxide 而 ' and the gate sheath 3 〇 4d 〇 ππ H and 虱Phlegm. In addition, the gate structure 304 is underneath the reference layer; reference = oxygen 3io^m 3Π〇 The composition of the carbon is usually Sik material (4) such as 7^ carbon.矽 said. Wherein, or directly in the form of S1C, the N structure is 0 to 1 〇 ==, such as insect crystal. Source is divided into two; 2

的形成方法例如是選擇性磊曰… Z ，304〇 .1^； :化學氣相_晶法以及超 18 129952^twf,doc/e 值得—提的是，碳的晶格常數小於矽，所以採用矽碳為材料的源極與汲極延伸層312是一應變層。汲極延伸層312的矽碳晶格因受到拉“力：產生非4⑽結構，因而改變導帶及價帶。汲極延=層312與基底結合時，可以針對導;=帶的不連料行設計，以產生量子井及注人電場，因此使載子穿越源極與汲極延伸層312與基底之介面的速率增The formation method is, for example, selective stretching... Z, 304〇.1^; : chemical vapor phase_crystal method and super 18 129952^twf, doc/e is worth mentioning that the lattice constant of carbon is less than 矽, so The source and drain extension layers 312 using germanium carbon are a strained layer. The tantalum carbon lattice of the drain extension layer 312 is subjected to pulling "force: a non-4 (10) structure is generated, thereby changing the conduction band and the valence band. Bipolar extension = when the layer 312 is combined with the substrate, it can be directed to the conduction; Line design to create a quantum well and an injection electric field, thereby increasing the rate at which the carrier passes through the interface between the source and drain extension layers 312 and the substrate

加。綜上所述，採用矽碳的源極與汲極延伸層Μ〕可以^ 進金氧半場效電晶體的效能。曰plus. In summary, the source of the tantalum carbon and the drain extension layer can be used to improve the efficiency of the gold oxide half field effect transistor.曰

此外，源極與汲極延伸層312例如含有Ν型摻質。Ν 型#質例如是在形成源極與汲極延伸層312時進行臨場摻雜而注入。與非臨場摻雜比較，臨場摻雜可以使源極與汲極延伸層312具有更南的活化摻質濃度。高的活化摻質濃度會增加電晶體的飽和區間沒極電流及線性區間汲極電流。當然，Ν型摻質也可以在形成源極與汲極延伸層312 之後進行非臨場的#雜而注入。另外，Ν型摻質例如是石粦離子或砷離子。值得一提的是，在源極與汲極延伸層312 形成之後，通常會進行摻質回火活化的步驟，而使Ν型摻質擴散向閘極結構304下方的通道區306。為了有效控制 Ν型接質擴散的程度’在本實施例中，於形成源極與没極延伸層312之前，更包括於凹陷310中形成一層摻質擴散阻障層314,但本發明並不以此為限。摻質擴散阻障層314 的材料例如是矽碳。此外，摻質擴散阻障層314例如含有 Ρ型摻質，以阻擋過量的Ν型摻質擴散向通道區306。摻 19 12995¾ twf.doc/e 二1、^广_在另—貫施例中，源極與汲極延伸層312 土 & 之部分的碳組成比例如大於遠離基底獅之部分的碳組成比。這種設計使接近通道區3〇6的部分源極與汲極延伸層312具有較多的碳型掺質擴散向通道區306。另—方面，源極』二: 312的碳組成比例如是呈梯度分佈。由此可知，在源= :Ϊ=二2 N型摻f時，可以利_與汲極延 ^層3i2的石厌分佈來控制向通道區3〇6擴散的_推質數望〇、然後，請參照圖3D，於閘極結構3〇4 316。間隙壁316的材料例如是氮切，而^ ==明所屬技術領域中具有通常知識者所熟知，繼之，請參照圖3E ’於隔離結構3〇2 :3:的:1層318的材料例如是氧化蝴切:Si 形成方法例如是先於圖3D的所有 — 層7丨琶層，再進行《與朗製程， : ==Γ:而形成之。之後，二壁： :、…、罩綦’進仃乾式蝕刻製程320，以移除部 -。另-方面，由於本實施例陷搂質擴散阻障層314，因此乾式 > 电曰1更匕括部分推質擴散阻障層314。此外，^===在移矛: 20 12995¾^ doc/e 气反才所使用的反應氣體例如是四氟化碳（CF4)、八氣=烧（咕）及十氟環狀（C5Fi〇)。 324盘1,圖奸，於凹陷322巾沉積源極與没極層層32^的二γ虽層，白勺材料例如是石夕碳’且源極與没極二材Μ 山列如疋蟲晶。再者，由於源極與;及極層324 增進金^效極層324是-應變層’可以成、擇丨生猫日日》儿積製程，使矽碳僅在矽上 =:=輸味上成長。換言之，補及介電iii，而不會在閘極護層、_壁316 卜，源極與汲_ 324 _含冑行臨二二!如是在形成源極與汲極層324時進 1人。與非臨場摻雜比較，臨場摻雜可以使質濃度會增加電晶體3二=2濃度。高的活化換雷、、六。a# ? 區間/及極電流及線性區間汲極臨二二^^在形成源極與汲極層324之後進行非例”注入。另外’源極與例如是磷離子或砷離子。土〇貝 318 H’請參照圖3G ’移除閘極護層及介電層 ^層^及介電層318的方法例如是歷式俗;：崎程例如 ΪΪ 構3G2上嘛遍及源極與汲 ^ 上t成至屬句7化物® 士觸窗與《_0；| 324 =H6’叫低後續形成的接曰24的接觸電阻及接觸窗與閘極304bFurther, the source and drain extension layers 312, for example, contain a erbium type dopant. The Ν type # is implanted, for example, by field doping when the source and drain extension layers 312 are formed. In-situ doping allows the source and dipole extension layer 312 to have a more souther activated dopant concentration than non-field doping. A high concentration of activated dopants increases the saturation current and the linear interval of the transistor. Of course, the erbium type dopant can also be implanted after the source and drain extension layers 312 are formed. Further, the cerium type dopant is, for example, a samarium ion or an arsenic ion. It is worth mentioning that after the source and drain extension layers 312 are formed, the step of dopant tempering activation is typically performed, and the germanium dopant is diffused into the channel region 306 below the gate structure 304. In order to effectively control the degree of diffusion of the germanium type junction, in the present embodiment, a dopant diffusion barrier layer 314 is further formed in the recess 310 before the source and the gate extension layer 312 are formed, but the present invention does not This is limited to this. The material of the dopant diffusion barrier layer 314 is, for example, germanium carbon. In addition, the dopant diffusion barrier layer 314, for example, contains a erbium type dopant to prevent excess erbium dopant from diffusing into the channel region 306. Incorporating 19 129953⁄4 twf.doc/e 2-1, ^ 广 _ In another embodiment, the carbon composition ratio of the source and the bungee extension layer 312 soil & part is greater than the carbon composition ratio of the portion away from the base lion . This design allows a portion of the source adjacent the channel region 3 〇 6 and the drain extension layer 312 to have more carbon-type dopant diffused into the channel region 306. On the other hand, the carbon composition ratio of the source 222: 312 is, for example, a gradient distribution. It can be seen that when the source = : Ϊ = 2 2 N type doped f, the 石分布分布汲 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 控制控制控制控制控制控制控制控制控制控制控制控制控制控制控制控制控制Please refer to FIG. 3D for the gate structure 3〇4 316. The material of the spacer 316 is, for example, nitrogen cut, and is well known to those of ordinary skill in the art, and subsequently, referring to Figure 3E, the material of the isolation structure 3〇2:3:1 layer 318 For example, the oxidized butterfly cut: the Si formation method is, for example, preceded by all of the layer 7 layer of Fig. 3D, and then formed with "Long process, :==Γ:. Thereafter, the two walls: :, ..., the cover 綦 'into the dry etching process 320 to remove the portion -. On the other hand, since the present embodiment is trapped in the barrier diffusion layer 314, the dry > electroconductor 1 further includes a portion of the push diffusion barrier layer 314. In addition, ^=== in the spear: 20 129953⁄4^ doc/e The reaction gases used in the gas counter are, for example, carbon tetrafluoride (CF4), eight gas = burn (咕) and decafluorocyclo (C5Fi〇). . 324 discs 1, traitors, in the depression 322 towel deposition source and the immersed layer 32 ^ two γ layer, the material is for example Shi Xi carbon 'and the source and the singular two materials Μ mountain column such as aphids crystal. Furthermore, since the source and the bottom layer 324 enhance the gold effect layer 324 is a - strain layer can be formed, the choice of the cat day, the child product process, so that the carbon is only on the = =: = loss Grow up. In other words, the dielectric iii is added, and it is not in the gate shield, the _ wall 316, the source and the 汲 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ . Compared with the non-field doping, the on-site doping can increase the concentration of the transistor 3=2. High activation for lightning, and six. A# ? The interval/and the pole current and the linear interval are extremely probable. After the source and drain layers 324 are formed, a non-example "injection is performed. In addition, the source is, for example, a phosphorus ion or an arsenic ion. H' Please refer to FIG. 3G. 'The method of removing the gate cap layer and the dielectric layer ^ and the dielectric layer 318 is, for example, a calendar; for example, it is such as 崎 3 3 3G2 on the source and 汲 ^ on t The contact resistance and the contact window and the gate 304b of the contact 24 formed by the low-sequence formation are described as "supplied" and "_0;|324 = H6"

1299528^-^ 的接觸電阻。金屬妙化物層η =化物。金屬卿層326的形成方法例如匕= 二貝層鎳，然後進行一快速熱回火製程，而形成之屬石夕化物層326的材料及形成方法是較佳範例，缺明並不以此為限。接著，進行後續的製程，以完^ i氧半場效電晶體的製作。由於本發明在源極與沒極延伸層形成之前，先形 Η廣散阻障層’因此在源極與祕延伸層形成之後，阻声 Ν型衫質因回火活化而向通道區擴散。此外’因為源極^ 及極延伸層於鄰近基底之部分的碳域_如大於遠離基底之部分的碳組成比，所以Ν型摻f因回火活化而向通^ 區擴散的程度可以受到控制。由於N型摻質向通道區擴散的程度受職好的控制，因此製雜度得以提升。【第四實施例】圖4是本發明的再一實施例之金氧半場效電晶體的剖面圖。一請蒼照圖4，此金氧半場效電晶體主要包括基底4〇〇、隔離結構402、閘極結構4〇4、間隙壁416、源極與汲極延伸層412及源極與汲極層424。基底4〇〇例如是矽基的基底、絕緣層上有矽的基底、通道層含鍺的基底、具有區塊應變的基底及具有一種以上晶體方向的基底。閘極結構 404配置於隔離結構402之間的基底4〇〇上。閘極結構4〇4 下的部分基底400是此金氧半場效電晶體的通道區4〇5。 22 I299528twf.doc/e 間隙壁416位於閘極結構404之側壁上。源極與汲極延伸層412位於間隙壁416以下的基底400中，而源極與汲極層424位於間隙壁416以外的基底400中，且源極與汲極層424的深度大於源極與汲極延伸層412的深度。源極與汲極延伸層412及源極與汲極層424均為一應變層 (strained layer )。以下詳細說明此兩種應變層的結構及^ 點。源極與汲極延伸層412之結構例如是磊晶，且源極盥沒極層424之結構也可以是蟲晶。此外，源極與汲極延伸層412之材料例如是矽碳，而源極與汲極層424之材料也可以是石夕碳。因為礙的晶格常數小於石夕，所以採用石夕碳為材料的源極與汲極延伸層412及源極與汲極層424 是一應變層。源極與汲極延伸層412及源極與汲極^似4 會對通道區405施加—拉應力。另外，源極與汲極延伸層 412採用♦碳為材料可以使載子穿越源極與汲極延伸^ 412與基底400之介面的速率增加，從而提高此金氧半^ 效電晶體的效能。另外，源極與汲極延伸層412例如含有N型摻質。此 N里4貝例如是;杨子或_離子。源極與沒極延伸層々η 於4近基底4GG之部分的碳組成比例如大於遠離基底柳之部分的碳組成比，以阻擋源極與汲極延伸層412的N型心貝口二熱而擴放向通道區4〇5，或至少控制N型換質擴散向通迢區405的數量。另外，源極與汲極延伸層412的碳組成比例如是呈梯度分佈。此外，本發明的金氧半場效 23 1299528^ doc/e 電晶體更包括-層摻質擴散阻障層414，位於源極與沒極延伸？ 412及基底4〇〇之間。摻質擴散阻障層似的材料例如疋矽碳，且摻質擴散阻障層414例如含有p型摻質。由於摻質擴散阻_ 414的設置，因此可以進一步^或控制N型摻質因受熱而擴散向通道區405，或至少控制N 型摻質擴散向通道區405的數量。另一方面，源極&及極也可以含有N型摻質，此㈣摻質例如是碟離子或、由於本發明的金氧半場效電晶體的源極與汲極延伸層及源極與汲極層均為應變層，且源極與汲極延伸層及源極與没極層的材料均為補，因此可以增加金氧半場效電晶體的效能。再者，由於設置有摻質擴散阻障層，且源極= 汲極延伸層具有特定的碳組成比的分佈方式，因此可以^且擔源極與汲極延伸層⑽摻質因受熱而擴散向通道區，或至少控制這些摻質擴散向通道區的數量。雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍内，當可作些許之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。【圖式簡單說明】圖1A至圖iG是本發明一實施例之金氧半場效電晶體的製造流程剖面圖。 _ 圖2是本發明的另一實施例之金氧半場效電晶體的剖 24 1299528·— 面圖。圖3A至圖3G是本發明的又一實施例之金氧半場效電晶體的製造流程剖面圖。圖4是本發明的再一實施例之金氧半場效電晶體的剖面圖。【主要元件符號說明】 100、200、300、400 :基底 102、202、302、402 ··隔離結構 104、204、304、404 :閘極結構 104a、304a :閘介電層 104b、304b :閘極 104c、304c ··間隙壁 104d、304d :閘極護層 106、206、306、406 ··通道區 108、120、308、320 :乾式蝕刻製程 110、122、310、322 ··凹陷 112、212、312、412 :源極與汲極延伸層 114、214、314、414 :摻質擴散阻障層 116、216、316、416 :間隙壁 118、318 :介電層 124、224、324、424 :源極與汲極層 126、326 :金屬石夕化物層 25Contact resistance of 1299528^-^. Metal wonderful layer η = compound. The method for forming the metal layer 326 is, for example, 匕 = two shell nickel, and then a rapid thermal tempering process, and the material and formation method of the lithium layer 326 is a preferred example. limit. Then, a subsequent process is performed to complete the fabrication of the oxygen half-field effect transistor. Since the present invention forms a barrier layer before the formation of the source and the electrode extension layer, the barrier film is diffused to the channel region by temper activation after the source and the secret layer are formed. In addition, because the source and the carbon layer of the pole extension layer adjacent to the substrate are larger than the carbon composition ratio away from the substrate, the degree of diffusion of the 掺-type doping into the region due to tempering activation can be controlled. . Since the degree of diffusion of the N-type dopant to the channel region is controlled by the job, the degree of impurity is improved. [Fourth embodiment] Fig. 4 is a cross-sectional view showing a gold oxide half field effect transistor according to still another embodiment of the present invention. As shown in Figure 4, the gold-oxygen half-field effect transistor mainly comprises a substrate 4, an isolation structure 402, a gate structure 4〇4, a spacer 416, a source and drain extension layer 412, and a source and a drain. Layer 424. The substrate 4 is, for example, a base of a ruthenium base, a substrate having a ruthenium on the insulating layer, a substrate having a channel layer containing ruthenium, a substrate having a block strain, and a substrate having one or more crystal orientations. The gate structure 404 is disposed on the substrate 4A between the isolation structures 402. A portion of the substrate 400 under the gate structure 4〇4 is the channel region 4〇5 of the MOS field effect transistor. 22 I299528twf.doc/e The spacer 416 is located on the sidewall of the gate structure 404. The source and drain extension layers 412 are located in the substrate 400 below the spacers 416, while the source and drain layers 424 are located in the substrate 400 outside the spacers 416, and the source and drain layers 424 are deeper than the source and The depth of the drain extension layer 412. The source and drain extension layers 412 and the source and drain layers 424 are both strained layers. The structure and points of the two strain layers are described in detail below. The structure of the source and drain extension layers 412 is, for example, epitaxial, and the structure of the source 没 electrode layer 424 may also be a crystal. In addition, the material of the source and drain extension layers 412 is, for example, tantalum carbon, and the material of the source and drain layers 424 may also be carbon. Since the lattice constant of the barrier is smaller than that of Shi Xi, the source and drain extension layers 412 and the source and drain layers 424 using Shishi carbon are a strain layer. The source and drain extension layers 412 and the source and drain electrodes 4 apply a tensile stress to the channel region 405. In addition, the source and drain extension layer 412 is made of ♦ carbon to increase the rate at which the carrier passes through the interface between the source and the drain extension 412 and the substrate 400, thereby improving the performance of the MOS transistor. In addition, the source and drain extension layers 412 contain, for example, N-type dopants. For example, 4 of these N are; Yangzi or _ ion. The carbon composition ratio of the source and the non-polar extension layer 々n to the portion of the near substrate 4GG is, for example, greater than the carbon composition ratio of the portion away from the base willow to block the N-type core-portal heat of the source and drain extension layers 412. The expansion is directed to the channel region 4〇5, or at least the amount of N-type metamorphism diffusion to the overnight region 405 is controlled. Further, the carbon composition ratio of the source and the drain extension layer 412 is, for example, a gradient distribution. In addition, the gold oxide half-field effect 23 1299528 doc/e transistor of the present invention further includes a layer dopant diffusion barrier layer 414 located at the source and the poleless extension. Between 412 and the substrate 4〇〇. A dopant diffusion barrier layer-like material such as germanium carbon, and the dopant diffusion barrier layer 414 contains, for example, a p-type dopant. Due to the setting of the dopant diffusion resistance _414, it is possible to further control or control the diffusion of the N-type dopant to the channel region 405 due to heat, or at least control the amount of diffusion of the N-type dopant to the channel region 405. Alternatively, the source & and the pole may also contain an N-type dopant, such as a dish ion or a source and a drain extension layer and source of the MOS field-effect transistor of the present invention. The drain layer is a strain layer, and the source and the drain extension layer and the source and the gate layer are both complementary, so that the efficiency of the gold oxide half field effect transistor can be increased. Furthermore, since the dopant diffusion barrier layer is provided, and the source=drain extension layer has a specific carbon composition ratio distribution pattern, the dopant and the drain extension layer (10) dopant can be diffused by heat. To the channel zone, or at least to control the amount of diffusion of these dopants into the channel zone. While the present invention has been described in its preferred embodiments, the present invention is not intended to limit the invention, and the present invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application. BRIEF DESCRIPTION OF THE DRAWINGS Figs. 1A to 1G are cross-sectional views showing a manufacturing process of a gold-oxygen half field effect transistor according to an embodiment of the present invention. Figure 2 is a cross-sectional view of a gold oxide half field effect transistor of another embodiment of the present invention. 3A to 3G are cross-sectional views showing a manufacturing process of a gold oxide half field effect transistor according to still another embodiment of the present invention. Fig. 4 is a cross-sectional view showing a gold oxide half field effect transistor according to still another embodiment of the present invention. [Main component symbol description] 100, 200, 300, 400: substrate 102, 202, 302, 402 · isolation structure 104, 204, 304, 404: gate structure 104a, 304a: gate dielectric layer 104b, 304b: gate Pole 104c, 304c · spacers 104d, 304d: gate caps 106, 206, 306, 406 · channel regions 108, 120, 308, 320: dry etching process 110, 122, 310, 322 · · recess 112, 212, 312, 412: source and drain extension layers 114, 214, 314, 414: dopant diffusion barrier layers 116, 216, 316, 416: spacers 118, 318: dielectric layers 124, 224, 324, 424: source and drain layers 126, 326: metal lithium layer 25

Claims

I29952"8twf：doc/e 、申請專利範圍·· i:種ίί半場效電晶體的製造方法，包括·· 陷凹移除該間極結構兩側的部分該基底，成—第於該第一凹陷中沉積-源極與汲極延伸層. 於該閘極結構兩側形成—間隙辟.曰，底，===‘極延伸層及部分該基於該第二凹陷中沉積一源極與汲極層。 2‘如申請專利範圍第〗製造方法，其中該源極與汲極晶體的性蟲晶沉前程。 W層之軸妓包括選擇 3. 如申請專利範圍第丨項所述之金製造方法，其中該源極與汲極層之形成= 晶沉積製程。匕栝砥擇性磊 4, 如巾請專利範圍第丨項所述之金製造方法，其巾_極無極延伸層之體的 5·如申請專利範圍第4項所述之全; 製造方法，其中該源極與没極延伸層於鄰近=== 的鍺組成比(C〇mP〇sltion rati0)大於遠離該基刀組成比。一口1刀的鍺、6.如申請專利範圍第5項所述之金氧半場效電製造方法，其中該源極與汲極延伸層的鍺組成比呈^户八 26 1299528 twf.doc/e 制、告7方ΐ申ίί利範圍第4項所述之金氧半場效電晶體的衣仏/ /、中於形成該源極與汲極延伸層之前，# 於該第-凹陷中形成一摻質擴散阻障層。之引更包括制止8.如申請專利範圍第7項所述之金氧半場效二方二=:參質擴散阻障層之材料包括矽鍺… 錢方法，其中該摻質擴散阻障層含有n型摻i。日的製造= 申1專圍弟4項所述之金氧半場效電晶體 u.如申請專利範圍第10項所述之全氧 2 的製造方法，其中該p型換】33 +场效電晶體層時進行臨場摻雜而注入:林成麵極與汲極延伸的:·方如rit利範圍第10項所述之金氧半場效電晶體錢方法，其中該P型摻質包括硼離子。包曰體的製項所述之金氧半場效電晶體 U.如申請專===，夕鍺。的製造方法，1中所述之金財場效電晶體 κ n、中極與汲極層含有p型摻質。的製造方法，1 專中項所述之金氧半場效電晶體進行臨場二麵:，核質是在形成該源極紐極層時的製& 11第14項所述之金氧半場效電晶體衣^方法’其中該p型摻質包括獅子。❼文電曰曰體的製造方法Λ專中 1項所述之金氧半場效電晶體方法〃中1原極與汲極延伸層之材料包括石夕碳。 27 I2995281 ：wf.doc/e 制1ϋ申明甘專利範圍第17項所述之金氧半場效電晶體白g造方法，其中該源極與汲極延伸層於鄰近該基底之部 /刀的碳組成比大於遠離該基底之部分的碳組成比。的制^方如去申^專圍第18項所述之金氧半場效電晶體分^ 中源極與汲極延伸層的碳組成比呈梯度的制方如圍第17項所述之金氧她的衣k方法，其中於形成該源極與括於該第—凹陷中形成—摻質擴散阻障層則更包 2L如申請專利範圍第2〇項所述之金氧的衣造方法’其中該摻質擴散阻障層之秒日日版 =方法，其中__散阻障層含有P型摻質。制23.如巾請專利範圍第17項所述之場效中該雜與汲極延伸層含有的|4方\ Itf㈣销从錢伟效電晶體層臨場=，是在形成該源極心 25. 如申請專利範圍第23項所述之金的4造方法，其中該1^型摻質包括碟離子^ ^里晶體 26. 如申請專利範圍第j項所二:曰：。的製造方法，其中該源極與汲效電晶體，如申請專利範圍第26項所述; = 碳。的製造方法，射該源極與汲極層含有效電晶體 28 129951之 doc/e ㈣=方\申=咖第27項所述之金氧半場效電晶體的“方法’射㈣型摻肢在形成進行臨場摻雜而注入。 /、及往智守一19.^；申^利範圍第27項所述之金氧半場效電晶體的製造方法，其中該>^型摻質包括磷離子或砷離子。 3〇.如中4專利範圍第1項所述之金氧半場效電晶體的乂造方法’其巾該基底包括魏的（silieQn based)基底、純矽（pure SiliC0n)的基底、絕緣層上有矽（如^⑽仙 inSUlat〇r ’ S〇1)的基底、通道層含鍺（Germanium ch麵el) 的，底、具有區塊應冑（bulkstrain)的基底及具有一種以上晶體方向（crystallographic orientation)的基底。 31· —種金氧半場效電晶體，包括：一基底；一閘極結構，配置於該基底上；一間隙壁，位於該閘極結構之側壁上；一源極與汲極延伸層，位於該間隙壁以下的該基底中；以及一一源極與汲極層，位於該間隙壁以外的該基底中，該源極與汲極層的深度大於該源極與汲極延伸層的深度，其中’遠源極與汲極延伸層及該源極與汲極層均為一應、交層（strained layer )。 32·如申請專利範圍第31項所述之金氧半場效電晶體，其中該源極與汲極延伸層之結構包括磊晶。 33·如申請專利範圍第μ項所述之金氧半場效電晶體，其中該源極與；;及極層之結構包括蟲晶。 29 34·如申請專利範圍第31 e 體’二中該:極與沒極延伸層之材料包括广效電晶體，其中所述之金氧半場效電晶成比大於遠離該基底===:基底之部分的錯組體，第35項所述之金氧半場效電晶體，更包括-摻質擴散阻障層，位半場效電晶及該基底之間。 '以源極14汲極延伸層曰曰曰曰體，曰曰 40. 如申請專利職第34項魏之體，其中該源極與汲極延伸層含有p型推質。〜电 41. 如申請專利範圍帛4〇 B曰體，其中該P型摻質包括硼離子。金乳+场效電曰曰 42. 如申請專利範圍第Μ項所述之金肢’其中該源極與汲極層之材料包括石夕錯。曰曰體二之金氧半場效電體，貞概錄半場效電 30 1299528^- 45. 如申請專利範圍第31 $ 體，其中該源極與汲極延伸層之材料包二文電晶 46. 如申請專利範圍第45項所述之金^半，，其中該源極與汲極延伸層於鄰近該基底八=晶成比大於遠雜基底之部分的⑼成比。σ刀的兔組 47. 如申請專利範圍第46項所述之全體，其中該源極與_申層的卿呈電晶體’更包括-摻質擴散阻障層，位= + W電晶及該基底之間。、^’、和及極延伸層 49. 如申請專利範圍第48項 & 體，其中該摻f擴散轉層之材料包括^場效電晶 50. 如申請專利範圍第49 體，其中該摻質擴散阻障層含有項乳+場效電晶 51·如申請專利範圍第45 f貝曰曰體，其+_極歧_料含辨場效電 52·如申請專利範圍第51 二曰曰證，其中該N型穆質包括磷離子或7離之子錢半場效電 53·如申請專利範圍第31 f J中該源f與祕層之材料包‘碳^半場效電晶 •如申凊專利範圍第53項入& 卜射_極與汲極層含有尺型摻斩。場效電晶 55.如申請專利範圍第54項" :，其中該N型摻質包括_子或^乳半場效電晶 129932¾ wf.doc/e 56.如申請專利範圍第31項所述之金氧半場效電晶體’其中該基底包括砍基的基底、純珍的基底、絕緣層上有矽的基底、通道層含鍺的基底、具有區塊應變的基底及具有一種以上晶體方向的基底。 129932¾ wf.doc/eI29952"8twf:doc/e, patent application scope·· i: a method for manufacturing a half field effect transistor, comprising: recessing a portion of the substrate on both sides of the interpole structure, forming the first a deposition-source and a drain extension layer in the depression. Formed on both sides of the gate structure - a gap, a bottom, a ===' pole extension layer and a portion of the source and the base deposited based on the second recess Polar layer. 2 'As in the scope of application for patents〗 Manufacturing method, in which the source and the bungee crystals are in the process of crystal sinking. The axis of the W layer includes the selection 3. The gold manufacturing method as described in the scope of the patent application, wherein the formation of the source and the drain layer = a crystal deposition process.匕栝砥性磊 , , , , , , , , , , 4 4 4 4 4 4 4 磊 4 4 磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊磊The ratio of the composition of the source and the electrodeless extension layer adjacent to the === (C〇mP〇sltion rati0) is greater than the composition ratio away from the base knife. A method of manufacturing a knives of a knife, 6. The method for manufacturing a gold-oxygen half-field electric power according to claim 5, wherein the ratio of the enthalpy of the source to the bungee extension layer is 户26 8 1299528 twf.doc/e The 仏 / /, in the gold-oxygen half-field effect transistor described in Item 4 of the fourth paragraph, is formed in the first-depression before forming the source and the drain extension layer. A dopant diffusion barrier layer. The introduction further includes the suppression of 8. The gold-oxygen half-field effect two-part two as described in claim 7: the material of the diffusion barrier layer includes the 矽锗... money method, wherein the dopant diffusion barrier layer contains Type n is doped with i. Manufacturing of the day = the gold-oxygen half-field effect transistor described in the 4th edition of the application for the encyclopedia of the invention. The method for manufacturing the total oxygen 2 as described in claim 10, wherein the p-type is changed to 33 + field effect electricity. The crystal layer is implanted by on-site doping: the surface of the surface of the forest and the extension of the drain are: The method of the gold-oxygen half-field effect transistor according to Item 10 of the rit., wherein the P-type dopant includes boron ions. . The gold-oxygen half-field effect transistor described in the preparation of the package body U. If the application is specific ===, Xi Xi. The manufacturing method, the gold field effect transistor κ n, the middle pole and the drain layer described in 1 contain a p-type dopant. The manufacturing method, the gold-oxygen half-field effect transistor described in the special item is carried out on both sides: the nucleus is the gold-oxygen half-field effect described in Item 14 of the source layer of the source An electro-optical method wherein the p-type dopant comprises a lion. The manufacturing method of the 曰曰曰曰曰曰 Λ 1 1 1 1 1 1 1 1 1 1 1 1 1 1 金金金金金金金金金金金金金金金金金金金金27 I2995281:wf.doc/e. The method for producing a gold-oxygen half-field effect transistor according to claim 17, wherein the source and the drain extension layer are adjacent to the base/knife carbon of the substrate. The composition ratio is greater than the carbon composition ratio away from the portion of the substrate. If the carbon composition ratio of the source and the drain extension layer in the gold-oxygen half-field effect transistor is as described in Item 18 of the application, the gold is the gold as described in item 17. Oxygen's method of coating k, wherein the formation of the source and the formation of a dopant diffusion barrier layer in the first depression further comprises 2L, as in the coating method of the metal oxide according to the second aspect of the patent application 'Second day edition of the dopant diffusion barrier layer=method, wherein the __stiff barrier layer contains a P-type dopant. 23. In the field effect described in item 17 of the patent scope, the |4 square \ Itf (four) pin contained in the miscellaneous and bungee extension layer is from the surface of the Qian Wei effect transistor layer, and is formed in the source core 25 The method for manufacturing gold according to claim 23, wherein the type 1 dopant comprises a dish ion crystal. 26. As claimed in the scope of claim j: 曰:. The manufacturing method, wherein the source and the enamel transistor are as described in claim 26; = carbon. The method of manufacturing the source and the drain layer containing the effective transistor 28 129951 doc / e (four) = square \ 申 = coffee item 27 of the gold oxygen half field effect transistor "method" shot (four) type of limb And a method for producing a gold-oxygen half-field effect transistor according to item 27 of the claim 27, wherein the > type dopant comprises a phosphorus ion Or arsenic ion. The method for manufacturing a gold-oxygen half-field effect transistor according to item 1 of the fourth aspect of the invention, wherein the substrate comprises a silieQn based substrate, a pure sputum (pure SiliC0n) substrate. The insulating layer has a base of 矽 (such as ^(10)仙inSUlat〇r 'S〇1), a channel layer containing 锗 (Germanium ch surface el), a bottom, a substrate having a bulksbull and more than one a crystallographic orientation of the substrate. 31. A metal oxide half field effect transistor comprising: a substrate; a gate structure disposed on the substrate; a spacer wall on the sidewall of the gate structure; a source and a drain extension layer, the base below the spacer And a source and a drain layer in the substrate outside the spacer, the depth of the source and the drain layer being greater than the depth of the source and drain extension layers, wherein 'the source and the drain The pole extension layer and the source and the drain layer are both a strained layer. 32. The gold oxide half field effect transistor according to claim 31, wherein the source and the drain are extended. The structure of the layer includes epitaxial crystals. 33. The gold-oxygen half-field effect transistor according to item [51] of the patent application, wherein the source and the structure of the pole layer comprise insect crystals. 29 34. 31 e body 'two of the: the pole and the pole extension layer material comprises a wide-effect transistor, wherein the metal oxygen half field effect crystal crystal formation ratio is greater than the wrong group away from the substrate ===: the part of the substrate, The gold-oxygen half-field effect transistor according to Item 35 further includes a dopant diffusion barrier layer, a half field effect transistor and the substrate. 'The source 14 pole extension layer body, 曰曰40. If applying for the 34th item of the patent, the source and the bungee extension layer contain P-type push substance. ~Electric 41. As claimed in the patent scope 帛 4〇B carcass, wherein the P-type dopant includes boron ions. Gold milk + field effect electricity 42. As described in the scope of the patent application The gold limb's material of the source and the bungee layer includes Shi Xi wrong. The body of the body of the gold oxide half-field effect electric body, 贞 overview half-field effect electricity 30 1299528^- 45. If the patent application scope is 31 The material of the source and the drain extension layer is encapsulated by a dielectric crystal 46. The gold and the semiconductor according to claim 45, wherein the source and drain extension layers are adjacent to the substrate. The ratio is greater than the (9) ratio of the portion of the far-hybrid substrate. The rabbit group of σ knife 47. As described in the scope of claim 46, wherein the source and the _ Shen layer of the crystal are 'including the dopant diffusion barrier layer, the position = + W crystal and Between the substrates. , ^', and and the pole extension layer 49. As claimed in claim 48, the material of the f-diffusion layer includes a field effect cell 50. As claimed in claim 49, wherein the The mass diffusion barrier layer contains the item milk + field effect electric crystal 51 · as claimed in the 45th f shell body of the patent, the +_ pole _ material contains the field effect power 52 · as claimed in the scope of the 51st Proof, wherein the N-type element includes phosphorus ion or 7-minute sub-field energy 53. As in the patent application range 31 f J, the source f and the secret layer of the material package 'carbon ^ half-field effect electro-crystal · such as Shen Patent No. 53 of the patent scope contains & 射 _ pole and 汲层 layer contains ulnar type erbium. Field effect crystal 55. As claimed in claim 54 " :, wherein the N type dopant includes _ or 乳乳 half field effect transistor 1299323⁄4 wf.doc / e 56. As described in claim 31 a gold-oxygen half-field effect transistor 'where the substrate comprises a base of a chopped base, a pure substrate, a substrate having a crucible on the insulating layer, a substrate containing a channel layer, a substrate having a block strain, and a crystal having more than one crystal orientation Substrate. 1299323⁄4 wf.doc/e

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