TWI282536B - LCD, display data driving apparatus thereof and a driving method thereof - Google Patents

LCD, display data driving apparatus thereof and a driving method thereof Download PDF

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Publication number
TWI282536B
TWI282536B TW94108311A TW94108311A TWI282536B TW I282536 B TWI282536 B TW I282536B TW 94108311 A TW94108311 A TW 94108311A TW 94108311 A TW94108311 A TW 94108311A TW I282536 B TWI282536 B TW I282536B
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Taiwan
Prior art keywords
data
clock
bus
data driver
bus bar
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TW94108311A
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Chinese (zh)
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TW200634691A (en
Inventor
Tzong-Yau Ku
Yung-Yu Tsai
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Chi Mei Optoelectronics Corp
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Priority to TW94108311A priority Critical patent/TWI282536B/en
Publication of TW200634691A publication Critical patent/TW200634691A/en
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Publication of TWI282536B publication Critical patent/TWI282536B/en

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  • Liquid Crystal Display Device Control (AREA)

Abstract

A LCD, a display data driving apparatus and a driving method thereof are disclosed. The apparatus includes a timing controller, a specific data driver, a first data driver, and a second data driver. The timing controller is coupled to a first bus to output data. The specific data driver is coupled to the first bus, a second bus, and a third bus. The specific data driver receives the data through the first bus, and then divides the data into a first part and a second part. The first data driver is coupled to the second bus to receive the first part of the data. The second data driver is coupled to the third bus.

Description

1282536 15903twf.d〇c/g 九、發明說明: 【發明所屬之技術領域】 2明疋有關於-種液晶顯示器資料驅動裝置與方 及#用^是有關於—種顯示資料驅動裳置及驅動方法以 及使用該裝置之液晶顯示器。 【先前技術】 液晶顯示器由於具備了輕f、 電磁干擾的優點,而大量岸用二,無減以及, 機、數位攝影麟各式電子產品。加上業界積極投 入研發,使液晶顯示器的品質不斷提升。 ㈤1A為典型液晶顯示面板結構。_般來說,在液晶 二不面板製作上,會藉由膜層沉積與微影蝕刻等等製程, 玻璃基板100上製作大量的薄模電晶體與縱橫交錯的閘 極線以及讀線,用來構成像素陣列。為了提供薄膜電晶 體所需的操作電壓與訊號,在玻璃基板的四週會做相關的 電路、晶片以及元件。請參見圖1A中所示,在玻璃基板 1〇〇下緣,會連接一塊印刷電路板101,此印刷電路板101 上會具有時序控制器以及週邊電路,而玻璃基板下緣的表 面’會利用覆晶玻璃封裝(chip on glass,COG)技術,直接 將數個資料驅動器102製作於玻璃基板100上,用資料驅 動器102來接受時序控制器送出的顯示資料,透過面板上 的資料線,驅動各個像素元件;其中每顆資料驅動器1〇2 均需透過一可撓屈印刷電路板(flexible printed circuit, FPC)103連接到pCB上。 為了改進圖1A之結構,有人提出一種如圖IB之架 1282536 15903twf.doc/g 構。一此資料訊號由印刷電路板104上之時序控制哭發出 未示),、經由可撓屈印刷電路才反105,#送到資料驅動^ 113,再分別透過陣列上接線(wire on array,、σ 陣列上接線123 ’將賓料訊號分別傳送至資料驅動哭 與資料驅動器114 ;同樣的,資料驅動器112藉由^列上 接線121將資料訊號傳送到資料驅動器U1,資料驅動器 114藉由陣列上接線124將資料訊號傳送到資料驅= 115。 的 其傳輸電路架構如圖2A、圖2B以及圖2C,請灸考 圖2A、2B以及2C。圖2A為使用一個傳輸路徑將顯示資 料傳送給資料驅動器的架構,圖2B為使用兩個傳輸路徑 的架構,圖2C為使用多個傳輸路徑的架構。如圖2A以及 圖2B的架構,由於採用序列傳輸,訊號頻率勢必需要較 大,然而玻璃走線之阻抗甚大,訊號線需要很大的面積, 使得邊框加大。若用圖2C的架構,用N條路徑,使用平 行傳輸,雖然頻率可降低,然而每顆驅動器都有專用的訊 號線,因此邊框亦必需加大。 【發明内容】 本發明的目的就是在提供一種液晶顯示器及其使用 之顯示資料驅動裝置與方法,用以減少玻璃走線佈局之面 積。 本發明提出一種顯示資料驅動裝置,此裝置包括時序 控制裔、指定資料驅動器與第一/第二資料驅動器。時序控 制器耦接一第一匯流排以輸出資料。指定資料驅動器耦接 第一匯流排、第二匯流排以及第三匯流排,以於第一匯流 1282536 15903twf.doc/g 排接收資料,並將資料分 料。第—資料驅動哭第”、、7 /刀資料與第二部分資 分資料;第-資料妾暴X接收前述的第一部 二:動器則耦接第三匯流排。 〈…、發明的較佳實施例所述之顯干次 ::η日疋貝枓驅動器係根據第一時脈 接收賢料,並且篦-结— ;弟匯々丨L排 三時脈輸出資料。—、二匯流排係根據第二時脈以及第 置,其中述之顯示資料驅動裝 時脈之頻率等於第二時脈相同’且第- 排之訊號線數分別少於帛「、= ’第—匯〜排與第三匯流 織刀另〇於第一匯流排之訊號線數。 控制哭—種顯示雜_裝置,該裝置包括時序 制器輕接一第一匯2 °與第一/弟一貧料驅動器,時序控 該第-匯流排、二;出資料’指定資料驅動猶 第一時胧 —匯流排以及一第三匯流排,其根據 :時财八—匯流排接收資料,並以第二時脈以及第 別將該資料傳送至第二、第三 f :動=收該第二匯流排之資料。第二資料崎 ^第一匯流排之資料。 置,由月的叙佳貫施例所述之顯示資料驅動裝 率為第第三時脈頻率相同’且第-時脈之頻 於宽 &amp; ,率的兩倍,且第二匯流排之訊號線數等 第—匯麵之訊麟數,並且第三匯流排之訊號線數^ 1282536 15903twf.doc/g 於第一匯流排之訊號線數。 本發明提出-種顯示資料驅動方法, 指定資料驅動器、第-資料驅動器以及第Γ次^括提供 資料驅動器接收顯示資料並將;::驅,器’ _料傳送至第-資料陶二分 部分顯示資料傳送至第二資料驅動器。 t將弟一 以及ί:?:出ιφ種液晶顯不器’包括顯示資料驅動裝置 指定資::驅叙:顯不資料驅動裝置包括時序控制器、 哭轉接第1 =以及第—/第二資料驅動器。奴資料驅動 流排、第二匯流排以及第三匯流排,以於第 部分;料分割為第—部分資料與第二 部:::二=二貝料驅動器耦接該第二匯流排,接收第- 1二::。一—貧料驅動器耦接該第三匯流排。液晶面板, 輕接摘示資料驅動裝置,用以顯示晝面。 本&amp;明目糾指定資料ϋ使其雙向傳送顯示資 1 a構’因此可減少訊號頻率以減少玻璃基板走線佈 局,或是減少贼線數,以減少玻·板走線佈局。 為讓本發明之上述和其他目的、特徵和優點能更明顯 明如下了文特舉較佳實施例’並配合所附圖式,作詳細說 【實施方式】 本發明提出一種液晶顯示器,如圖3Α,包括液晶面 板3〇以及顯示資料驅動裝置32。其中,液晶面板30耦接 1282536 15903twf.doc/g1282536 15903twf.d〇c/g Nine, invention description: [Technical field of invention] 2 Alum has a kind of liquid crystal display data driving device and square and #用^ is related to - kind of display data driving and driving The method and the liquid crystal display using the device. [Prior Art] Since the liquid crystal display has the advantages of light f and electromagnetic interference, a large number of shore use, no reduction, and various digital products of the machine and digital photography. In addition, the industry is actively investing in research and development, so that the quality of liquid crystal displays continues to improve. (5) 1A is a typical liquid crystal display panel structure. _ In general, in the fabrication of liquid crystal two panels, a large number of thin-mode transistors and criss-cross gate lines and read lines are fabricated on the glass substrate 100 by a process such as film deposition and photolithography etching. To form a pixel array. In order to provide the operating voltage and signal required for the thin film transistor, related circuits, wafers, and components are placed around the glass substrate. Referring to FIG. 1A, a printed circuit board 101 is connected to the lower edge of the glass substrate. The printed circuit board 101 has a timing controller and peripheral circuits, and the surface of the lower edge of the glass substrate is utilized. In the chip on glass (COG) technology, a plurality of data drivers 102 are directly fabricated on the glass substrate 100, and the data driver 102 receives the display data sent by the timing controller, and drives each of the data lines on the panel. The pixel device; wherein each data driver 1〇2 is connected to the pCB through a flexible printed circuit (FPC) 103. In order to improve the structure of Fig. 1A, a frame 1282536 15903twf.doc/g structure as shown in Fig. IB has been proposed. One of the data signals is cried by the timing control on the printed circuit board 104, and is sent to the data drive ^113 via the flexible printed circuit, and then wired through the array (wire on array, The wiring 123' on the σ array transmits the guest signal to the data driving crying data driver 114. Similarly, the data driver 112 transmits the data signal to the data driver U1 through the wiring 121 on the column, and the data driver 114 is disposed on the array. Wiring 124 transmits the data signal to data drive = 115. Its transmission circuit architecture is shown in Figures 2A, 2B, and 2C, and moxibustion is shown in Figures 2A, 2B, and 2C. Figure 2A shows the use of a transmission path to transmit display data to the data. The architecture of the driver, Figure 2B is the architecture using two transmission paths, and Figure 2C is the architecture using multiple transmission paths. As shown in Figure 2A and Figure 2B, due to the sequence transmission, the signal frequency is bound to be larger, but the glass is gone. The impedance of the line is very large, and the signal line needs a large area, which makes the frame larger. If the structure of Figure 2C is used, N paths are used, and parallel transmission is used, although the frequency can be reduced. However, each driver has a dedicated signal line, so the frame must also be enlarged. SUMMARY OF THE INVENTION The object of the present invention is to provide a liquid crystal display and a display data driving device and method therefor, which are used to reduce the layout of glass traces. The present invention provides a display data driving device, which includes a timing controller, a designated data driver, and a first/second data driver. The timing controller is coupled to a first bus to output data. The specified data driver is coupled. The first bus bar, the second bus bar and the third bus bar receive the data in the first confluence 1282536 15903 twf.doc/g row, and the data is divided. The data-driven crying ",, 7 / knife data and The second part of the information; the first data burst X receives the first part of the second: the actuator is coupled to the third bus. <..., the preferred embodiment of the invention is: The 疋 枓 枓 枓 接收 接收 接收 枓 枓 枓 枓 枓 枓 枓 枓 枓 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋 疋The frequency of the display data driving clock is equal to the same as the second clock' and the number of signal lines of the first row is less than 帛", = 'the first - sink ~ row and the third stream weaving knife is the first The number of signal lines in the busbar. Controlling the crying-type display miscellaneous_device, the device includes a timing controller to lightly connect a first sink 2 ° with the first / brother a poor material driver, timing control the first - bus bar, two; The data 'designated data drive is the first time - the bus and the third bus, according to: the time eight - bus to receive the data, and the second clock and the second to send the data to the second, The third f: move = receive the data of the second bus. The second data is the first bus of the first bus. The display data driven by the monthly embodiment of the month is the third time. The pulse frequency is the same 'and the frequency of the first-clock is twice the width &amp; the rate, and the number of signal lines of the second bus is the number of the number of channels, and the number of signal lines of the third bus ^ 1282536 15903twf.doc/g Number of signal lines in the first bus. The invention proposes a display data driving method, the specified data driver, the first data driver and the third data providing data driving device to receive the display data and the ::: drive, the device is transferred to the first data sub-section display The data is transferred to the second data drive. t The younger brother and the ί:?: out of the ιφ kind of liquid crystal display device' includes the display data drive device specified capital:: drive: the data drive device includes the timing controller, the cry transfer 1 = and the - / / Two data drives. The slave data drive flow row, the second bus bar and the third bus bar are used in the first part; the material is divided into the first part data and the second part::: two = two buck material driver is coupled to the second bus bar, receiving No. - 1 2::. A lean filter is coupled to the third bus. The liquid crystal panel is lightly connected to the data driving device for displaying the kneading surface. This &amp; visually corrects the specified data so that it can be transmitted in both directions. This reduces the frequency of the signal to reduce the routing of the glass substrate, or reduces the number of thieves to reduce the layout of the glass and board. The above and other objects, features, and advantages of the present invention will become more apparent from the description of the preferred embodiments and 3Α, including the liquid crystal panel 3〇 and the display data driving device 32. Wherein, the liquid crystal panel 30 is coupled to 1282536 15903twf.doc/g

i==B2,Γ顯示畫面。而顯示資料驅動I 示資料驅動彡/置==== 發明一實施例之顯 ^ 、固3B ’其包括時序控制哭 二貧::咖,、資料驅動器3〇4、3〇6、遍以 蝴1&quot; 3(Κ)·接指定資料驅動器3G2。指定資 =區動=_娜騎_以及鄕。資料^ = 。馬妾貝科驅動器烟。資料驅動器3〇_妾資料驅動器 時序控制器300耦接輪屮降、六μ 訊號,根據第-時脈,經由μ =312用以將顯示資料 驅動器302。指定資料驅^輪出匯流排312送至指定資料 及輸出态302耦接輸出匯流排314以 依==據第-時脈接收顯示資料訊號,並 ==號的顯示位置’輸出至輸出匯流排Μ以 及輪出匯流排316。其中齡山石认, 根據第二時峨,;晴314的訊號乃 據第三時脈如。匯流排316的訊號乃根 資料驅動⑨3G2 Μ 1 4以及3%分別接收指定 脈接收資:驅動; sot;^^^1131〇«^ 圖4係為根據本發日月一者 傳送與接收訊號波_二二=顯示資料驅動裝置之 及圖4。圖上標示ϋ ΐ時序圖。請同時參考圖3以 t 300运至指定資料驅動器3〇2的顯示資料。①為 1282536 15903twf.doc/g 第二時脈,CK3表示第三時脈,其中CK2與CK3是由CK1 所產生。304Input表示資料驅動器304接收的資料。 306Input表示資料驅動器306接收的資料。圖4上可以看 出’指定資料驅動器302根據CK1接收顯示資料(3〇2Input 圖上之D2),經過256個CK1時脈時間後,指定資料驅動 裔302根據CK1分別用交錯式的接收資料驅動器3〇4以及 306的顯示資料(3〇2Input圖上之D4以及D6),並根據CK2 將顯示資料D4傳送給資料驅動器3〇4,以及根據CK3將 顯示資料D6傳送給資料驅動器306。可以看到CK2以及 CK3頻率為CK1的一半,訊號線的頻率也減半,使得訊號 線可以谷許較大的阻抗,便可使指定資料驅動器與資 料驅動裔304之間,以及指定資料驅動器302與資料驅動 器306之間的玻璃基板走線的佈局縮小。同樣道理,經過 512個CK1時脈時間後,D4以及D6傳輸完畢之後,接著 指定資料驅動器302根據CK1接收資料驅動器308以及 310所顯示之資料D8以及D10。同樣的,指定資料驅動器 302根據CK2將D8傳送給資料驅動器304,資料驅動器 3〇4再根據CK2,將D8傳送給資料驅動器308。指定資料 驅動器302根據CK3將D10傳送給資料驅動器3〇6,資料 驅動器306再根據CK3,將D10傳送給資料驅動器31〇。 同樣的,由於CK2以及CK3的頻率為CK1的一半,因此 訊號線可以容許較大的阻抗。換句話說,傳遞資料所用的 資料線的線寬可以較為減小’因此可使資料驅動器304與 1282536 15903twf.doc/g 資料驅動器308之間,以及資料驅動器3〇6與資料驅動器 310之間的玻璃基板走線的佈局所需面積縮小。 本發明另外提出一種液晶顯示器,如圖5A,包括液 晶面板50以及顯示資料驅動裝置52。其中,液晶面板% 輕接顯示資料驅動裝置52,用以顯示晝面。而顯示資料驅 動裝置52可以參見圖5B,其包括時序控制器5〇〇、指定 資料驅動器502、資料驅動器504、506、508與510、左側 匯^排511、右侧匯流排512以及匯流排514、516。而甘 中,顯示資料驅動裝置52我們可以用圖5B以及圖5C說 明。請同時參考圖5B以及圖5C,此例中,將指定資料驅 動器502輸入匯流排分成左側匯流排511以及右側匯流排 512,由時序控制器500根據第一時脈CK1送出顯示資料 D2給指定資料驅動器502,經過256個CK1時脈時間後, D2傳輸元畢,則同時將D4以及D6根據第一時脈分別傳 輸至左側匯流排511以及右側匯流排512。此時,指定資 • 料驅動器502亦同時將D4以及D6根據第二時脈CK2以 及第二時脈CK3分別經由輸出匯流排514以及輸出匯流排 516傳輸至資料驅動器5〇4以及5〇6。由圖上可以看出,雖 然CK1、CK2、CK3之頻率相等,但是輸出匯流排514以 及輪出匯流排516訊號線數目減少,仍然可以做到指定資 ,驅動器502與資料驅動器5〇4之間,以及指定資料驅動 器502與資料驅動器5〇6之間的玻璃基板走線的佈局縮 小。同樣的,經過512個CK1時脈時間後,D4以及D0 11 1282536 15903twf.doc/g 傳輸完成’經過512個CK1時脈時間後,D4以及D6傳 輸完畢之後,接著指定資料驅動器5〇2根據CK1利用左侧 匯流排511接收資料驅動器508以及利用右侧匯流排512 接收510所顯示之資料D8以及_。指定資料驅動器5〇2 根據CK2將D8傳送給資料驅動器5〇4,資料驅動器5〇4 再,據CK2,將D8傳送給資料驅動器、308。指定資料驅 動2 5〇2根據CO將D10傳送給資料驅動器5〇6,資料驅 =為506再根據CK3,將〇10傳送給資料驅動器、51〇。雖 ^ K1 fK2 CK3的頻率相同,但是排線的訊號線數減 二可使貝料驅動器504與資料驅動器5〇8之間,以及資 料驅動器506盘資料駆叙哭ςΐΑ 、 ^ . •二、動抑510之間的玻璃基板走線的佈 句所需面積縮小。 歸細ίϊ的實補,在本發明歸類為—方法,將其流程圖 圖6。!參見圖6、圖犯以及圖5C。首先,提供 貝料驅動益502、第—資料驅動器5〇4以及第: ^器慨(步驟_)。指定資料驅動器 示 蚪並將顯示資料分為第一部八庶— #貝不貝 示資刀颂不貧料D4與第二部分顯 D6, 602)。指定資料驅動器5〇2 料驅動器502將第二部分°指定資 動器506(步驟6G6)。 W 6傳达至第二貧料驅 綜上所述,在本發明因操 傳送顯示資料的結構,因此動器使其雙向 减&gt;、吼號頻率以減少玻璃基 12 1282536 15903twf.doc/g 板走線佈局所需的面積,或是訊號頻率不變,利用減少訊 #υ線數,使達到減少玻璃基板走線佈局所需面積的目的。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限疋本龟明,任何熟習此技藝者,在不脫離本發明之精神 和範圍内,當可作些許之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】i==B2, Γ display screen. And the display data drive I shows the data drive 彡 / set ==== Inventive embodiment of the display ^, solid 3B 'which includes timing control crying poverty:: coffee, data drive 3〇4, 3〇6, all over Butterfly 1&quot; 3 (Κ)· Connect to the specified data drive 3G2. Designated capital = zone movement = _ na riding _ and 鄕. Information ^ = . Ma Wei Beike drive smoke. Data Driver 3〇_妾 Data Driver The timing controller 300 is coupled to the rim drop, six μ signal, and according to the first-clock, via μ = 312 for displaying the data driver 302. The designated data drive wheel output bus 312 is sent to the designated data and the output state 302 is coupled to the output bus 314 to receive the display data signal according to the == clock, and the display position of the == number is output to the output bus Μ and turn out bus 316. The middle age stone is recognized, according to the second time, the signal of Qing 314 is based on the third clock. The signal of bus 316 is driven by the data driver 93G2 Μ 1 4 and 3% respectively to receive the specified pulse receiving power: drive; sot; ^^^1131〇«^ Figure 4 is the transmission and reception of signal waves according to the date of the present day. _2 2 = display data drive device and Figure 4. The diagram shows the ϋ ΐ timing diagram. Please refer to Figure 3 at the same time as t 300 to the display data of the specified data drive 3〇2. 1 is 1282536 15903twf.doc/g second clock, CK3 represents the third clock, where CK2 and CK3 are generated by CK1. 304Input represents the data received by the data driver 304. 306Input represents the data received by the data driver 306. As can be seen in Figure 4, the designated data driver 302 receives the display data according to CK1 (D2 on the 3〇2Input map). After 256 CK1 clock times, the designated data driver 302 uses the interleaved receiving data driver according to CK1. The display data of 3〇4 and 306 (D4 and D6 on the 3〇2Input diagram), and the display data D4 is transmitted to the data driver 3〇4 according to CK2, and the display data D6 is transmitted to the data driver 306 according to CK3. It can be seen that the frequency of CK2 and CK3 is half of CK1, and the frequency of the signal line is also halved, so that the signal line can have a large impedance, so that the designated data driver and the data driving source 304, and the designated data driver 302. The layout of the glass substrate traces with the data driver 306 is reduced. By the same token, after 512 CK1 clock times have elapsed, after D4 and D6 are transferred, the designated data driver 302 receives the data D8 and D10 displayed by the data drivers 308 and 310 according to CK1. Similarly, the designated data driver 302 transmits D8 to the data driver 304 in accordance with CK2, and the data driver 3〇4 transmits D8 to the data driver 308 based on CK2. The designated data drive 302 transmits D10 to the data drive 3〇6 according to CK3, and the data drive 306 transmits D10 to the data drive 31〇 according to CK3. Similarly, since the frequencies of CK2 and CK3 are half of CK1, the signal line can tolerate a large impedance. In other words, the line width of the data line used to transfer the data can be reduced 'so that between the data driver 304 and the 1282536 15903 twf.doc/g data driver 308, and between the data driver 3〇6 and the data driver 310 The area required for the layout of the glass substrate trace is reduced. The present invention further provides a liquid crystal display, such as a liquid crystal panel 50 and a display data driving device 52, as shown in Fig. 5A. Among them, the liquid crystal panel is lightly connected to the display data driving device 52 for displaying the kneading surface. The display data driving device 52 can refer to FIG. 5B, which includes a timing controller 5, a designated data driver 502, data drivers 504, 506, 508 and 510, a left side row 511, a right side bus bar 512, and a bus bar 514. 516. For example, the display data driving device 52 can be illustrated by using FIG. 5B and FIG. 5C. Referring to FIG. 5B and FIG. 5C simultaneously, in this example, the input data driver 502 input bus bar is divided into a left bus bar 511 and a right bus bar 512, and the timing controller 500 sends the display data D2 to the specified data according to the first clock CK1. After the 256 CK1 clock time passes, the D2 transmission element is completed, and D4 and D6 are simultaneously transmitted to the left side bus bar 511 and the right side bus bar 512 according to the first clock. At this time, the designated resource driver 502 also simultaneously transmits D4 and D6 to the data drivers 5〇4 and 5〇6 via the output bus 514 and the output bus 516 via the second clock CK2 and the second clock CK3, respectively. As can be seen from the figure, although the frequencies of CK1, CK2, and CK3 are equal, the number of signal lines of the output bus 514 and the round bus 516 is reduced, and the designated capital can still be specified. Between the driver 502 and the data driver 5〇4 And the layout of the glass substrate trace between the specified data driver 502 and the data driver 5〇6 is reduced. Similarly, after 512 CK1 clock time, D4 and D0 11 1282536 15903twf.doc/g transmission completion 'after 512 CK1 clock time, after D4 and D6 transmission is completed, then specify data driver 5〇2 according to CK1 The data driver 508 is received by the left bus bar 511 and the data D8 and _ displayed by the 510 are received by the right bus bar 512. The designated data driver 5〇2 transfers D8 to the data driver 5〇4 according to CK2, and the data driver 5〇4 transmits the D8 to the data driver 308 according to CK2. The specified data drive 2 5〇2 transmits D10 to the data drive 5〇6 according to the CO, and the data drive = 506 and then transfers the 〇10 to the data drive, 51〇 according to CK3. Although the frequency of ^K1 fK2 CK3 is the same, the number of signal lines of the cable is reduced by two, so that the data between the beaker driver 504 and the data driver 5〇8, and the data driver 506 discards, ^. The area required for the routing of the glass substrate between 510 is reduced. The subdivision of the subdivision is classified as a method in the present invention, and its flowchart is shown in Fig. 6. See Figure 6, Figure, and Figure 5C. First, the beaker drive benefit 502, the first data drive 5〇4, and the first: ^ device (step _). Specify the data drive display and divide the display data into the first gossip - #贝不贝 指刀颂不不料料 D4 and the second part display D6, 602). The designated data drive 5 〇 2 material drive 502 assigns the second portion ° to the 506 (step 6G6). W 6 is conveyed to the second lean material drive, and in the present invention, the structure of the display data is transmitted by the actuator, so that the actuator is bidirectionally reduced by &gt; nickname frequency to reduce the glass base 12 1282536 15903twf.doc/g The area required for the board layout, or the signal frequency is unchanged, and the number of lines required to reduce the number of lines is reduced, so as to reduce the area required for the layout of the glass substrate. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the scope of the present invention, and those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. The scope of the invention is defined by the scope of the appended claims. [Simple description of the map]

圖1Α緣示習知典型液晶顯示面板結構。 圖1Β緣示另一習知典型液晶顯示面板結構。 電路 電路 電路 圖2Α繪示習知玻璃基板表面的陣列上接線傳輪 架構圖。 ’ 圖2Β纟會示習知玻璃基板表面的陣列上接線傳輸 架構圖。 * 圖2C繪示習知玻璃基板表面的陣列上接線傳輸 架構圖。 ~Fig. 1 shows a typical liquid crystal display panel structure. Fig. 1 shows another conventional liquid crystal display panel structure. Circuit Circuit Circuit Figure 2 is a block diagram showing the wiring of the wiring on the surface of a conventional glass substrate. Figure 2 is a diagram showing the wiring transmission structure on the array of the surface of a conventional glass substrate. * Figure 2C is a diagram showing the wiring transmission structure on the array of a conventional glass substrate surface. ~

圖3Α繪示根據本發明一實施例之液晶顯示 方塊圖。 器的電路 料驅動敬置 圖3Β繪示根據本發明一實施例之顯示資 的電路方塊圖。 ' 圖4繪示根據本發明一實施例之顯示資料驅動裝 傳送與接收訊號的時序圖。 、之 圖5Α繪示根據本發明另-實施例之液晶顯示 路方塊圖。 3屯 圖沾繪示根據本發明另-實施例之顯示資料驅動裝 13 1282536 15903twf.doc/g 置的電路方塊圖。 圖5C繪示圖5B所示之顯示資料驅動裝置之傳送與接 收訊號的時序圖。 圖6繪示根據本發明一實施例之顯示資料驅動方法流 程圖。 【主要元件符號說明】 100 ·玻璃基板 101 :印刷電路板 102 :資料驅動器 300、500 :時序控制器 302、502 :指定資料驅動器 304、306、308、310、504、506、508、510 :資料驅 動器 312、314、316、514、516 :輸出匯流排 30、50 :液晶面板 32、52 :顯示資料驅動裝置 511 :左侧匯流排 512 :右側匯流排 600 :於第一時脈的週期時間中,接收顯示資料 602 :將顯示資料分為多個部分,並將其中一部分輸 出至目標裝置 700 :依照第一時脈,接收多個顯示資料 702 :依序將顯示資料交替輸出至兩個資料驅動器 CK1 :第一時脈 1282536 15903twf.doc/g CK2 :第二時脈 CK3 :第三時脈 D2、D4、D6、D8、D10 :顯示資料 302Input :指定資料驅動器302輸入波形 304Input :資料驅動器304輸入波形 306Input :資料驅動器306輸入波形 502LeftInput:指定資料驅動器502左侧匯流排輸入波 形 502RightInput ·指定貢料驅動裔502右側匯流排輸入 波形 504Input :資料驅動器504輸入波形 506Input :資料驅動器506輸入波形 600 :提供指定資料驅動器、第一資料驅動器以及第 二資料驅動器 602 :指定資料驅動器接收一顯示資料,並將顯示資 料分為第一部分顯示資料與第二部分顯示資料 604 ··指定資料驅動器將第一部分顯示資料傳送至第 一資料驅動器 606 :指定資料驅動器將第二部分顯示資料傳送至第 二貧料驅動器 153 is a block diagram of a liquid crystal display according to an embodiment of the invention. Circuit Driven Desire of the Device Figure 3A is a block diagram of a display device in accordance with an embodiment of the present invention. 4 is a timing diagram showing the transmission and reception signals of the display data driving device according to an embodiment of the invention. Figure 5 is a block diagram of a liquid crystal display circuit according to another embodiment of the present invention. 3B is a circuit block diagram showing a display data driving device 13 1282536 15903twf.doc/g according to another embodiment of the present invention. Fig. 5C is a timing chart showing the transmission and reception signals of the display data driving device shown in Fig. 5B. 6 is a flow chart of a display data driving method according to an embodiment of the invention. [Main component symbol description] 100 · Glass substrate 101 : Printed circuit board 102 : Data driver 300 , 500 : Timing controller 302 , 502 : Designated data driver 304 , 306 , 308 , 310 , 504 , 506 , 508 , 510 : data Drivers 312, 314, 316, 514, 516: output busbars 30, 50: liquid crystal panels 32, 52: display data drive device 511: left bus bar 512: right bus bar 600: during the first clock cycle time Receiving display data 602: dividing the display data into a plurality of parts, and outputting a part of the data to the target device 700: receiving, according to the first clock, a plurality of display materials 702: sequentially outputting the display data to the two data drivers in sequence CK1: first clock 1282536 15903twf.doc/g CK2: second clock CK3: third clock D2, D4, D6, D8, D10: display data 302Input: specified data driver 302 input waveform 304Input: data driver 304 input Waveform 306Input: data driver 306 input waveform 502LeftInput: designation data driver 502 left side bus bar input waveform 502RightInput · designated tribute driver 502 right side bus bar input waveform 504 Input: data driver 504 input waveform 506Input: data driver 506 input waveform 600: provide designated data driver, first data driver and second data driver 602: the specified data driver receives a display data, and divides the display data into the first part of the display data And the second partial display data 604. The designated data driver transmits the first partial display data to the first data driver 606: the designated data driver transmits the second partial display data to the second poor charge driver 15

Claims (1)

1282536 15903twf.doc/g 十、申請專利範圍·· 裝置包括: 流排輪出—資料「祕—第—匯流排,並經由該第-匯 排以及—第=二:動耦接該第-匯流排、-第二匯流 接收該資料2排’雜定㈣购驗該第-匯流排 第二部^料該資料分割為至少-第—部分資料與一 部分動器,耦接該第二匯流排,接收該第- 部分純驅動11 ’輪該第三匯流排,接收該第二 置,其中^*1 專圍®1項所述之顯示資料驅動裝 流排接收係根據—第一時脈於ί第一匯 以及―〜一弟二匯流排分別根據一第二時脈 —弟三時脈輸出資料。 置,申請專利範圍第2項所述之顯示資料驅動裝 該第2 士该第二時脈之頻率與該第三時脈之頻率相同,且 排之^脈之頻率等於該第二時脈之頻率,且該第二匯流 匯沪^旒線數少於該第一匯流排之訊號線數,並且該第三 机非之訊號線數少於該第一匯流排之訊號線數。 置,4·如申請專利範圍第2項所述之顯示資料驅動裝 器,其中,包括一第三資料驅動器,耦接該第一資料驅動 &quot;根據第二時脈訊號,接收該第一資料驅動器之訊號。 1282536 15903twf.doc/g 5. 如申請專利範圍第2項所述之顯示資料驅動裝 置,其中更包括一第四資料驅動器,耦接該第二資料驅動 器,根據第三時脈訊號,接收該第二資料驅動器之訊號。 6. —種顯示資料驅動裝置,該裝置包括: 一時序控制器,耦接一第一匯流排,並經由該第一匯 流排輸出一資料; 一指定資料驅動器,耦接該第一匯流排、一第二匯流 排以及一第三匯流排,該指定資料驅動器根據一第一時脈 於該第一匯流排接收該資料,並根據一第二時脈將該資料 傳送至該第二匯流排或根據一第三時脈將該資料傳送至該 第三匯流排; 一第一資料驅動器,耦接該第二匯流排,接收該第二 匯流排之該資料;以及 一第二資料驅動器,耦接該第三匯流排,接收該第三 匯流排之該資料, 其中該第二時脈與第三時脈之頻率小於該第一時脈之 頻率。 7. 如申請專利範圍第6項所述之顯示資料驅動裝 置,其中該第二時脈與該第三時脈頻率相同,且該第一時 脈之頻率為該第二時脈之頻率的兩倍,且該第二匯流排之 訊號線數等於該第一匯流排之訊號線數,並且該第三匯流 排之訊號線數等於該第一匯流排之訊號線數。 8. 如申請專利範圍第7項所述之顯示資料驅動裝 17 1282536 15903twf.doc/g ^ ^罘二時脈之相位互為反相 •種顯示資料驅動方法,該方法包括· 提供一尥令__________ 直’兵T琢第 第一資料驅動器以及一第 提供一指定資料驅動器 二資料驅動器; 分為資料並將該顯示資料 今产定次4CL、貝料一第二部分顯示資料; 法 器 第二資料驅‘I驅動^將該第二部分顯示資料傳送至該 10·如申凊專利範圍第9 該顯示資料係根據帛±所34之顯示資料驅動方 根據弟—時脈輸出至該指定資料驅動 11·如申請專利範圍第1G項 — 法,其中該第一部份顯示資料係根據一第方 第-資料驅動器,該第二部份顯示 一, 輸出至該第二資料驅動器。 、糸根據一弟二日守脈 12·如申請專利範圍第u 法’其中該第二時脈以及該第三時脈之==料驅5方 三時脈之相位互為反相料,且該第二時脈與該第 13· —種液晶顯示器,包括: 一顯示資料驅動裝置,包括: 1282536 15903twf.doc/g 一時序控制器,耦接一第一匯流排,並經由該第 一匯流排輸出一資料; 一指定貢料驅動裔’輛接该弟一匯流排、^一弟^一 匯流排以及一第三匯流排,該指定資料驅動器於該第一匯 流排接收該資料,並將該資料分割為一第一部分資料與一 第二部分資料; 一第一資料驅動器,耦接該第二匯流排,接收該 第一部分資料;以及 一第二資料驅動器,耦接該第三匯流排,接收該 第一部分資料;以及 一液晶面板,耦接該顯示資料驅動裝置,用以顯示晝 面0 1尖如申請專利範圍第13項所述之液晶顯示器,其中 該指定貧料驅動係根據一弟'^時脈於該弟一匯流排接收 資料,且根據一第二時脈以及一第三時脈分別將該資料經 由該第二、第三匯流排輸出。 15. 如申請專利範圍第14項所述之液晶顯示器,其中 該第二時脈之頻率與該第三時脈之頻率相同,且該第一時 脈之頻率等於該第二時脈之頻率,且該第二匯流排之訊號 線數少於該第一匯流排之訊號線數,並且該第三匯流排之 訊號線數少於該第一匯流排之訊號線數。 16. 如申請專利範圍第14項所述之液晶顯示器,其中 更包括一第三資料驅動器,耦接該第一資料驅動器,根據 1282536 15903twf.doc/g 第二時脈訊號,接收該第一資料驅動器之訊號。 17.如申請專利範圍第14項所述之液晶顯示器,其中 更包括一第四資料驅動器,耦接該第二資料驅動器,根據 第三時脈訊號,接收該第二資料驅動器之訊號。 18 · —種液晶顯不為’包括· 一顯示資料驅動裝置,包括: 一時序控制器,耦接一第一匯流排,並經由該第 一匯流排輸出一資料; 一指定貧料驅動為’輕接該弟^一匯流排、一弟^一 匯流排以及一第三匯流排,該指定資料驅動器根據一第一 時脈於該第一匯流排接收該資料,並根據一第二時脈將該 資料傳送至該第二匯流排或根據一第三時脈將該資料傳送 至該第三匯流排; 一第一資料驅動器,耦接該第二匯流排,接收該 第二匯流排之該資料;以及 一第二資料驅動器,耦接該第三匯流排,接收該 第三匯流排之該資料; 其中該第二時脈與第三時脈之頻率小於該第一時 脈之頻率;以及 一液晶面板,耦接該顯示資料驅動裝置,用以顯示畫 面0 19.如申請專利範圍第18項所述之液晶顯示器,其中 該第二時脈與該第三時脈頻率相同,且該第一時脈之頻率 20 1282536 15903twf.doc/g 為該第二時脈之頻率的兩倍,且該第二匯流排之訊號線數 等於該第一匯流排之訊號線數,並且該第三匯流排之訊號 線數等於該第一匯流排之訊號線數。 20. 如申請專利範圍第19項所述之液晶顯示器,其中 該第二時脈與該第三時脈之相位互為反相。 21. 如申請專利範圍第20項所述之液晶顯示器,其中 更包括一第三資料驅動器,耦接該第一資料驅動器,根據 第二時脈訊號,接收該第一資料驅動器之訊號。 22. 如申請專利範圍第20項所述之液晶顯示器,其中 更包括一第四資料驅動器,耦接該第二資料驅動器,根據 第三時脈訊號,接收該第二資料驅動器之訊號。 211282536 15903twf.doc/g X. Application for patent scope·· The device includes: flow-out wheel--""secret---busbar, and via the first-busbar and -==2: dynamic coupling of the first-convection The row, the second bus, receives the data, and the second row of the data is divided into at least a first part of the data and a part of the actuator, and the second bus is coupled to the second bus. Receiving the first-part pure drive 11' wheel of the third busbar, receiving the second set, wherein the display data driving the busbar receiving system according to the item 1*1 is the first clock according to the first clock The first sink and the "~ one brother and two busbars respectively output data according to a second clock-different three clocks. The display data described in item 2 of the patent application scope is driven by the second clock. The frequency is the same as the frequency of the third clock, and the frequency of the pulse is equal to the frequency of the second clock, and the number of the second bus is less than the number of the signal of the first bus And the number of signal lines of the third machine is less than the number of signal lines of the first bus. The display data driving device of claim 2, wherein the third data driver is coupled to the first data driver and receives the signal of the first data driver according to the second clock signal. 1282536 The display data driving device of claim 2, further comprising a fourth data driver coupled to the second data driver and receiving the second data according to the third clock signal a data driver device. 6. A display data driving device, the device comprising: a timing controller coupled to a first bus bar and outputting a data via the first bus bar; a designated data driver coupled to the a first bus bar, a second bus bar and a third bus bar, the designated data driver receiving the data in the first bus bar according to a first clock, and transmitting the data to the second bus according to a second clock The second bus bar transmits the data to the third bus bar according to a third clock; a first data driver coupled to the second bus bar and receiving the second bus bar And the second data driver is coupled to the third bus to receive the data of the third bus, wherein the frequency of the second clock and the third clock is less than the frequency of the first clock. 7. The display data driving device of claim 6, wherein the second clock and the third clock frequency are the same, and the frequency of the first clock is two of the frequencies of the second clock. And the number of signal lines of the second bus bar is equal to the number of signal lines of the first bus bar, and the number of signal lines of the third bus bar is equal to the number of signal lines of the first bus bar. The display data driving device described in item 7 is 12 1282536 15903twf.doc/g ^ ^ The phase of the two clocks is mutually inverted. The display data driving method includes: providing a command __________ straight 'Bing T琢 The first data driver and one providing a designated data driver and two data drivers; dividing the data into the data and displaying the data in the 4CL, the second material and the second part; ^The first Part of the display data is transmitted to the 10th. If the scope of the patent application is 9th, the display data is based on the display data of the 帛±34. The driver is output to the designated data driver according to the brother-clock. 11 If the patent application scope is 1G- The method, wherein the first portion of the display data is based on a first-level data driver, and the second portion displays one, outputting to the second data driver.糸 糸 一 一 一 一 一 · · 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 The second clock and the 13th liquid crystal display, comprising: a display data driving device, comprising: 1282536 15903twf.doc/g a timing controller coupled to a first bus bar and via the first bus Outputting a data; a designated tribute driver's vehicle picking up the brother's bus, a brother's bus, and a third bus, the designated data driver receives the data in the first bus, and The data is divided into a first part of data and a second part of data; a first data driver coupled to the second bus to receive the first part of data; and a second data driver coupled to the third bus, Receiving the first portion of the data; and a liquid crystal panel coupled to the display data driving device for displaying the liquid crystal display according to claim 13, wherein the designated poor material driving system is based on '^ Brother a clock to the reception data bus, and via the output data from the second, respectively the third busbar according to a second clock and a third clock. 15. The liquid crystal display of claim 14, wherein the frequency of the second clock is the same as the frequency of the third clock, and the frequency of the first clock is equal to the frequency of the second clock. The number of signal lines of the second bus bar is less than the number of signal lines of the first bus bar, and the number of signal lines of the third bus bar is less than the number of signal lines of the first bus bar. The liquid crystal display of claim 14, further comprising a third data driver coupled to the first data driver and receiving the first data according to the second clock signal of 1282536 15903 twf.doc/g The signal of the drive. The liquid crystal display of claim 14, further comprising a fourth data driver coupled to the second data driver for receiving the signal of the second data driver according to the third clock signal. 18 · A liquid crystal display is not included in a display data driving device, comprising: a timing controller coupled to a first bus bar and outputting a data via the first bus bar; Lightly connecting the brothers to a bus, a brother, a bus, and a third bus, the designated data driver receives the data according to a first clock in the first bus, and according to a second clock Transmitting the data to the second bus bar or transmitting the data to the third bus bar according to a third clock; a first data driver coupled to the second bus bar and receiving the data of the second bus bar And a second data driver coupled to the third bus, receiving the data of the third bus; wherein the frequency of the second clock and the third clock is less than a frequency of the first clock; and The LCD panel is coupled to the display data driving device for displaying a screen. The liquid crystal display of claim 18, wherein the second clock is the same as the third clock frequency, and the first Clock frequency 20 1282536 15903twf.doc/g is twice the frequency of the second clock, and the number of signal lines of the second bus is equal to the number of signal lines of the first bus, and the number of signal lines of the third bus Equal to the number of signal lines of the first bus. 20. The liquid crystal display of claim 19, wherein the phases of the second clock and the third clock are opposite to each other. The liquid crystal display of claim 20, further comprising a third data driver coupled to the first data driver to receive the signal of the first data driver according to the second clock signal. The liquid crystal display of claim 20, further comprising a fourth data driver coupled to the second data driver to receive the signal of the second data driver according to the third clock signal. twenty one
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TWI406211B (en) * 2008-04-23 2013-08-21 Pervasive Display Co Ltd Data driving circuit, display apparatus and control method of display apparatus

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KR20080036844A (en) * 2006-10-24 2008-04-29 삼성전자주식회사 Timing controller and liquid crystal display comprising the same

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI406211B (en) * 2008-04-23 2013-08-21 Pervasive Display Co Ltd Data driving circuit, display apparatus and control method of display apparatus

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