TWI270770B

TWI270770B - Motherboard and automatic test method thereof

Info

Publication number: TWI270770B
Application number: TW94105116A
Authority: TW
Inventors: Peter Wang; Mico Tsai; Scott Chen
Original assignee: Via Tech Inc
Priority date: 2005-02-21
Filing date: 2005-02-21
Publication date: 2007-01-11
Also published as: TW200630791A

Abstract

A motherboard, coupled to a control panel for displaying operation statuses, includes a south bridge and a connector. The south bridge includes a general purpose input/output (GPIO) device and the connector is for coupling the control panel. The connector is coupled to the GPIO device via feedback transmission lines. The automatic test method of the motherboard includes controlling the motherboard to generate a test signal in simulating the corresponding operation status display; and determining if the south bridge receives the feedback test signal, if the feedback test signal is not received by the south bridge, displaying test fail information.

Description

1270770 九、發明說明：，【發明所屬之技術領域】本發明是有關於一種主機板及其自動測試方法，且特別是有關於一種由連接器拉回饋訊號線路到南橋總體輸入輪= (General Purpose Input/Omput，GPIO)元件之主機板及其自動測試方法。【先前技術】第1A圖是習知電腦結構方塊圖。請參照第丨a圖，電腦 • 1〇〇包括主機板110以及控制面板12〇。主機板110具有南橋 (South Bridge)112 以及硬碟（Hard Disk)114。主機板 110 係透過連接為111搞接控制面板120之連接器121。控制面板12〇更配置有電源發光二極體（Light Emitting Diode，LED)122、睡眠 LED 124及硬碟LED 126等三種燈號顯示單元以及蜂鳴器 (Buzzer) 128。當電腦100為電源開啟（power 〇η)狀態時，南橋 112係輸出電源訊號SP，並經由連接器m及12ι而點亮控制面板120之電源LED 122 ’以顯示電源開啟狀態。當電腦1 〇〇鲁進入睡眠狀恶時’南橋112係輸出睡眠訊號S S，並經由連接哭 111及12卜點亮控制面板120之睡眠LED 124，以顯示睡眠操作狀態。另外’當硬碟114啟動時，硬碟114係輸出硬碟訊號SH，並經由連接器111及121 ’點受控制面板12〇之硬碟led 126，以顯示硬碟啟動狀態。同樣地，南橋1係輸出蜂鳴器訊號sB，並經由連接器111及121，控制控制面板120之蜂鳴器128發出聲音，以顯示蜂鳴器操作狀態。以往在檢查主機板110之上述各種燈號顯示以及蜂鳴器操 TW1958PA 5 1270770 作是否正常時，係使用測試面板130插接主機板no之連接器 111如第1B圖所不。測試面板13 0具有測試用之電源led 132、睡眠LED 134、硬碟LED 136以及蜂鳴器138，可透過連接器131耦接連接器U1，分別用以接收上述之電源訊號、睡眠訊號SS、硬碟訊號SH、蜂鳴器訊號SB。而且檢查人員係執行檢測程式LED -TEST.exe，如第1C圖所示。1270770 IX. Description of the Invention: [Technical Field] The present invention relates to a motherboard and an automatic test method thereof, and more particularly to a method for pulling back a signal line from a connector to a south bridge overall input wheel = (General Purpose Input/Omput, GPIO) The motherboard of the component and its automatic test method. [Prior Art] Fig. 1A is a block diagram of a conventional computer structure. Please refer to the figure 丨a, the computer • 1〇〇 includes the motherboard 110 and the control panel 12〇. The motherboard 110 has a South Bridge 112 and a Hard Disk 114. The motherboard 110 is connected to the connector 121 of the control panel 120 via a connection 111. The control panel 12 is further provided with three light source display units such as a power light emitting diode (LED) 122, a sleep LED 124 and a hard disk LED 126, and a buzzer 128. When the computer 100 is in the power 开启n state, the south bridge 112 outputs the power signal SP, and illuminates the power LED 122' of the control panel 120 via the connectors m and 12i to display the power-on state. When the computer 1 进入进入 enters the sleepy state, the south bridge 112 outputs the sleep signal S S , and illuminates the sleep LED 124 of the control panel 120 via the connection cries 111 and 12 to display the sleep operation state. In addition, when the hard disk 114 is booted, the hard disk 114 outputs a hard disk signal SH, and is connected to the hard disk led 126 of the control panel 12 via the connectors 111 and 121' to display the hard disk boot state. Similarly, the south bridge 1 system outputs a buzzer signal sB, and via the connectors 111 and 121, the buzzer 128 of the control panel 120 is controlled to sound to display the buzzer operation state. In the past, when checking the above various lamp number display of the motherboard 110 and the buzzer operation TW1958PA 5 1270770, it is the case that the connector 111 of the motherboard No. 11 is connected using the test panel 130 as shown in FIG. 1B. The test panel 130 has a test power supply led 132, a sleep LED 134, a hard disk LED 136, and a buzzer 138. The connector 131 is coupled to the connector U1 for receiving the power signal, the sleep signal SS, and the like. Hard disk signal SH, buzzer signal SB. Moreover, the inspector executes the detection program LED -TEST.exe as shown in Figure 1C.

首先播一段蜂鳴裔聲音，並由檢測人員使用耳朵貼近蜂鳴器138中間的圓孔139，以檢查是否有聲音。若有聲音按 [y] ’若沒有聲音則按[N]。再依序檢查電源開啟狀態之電源lED 顯示，若電源LED 132有作用時按[Y]，若沒有作用則按[N]。繼續檢查電腦100於睡眠狀態之睡眠LED顯示，若睡眠 134有作用時按[Y]，若沒有作用則按[N]。最後，檢查硬碟114 於啟動狀態下之硬碟LED顯示，若硬碟LED 136有作用時按 [Y]，若沒有作用則按[N]。然而，由於上述之主機板測試方法係由檢測人員以肉眼與耳朵判斷測試的結果是否正確，將造成下列缺點·· ⑴不容易看到電源LED、睡眠LED以及硬碟LED的燈號··如果LED燈朝向左、右、後方，檢查人員的眼睛不容易看到亮光’必須要將頭移動到LED的正前方才能看到燈號是否顯不’且又因測試面板130之線路繁雜，容易擋住led，使得檢查人員更不容易看到燈號。 ⑺不容易聽到蜂鳴器的聲音：如果蜂鳴器朝向左、右、後方，檢查人員的耳朵將不容易聽到聲音，必須要將頭移動到蜂鳴器的正前方才能聽料鳴^否有發㈣音。且又因測試面板no的線路繁雜，容f擋住蜂鳴器，以及環㈣音使得檢查人員不容易聽見蜂鳴器所發出的聲音。First, a beeping sound is broadcast, and the inspector uses the ear to close the circular hole 139 in the middle of the buzzer 138 to check for sound. If there is a sound press [y] ’, if there is no sound, press [N]. Then check the power supply lED display in the power-on state. If the power LED 132 is active, press [Y], if not, press [N]. Continue to check the sleep LED display of the computer 100 in the sleep state. If the sleep 134 is active, press [Y], if not, press [N]. Finally, check the hard disk LED display of the hard disk 114 in the startup state. If the hard disk LED 136 is active, press [Y], if not, press [N]. However, since the above-mentioned motherboard test method is judged by the inspector to correct the result of the test with the naked eye and the ear, the following disadvantages will be caused: (1) It is not easy to see the power LED, the sleep LED, and the hard LED LED. The LED lights are facing left, right, and rear. It is not easy for the inspector's eyes to see the light. 'The head must be moved to the front of the LED to see if the light is displayed.' And because the circuit of the test panel 130 is complicated, it is easy to block. Led makes it harder for inspectors to see the lights. (7) It is not easy to hear the sound of the buzzer: If the buzzer is facing left, right, and rear, the inspector's ear will not easily hear the sound, and the head must be moved to the front of the buzzer to hear the sound. Send (four) sound. Moreover, due to the complicated lines of the test panel no, the buzzer is blocked, and the ring (four) tone makes it difficult for the inspector to easily hear the sound of the buzzer.

TW1958PA 6 1270770 (3)合易判斷錯誤：檢查人員需要按γ鍵以表示正確，或 • $ Ν鍵以表示錯誤，但是如果按太快或按錯按鍵，或是沒有確實檢查而隨便鍵，狀導致判斷結果不正確，使得不良品因此沒有被檢查出來。【發明内容】、有jii於此本發明的目的就是在提供一種主機板及其自動測忒方法。由主機板之連接器拉回饋訊號線路到南橋〇ρι〇元件。’以測斌程式控制主機板產生模擬上述各項狀態顯示之測試 Λ號，並偵測南橋Gpi〇元件是否收到回饋之測試訊號，可避免人工判斷造成的錯誤，並達到防呆效果。一根據本發明的目的，提出—種主機板，用以透過控制面板顯不刼作狀態。主機板包括南橋以及連接器。南橋包括Gpi〇元件，且連接器係用以搞接控制面板。連接器係透過回饋訊號線連接GPIO元件。主機板係產生模擬操作狀態顯示之測試訊唬且GPIO元件係用以接收回饋之測試訊號，以測試主機板之操作狀態顯示。 • 根據本發明的目的，提出一種主機板自動測試方法，包括 f制主機板產生模擬操作狀態顯示之測試訊號；以及判斷南橋疋否接收到回饋之測試訊號，若南橋未接收到測試訊號，顯示測試失敗訊息。 ^ 為讓本發明之上述目的、特徵、和優點能更明顯易僅，下文特舉-較佳實施例’並配合所附圖式，作詳細說明如下：【實施方式】請參照第2圖，其料依照本發明—較佳實施例的一種電TW1958PA 6 1270770 (3) Yiyi judges the error: the inspector needs to press the γ key to indicate the correct, or • $ Ν key to indicate the error, but if the button is pressed too fast or the wrong button is pressed, or the button is not checked, the random button As a result, the judgment result is incorrect, so that the defective product is not checked. SUMMARY OF THE INVENTION The object of the present invention is to provide a motherboard and an automatic method for measuring the same. Pull back the signal line from the connector of the motherboard to the south bridge 〇ρι〇 component. The test panel is used to control the motherboard to generate a test nickname that simulates the above status displays, and to detect whether the South Bridge Gpi〇 component receives the feedback test signal, which avoids the error caused by manual judgment and achieves the foolproof effect. In accordance with the purpose of the present invention, a motherboard is proposed for display through the control panel. The motherboard includes a south bridge and a connector. The South Bridge includes Gpi〇 components, and the connector is used to connect the control panel. The connector connects the GPIO components through the feedback signal line. The motherboard generates a test message indicating the status of the simulated operation, and the GPIO component is used to receive the feedback test signal to test the operation status display of the motherboard. According to the object of the present invention, an automatic test method for a motherboard is provided, including: a test signal for generating an analog operation state display by the f-type motherboard; and a test signal for judging whether the south bridge receives the feedback, and if the south bridge does not receive the test signal, the display is displayed. Test failure message. The above-mentioned objects, features, and advantages of the present invention will become more apparent and obvious. The following detailed description of the preferred embodiments and the accompanying drawings will be described in detail as follows: [Embodiment] Referring to Figure 2, An electric material according to the present invention - a preferred embodiment

TWI958PA 7 1270770 月自主機板結構方塊圖。主機板200，例如是桌上型電腦、筆記 • 型電細、準系統、1 A產品等各種使用前端控制面板之電子產品之主機板’其包括南橋210以及硬碟220。主機板200係透過連接器211耦接控制面板230之連接器231。控制面板23〇具有電源LED 232、睡眠LED 234、硬碟LED 236以及蜂鳴器238, 可透過連接器231分別耦接連接器211之電源LED接腳PP、睡眠LED接腳PS、硬碟LED接腳PH以及蜂鳴器接腳PB，用以顯示電源開啟狀態、電腦睡眠狀態、硬碟啟動狀態以及蜂鳴器操作狀態。 _ 另外，南橋210包括GPIO元件212，而且連接器211之電源LED接腳PP、睡眠LED接腳PS、硬碟LED接腳PH以及蜂鳴器接腳PB係分別透過回饋訊號線LP、LS、LH以及LB連接GPIO元件212。南橋210具有電源訊號輸出端TP，耦接電源LED接腳PP，用以輸出一測試用電源訊號SPt，且回饋訊號線LP係用以將測試用電源訊號spt回饋至GPIO元件212。南橋210具有睡眠訊號輸出端TS，耦接睡眠LED接腳 ps，用以輸出睡眠訊號S1。而且南橋210更包括選擇器214、 φ 睡眠功能線路216以及暫存器219。選擇器214係耦接南橋210 之睡眠訊號輸出端TS。睡眠功能線路216以及GPIO元件212 之GPO線路218耦接至選擇器214。而暫存器219係用以控制選擇器214選擇耦接睡眠功能線路216或GPO線路218至睡眠訊號輸出端TS。TWI958PA 7 1270770 month from the motherboard structure block diagram. The motherboard 200 is, for example, a desktop computer, a notebook type, a bare gauge system, a 1 A product, and the like, and includes a motherboard of an electronic product using a front control panel, which includes a south bridge 210 and a hard disk 220. The motherboard 200 is coupled to the connector 231 of the control panel 230 via the connector 211. The control panel 23A has a power LED 232, a sleep LED 234, a hard disk LED 236, and a buzzer 238. The connector 231 can be coupled to the power LED pin PP, the sleep LED pin PS, and the hard disk LED of the connector 211, respectively. The pin PH and the buzzer pin PB are used to display the power on state, the computer sleep state, the hard disk startup state, and the buzzer operation state. In addition, the south bridge 210 includes the GPIO component 212, and the power LED pin PP, the sleep LED pin PS, the hard disk LED pin PH, and the buzzer pin PB of the connector 211 pass through the feedback signal lines LP, LS, respectively. LH and LB are connected to GPIO element 212. The south bridge 210 has a power signal output terminal TP coupled to the power LED pin PP for outputting a test power signal SPt, and the feedback signal line LP is used to feed the test power signal spt to the GPIO element 212. The south bridge 210 has a sleep signal output terminal TS coupled to the sleep LED pin ps for outputting the sleep signal S1. Moreover, the south bridge 210 further includes a selector 214, a φ sleep function line 216, and a register 219. The selector 214 is coupled to the sleep signal output terminal TS of the south bridge 210. The sleep function line 216 and the GPO line 218 of the GPIO component 212 are coupled to the selector 214. The register 219 is used to control the selector 214 to selectively couple the sleep function line 216 or the GPO line 218 to the sleep signal output terminal TS.

由於電腦處於睡眠狀態時，主電源為關閉狀態，使得測試程式將無法執行。因此當欲進行睡眠狀態顯示測試時，利用暫存器219控制選擇器214耦接GPO線路218以及睡眠訊號輸出端TS ’用以輸出測試用GPO訊號SGt，並經由回饋訊號線LS TW1958PA 8 1270770 ' 回饋至GPIO元件212。 . 另外，利用硬碟220於啟動狀態下輸出測試用硬碟訊號 SHt，且回饋訊號線£η係用以將測試用硬碟訊號8玢回饋至 GPIO元件2 i 2。GPIO元件212更包括狀態（Status)暫存器2 n， =以接收測試用硬碟訊號SHt，且測試前狀態暫存器2i3之狀態參數Status設定為零。抑南橋210具有蜂鳴器訊號輸出端Τβ，用以輸出測試用蜂烏器Λ说SBt，且回饋訊號線LB係用以將測試用蜂鳴器訊號 SBt回饋至GPI0元件212。Gpi〇元件212更包括狀態暫存器 _ 215,用以接收測試用蜂鳴器訊號_，且測試前狀態暫存器犯之狀態參數Status設定為零。主機板200更包括連接器2〇1，耦接儲存元件24〇，例如是軟碟機（Fk>PPy Disk)，用以執行測試程式，並據以控制南橋Since the main power is off when the computer is in a sleep state, the test program will not be executed. Therefore, when the sleep state display test is to be performed, the register 214 is controlled by the register 219 to couple the GPO line 218 and the sleep signal output terminal TS' for outputting the test GPO signal SGt, and via the feedback signal line LS TW1958PA 8 1270770 ' Feedback is made to GPIO element 212. In addition, the test hard disk signal SHt is outputted by the hard disk 220 in the startup state, and the feedback signal line £η is used to feed the test hard disk signal 8玢 to the GPIO element 2 i 2 . The GPIO component 212 further includes a status register 2 n, = to receive the test hard disk signal SHt, and the status parameter Status of the pre-test status register 2i3 is set to zero. The south bridge 210 has a buzzer signal output terminal Τβ for outputting the test beeper Λ SBt, and the feedback signal line LB is used to feed the test buzzer signal SBt to the GPI0 component 212. The Gpi element 212 further includes a status register _ 215 for receiving the test buzzer signal _, and the status parameter Status committed by the pre-test status register is set to zero. The motherboard 200 further includes a connector 2〇1 coupled to the storage component 24〇, such as a floppy disk drive (Fk> PPy Disk) for executing a test program and controlling the south bridge accordingly.

• 210以及硬4 220產生上述之測試用電源訊號SPt、測試用GPO .訊號SGt、測試用硬碟訊號以及測試用蜂鳴器訊號_。而且測試程式更用以讀取回饋至GPIO元件212之測試訊號SPt、 SGt、SHt 及 SBt。 Φ 主機板200更包括PCI插槽203，用以插設除錯卡205，且測試程式可根據GPI()元件212是否接收到賴訊號奶、 SGt SHt及SBt ’於顯示榮幕25〇上顯示測試通過或失敗 (Fail)=息’或者於除錯卡205上顯示測試通過或失敗燈號。咕參照第3圖’其綠示依照本發明較佳實施例主機板自動測試方法流程圖。首先，於步驟300,執行測試程式以控制主機，200產生极擬操作狀態顯示之測試訊號。於模擬電源開啟狀U控制南橋210之電源訊號輸出端τρ輸出高準位電源訊 5虎spt接著，於步驟31〇，判斷南橋之Gpi〇元件212是• 210 and hard 4 220 generate the above-mentioned test power signal SPt, test GPO, signal SGt, test hard disk signal, and test buzzer signal _. The test program is further used to read the test signals SPt, SGt, SHt and SBt fed back to the GPIO component 212. Φ The motherboard 200 further includes a PCI slot 203 for inserting the debug card 205, and the test program can display on the display screen according to whether the GPI() component 212 receives the ray milk, SGt SHt and SBt '. The test pass or fail (Fail) = interest or display the test pass or fail signal on the debug card 205. Referring to Figure 3, a green flow diagram of a method for automatically testing a motherboard according to a preferred embodiment of the present invention is shown. First, in step 300, a test program is executed to control the host, and 200 generates a test signal for the display of the extremely intended operational state. In the analog power supply, the U-control South Bridge 210 power signal output terminal τρ outputs a high-level power supply. 5 Tiger spt Next, in step 31, it is determined that the south bridge Gpi〇 component 212 is

TW1958PA 9 1270770 ，接收到回饋之測試訊號。利用測試程式偵測Gp⑴元件扣疋否收到回饋之测試訊號SPt。若GPIO元件212未收到回饋之測試訊號，則崎㈣32G，顯示贼失敗之運作，結束本流程。電月句 ^ „右GPI〇凡件212未接收到回饋之測試訊號SPt，表示測试λ就spt亚沒有輸出至連接器2n，因而無法提供正常之電源 led顯示。因此，於顯示螢幕25〇上顯示測試失敗圖樣，如第 4A圖所不’或者於除錯卡2〇5顯示測試失敗燈號。可顯示大圖TW1958PA 9 1270770, received the feedback test signal. Use the test program to detect the Gp(1) component buckle. 疋No feedback signal SPt received. If the GPIO component 212 does not receive the feedback test signal, then Saki (4) 32G, showing the operation of the thief failure, ends the process. The electric month sentence ^ „ right GPI 〇件 212 does not receive the feedback test signal SPt, indicating that the test λ is not output to the connector 2n, so the normal power LED display cannot be provided. Therefore, on the display screen 25〇 The test failure pattern is displayed, as shown in Figure 4A, or the test failure light is displayed on the debug card 2〇5.

片或閃爍特大字體/燈號，或發出警告聲響，以利測試人員判斷並立即將電腦停止不動。若GPIO元件212接收到回饋之測試訊號，則進行步驟 330，顯示測試通過訊息。若Gpi〇元件212接到高準位之測試訊號SPt，表示測試訊號spt可由連接器211輸出至電源 232。因此，於顯示螢幕25〇上顯示測試通過pAss的大圖式，如第4B圖所示，或者於除錯卡2〇5顯示測試通過燈號。接著進行v 340，判斷疋否完成各項測試，若尚未完成各項測試，則回到步驟300。繼續步驟300 ’於模擬電腦睡眠狀態下，利用暫存器2 J9 控制選擇器214選擇耦接GPO線路218以及睡眠訊號輸出端 TS ’並控制GP〇線路218輸出高準位Gp〇訊號SGt。接著，於步驟310,利用測試程式偵測南橋21〇之gpio元件212是否接收到高準位之測試訊號SGt。若GPIO元件212未接收到測試訊號SGt，進行步驟32〇,於顯示螢幕250上顯示測試失敗圖樣，或者於除錯卡205顯示測試失敗燈號，並且將電腦停止不動。若GPIO元件212接收到高準位之測試訊號SGt，進行步驟33〇, 於顯示螢幕250上顯示測試通過訊息，或者於除錯卡205顯示 TW1958PA 10 1270770 測試通過燈號。根據步驟34〇之判斷，爯丨The film or flashing extra large font/light number, or a warning sound, to the tester's judgment and immediately stop the computer. If the GPIO component 212 receives the feedback test signal, then step 330 is performed to display the test pass message. If the Gpi〇 element 212 is connected to the high level test signal SPt, it indicates that the test signal spt can be output from the connector 211 to the power source 232. Therefore, a large pattern of test passes through pAss is displayed on the display screen 25〇, as shown in FIG. 4B, or a test pass signal is displayed on the debug card 2〇5. Then, v 340 is performed to determine whether the tests are completed. If the tests have not been completed, the process returns to step 300. Proceeding to step 300', in the simulated computer sleep state, the register 2 214 is used to control the selector 214 to selectively couple the GPO line 218 and the sleep signal output terminal TS' and control the GP line 218 to output the high level Gp signal SGt. Next, in step 310, the test program is used to detect whether the gpio component 212 of the south bridge 21 receives the high level test signal SGt. If the GPIO component 212 does not receive the test signal SGt, proceed to step 32, display a test failure pattern on the display screen 250, or display a test failure light number on the debug card 205, and stop the computer. If the GPIO component 212 receives the high level test signal SGt, the process proceeds to step 33, the test pass message is displayed on the display screen 250, or the debug card 205 displays the TW1958PA 10 1270770 test pass signal. According to the judgment of step 34, 爯丨

Jmr冉口到步驟300，於模擬硬碟操作狀悲下’將南橋21 〇之狀能暫在哭 ^ ^ 、，狀心暫存益213之狀態參數status設定為零’並控制硬碟220輪出测辞田成潘 ^ π ★ 輛出劂武用硬碟訊號SHt(高低準位相，）=者’於㈣31〇’判斷狀態暫存器213之狀態參數Status 疋=1右測牡式讀取狀態暫存器⑴之狀態參數S論s 仍為零，表示GPI0 Μ 212接收到的訊號沒有準位變化，因此並未接到測試訊號SHt，tA s 4 >卜一猊、出於疋進仃步驟320，在顯示螢幕250 上顯示測试失敗訊息，或者於哈Jmr 冉 mouth to step 300, in the simulation of the hard disk operation, the sadness of the south bridge 21 暂 can temporarily cry ^ ^,, the status parameter of the state of the temporary storage 213 is set to zero ' and control the hard disk 220 round Test words Tian Cheng Pan ^ π ★ Vehicle out of the hard disk signal SHt (high and low level,) = 'in (four) 31 〇 'determination status register 213 status parameter Status 疋 = 1 right measurement read The state parameter S of the state register (1) is still zero, indicating that the signal received by GPI0 Μ 212 has no level change, so the test signal SHt, tA s 4 > Step 320, displaying a test failure message on the display screen 250, or

、， ^ 'I於除錯卡205顯示測試失敗燈號，並且將電腦停止不動。甚、、目丨丨叫 μ 則试私式碩取狀態暫存器213之狀態 /數atus為1表不Gpi凡件212接收到有準位變化之測試訊於是進行步驟33〇,在顯示螢幕25〇上顯示測試通過讯心，或者於除錯卡205顯示測試通過燈號。根據㈣340之判斷，再回到步驟3〇〇，於模擬蜂鳴器操大態下，將南橋2U)之狀態暫存器215之狀態參數如加設疋為夺’湘载程式播放—段蜂鳴器聲音，並由南橋21〇輸 f蜂鳴器訊號SBt(高低準位相間）。接t，於步驟31〇,判斷狀 =暫存器215之狀態參數Status是否丨i。若測試程式讀取狀悲暫存器215之狀態參數Status仍為零，表示Gpi〇元件⑴ 接收到的訊號沒有準位變化，因此並未接到測試㈣_，於是進行步驟320 ’在顯示螢幕25()上顯示測試失敗訊息，或者於除錯卡2G5顯示測試失敗㈣，並且將電腦停止残。若測試程式讀取狀態暫存器215之狀態參數Status為卜表示Gp|〇元件212接收到有準位變化之測試訊號sm，於是進行步驟 33〇，在顯示螢幕250上顯示測試通過訊息，或者於除錯卡顯示測試通過燈號。最後，進行步驟34〇，判斷已完成S各項測, ^ 'I displays the test failure light number on the debug card 205, and stops the computer. Even, the target is called μ, and the state/number of the private state state register 213 is 1 for the table. The Gpi device 212 receives the test message with the change of the level. Then, step 33 is performed, and the screen is displayed. At 25 〇, the test passes the heart, or the debug card 205 displays the test pass number. According to the judgment of (4) 340, returning to step 3〇〇, in the state of the analog buzzer, the state parameter of the state register 215 of the south bridge 2U is added as the play of the program. The sound of the sounder, and the buzzer signal SBt (high and low level) between the south bridge and the 21st. Then, in step 31, it is judged whether the status parameter Status of the register 215 is 丨i. If the status parameter Status of the test program read-type sad register 215 is still zero, it indicates that the signal received by the Gpi〇 component (1) has no level change, so the test (4)_ is not received, and then step 320 is displayed on the display screen 25. The test failure message is displayed on (), or the test failure (4) is displayed on the debug card 2G5, and the computer is stopped. If the status parameter Status of the test program read status register 215 is that the Gp|〇 component 212 receives the test signal sm with the change of the level, then step 33 is performed, and the test pass message is displayed on the display screen 250, or The test card passes the light signal on the debug card. Finally, proceed to step 34 and judge that the S measurements have been completed.

TW1958PA 11 1270770 " 試，並結束本流程。如上所述’本發明雖以電源led、睡眠LED、硬碟LED 燈號顯示以及蜂鳴器狀態顯示為例作說明，然本發明之主機板自動測試方法並不侷限於此四種顯示功能，亦可應用其它之控制面板操作狀態顯示，只要是利用回饋訊號線將狀態顯示訊號由連接器回饋至南橋之GPIO元件，並由測試程式偵測Gpi〇 ^ 件疋否收到回鑛之測試訊號，以達到自動測試之目的，皆不脫離本發明之技術範圍。本發明上述實施例所揭露之主機板及其自動測試方法具 • 有下列之優點： ^ ⑴利用測試程式自動债測可避免因為檢測人員不熟悉或不專心等人為疏忽，it成檢查測試面板時沒有正確發現各操作狀態顯示不正常的情況，節省所造成的時間損失與金錢的浪費。 (2)利用測試程式自動债測並判斷操作狀態顯示是否正常’由於不需要由人工以肉眼與耳朵來判斷，有效提高測試過程的正癌性，並加快測試時間。综上所述，雖然本發明已以一較佳實施例揭露如上，然其 #並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍内，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。TW1958PA 11 1270770 " Try and end this process. As described above, the present invention is described by taking the power LED, the sleep LED, the hard disk LED display, and the buzzer status as an example. However, the automatic test method of the motherboard of the present invention is not limited to the four display functions. Other control panel operation status display can also be applied, as long as the status display signal is fed back to the GPIO component of the south bridge by the feedback signal line, and the test program detects whether the Gpi〇^ component receives the test signal of the returning mine. For the purpose of automatic testing, the technical scope of the present invention is not deviated. The motherboard and the automatic test method disclosed in the above embodiments of the present invention have the following advantages: ^ (1) The automatic debt test using the test program can avoid the human inconvenience caused by the unfamiliar or unfocused tester, and the test panel is inspected. It is not correctly found that the operation status is not normal, saving time loss and waste of money. (2) Using the test program to automatically measure and judge whether the operation status is normal or not. 'Because it is not necessary to judge by the naked eye and the ear, it can effectively improve the positiveness of the test process and speed up the test time. In view of the above, the present invention has been described above in terms of a preferred embodiment, and the present invention is not limited to the invention, and any person skilled in the art can make various kinds without departing from the spirit and scope of the invention. The scope of protection of the present invention is defined by the scope of the appended claims.

TW1958PA 12 1270770 【圖式簡單說明】第1A圖是習知電腦結構方塊圖。第1B圖疋尚知使用测試面板測試主機板狀態顯示示意圖。第1C圖是習知測試主機板之部份檢測程式。第2圖繪示依照本發明一較佳實施例的一種電腦主機板結構方塊圖。第3圖繪示依照本發明較佳實施例主機板自動測試方法流程圖。第4A圖繪不依照本發明較佳實施例主機板狀態顯示測試失敗並於顯示螢幕上顯示測試失敗圖樣示意圖。第4B圖繪示依照本發明較佳實施例主機板狀態顯示測試通過並於顯示螢幕上顯示測試通過之PASS大圖式示音、圖。【主要元件符號說明】 100 :電腦 110、 200 :主機板 111、 121、131、201、211、231 :連接器 112、 210 ·•南橋 114、220 :硬碟 120、230 :控制面板 122、132、232 :電源 LED 124、134、234 :睡眠 LED 126、136、236 :硬碟 LED 128、138、238 :蜂鳴器 130 :測試面板 TW1958PA 13 1270770 139 ： - 203 ： 205 ： 212 ： 213、 214 ： 216 ： 218 ： 219 ： ❿ 240 : 250 ：圓孔 PCI插槽除錯卡 GPIO元件 215 :狀態暫存器選擇器睡眠功能線路 GPO線路暫存器儲存元件顯示螢幕TW1958PA 12 1270770 [Simple description of the diagram] Figure 1A is a block diagram of a conventional computer structure. Figure 1B is also known to test the status of the motherboard display using the test panel. Figure 1C is a partial detection program of the conventional test motherboard. FIG. 2 is a block diagram showing the structure of a computer motherboard according to a preferred embodiment of the present invention. FIG. 3 is a flow chart showing an automatic test method of a motherboard according to a preferred embodiment of the present invention. Figure 4A is a diagram showing the failure of the motherboard state display test and displaying the test failure pattern on the display screen in accordance with a preferred embodiment of the present invention. FIG. 4B is a diagram showing the state of the motherboard display test according to the preferred embodiment of the present invention, and displaying the PASS large-diagram display and graph of the test pass on the display screen. [Description of main component symbols] 100: Computers 110, 200: Motherboards 111, 121, 131, 201, 211, 231: Connectors 112, 210 • Southbridges 114, 220: Hard disks 120, 230: Control panels 122, 132 232: Power LEDs 124, 134, 234: Sleep LEDs 126, 136, 236: Hard Disk LEDs 128, 138, 238: Buzzer 130: Test Panel TW1958PA 13 1270770 139: - 203: 205: 212: 213, 214 : 216 : 218 : 219 : ❿ 240 : 250 : Round hole PCI slot debug card GPIO component 215 : Status register selector sleep function line GPO line register storage component display screen

TW1958PA 14TW1958PA 14

Claims

1270770 十、申請專利範圍： 1 · 種主機板，用以透過一控制面板顯示一操作妝能該主機板包括：〜一南橋（South Bridge)，包括一總體輸入輪出（Gen^ai Purpose Input，GPI0)元件；以及連接器，用以柄接該控制面板，其中該連接器係透過一回饋訊號線連接該GPIO元件；其中，該主機板係產生模擬該操作狀態顯示之一測試訊號，且該GPIO元件係用以接收回饋之該測試訊號， •主機板之該操作狀態顯示。、以5亥 2·如申請專利範圍第丨項所述之主機板，其中該連接器包括一電源發光二極體（LED)接腳，用以電性連接該控制面板L -電源LED以及該南橋之一電源訊號輸出端，且該回饋訊號線係連接該電源LED接腳以及該GPI〇元件，用以將該南橋輸出至該連接器之一測試用電源訊號回饋至該Gpi〇元件。 3.如申請專利範圍第i項所述之主機板，其中該連接器包括-睡眠LED接㈣，用以電性連接該控制面板之一睡眠led 鲁以及該南橋之-睡眠訊號輸出端，且該回饋訊號線係連接該睡眠LED接腳以及該GPIO元件。 4·如申請專利範圍第3項所述之主機板，其中該南橋更包括：一選擇器，用以耦接該睡眠訊號輸出端；一睡眠功能線路，用以耦接該選擇器； - GPO線路’位於該Gpi()元件，用以祕該選擇器；以及 -暫存器’用以控制該選擇器選_接該睡眠功能線路或 TW1958PA 15 1270770 該GPO線路至該睡眠訊號輸出端。』 5.如中請專利範圍第4項所述之主機板，其中該暫存写係控制該選擇器柄接該Gp〇線路以及該睡眠訊號輸出端，用以輸出/則4用GPO訊號’並經由該回饋訊號線輸入該〇ρι 件。 6. 如申請專利範圍第i項所述之主機板，其中該主機板更包括-硬碟（Hard Disk)，該連接器包括—硬碟LED接腳，用以電性連接該控制面板之一硬碟LED以及該硬碟，且該回饋訊 I線係連接該硬碟LED接腳以及該GPI〇元件，用以將該硬碟輸出至該連接器之—測試用硬碟訊號回鑛至該GPIO元件。 7. 如申請專利範圍第6項所述之主機板，其中該GI)I元件更包括-狀態（Status)暫存器，用以接收該測試用硬碟訊號，且測試丽該狀態暫存器之一狀態參數為零。 8·如申請專利範圍第i項所述之主機板，其中該連接器包括-蜂鳴器接腳，用以電性連接該控制面板之一蜂鳴器以及該南橋之一蜂鳴器訊號輸出端，且該回饋訊號線係連接該蜂鳴器LED接腳以及該GPIO元件，用以將該南橋輸出至該連接器 • 之一測試用蜂鳴器訊號回饋至該GPIO元件。士申π專利範圍苐8項所述之主機板，其中該Gpi〇元件^包括-狀態暫存器，用以接收該測試用蜂鳴器訊號，且測試前該狀態暫存器之一狀態參數為零。 10.如申請專利範圍第i項所述之主機板，其中該主機板更匕括ϋ存元件，用以執行一測試程式，並據以產生該測試訊號，且該測試程式更用以讀取回饋至該GPIo元件之該測試訊號。 11·如申請專利範圍第1〇項所述之主機板，其中該儲存 TW1958PA 16 1270770 元件係為一軟碟機(Fl〇ppy Disk)。 12·如申請專利範圍第1〇項所述之主機板，其中該主機板更包括- PCI插槽並插設一除錯卡，且該測試程式係根據輸入該GPIO元件之該測試訊號，於該除錯卡上顯示一測試結果燈號。 13· —種主機板自動測試方法，該主機板包括一南橋以及 :連接器，該主機板係透過該連接器耦接該控制面板，以顯示一#作狀態，該連接器透過1饋訊號線連接該南橋，該方法包括： •㈣該主機板產生模擬該操作狀態顯示之-測試訊號；以及判斷該南橋是否接收到回饋之該測試㉝號，料南橋未接收到回饋之該測試訊號，顯示測試失敗訊息。 &、〗4.如申請專利範圍第13項所述之方法，其中該操作狀 7為-電源開啟（Power 〇n)狀態，且控制該主機板產生模擬該操作狀態顯示之—測試訊號之該步驟包括控制該南橋之一電源訊號輸出端輪出一高準位電源訊號。 • ^ I5·如申請專利範圍第13項所述之方法，其中該操作狀態為一睡眠（Sleep)狀態，且控制該主機板產生模擬該操作狀態顯示之一測試訊號之該步驟包括耦接該南橋之一 Gp〇線路= 及一睡眠訊號輸出端，並控制該Gp〇線路輸出一高準位訊號。 16.如申請專利範圍第13項所述之方法，其中該主機板包括一硬碟，該操作狀態為一硬碟操作狀態，且控制該主機板產生模擬該操作狀態顯示之一測試訊號之該步驟包括將該南橋之狀怨暫存器之一狀態參數設定為零；以及控制該硬碟輸出 TW1958PA 17 1270770 一硬碟訊號。 17.如申請專利範圍第16項所述之方法，其中判斷該南橋是否接收到該測試訊號之該步驟包括判斷該南橋之該狀=暫存器之該狀態參數是否變》1，#該狀態參數不$】，顯示測試失敗訊息。 .如中請專利範圍第13項所述之方法，其中該操作狀態為-蜂鳴器操作狀態，且控制該主機板產生模擬該操作狀能顯示之-測試訊號之該步驟包括將該南橋之—狀能暫存哭之二 =態=設定為零；以及控制該南橋之一蜂鳴器訊號輸帽出一蜂鳴器訊號。 19·如申請專利範圍第18項所述换-u 貝収之方法，其中判斷該南橋疋否接收到_試訊號之該步驟包括判斷該南橋之該狀態暫 ^之，狀態參數是否變為卜若該狀態參數不為】，顯示測試失敗訊息。 20.如申請專利範圍第13項所述之方法，其中主機板產生模擬該操作狀態顯示一 ^ 該主機板之—館存元件執行二二“，亥步驟包括利用能链_^ 5式私式，以產生模擬該操作狀心、‘員不之忒測試訊號，且判斷 θ m 所w南橋疋否接收到該測試訊號之 = 贼程式彳貞_南橋接收該賴訊號之狀 21·如申請專利範圍第13項所述之方法，其中係應用於一電腦，日翩-八r巧主機扳該主機板之-除錯卡顯式失敗訊息之該步驟包括於利用作。、、不測试失敗燈號，並停止該電腦之操橋是否22接二項所述之方法:其中_^ / ^驟之後’包括若該南橋接收到 TW1958PA 18 !27〇77〇訊號’利用該除錯卡顯示一測試通過(p㈣燈號。係23· %巾請專利範圍帛13項所述之方法，其中該主機板腦2用於電腦，且顯不該測試失敗訊息之該步驟包括於該電 ”、、員示逢幕上顯示該測試失敗訊息，並停止該電腦之操作。橋如中請專利範圍第23項所述之方法，其中判斷該南該=接收到該測試訊號之該步驟之後，包括若該南橋接收到斌汛旒，於該顯示螢幕上顯示測試通過訊息。1270770 X. Patent application scope: 1 · A motherboard for displaying an operation makeup through a control panel. The motherboard includes: ~ South Bridge, including a total input wheel (Gen^ai Purpose Input, a GPI0) component; and a connector for arranging the control panel, wherein the connector is connected to the GPIO component through a feedback signal line; wherein the motherboard generates a test signal simulating the operation state display, and the The GPIO component is used to receive the feedback signal of the feedback, and the operating state of the motherboard is displayed. The motherboard of the invention of claim 5, wherein the connector comprises a power LED (LED) pin for electrically connecting the control panel L-power LED and the One of the south bridge power signal output terminals, and the feedback signal line is connected to the power LED pin and the GPI〇 component for feeding back the test power signal of the south bridge output to the connector to the Gpi〇 component. 3. The motherboard of claim i, wherein the connector comprises a sleep LED (four) for electrically connecting one of the control panel sleep led Lu and the south bridge - sleep signal output, and The feedback signal line connects the sleep LED pin and the GPIO component. 4. The motherboard of claim 3, wherein the south bridge further comprises: a selector for coupling the sleep signal output; a sleep function line for coupling the selector; - GPO The line 'is located in the Gpi() component for secret selector; and the - register is used to control the selector to connect the sleep function line or the TW1958PA 15 1270770 to the sleep signal output. 5. The motherboard of claim 4, wherein the temporary write system controls the selector handle to connect the Gp〇 line and the sleep signal output for outputting/4 using a GPO signal. And input the 〇ρι via the feedback signal line. 6. The motherboard of claim i, wherein the motherboard further comprises a Hard Disk, the connector comprising a hard disk LED pin for electrically connecting the control panel a hard disk LED and the hard disk, and the feedback I wire is connected to the hard disk LED pin and the GPI device, and the test hard disk signal is output to the connector to the connector. GPIO components. 7. The motherboard of claim 6, wherein the GI)I component further comprises a status register for receiving the test hard disk signal, and testing the status register One of the status parameters is zero. 8. The motherboard of claim i, wherein the connector includes a buzzer pin for electrically connecting one of the control panel buzzer and one of the south bridge buzzer signal outputs. And the feedback signal line is connected to the buzzer LED pin and the GPIO component for outputting the south bridge to the connector. • One of the test buzzer signals is fed back to the GPIO component. The sigma π patent scope 苐8 of the motherboard, wherein the Gpi〇 component includes a state buffer for receiving the test buzzer signal, and one state parameter of the state register before the test Zero. 10. The motherboard of claim i, wherein the motherboard further includes a storage component for executing a test program, and the test signal is generated, and the test program is further configured to read The test signal fed back to the GPIo component. 11. The motherboard of claim 1, wherein the storage TW1958PA 16 1270770 component is a floppy disk (Fl〇ppy Disk). 12. The motherboard of claim 1, wherein the motherboard further comprises a PCI slot and a debug card is inserted, and the test program is based on the test signal input to the GPIO component. A test result light number is displayed on the debug card. 13) A method for automatically testing a motherboard, the motherboard includes a south bridge and a connector, wherein the motherboard is coupled to the control panel through the connector to display a status of the connector through the 1 feed line Connecting the south bridge, the method includes: • (4) the motherboard generates a test signal simulating the display of the operation status; and determining whether the south bridge receives the feedback of the test No. 33, and the south bridge does not receive the feedback signal of the feedback, and displays Test failure message. The method of claim 13, wherein the operation state 7 is a power-on state, and the control panel generates a test signal that simulates the operation state display. The step includes controlling a high level power signal of the power signal output end of the south bridge. The method of claim 13, wherein the operating state is a Sleep state, and the step of controlling the motherboard to generate a test signal simulating the operating state display comprises coupling the One of the south bridges has a Gp〇 line = and a sleep signal output, and controls the Gp line to output a high level signal. 16. The method of claim 13, wherein the motherboard comprises a hard disk, the operating state is a hard disk operating state, and controlling the motherboard to generate a test signal simulating the operating state display The step includes setting a state parameter of one of the South Bridge's complaint registers to zero; and controlling the hard disk output TW1958PA 17 1270770 to a hard disk signal. 17. The method of claim 16, wherein the step of determining whether the south bridge receives the test signal comprises determining whether the state of the south bridge = the state parameter of the register is changed, "1" The parameter is not $], and the test failure message is displayed. The method of claim 13, wherein the operating state is a buzzer operating state, and the step of controlling the motherboard to generate a simulated test signal capable of displaying the test signal comprises: - The shape can temporarily store the crying = state = set to zero; and control one of the south bridge buzzer signals to output a buzzer signal. 19. If the method of determining the South Bridge fails to receive the _ test signal, the method of determining whether the status of the south bridge is temporarily changed, and whether the status parameter is changed to If the status parameter is not [], a test failure message is displayed. 20. The method of claim 13, wherein the motherboard generates a simulation of the operating state display, the motherboard, the library component, and the second step, and the step of using the energy chain _^5 In order to simulate the operation of the heart, the 'not the test signal, and determine whether the θ m is the South Bridge 接收接收接收 = = = 南 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The method of claim 13, wherein the method is applied to a computer, and the step of arranging the motherboard-the debug card explicit failure message is included in the use. No., and stop the computer's bridge is 22 connected to the two methods described: where _^ / ^ after the 'including if the South Bridge receives TW1958PA 18 ! 27 〇 77 〇 signal 'Use the debug card to display a test Passing the (p (four) light number. The method of claim 23, wherein the main board brain 2 is used for a computer, and the step of displaying the test failure message is included in the electric", The test failure message is displayed on the screen. And stopping the operation of the computer. The method of claim 23, wherein judging the south=the step of receiving the test signal includes, if the south bridge receives the bin, the display The test pass message is displayed on the screen.

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