TWI262009B - ATM communication system and method with improved UTOPIA communication interface - Google Patents

ATM communication system and method with improved UTOPIA communication interface Download PDF

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TWI262009B
TWI262009B TW92131129A TW92131129A TWI262009B TW I262009 B TWI262009 B TW I262009B TW 92131129 A TW92131129 A TW 92131129A TW 92131129 A TW92131129 A TW 92131129A TW I262009 B TWI262009 B TW I262009B
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cell
bit
atm
transmission
layer
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TW92131129A
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TW200516934A (en
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Yi-Chiun Chen
Ching-Liang Li
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Tailyn Comm Co Ltd
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Abstract

The present invention provides an ATM communication system and method with improved UTOPIA communication interface, which is an UTOPIA communication interface that increases the number of transfer ports with cell header information and network addressing principle under asynchronous transfer mode (ATM), so that the number of transfer ports can be increased through a multi-path transfer processing device between the ATM device and PHY device, and interconnected through a high-speed transfer medium, thereby obtaining the most efficient transfer result. The UTOPIA communication interface in the present invention can be applied in the operational mode of UTOPIA level 2 without varying the other devices. It can also reduce the cost effectively.

Description

1262009 玖、發明說明: 【發明所屬之技術領域】 本發明係有關於一種改良UTOPIA通訊介面的atm通气*** 與方法,更明確地說明,本發明是一種實施於非同步傳輸模1 (Asynchronous Transfer Mode,ATM)下的通訊系統與方法,尤 其是對網路通訊協定架構ATM層一PHY層之間的標準UT〇piAit^ 介面之改良方法。 【先前技術】 請參閱第一圖,係顯示習知ATM訊息格式之示意圖。如第一 圖所示,在ATM網路環境裡,資訊(包括聲音、影像等)均被切 割並包裝在小訊胞(cel 1)裡傳送,訊胞的長度固定為五十=個位 元組(Byte),其中前五個位元組為訊胞的標頭資訊彳η Header),用來表示這個訊胞的來源、目的及類型等,其餘四十八 個位元組則為承載(Payload)所要傳遞的資訊。 請參閱第二圖,並請配合參閱第一圖,係顯示習知使用者介 面(User-Network Interface,UNI)之訊胞格式及網路對網路介面 (Network-Network Interface,丽I)之訊胞格式。如第_圖所示, 其中GFC(Generic Flow Control) ··流量控制欄位,用來控制使 用者與網路間傳送訊胞的流量。此欄位只有在UNI 〇Jser-MetTO:rk Interface)介面間傳送的訊胞才代表流量控制。在丽工 (Network-Network Interface)介面間傳送的訊胞中,此搁位將 擴充為VPI欄位。以下將對每一標頭資訊位元作詳細的描述: VPI (Virtual Path Identifier):虛擬路徑辨識碼,用 以辨識此訊胞屬於哪一條虛擬路徑。 VCI (Virtual Channel Identifier):虛擬通道辨識碼, 用以辨識此訊胞屬於哪一條虛擬通道。 PTI (Payload Type Identifier):酬載型態辨識碼(3 位 1262009 元),用以辨識承載的資料型態。 CLP (Cell Loss Priority):訊胞流失優先權(1位元), 用以指示此訊胞遭遇擁塞時的丟棄優先權。當CLP=1時則表示此 訊胞可優先被丟棄。 HEC (Header Error Correction):訊胞標頭錯誤更正欄位 (8位元),用以更正訊胞標頭的前四個位元組中的任何一個位元 錯誤及偵測多位元錯誤。 其中,在訊胞結構中,VPI和VCI是最重要的兩部分。此兩 部分合起來即構成一個訊胞的路由資訊,也就是這個訊胞的來源 及目地。而ATM裝置就是根據各個訊胞上的VPI及VCI來決定欲 傳送的線路。 請參閱第三圖,並請配合參閱第一圖及第二圖,係顯示習知 ATM運作之方塊圖。如第三圖所示,ATM通訊協定係包含三層:實 體層(Physical Layer)、ATM 層(ATM Layer)及 ATM 調節層(ATM Adaptation Layer, AAL)。其中,實體層為傳輸媒介(如光纖、 雙絞線)及界面接頭,ATM層則負責處理ATM訊胞,在工作站中 用以負責傳送及接收訊胞,而在交換機中則負責完成訊胞之交換 及多工。由於一般上層通訊協定傳輸資料的單位為長度不一的封 包(packet),而ATM層所處理的都是固定長度的訊胞。因此中間 需要ATM調節層一層來進行兩者間的協調工作。 請參閱第四圖,係顯示習知技術ATM層一PHY層之間的系統 方塊圖。如第四圖所示,由於通用測試及作業實體層介面 (Universal Test Operation PHY Interface For ATM , UTOPIA) 是採用非同步傳輸模式。在一般的情形下,ATM裝置13與PHY裝 置15是直接介接(Directly Connect),而標準UTOPIA通訊介 面可以使ATM裝置13與PHY裝置15之間信號的傳輸正常運作。 然而’在現今網路大容量和高速交換的需求下,通訊系統的架構 1262009 曰趨複雜,在一些情形下系統設計者會希望讓UTOPIA的ATM裝置 13能透過一個高速傳輸媒介l〇(Transmission Media)和UTOPIA 的PHY裝置15介接。 由 ATM 論壇技術委員會(ATM-Form Technical Committee) 於一九九五年指定UTOPIA Level 2匯流排為ATM層(資料鏈結)與 ATM實體層晶片間的標準介面。目前,標準UTOPIA Level 2匯流 排可支援622Mbps的資料傳輸速度,而UTOPIA Level 2標準則可 支援多達31顆實體層晶片(從屬)及一顆ATM層晶片(主控)。 【發明内容】 有鑑於先前技術,大都藉由在通訊系統上加裝卡板以增加 ATM傳送訊胞至PHY層之傳輸埠數量,然而,在UTOPIA Level 2 標準中,一個主控晶片(Master)最多只能擴充到31個傳輸埠,只 能加裝至四張具有八個傳輸埠或二張具有十六個傳輸埠的卡板, 使得一般的傳輸晶片通常只具有16或31個傳輸埠。因此,為了 '增進通訊系統的傳輸效益,則需要一種能改善此限制的UT〇pIA通 訊介面的ATM通訊系統與方法。 本發明之目的係提供一種改良UTOPIA通訊介面的ATM通訊 方法,係藉由設定訊胞之標頭位元來擴充主傳輸埠之連線來增加 ATM層一PHY層之間的傳輸路徑。 ^ 本發明之目的係提供一種改良UTOPIA通訊介面的ATM通訊 系統,係藉由在標準UTOPIA通訊介面間設置一訊胞多路傳輪處理 為,藉由該處理器作為訊胞來源或目的之傳送依據,進而提昇A刊 層一PHY層的傳輸埠數量及傳輸效率。 本發明之目的係提供一種訊胞多路傳輸處理器,在ATM層〜 PHY層間處理訊胞來源或目的之傳送依據,俾使一 ATM裝置的一 輸埠可對應多個PHY裝置。 ’ 本發明之目的係提供一種訊胞多路傳輸處理器,在atm層〜 1262009 PHY層間,利用該訊胞多路傳輸處理器就可以增加ATM層傳輸埠數 量並透過一高速傳輸媒介直接介接,該高速傳輸媒介如申請人所 有之發明公告第527796號所揭露之「改良u 丁〇p丨a通訊介面 的A T Μ通訊系統」。 本發明係提供一種多路傳輸處理裝置,包含:一標準ϋτ〇ρΐΑ Level 2介面,與ATM裝置的複數個傳輸琿介接以處理訊胞之傳 輸;以及,一延伸UTOPIA介面,與複數個ρΗγ裝置的傳輸埠介接 以處理訊胞之傳輸,其中該多路傳輸處理裝置依據該訊胞之標頭 位元判斷訊胞之來源傳輸埠並傳送至該標頭位元所對應之傳輸 埠。 其中,該多路傳輸處理裝置實施為一積體電路,且進一步包 含一訊胞傳輸處理器,該訊胞傳輸處理器從標頭位元中解碼傳輸 埠的編址,將訊胞資訊傳送至該標頭位元所對應之傳輸埠。 本發明,提供一種改良UT0PIA通訊介面的ΑΤΜ通訊系統, 包含:一 ATM裝置,位於ΑΤΜ層;複數個m裝置,位於ρΗγ層; 以及,一多路傳輸處理裝置,介於ΑΤΜ層—ρΗγ層之間,將ατμ裝 置所傳輸訊胞資訊交換至適當的ΡΗΥ裝置傳輸埠;其中,該多路 傳輸處理為依據该訊胞之標頭位元判斷訊胞之來源並傳送至該標 頭位兀所對應之傳輸埠,包含:一標準UT〇piA Level 2介面,與 ATM層的複數個傳輪埠之一介接;以及,一延伸UT〇piA介面,與 PHY層的複數個傳輪埠介接。 其中’ ATM通訊系統在ATM層一 PHY層之間進一步包含一高 速傳輸媒介’如發明公告第527796號所揭露之「改良U τ〇p I A通訊介面的ATM通訊系統」。 本發明係提供—種ATM通訊方法,以擴充ATM層的傳輸埠數 量’包含以下步驟:利用標準UTOPIA Level 2介面,在ATM裝置 所傳送的说胞資戒的標頭位元中編址以識別ρΗγ裝置傳輸埠;以 1262009 及,利用一多路傳輸處理裝置,依據該訊胞之標頭位元判斷訊胞 之來源,並將訊胞資訊傳送至該標頭位元所對應之PHY裝傳輸埠。 其中,該方法進一步包含:使用標頭位元的未定義位元、部 份GFC位元、部份VPI位元或部份VCI位元等作為PHY裝置傳輸 璋之編址。 【實施方式】 請參閱第五圖,並請配合參閱第一圖及第二圖,係顯示本發 明改良UTOPIA通訊介面的ATM通訊系統之實施方塊圖。如第五圖 所示,一種改良UTOPIA通訊介面的ATM通訊系統,主要包含一 ATM 裝置,用以將ATM層輸入埠的訊胞交換至適當的PHY層傳輸埠; 以及,一多路傳輸處理裝置,介於ATM層一PHY層之間,包含:標 準UTOPIALevel 2介面17,用以支援與ATM層傳輸埠之訊胞資料 的傳輸通訊;以及,一延伸UTOPIA介面19,用以作為與PHY層 傳輸埠之傳輸通訊,其中,該多路傳輸處理裝置在處理ATM層與 PHY層之間的訊胞交換包含一訊胞傳輸處理器18,用以依據該訊 胞之標頭位元判斷訊胞之來源傳輸埠並傳送至該標頭位元所對應 之傳輸埠。 該ATM裝置16的主要任務是將由每個輸入到ATM層傳輸埠 的訊胞交換至適當的PHY層傳輸埠。由於ATM網路是連線導向式 傳輸,因此在訊胞進入網路之前其路徑都已經事先決定。當屬於 此連線的訊胞進入ATM裝置時,該交換機只要查一下此連線的傳 輸琿對照表(Routing Table)就可以知道該訊胞應該由哪一個PHY 層傳輸埠送出去。為了要容易分辨這些經過的連線,可將每一條 連線稱為虛擬通道(virtual channel)。因此每一條虛擬通道都有 一個虛擬通道辨識碼(VCI)。為了讓交換機能更有效率的完成交換 線路的工作,可將若干條連線合併起來稱為虛擬路徑(virtual 1262009 path)。因此每一條虚擬路經都有〜^ 個虛擬路徑辨識碼(VPI)。太 發明改良UTOPIA通訊介面的ATM、£ /TmT 、+ 通訊方法係藉由設定不同的 (VPI,VCI)來區別經過一條通訊線 勺 、反路上的連線。例如,以UNI邙 胞格式為例,該標頭資訊之VPI盥νΓτ々、 ” vu各為8位元及16位元,囡 此可藉由VPI或VCI之部份位元來擴充atm層傳輸璋之數量。 當訊胞通訊輸入ATM層傳輪埠後,如該訊胞標頭位元之 Wi,V⑴=(20,30) ’則經由ATM裝置16處理後該標頭位元 之VPI/VCI值將變成(1G0,2G0),在本發明—較佳實施例中,以 UNI訊胞格式為例,忒払頭資訊之虛擬路徑辨識碼與虛擬通道辨識 碼分別為8位元及16位元,如欲將ATM層之傳輸埠擴充為八個或 十六個傳輸埠,則玎依據網路定址的方式,利用VPI或VCI的部 分位元來設定欲擴充的傳輸埠數來達成。 當使用者欲將atm層傳輸埠擴充為八個傳輸埠時,則可拮員取 VPI或VCI位元中的三個位元來設定,因此,由三個位元所產生的 對應位元(0 0 〇〜111)可用來设定八個相對應的ATM層傳輸崞,則使 得同一條的ATM層傳輸埠可具有不同的(VPI ’ VCI)值。相對的, 如使用者欲將ATM層傳輸埠擴充為十六個傳輸埠,則可藉由vpj 或VCI位元中的四個位元來設定,並藉由四個位元所產生的對應 位元(0000〜1111)設定至十六個相對應的層傳輪埠。 根據本發明ATM通訊方法’ ATM裝置利用標準UTOPIA Level 2介面與多路傳輸處理裝置介接,並在訊胞資訊的標頭位元中編址 以作為識別PHY裝置傳輸埠。請繼續參閱第五圖,在本發明一較 佳實施例中,當訊胞經由ATM裝置16後’原訊胞之VPI/VCI值將 由(20,30)變成為(1〇〇,200),藉由前述的定址方法,以擷取VPI 或VCI位元中的三個位元來設定,則由三個位元所產生的對應位 元(000〜111)可用來各別設定至八個相對應的ATM層傳輸埠,該擴 充的八條ATM層傳輸埠都具有唯一的VPI/VCI辨識碼,即 1262009 ( 100,200)、( 132,200)、( 164,200)、(196,200)、(228, 200)、 (260, 200)、(292, 200)及(324, 200)。1262009 发明, the invention description: [Technical field of the invention] The present invention relates to an ATM ventilation system and method for improving the UTOPIA communication interface. More specifically, the present invention is implemented in an Asynchronous Transfer Mode 1 (Asynchronous Transfer Mode) , communication system and method under ATM, especially the improved method of standard UT〇piAit^ interface between ATM layer and PHY layer of network communication protocol architecture. [Prior Art] Referring to the first figure, a schematic diagram showing a conventional ATM message format is shown. As shown in the first figure, in the ATM network environment, information (including sound, video, etc.) is cut and packaged in a small cell (cel 1), and the length of the cell is fixed at fifty = one bit. Group (Byte), in which the first five bytes are the header information of the cell, Headη Header), which is used to indicate the source, purpose and type of the cell, and the remaining forty-eight bytes are carried (Payload). The information to be delivered. Please refer to the second figure, and please refer to the first figure, which shows the user-network interface (UNI) cell format and network-network interface (Network-Network Interface, Li I) Cell format. As shown in Figure _, the GFC (Generic Flow Control) · Flow Control field is used to control the traffic between the user and the network. This field only transmits signals between the UNI 〇 Jser-MetTO: rk Interface interface to represent flow control. In the cell transmitted between the Network-Network Interface interfaces, this shelf will be expanded to the VPI field. The following is a detailed description of each header information bit: VPI (Virtual Path Identifier): A virtual path identification code used to identify which virtual path the cell belongs to. VCI (Virtual Channel Identifier): A virtual channel ID that identifies which virtual channel the cell belongs to. PTI (Payload Type Identifier): The payload type identification code (3 digits 1262009 yuan) is used to identify the data type of the bearer. CLP (Cell Loss Priority): The cell loss priority (1 bit) used to indicate the discarding priority of this cell when it encounters congestion. When CLP=1, it means that this cell can be discarded first. HEC (Header Error Correction): The cell header error correction field (8 bits) is used to correct any one of the first four bytes of the cell header and detect multiple bit errors. Among them, in the cell structure, VPI and VCI are the two most important parts. The two parts together form the routing information of a cell, which is the source and destination of the cell. The ATM device determines the line to be transmitted based on the VPI and VCI on each cell. Please refer to the third figure, and please refer to the first and second figures for a block diagram of the operation of the conventional ATM. As shown in the third figure, the ATM protocol consists of three layers: the physical layer, the ATM layer, and the ATM Adaptation Layer (AAL). The physical layer is a transmission medium (such as optical fiber, twisted pair) and interface connector, and the ATM layer is responsible for processing the ATM cell, and is responsible for transmitting and receiving the cell in the workstation, and is responsible for completing the cell in the switch. Exchange and multiplex. Since the units of the upper layer communication protocol transfer data are packets of different lengths, the ATM layer processes fixed-length cells. Therefore, an ATM adjustment layer is required in the middle to coordinate the two. Please refer to the fourth figure, which shows a system block diagram between the PHY layer of the conventional technology ATM layer. As shown in the fourth figure, the Universal Test Operation PHY Interface For ATM (UTOPIA) adopts the asynchronous transfer mode. In the general case, the ATM device 13 is directly connected to the PHY device 15, and the standard UTOPIA communication interface allows the transmission of signals between the ATM device 13 and the PHY device 15 to operate normally. However, under the current demand for high-capacity and high-speed switching, the architecture of the communication system 1262009 is becoming more and more complicated. In some cases, the system designer will hope that the UTOPIA ATM device 13 can transmit through a high-speed transmission medium (Transmission Media). ) Interfacing with UTOPIA's PHY device 15. In 1995, the ATM-Form Technical Committee designated the UTOPIA Level 2 bus as the standard interface between the ATM layer (data link) and the ATM physical layer chip. Currently, the standard UTOPIA Level 2 bus can support data transfer speeds of 622 Mbps, while the UTOPIA Level 2 standard supports up to 31 physical layer chips (slave) and one ATM layer chip (master). SUMMARY OF THE INVENTION In view of the prior art, most of the cards are added to the communication system to increase the number of transmissions from the ATM to the PHY layer. However, in the UTOPIA Level 2 standard, a master chip (Master) It can only be expanded to a maximum of 31 transmission ports, and can only be added to four cards with eight transmission ports or two cards with sixteen transmission ports, so that a typical transmission chip usually has only 16 or 31 transmission ports. Therefore, in order to 'improve the transmission efficiency of the communication system, an ATM communication system and method for improving the UT〇pIA communication interface of this limitation are needed. The object of the present invention is to provide an ATM communication method for improving the UTOPIA communication interface, which is to increase the transmission path between the ATM layer and the PHY layer by setting the header bit of the cell to expand the connection of the main transmission port. The object of the present invention is to provide an ATM communication system with improved UTOPIA communication interface, which is configured by using a multi-pass transmission process between standard UTOPIA communication interfaces, by using the processor as a source or destination for transmission. According to the basis, the number of transmissions and the transmission efficiency of the A-layer PHY layer are further improved. SUMMARY OF THE INVENTION It is an object of the present invention to provide a cell multiplex processor that processes the source or destination of a cell between the ATM layer and the PHY layer such that an input of an ATM device can correspond to a plurality of PHY devices. The object of the present invention is to provide a cell multiplex processor, which can increase the number of ATM layer transmissions and directly interface through a high speed transmission medium between the atm layer and the 1262009 PHY layer. The high-speed transmission medium is the "AT Μ communication system for improving the communication interface of the U.S.P.a communication interface" disclosed in the applicant's allotment No. 527796. The present invention provides a multiplex processing device comprising: a standard ϋτ〇ρΐΑ Level 2 interface, interfacing with a plurality of transmission ports of the ATM device to process the transmission of the cell; and an extended UTOPIA interface, and a plurality of ρΗγ The transmission of the device is interfaced to process the transmission of the cell, wherein the multiplex processing device determines the source transmission of the cell according to the header bit of the cell and transmits to the transmission port corresponding to the header bit. The multiplex processing device is implemented as an integrated circuit, and further includes a cell transmission processor that decodes the address of the transmission port from the header bit and transmits the cell information to The transmission port corresponding to the header bit. The present invention provides a ΑΤΜ communication system for improving a UTOPIA communication interface, comprising: an ATM device located at a ΑΤΜ layer; a plurality of m devices located at a Η γ layer; and a multiplex transmission processing device interposed between the ΑΤΜ layer and the Η Η γ layer Interchanging the information transmitted by the ατμ device to an appropriate device transmission device; wherein the multiplexing process determines the source of the cell according to the header bit of the cell and transmits the signal to the header location The corresponding transmission port includes: a standard UT 〇 piA Level 2 interface, which is interfaced with one of the plurality of rims of the ATM layer; and an extended UT 〇 piA interface that interfaces with a plurality of multiplexers of the PHY layer. The 'ATM communication system further includes a high-speed transmission medium between the ATM layer and the PHY layer'. The "improved U 〇 〇p I A communication interface ATM communication system" disclosed in the invention announcement No. 527796. The present invention provides an ATM communication method for augmenting the number of transmissions of the ATM layer' including the following steps: using the standard UTOPIA Level 2 interface, addressing in the header bits of the ATM channel transmitted by the ATM device to identify The Η Η 装置 device transmits 埠; 1262009 and, using a multiplex transmission processing device, determines the source of the cell according to the header bit of the cell, and transmits the cell information to the PHY device corresponding to the header bit. port. The method further includes: using an undefined bit of the header bit, a partial GFC bit, a partial VPI bit or a partial VCI bit, etc. as the address of the PHY device transport port. [Embodiment] Please refer to the fifth figure, and please refer to the first figure and the second figure, which is a block diagram showing the implementation of the ATM communication system of the improved UTOPIA communication interface of the present invention. As shown in FIG. 5, an ATM communication system for improving the UTOPIA communication interface mainly includes an ATM device for exchanging signals of the input layer of the ATM layer into an appropriate PHY layer transmission port; and a multiplex transmission processing device. Between the ATM layer and the PHY layer, including: a standard UTOPIALevel 2 interface 17 for supporting transmission communication with the ATM layer to transmit data; and an extension UTOPIA interface 19 for transmission to the PHY layer The transmission communication of the multiplex processing device, wherein the processing of the cell exchange between the ATM layer and the PHY layer comprises a signal transmission processor 18 for determining the cell according to the header bit of the cell The source is transmitted and transmitted to the transmission port corresponding to the header bit. The primary task of the ATM device 16 is to switch the cells transmitted by each input to the ATM layer to the appropriate PHY layer transport port. Since the ATM network is a wire-oriented transmission, the path is determined before the channel enters the network. When the cell belonging to the connection enters the ATM device, the switch can check the routing table of the connection and know which PHY layer the cell should transmit. In order to easily distinguish these passing lines, each connection can be called a virtual channel. Therefore each virtual channel has a virtual channel identification code (VCI). In order to allow the switch to work more efficiently on the switched line, several wires can be combined to be called a virtual path (virtual 1262009 path). Therefore, each virtual path has ~^ virtual path identification code (VPI). The ATM, £/TmT, and + communication methods that invented the UTOPIA communication interface were distinguished by setting different (VPI, VCI) to distinguish between a communication line and a connection on the reverse path. For example, taking the UNI cell format as an example, the VPI 盥νΓτ々 and "vu" of the header information are each 8-bit and 16-bit, and thus the ATM layer transmission can be extended by a part of the VPI or VCI. When the cell communication enters the ATM layer to transmit the rim, if the cell header bit is Wi, V(1) = (20, 30) ' then the VPI of the header bit is processed by the ATM device 16 The VCI value will become (1G0, 2G0). In the preferred embodiment of the present invention, taking the UNI cell format as an example, the virtual path identification code and the virtual channel identification code of Shantou Information are 8 bits and 16 bits, respectively. If you want to expand the transmission layer of the ATM layer to eight or sixteen transmission ports, you can use the VPI or part of the VCI to set the number of transmission parameters to be expanded according to the way the network is addressed. When the user wants to expand the atm layer transmission to eight transmission ports, the user can set the three bits in the VPI or VCI bit to set, so the corresponding bit generated by the three bits (0) 0 〇~111) can be used to set eight corresponding ATM layer transmission ports, so that the same ATM layer transmission can have different (VPI) 'VCI' value. Relatively, if the user wants to expand the ATM layer transmission to 16 transmission ports, it can be set by four bits in the vpj or VCI bit, and by four bits. The generated corresponding bit (0000~1111) is set to sixteen corresponding layer transfer rims. According to the ATM communication method of the present invention, the ATM device interfaces with the multiplex processing device using the standard UTOPIA Level 2 interface, and The header information of the cell information is addressed as the identification PHY device transmission. Please continue to refer to the fifth figure. In a preferred embodiment of the present invention, when the cell passes through the ATM device 16, the VPI of the original cell is used. The /VCI value will be changed from (20, 30) to (1〇〇, 200), and by the above addressing method, to capture three bits in the VPI or VCI bit, then three bits are used. The generated corresponding bits (000~111) can be used to set up to eight corresponding ATM layer transmission ports, and the extended eight ATM layer transmission ports have unique VPI/VCI identification codes, namely 1262009 (100,200). , ( 132,200), ( 164,200), (196,200), (228, 200), (260, 200), (292, 200) and (3 24, 200).

這些(VPI,VCI)辨識碼係記錄在每一個在通訊線路上傳 送的訊胞上。接著當ATM裝置16將該訊胞資傳送至一訊胞傳輸處 理器18,該處理器將會依據訊胞資訊之標頭資訊,例如,該 (VPI,VCIM132,200),則該訊胞傳輸處理器18會主動判斷並辨 識該訊胞資訊之來源傳輸埠為第二傳輸埠。其中,該訊胞傳輸處 理器18在判斷來源傳輸埠後,會自動將該訊胞資訊之標頭資訊的 (VPI,VCI)值復原為原始資訊之(VPI,VCI),即復原為(20,30), 再傳送至PHY層傳輸埠。因此,並不會影響到訊胞的原始資料。 換而言之,當ATM裝置16經由ATM傳輸埠將資料傳送至 PHY層時,該訊胞資訊在經過ATM裝置16處理後其vp I /ye I值 將變成(100,200)’最後經過訊胞傳輸處理器1 §後,該vpI /yc I 值將還原變成(20, 30)。然而,當訊胞多路傳輸處理器a收到該 訊胞時便可依(vpi,vci)值來判斷該訊胞是屬於哪一條ATM傳 輸埠所傳送。 相對的’如PHY層欲傳輸訊胞至ATM層時,訊胞經過訊胞多These (VPI, VCI) identification codes are recorded on each cell that is transmitted on the communication line. Then, when the ATM device 16 transmits the message to a cell transmission processor 18, the processor will transmit the signal according to the header information of the cell information, for example, the (VPI, VCIM132, 200). The processor 18 actively determines and recognizes the source transmission of the cell information as the second transmission port. The cell transmission processor 18 automatically restores the (VPI, VCI) value of the header information of the cell information to the original information (VPI, VCI) after determining the source transmission, that is, reverts to (20) , 30), and then transmitted to the PHY layer transmission port. Therefore, it does not affect the original data of the cell. In other words, when the ATM device 16 transmits data to the PHY layer via ATM transmission, the channel information will be changed to (100, 200) after being processed by the ATM device 16. After the cell transfer processor 1 §, the vpI /yc I value is restored to (20, 30). However, when the cell multiplexer a receives the cell, it can determine (vpi, vci) the ATM cell to which the cell belongs. When the PHY layer wants to transmit the signal to the ATM layer, the cell passes through the cell.

路傳輸處理器18時,該處理器即可依據該訊胞標頭資π(νρι, VCD,進-步判斷傳輸該訊胞資訊之PHY層傳輪埠,以及欲傳送 至哪-條ATM傳輸淳。其中,該訊胞傳輪處理器18,在m層傳 送胞訊至ΡΗΥ層時’係用以判別訊胞之來源傳輪埠(ατμ層)及二的 傳輸埠(ΡΗΥ層),並作資料之還原。而在' 層傳送訊胞至atm 層時,該多路傳輸處理器18係用以判斷訊晌+十 ^When the processor 18 is transmitted, the processor can determine the PHY layer transmission 传输 transmitting the information of the cell and the ATM transmission to be transmitted according to the cell header π (νρι, VCD).讯 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 The data is restored. When the layer transmits the signal to the atm layer, the multiplex processor 18 is used to determine the signal + ten ^

L月匕之來源傳輸埠(PHY 層)及目的傳輸埠(ATM層),並作資料之還原。 在本發明另一較佳實施例中,藉由抬員取Vp % νΠ或VCI位元中的 三個位元來擴充ATM層傳輸埠,配合擴充到31彳 W個的PHY層傳輸埠, 即可將ATM-PHY層之傳輸埠數擴充至248個傳輪蜂。 11 1262009 咖 作站在通訊之前必須先建立-條連線。因此上述的 詩,=)傳輪對踩内容便是在連線建立時所填人的。所以使 用者可事先設定多條連線並填人_連串的⑽,即值。 清楚的=細::本發明的較佳實施例之後,熟悉該項技術人士可 變化盘改辑H脫離下述φ請專利範15與精神下可進行各種 i例太 亦不受限於說明書之實施例的實施方 埠之需東亦可使較佳實施财,依據使用者欲增加傳輸 傳輸他訊胞標頭資訊之其他未定義位元來作為主 辱輸車之編址’可為GFC、VPI或vci等標頭位元。L 匕 匕 source transmission 埠 (PHY layer) and destination transmission 埠 (ATM layer), and restore the data. In another preferred embodiment of the present invention, the ATM layer transmission port is expanded by lifting the Vp % ν Π or three bits in the VCI bit, and is extended to 31 彳 W PHY layer transmission ports, that is, The number of transmissions of the ATM-PHY layer can be expanded to 248. 11 1262009 The coffee station must first establish a - connection before communication. Therefore, the above poems, =) pass-by-step content is filled in when the connection is established. Therefore, the user can set a plurality of connections in advance and fill in the _ series of (10), that is, the value. Clear = Fine: After the preferred embodiment of the present invention, those skilled in the art can change the disc change H from the following φ. Patent No. 15 and the spirit can be carried out in various ways. The implementation of the embodiment may also be a better implementation, according to the user's desire to increase the transmission of other undefined bits of the cell header information as the address of the main insulting vehicle, which may be GFC, Header bits such as VPI or vci.

12 1262009 【圖式簡單說明】 第一圖為習知ATM訊胞格式之示意圖。 第二A圖為習知使用者介面(UNI)之訊胞格式。 第二B圖為習知網路對網路介面(NNI)之訊胞格式。 第三圖為習知ATM運作之方塊圖。 第四圖為習知習知技術ATM層一PHY層之間的系統方塊圖。 第五圖為本發明改良UTOPIA通訊介面的ATM通訊系統之實 施方塊圖。 [主要元件符號對照說明] 10——高速傳輸媒介 11 ----緩衝裝置中具有標準UTOPIA PHY通訊介面 12 ----緩衝裝置中具有標準UTOPIA ATM通訊介面 13——標準UTOPIA ATM裝置 15——標準UTOPIA PHY裝置 16 — ATM裝置 17 標準 UTOPIA Level 2 介面 18 ---訊胞傳輸處理器 19——延伸UTOPIA Level 2介面12 1262009 [Simple description of the diagram] The first figure is a schematic diagram of the conventional ATM cell format. The second A picture is the cell format of the conventional user interface (UNI). The second B picture is the cell format of the conventional network to network interface (NNI). The third picture is a block diagram of the operation of the conventional ATM. The fourth figure is a system block diagram between the ATM layer and the PHY layer of the prior art. The fifth figure is a block diagram of an ATM communication system for improving the UTOPIA communication interface of the present invention. [Main component symbol comparison description] 10——High-speed transmission medium 11—The buffer device has a standard UTOPIA PHY communication interface 12—The buffer device has a standard UTOPIA ATM communication interface 13—standard UTOPIA ATM device 15-— - Standard UTOPIA PHY device 16 - ATM device 17 Standard UTOPIA Level 2 interface 18 --- Cell transmission processor 19 - Extended UTOPIA Level 2 interface

Claims (1)

l262〇〇9 申請專利範圍: I〜種ATM通訊系統,包含: 一 ATM裝置,位於ATM層; 複數個PHY裝置,位於PHY層;以及 一多路傳輸處理裝置,將ATM裝置與PHY裝置所傳輪白、“ 胞資訊交換至適當的傳輸埠;其特徵在於: ^的沘 該多路傳輸處理裝置介於ΑΤΜ層—ΡΗΥ層之間,依據該气胙 之標顇位元判斷訊胞之來源旅傳送至該標頭位元所對龐 已 埠,包含·· 丁4之傳輸L262〇〇9 Patent application scope: I~A type of ATM communication system, comprising: an ATM device located at the ATM layer; a plurality of PHY devices located at the PHY layer; and a multiplex transmission processing device transmitting the ATM device and the PHY device Whitening, "cell information exchange to appropriate transmission"; characterized by: ^ 沘 multiplex transmission processing device between the ΑΤΜ layer - ΡΗΥ layer, according to the 胙 胙 判断 判断 判断 判断 判断 判断Brigade transmitted to the header bit, including the transmission of · Ding 4 一標準UTOPIA Level 2介面,與ATM層的複數個傳輪埠介 一延伸UTOPIA介面,與PHY層的複數個傳輪埠介接。 2·如申請專利範圍第1項所述之ATM通訊系統,其中在ATm層— PHY層之間進一步包含一高速傳輸媒介。 曰 3·如申請專利範圍第1項所述之ATM通訊系統,其中前述標頭位 元的部份VPI位元用以判斷訊胞之目的,俾使該多路傳輸處理器 將訊胞資訊傳送至該標頭位元所對應之傳輸埠。A standard UTOPIA Level 2 interface, with a plurality of relay layers of the ATM layer, extends the UTOPIA interface, and interfaces with a plurality of multiplexers of the PHY layer. 2. The ATM communication system of claim 1, wherein a high speed transmission medium is further included between the ATM layer and the PHY layer.曰3. The ATM communication system according to claim 1, wherein a part of the VPI bit of the header bit is used for determining the purpose of the cell, so that the multiplex processor transmits the cell information. To the transmission port corresponding to the header bit. 4·如申請專利範圍第1項所述之ATM通訊系統’其中前述標頭位 元的部份VCI位元用以判斷訊胞之目的’俾使該多路傳輸處理器 將訊胞資訊傳送至該標頭位元所對應之傳輸淳。 5.如申請專利範圍第1項所述之ATM通訊系統,其中前述標頭位 元的未定義位元、部份GFC位元、部份VPI位元或部份VCI位元 等作為傳輸蜂之編址。 6.如申請專利範圍第5項所述之A™通訊系統,其中前述多路傳 輸處理裝置包含:一訊胞傳輸處理為’從该標準UT0PIA Level 2 介面接收一 ATM層傳輸琿所傳輸的訊胞資訊,依據該訊胞之標頭 位元判斷訊胞之來源,並經該延伸UTOPIA介面傳送訊胞資訊至該 14 1262009 標頭位元所對應之PHY層傳輸埠。 7·如申請專利範圍第5項所述之ATM通訊系統,其中前述多路傳 輸處理叙置包含·一 sfl胞傳輸處理為’從該延伸utqp I a介面接枚 一 PHY層傳輸淳所傳輸的訊胞資訊,依據該訊胞之標頭位元判斷 訊胞之來源,並經該標準UTOPIA Level 2介面傳送訊胞資訊至节 標頭位元所對應之ATM層傳輸埠。 8· —多路傳輸處理裝置,用於一 ATM通訊系統的ATM層〜ρΗγ厣 之間以傳輸訊胞資訊,包含: € 接;以及 標準UTOPIA Level 2介面,與ATM層的複數個傳輪埠介4. The ATM communication system of claim 1, wherein a portion of the VCI bit of the aforementioned header bit is used to determine the purpose of the cell, so that the multiplex processor transmits the cell information to The transmission port corresponding to the header bit. 5. The ATM communication system according to claim 1, wherein the undefined bit of the header bit, part of the GFC bit, part of the VPI bit or part of the VCI bit is transmitted as a bee. Addressing. 6. The ATM communication system according to claim 5, wherein the multiplex processing device comprises: a cell transmission process of transmitting an ATM layer transmission from the standard UT0PIA Level 2 interface. The cell information determines the source of the cell according to the header bit of the cell, and transmits the cell information to the PHY layer port corresponding to the 14 1262009 header bit via the extended UTOPIA interface. 7. The ATM communication system according to claim 5, wherein the multiplex transmission processing includes a sfl cell transmission process as 'transferred from the extended utpp I a interface to the PHY layer transmission 淳The cell information determines the source of the cell according to the header bit of the cell, and transmits the cell information to the ATM layer corresponding to the section header bit via the standard UTOPIA Level 2 interface. 8·—Multiple transmission processing device for transmitting ATM information between ATM layer and ρΗγ厣 of an ATM communication system, including: € connection; and standard UTOPIA Level 2 interface, and multiple relays of ATM layer Jie 一延伸UTOPIA介面,與PHY層的複數個傳輸埠介接· 其中,該多路傳輸處理裝置依據該訊胞之標頭位元判 之來源並傳送至該標頭位元所對應之傳輸埠。 胞 9·如申請專利範圍第8項所述之多路傳輸處理裝詈, 丹甲W述延 伸UTOPIA介面經一高速傳輸媒介與ΡΗΥ層介接。 10_如申請專利範圍第8項所述之多路傳輸處理裝置,進— 含:一訊胞傳輸處理器,從該標準UTOPIA Level 2介面接收—^包 層傳輸埠所傳輸的訊胞資訊,依據該訊胞之標頭位元判斷1於ATMAn extended UTOPIA interface is interposed with a plurality of transmission ports of the PHY layer. The multiplex processing device determines the source according to the header bit of the cell and transmits to the transmission port corresponding to the header bit. Cell 9: As described in the multiplex processing device described in claim 8, the UTOPIA interface is interfaced with the ΡΗΥ layer via a high-speed transmission medium. 10_ multiplex processing device as described in claim 8 of the patent application, comprising: a cell transmission processor, receiving the cell information transmitted from the standard UTOPIA Level 2 interface, According to the header bit of the cell, judge 1 at the ATM 來源,並經該延伸UTOPIA介面傳送訊胞資訊至該標頭位元所對靡 之PHY層傳輸埠。 '應 元所對 11.如申請專利範圍第8項所述之多路傳輸處理裝置,進勺 含:一訊胞傳輸處理器,從該延伸UTOPIA介面接收_叩丫層^ = 埠所傳輸的訊胞資訊,依據該訊胞之標頭位元判斷訊胞之來原& 並經該標準UTOPIA Level 2介面傳送訊胞資訊至該標頭位 、 應之ATM層傳輸淳。 12·如申請專利範圍第10或11項所述之多路傳輪處理裝置, 中前述訊胞傳輸處理器依據該標頭位元的部份VPI位元以姜彳斷“ 15 1262009 胞之目的,並訊胞資訊傳送至該標頭位元所對應之傳輸埠。 13·一如申請專利範圍第10或u項所述之多路傳輸處理裝置立 中前述訊胞傳輸處理器依據該標頭位元的部份VCI位元^判二二 月已之目的,並成胞資說傳送至該標頭位元所對應之傳輸埠。'> 14·如申請專利範圍第1〇或丨丨項所述之多路傳輸處理裝置,其 中前述訊胞傳輸處理從前述標頭位元的部份GFC位元、部份 位元或部份VCI位元等判斷傳輸埠之編址。 15· —種ATM通訊方法,以擴充ATM層的傳輸埠數量,包含以下 步驟: 利用標準UTOPIA Level 2介面,在ATM裝置所傳送的訊胞 · 資訊的標頭位元中編址以識別PHY裝置傳輸埠;以及 利用一多路傳輸處理裝置,依據該訊胞之標頭位元判斷訊胞 之來源,並將訊胞資訊傳送至該標頭位元所對應之PHY裝傳輸埠。 16 ·如申請專利範圍第15項所述之ATM通訊方法,進一步包含: 使用標頭位元的未定義位元、部份GFC位元、部份VP I位元或部 份VCI位元等作為phy裝置傳輸谭之編址。Source, and transmit the cell information to the PHY layer of the header bit via the extended UTOPIA interface. 11. The multiplex processing device according to item 8 of the patent application scope includes: a cell transmission processor receiving the _叩丫 layer ^ = 传输 transmitted from the extended UTOPIA interface The cell information is based on the header of the cell to determine the origin of the cell and transmits the cell information to the header via the standard UTOPIA Level 2 interface. 12. The multi-way transmission processing device according to claim 10 or 11, wherein the signal transmission processor uses the VPI bit of the header bit to break the "15 1262009 cell" And transmitting the information to the transmission port corresponding to the header bit. 13· As in the multiplex processing device described in claim 10 or u, the aforementioned cell transmission processor is in accordance with the header The part of the VCI bit of the bit is judged to have been used for the purpose of February and February, and is transmitted to the transmission port corresponding to the header bit. '> 14·If the scope of patent application is No. 1 or 丨丨The multiplex processing device of the present invention, wherein the signal transmission process determines the address of the transmission frame from a part of the GFC bit, a partial bit or a part of the VCI bit of the header bit. An ATM communication method for expanding the number of transmission ports of the ATM layer, comprising the following steps: using a standard UTOPIA Level 2 interface, addressing in a header bit of a cell/information transmitted by an ATM device to identify a PHY device transmission port; And using a multiplex transmission processing device, according to the standard of the cell The bit determines the source of the cell and transmits the cell information to the PHY device corresponding to the header bit. 16 · The ATM communication method as described in claim 15 further includes: using the header The undefined bit of the bit, part of the GFC bit, part of the VP I bit or part of the VCI bit is addressed as the phy device transmission Tan. 1616
TW92131129A 2003-11-06 2003-11-06 ATM communication system and method with improved UTOPIA communication interface TWI262009B (en)

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