TWI261987B - Joint MLE and MMSE synchronization system for OFDM system - Google Patents

Joint MLE and MMSE synchronization system for OFDM system Download PDF

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TWI261987B
TWI261987B TW94102488A TW94102488A TWI261987B TW I261987 B TWI261987 B TW I261987B TW 94102488 A TW94102488 A TW 94102488A TW 94102488 A TW94102488 A TW 94102488A TW I261987 B TWI261987 B TW I261987B
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signal
time
received signal
circuit
synchronization system
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TW94102488A
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TW200627844A (en
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Chih-Peng Li
Wei-Wen Hu
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Univ Nat Sun Yat Sen
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Abstract

The invention relates to a joint MLE (maximum likelihood estimation) and MMSE (minimum mean square errors) synchronization system for OFDM systems. In the synchronization system of the invention, both timing offset and frequency offset are estimated and compensated simultaneously. Accuracy of symbol timing acquisition is enhanced by inserting training symbols in the leading OFDM symbols. Insertion of training symbols also simplifies the computational complexity of the MMSE. Mathematical analysis and simulation results demonstrate that the synchronization system of the invention has the capability of estimating ±4 subcarrier frequency spacing with only negligible overhead.

Description

1261987 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種用於正交分頻多工系統之同步系統, • 詳言之,係關於一種用於正交分頻多工系統之結合最大相 _ 似性谓測及最小均方差錯誤之同步系統。 【先前技術】 正交分頻多工(OFDM)系統中對於符元時間偏移和載波 頻率偏移是非常敏感的,因此當系統中存在著上述兩種同 步的錯誤時,會造成系統效能嚴重的下降。若發生載波頻 率偏移時,除了每個子載波間會彼此互相不正交而形成子 載波間的干擾(Intercarrier Interference),且還會減少信號 的振幅。 此外,當OFDM訊號到達接收端時,假設當通道的長度大 於循環字首(cyclic prefix,CP)長度時,會讓快速傅利葉轉 換(FFT)的起點落在前一個符元内,故會解調到下一個符元 • 的資料而形成符元間的干擾(Intersymbol Interference)。 % 目前許多習知同步演算法就用來解決上述的兩個偏移問 v 題,如相關先前技術文獻(1) P.H.Moose,“A technique for orthogonal frequency division multiplexing frequency offset correction/5 IEEE Trans. Commun., vol. 42, pp. 2908-2914, Oct. 1994. (2) J. J.van de Beek„ M.Sandel?and P.O. Borjesson, UML estimation of timing and frequency offset in OFDM systems/5 IEEE Trans. Signal Processings, vol.45, pp. 1800-1805, July 1997· (3) T.M.Schmidl and D.C.Cox,“Robust frequency and timing synchronization for OFDM/5 IEEE Trans. Commum·, vol.45, 96410.doc 1261987 pp.l613-1621?Dec. 1997. (4) Byungjoon Park, Hyunsoo Cheon5 Changeon Kang,and Daesik Hong,“A simple preamble for OFDM timing offset estimation,” in Prac. /五现νο1·2, pp.729 — 732, • 2002. (5) Lv Tiejun,Xiao Huibing, and Fei Peng,“MMSE estimation of _ OFDM symbol timing and carrier frequency offset in time-varying multipath channels/^ IEEE International Conference Acoustics, Speech, and Signal 尸νο1·4, ρρ·704·7, 2003·。 _ 目前習知的同步演算法中大致上可分為兩種,分別是有 資料輔助((131&-&丨(16(1)和無資料輔助(11011(1&1&"^36(1)。在先前 技術文獻(1)中,Moose提出了在頻域上估測頻率偏移的方 法,但其假設沒有時間同步的錯誤。此外Moose的方法所能 估測的頻率偏移範圍只在±0.5倍的子載波間隔。 另外,無資料輔助的方法是藉由循環字首的加入,利用 最大相似性偵測(MLE)估出時間和頻率的偏移(參考先前技 術文獻(2)),但利用循環字首的方式所能估測的頻率偏移範 • 圍會和先前技術文獻(1)一樣。 在先前技術文獻(3)中提出了一個有較大的頻率偏移估 '測範圍和有較低變異數的方式。參考圖1所示,係於〇Fdm 封包的最前端加上兩個在時域上具有週期性的訓練符元 (Synl及syn2),其中第一個訓練符元(Synl)由兩個長度為 7W2相等的資料所組成,#為反傅立葉轉換(IFFT)的大小。 將兩個相等的訊號做相關性(correlati〇n)運算,所得到的時 間準則(timing metric)被用來估測每個OFDM封包的開始。 然而’在先前技術文獻(3)的方法所得到的時間準則會有一 96410.doc 1261987 個平坦(plateau)的 數。 部分會使得在估 測時序時有較大的變異 為了減少因為時間準則平坦 術文獻⑷提出了_個改盖成的錯誤,先前技 出的時間準則會在術,^ 的峰值m要尋找峰值發個像脈衝一樣 OFDM封包之開始 的地方…確地估測 升時mrrn 讀(4)的方法會大大地提 =間估測準確性,但其方法不能估出頻率偏移。 MLE)估、。i:利用取大相似性偵測(Μ8—· Ukelih〇°d Estimati°n, ^=^和日_移之外,在先前技術文獻⑺中使用 ^ ^(MmimUm Μ"η ^ Elr〇rS5 MMSE) ^ ^ ^ ^ 才日t間和頻率的偏移,但其利用接收訊號的自相關 (rtocorrelatlon)數學運算去做分析,因此造成在數學上之 /刀析變得非常複雜且所能估測的頻率範圍也侷限在土05倍 的子載波間隔。 因此’有必要提供一種創新且具進步性的同步系統,以 解決上述問題。 【發明内容】 本發明之目的在於提供一種用於正交分頻多工系統之同 步系統,該同步系統係結合最大相似性偵測及最小均方差 錯誤,該同步系統包括:一第一時間準則電路、一第二時 間準則兒路、一結合裝置及一頻率偏移估測器。該第一時 間準則電路用以將一接收訊號延遲一第一預定時間,並對 該訊號處理得一第一時間準則訊號。該第二時間準則電路 96410.doc 1261987 用以將該接收訊號延遲一 得一第二時間準則訊號。 第二預定時間,並對該訊號處理 该結合裝置用以將該第一時間準 則=號及該第二時間準則訊號結合處理,以尋找接收信號 中符兀的起始點。該頻率偏移估測器用以估測頻率之偏移。1261987 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a synchronization system for an orthogonal frequency division multiplexing system, and, more particularly, to a combination for an orthogonal frequency division multiplexing system Synchronous system with maximum phase symmetry and minimum mean square error. [Prior Art] Orthogonal Frequency Division Multiplexing (OFDM) systems are very sensitive to symbol time offset and carrier frequency offset, so when there are two kinds of synchronization errors in the system, the system performance is severe. Decline. When the carrier frequency offset occurs, each subcarrier is not orthogonal to each other to form an intercarrier interference, and the amplitude of the signal is also reduced. In addition, when the OFDM signal arrives at the receiving end, it is assumed that when the length of the channel is greater than the length of the cyclic prefix (CP), the starting point of the fast Fourier transform (FFT) falls within the previous symbol, so it is demodulated. Intersymbol Interference is formed by the data of the next symbol. % A number of conventional synchronous algorithms are currently used to solve the above two problems, such as the related prior art documents (1) PHMoose, "A technique for orthogonal frequency division multiplexing frequency offset correction/5 IEEE Trans. Commun ., vol. 42, pp. 2908-2914, Oct. 1994. (2) JJvan de Beek M. Sandel? and PO Borjesson, UML estimation of timing and frequency offset in OFDM systems/5 IEEE Trans. Signal Processings, Vol.45, pp. 1800-1805, July 1997. (3) TMSchmidl and DCCox, "Robust frequency and timing synchronization for OFDM/5 IEEE Trans. Commum·, vol.45, 96410.doc 1261987 pp.l613- 1621?Dec. 1997. (4) Byungjoon Park, Hyunsoo Cheon5 Changeon Kang, and Daesik Hong, "A simple preamble for OFDM timing offset estimation," in Prac. / 五现νο1·2, pp.729 — 732, • 2002 (5) Lv Tiejun, Xiao Huibing, and Fei Peng, "MMSE estimation of _ OFDM symbol timing and carrier frequency offset in time-varying multipath channels/^ IEEE International Conference Acoustics, Spe Ech, and Signal 尸ον·4, ρρ·704·7, 2003·. _ The current synchronous algorithm can be roughly divided into two types, which are data-assisted ((131 &-&丨(16(1) and no data assist (11011(1&1&"^36) (1) In the prior art document (1), Moose proposed a method of estimating the frequency offset in the frequency domain, but it assumes that there is no time synchronization error. In addition, the frequency offset range that Moose's method can estimate. Only sub-carrier spacing of ±0.5 times. In addition, the data-free method is to estimate the time and frequency offset by maximum similarity detection (MLE) by adding the prefix prefix (refer to the prior technical literature (2). )), but the frequency offset range that can be estimated by means of the cyclic prefix is the same as in the prior art document (1). A large frequency offset estimate is proposed in the prior art document (3). 'Measurement range and the way of lower variance. As shown in Figure 1, it is the front end of the 〇Fdm packet plus two training symbols (Synl and syn2) with periodicity in the time domain, first The training symbol (Synl) consists of two data of length 7W2 equal, #为反傅立The size of the transform (IFFT). Two equal signals are correlated (correlati〇n), and the resulting timing metric is used to estimate the start of each OFDM packet. However, in the prior art literature The time criterion obtained by the method of (3) will have a number of 96410.doc 126 1987 plateau. Partially, there will be a large variation in the estimation of the time series in order to reduce the time-standard flatness literature (4) proposed _ The mistake of the change, the time rule of the previous technique will be in the surgery, the peak value of ^ is to find the peak to send a pulse like the beginning of the OFDM packet... surely the method of estimating mrrn read (4) will be greatly Estimation accuracy, but the method can not estimate the frequency offset. MLE) Estimate, i: use large similarity detection (Μ8—· Ukelih〇°d Estimati°n, ^=^ and day In addition to the shift, in the prior art document (7), ^ ^(MmimUm Μ"η ^ Elr〇rS5 MMSE) ^ ^ ^ ^ is used to offset the frequency between the t and the frequency, but it utilizes the autocorrelation of the received signal (rtocorrelatlon) Mathematical operations to do analysis, thus causing mathematics /Knife analysis becomes very complicated and the range of frequencies that can be estimated is also limited to sub-carrier spacing of 05 times. Therefore, it is necessary to provide an innovative and progressive synchronization system to solve the above problems. It is an object of the present invention to provide a synchronization system for an orthogonal frequency division multiplexing system that combines maximum similarity detection and minimum mean square error, the synchronization system comprising: a first time criterion circuit, a first A two-time criterion, a combination device, and a frequency offset estimator. The first time criterion circuit is configured to delay a received signal by a first predetermined time and process a first time criterion signal for the signal. The second time criterion circuit 96410.doc 1261987 is configured to delay the received signal by a second time criterion signal. And a second predetermined time, and processing the combining device to combine the first time specification=number and the second time criterion signal to find a starting point of the symbol in the received signal. The frequency offset estimator is used to estimate the frequency offset.

本發明之同步系統係結合最大相似性偵測(mle)和最小 均方差錯誤(MMSE)兩階段的同步演算》。只錢用最大相 似性偵測尋找時間準則之峰值,就會減少因為時間準則之 平土- W刀所造成的不確定性。另夕卜,藉由將週期性的訓練 符元放在前端域_轉元的前面,故可以在前z個符元 得到兩個用來做時序估測的時間準則。當時間偏移估測之 再利用週期性的訓練符元來簡化最小均方差錯誤的數 學分析,以降低最小均方差錯誤演算法之複雜度,並且該 頻率偏移估測範圍可以到±4倍的子載波間隔而不耗損太多 的頻寬。 【實施方式】 麥考圖2,其顯示本發明之OFDM封包架構示意圖。本發 月之OFDM封包架構1 〇區分為一第一部份丨丨及一第二部分 12。該〇FDM封包架構包括夂個〇FDM符元,該第一部份I} 包括第1個至第L個符元,該第二部份12包括第乙+丨個至第 K個符兀。在圖2中之y代表反傅立葉轉換(ifft)大小。在第 邛仏11中,所有第1個至第L個符元其資料(Data)的前端都 i έ 了 個長度為见Q的同步訓練符元(Syn),及長度是w/8 的循環字首,其中#/4的訓練符元是由時域上兩個長度為 N/8相同的資料所組成。 96410.doc 1261987 在·弟—' 1 2 Φ 结' r I 1 一 弟1到第火個符元就如同習知的 〇FDM付兀一樣口右张卢 ^ ^ ,、有盾衣予百的部分,不在每個OFDM符元 則口上'川練符元是為了要提升頻寬的使用效率。 J步㈣練符元主要是用來做頻率偏移之估測,因為在 同步的符元中包含了兩彳 匕各了兩個長度為;W8相同的資料,因此不僅 能估測頻率偏移還可以用 不代守間上的同步,故可以在第1 個至第L個0FDM符元内得到兩個時間準則。 筝考圖3所不,本發明用於正交分頻多工系統之同步系統 2一0=:;第一時間準則電路2卜一第二時間準則電路22、 -結合裝置2 3及-頻率偏移估測器2 4。該第—時間準則電 路2 1用以將一接收訊雜* ϋ、屈 墙 U遽延遲一弟一預定時間,ϋ對該訊號 處理得一第一時間準則訊號。 翏考圖4 ’其顯示本發明之第—時間準則電路21之示意 圖。該第-時間準則電路21包括:―第—延遲電路2ιι、一 第-取共輛電路212、一第一乘法器213及一第一累加器 214。該第—延遲電路211用以將該接收訊號延遲該第-預 定時間。該第一取共軛電路212用以將經延遲之該接收訊號 取其共輛複數。該第-乘法器213用以將該接受訊號及經取 共輛複數之該接收訊號相乘。該第_累加器2 i 4用以將經相 乘之訊號累加複數個時間點,以得到該第一時間準則訊號。 其中,δ亥第一預定時間為反傅立葉轉換(即為n)之大小。 該等複數時間點係為反傅立葉轉換大小之八分之一(即為 Ν/8)。因此該第一時間準則訊號可由下式表示如下:The synchronization system of the present invention is combined with maximum similarity detection (mle) and minimum mean square error (MMSE) two-stage synchronization calculus. The mere use of the maximum similarity to detect the peak of the time criterion will reduce the uncertainty caused by the time rule - the W-knife. In addition, by placing the periodic training symbols in front of the front-end field _transitive element, two time criteria for timing estimation can be obtained in the first z symbols. When the time offset estimate is reused, periodic training symbols are used to simplify the mathematical analysis of the minimum mean square error to reduce the complexity of the minimum mean square error algorithm, and the frequency offset can be estimated to be ±4 times The subcarrier spacing does not consume too much bandwidth. [Embodiment] McCaw Figure 2 shows a schematic diagram of the OFDM packet architecture of the present invention. The OFDM packet architecture 1 of this month is divided into a first part and a second part 12. The 〇FDM packet architecture includes a 〇FDM symbol, the first portion I} includes the first to Lth symbols, and the second portion 12 includes the second 丨 to the Kth symbol. In Figure 2, y represents the inverse Fourier transform (ifft) size. In the eleventh, all the first to Lth symbols have a front end of the data (Data), a synchronous training symbol (Syn) of length Q, and a loop of length w/8. The prefix, where the #/4 training symbol is composed of two data of the same length N/8 in the time domain. 96410.doc 1261987 In the younger brother - ' 1 2 Φ knot ' r I 1 1 brother 1 to the first fire symbol is like the familiar 〇 FDM 兀 兀 兀 ^ ^ ^ ^ ^ , , , , , , , , , , , , , , , , In part, not every OFDM symbol is on the port 'Chuan Lian Fu Yuan is to improve the efficiency of bandwidth usage. J step (four) training symbol is mainly used to estimate the frequency offset, because the two symbols in the synchronized symbol contain two data of the same length and W8, so not only the frequency offset can be estimated. It is also possible to use synchronization on the non-spoken, so that two time criteria can be obtained in the 1st to Lth 0FDM symbols. The kit is not shown in Fig. 3. The present invention is used in a synchronous system for orthogonal frequency division multiplexing system. 2: 0;: first time criterion circuit 2, second time criterion circuit 22, - combining device 2 3 and - frequency Offset estimator 2 4. The first time criterion circuit 2 1 is configured to delay a receiving signal and a wall delay by a predetermined time, and process a first time criterion signal for the signal. Referring to Figure 4, there is shown a schematic diagram of a first time criterion circuit 21 of the present invention. The first-time criterion circuit 21 includes a "first" delay circuit 2, a first-to-take common circuit 212, a first multiplier 213, and a first accumulator 214. The first delay circuit 211 is configured to delay the received signal by the first predetermined time. The first conjugate circuit 212 is configured to take the delayed received signal into a plurality of common signals. The first multiplier 213 is configured to multiply the received signal and the received signal of the plurality of signals. The _ accumulator 2 i 4 is configured to accumulate the multiplied signals for a plurality of time points to obtain the first time criterion signal. Wherein, the first predetermined time of δ hai is the magnitude of the inverse Fourier transform (ie, n). These complex time points are one-eighth of the inverse Fourier transform size (ie Ν/8). Therefore, the first time criterion signal can be expressed by the following formula:

Mx{e) = TJr{e + mY{e + m + N), L=~ (λ \ m=0 » V 1 / 96410.doc 1261987Mx{e) = TJr{e + mY{e + m + N), L=~ (λ \ m=0 » V 1 / 96410.doc 1261987

參考圖5,其顯示本發明之第二時間準則電路22之示意 圖。該第二時間準則電路22用以將該接收訊號延遲一第: 預定%間,並對該訊號處理得一第二時間準則訊號。該第 二時間準則電路22包括:一第二延遲電路22卜一第二取共 軛電路222、一第二乘法器223及一第二累加器⑵。該第二 延遲電路221用以將該接收訊號延遲該第二預定時間。該第 二取共j厄電路222用以將經延遲之該接收訊號取其共輛複 數》亥第—乘法益223用以將該接受訊號及經取共輛複數之 及接收Λ就相乘。該第二累加器224用以將經相乘之訊號累 加複數個時間點,以得到該第二時間準則訊號。 其中,該第二預定時間為反傅立葉轉換大小之八分之一 (即為N/8)。該等複數時間點係為反傅立葉轉換大小之八分 之一(即為N/8)。因此 如下: 該第二時間準則訊號可由下式表示 Μ^Θ)&quot;^{θ^ηιΥ(Θ(2) 另多考圖6 ’其顯不本發明之結合裝置23之示意圖。該結合 用以將該第一時間準則訊號及該第二時間準則訊號 α &amp;处里以哥找接收信號中符元的起始點。該結合裝置 23包括:_加法器231及一尋找峰值電路Μ]。該加法器 用以將該第—時間準則訊號及該第二時間準則訊號相加處 理:該尋找峰值電路232用以將該相加處理之訊號,尋找每 個符元之起始點,以達到時間之同步。 白由於訓練符元之起始點t比循S字首的起始點小了剔 '長又故在本發明之同步系統中若要估測第1個至第l個 96410.doc -10- 1261987 OFDM符元之起始點,必須要將第二時間準則訊號岣⑼延 遲所4個取樣點(亦即反傅立葉轉換大小之四分之一)。故將 第一時間準則訊號Μι( Θ )及第一時間準則訊號0 )結合 起來就得到一個經相加處理之時間準則訊號,表示如 …、,丄ΑΛ (3)Referring to Figure 5, there is shown a schematic diagram of a second time criterion circuit 22 of the present invention. The second time criterion circuit 22 is configured to delay the received signal by a predetermined period of time and process the signal into a second time criterion signal. The second time criterion circuit 22 includes a second delay circuit 22, a second conjugate circuit 222, a second multiplier 223, and a second accumulator (2). The second delay circuit 221 is configured to delay the received signal by the second predetermined time. The second fetching circuit 222 is configured to multiply the delayed received signal by its common vehicle number </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> </ RTI> used to multiply the received signal and the received plurality of received signals. The second accumulator 224 is configured to accumulate the multiplied signals for a plurality of time points to obtain the second time criterion signal. The second predetermined time is one eighth of the inverse Fourier transform size (ie, N/8). These complex time points are one-eighth of the inverse Fourier transform size (i.e., N/8). Therefore, the second time criterion signal can be represented by the following formula: ^^Θ)&quot;^{θ^ηιΥ(Θ(2) Further, FIG. 6' is a schematic diagram showing the combination device 23 of the present invention. The first time criterion signal and the second time criterion signal α &amp; are used to find the starting point of the symbol in the received signal. The combining device 23 includes: an adder 231 and a seek peak circuit Μ] The adder is configured to add the first time criterion signal and the second time criterion signal: the search peak circuit 232 is configured to process the added signal to find a starting point of each symbol to achieve Synchronization of time. White is the first to the first 96410 in the synchronization system of the present invention because the starting point t of the training symbol is smaller than the starting point of the S-character. Doc -10- 1261987 The starting point of the OFDM symbol, the second time criterion signal 岣(9) must be delayed by 4 sampling points (that is, one quarter of the inverse Fourier transform size). Therefore, the first time criterion signal is used. Μι( Θ ) and the first time criterion signal 0 ) combine to get an additive The time signal criterion, expressed as ... ,, Shang ΑΛ (3)

因此,在第一部份11中,第1個至第L·個OFDM符元的起 始點就可以利用最大相似性偵測(MLE)來尋找經相加處理 時間準則訊號之峰值,如下式所示: .,{冲)},Ζ、ι,2··.,ζ (4) 而在第一部份12中,第ζ + /到第尺個〇?〇]^符元因為只有 循衣字首的口[5为,故只利用該第一時間準則訊號仏(㈠來 達到時1同步,如下式所示: (5 ) 其中,L3=N/8, η表示第y個〇FDM符元的接收訊號。因 :,由第一時間準則訊號吣⑷及第二時間準則訊⑽^ 付知’本發明之同步系統2〇只需鳩大小的相關性 (c〇rrelatlGn)運算,比習知技術的體(參考叫小,故本發 月,同步系統2〇沒有平坦(plateau )的問題。 上,考圖7’其顯示本發明之頻率偏移估測器24之示意圖。 / 、率偏私估測裔24用以估測頻率之偏移。該頻率偏移估 測器24包括一罡 早一训練符元頻率估測器25及累加複數個訓 練符元頻率估測器26。 ,考圖8,其顯示本發明之該單一訓練符元頻率估測器25 96410.doc 1261987 之不意圖。該單一訓練符元頻率估測器25包括··一第三延 遲電路25卜-第三取共輕電路⑸、一第三乘法器⑸及一 第三累加器254。該第三延遲電路251用以將該接收訊號延 遲該第三預定㈣。該第三取㈣電路252用以將經延遲之 該接收訊號取其共輛複數。該第三乘法器⑸用以將該接受 訊號及經取共輛複數之該接收訊號相乘。該第三累加器2 $ 4 用以將經相乘之訊號累加複數個時間點,以得到—估測頻 率偏移訊號。 。。參考圖9’其顯示本發明之累加複數個訓練符元頻率估測 态之不意圖。該累加複數個訓練符元頻率估測器包括: 一第四累加器261及-取角度電路加。該第四累加器261 用以將該估測頻率偏移的訊號累加複數個。該取角度電路 2 6 2將δ亥累加過後的訊考♦跑甘名 號取其角度,以估測頻率偏移。 依據本發明之同步系統2〇,利用該第一時間準則電路 21、該第二時間準則電路22及該結合裂置η估測時間偏移 後’再利用最小均方差錯誤(MMS·算法估測頻率偏移。 f且1错_期性的同步訓練符元,本發明之同步系統2〇 可以降低最小均方差夢 錯决數予刀析的複雜度。該單一訓練 付元頻率估測器25可以表示如下式: Ή) J^Ns£ k+Therefore, in the first portion 11, the starting point of the first to Lth OFDM symbols can use the maximum similarity detection (MLE) to find the peak value of the added processing time criterion signal, as follows Shown: ., {冲)}, Ζ, ι, 2··., ζ (4) In the first part 12, the third / + / to the first 〇 〇 〇 ^ ^ ^ ^ ^ ^ The mouth of the clothing prefix [5 is, so only use the first time criterion signal 仏 ((1) to achieve the time 1 synchronization, as shown in the following equation: (5) where L3=N/8, η represents the yth 〇FDM The receiving signal of the symbol is because: the first time criterion signal 吣 (4) and the second time criterion signal (10) ^ know that the synchronization system 2 of the present invention only needs the correlation of the size (c〇rrelatlGn) operation, The body of the known technology (referred to as small, so this month, the synchronization system 2〇 has no plateau problem. Above, Figure 7' shows a schematic diagram of the frequency offset estimator 24 of the present invention. The bias estimate 24 is used to estimate the offset of the frequency. The frequency offset estimator 24 includes an early training symbol frequency estimator 25 and an accumulated plurality of training symbol frequencies. Detector 26. Figure 8, which shows the single training symbol frequency estimator of the present invention 25 96410.doc 1261987. The single training symbol frequency estimator 25 includes a third delay circuit 25b-third take common light circuit (5), a third multiplier (5) and a third accumulator 254. The third delay circuit 251 is used to delay the received signal by the third predetermined (four). The third take (four) circuit The second multiplier (5) is configured to multiply the received signal and the received signal obtained by taking a plurality of complex signals. The third accumulator is used for the second accumulator 2 $ 4 To accumulate the multiplied signals for a plurality of time points to obtain an estimated frequency offset signal. Referring to FIG. 9', it is shown that the cumulative number of training symbol frequency estimation states of the present invention is not intended. The plurality of training symbol frequency estimators comprises: a fourth accumulator 261 and a plunging angle circuit 261. The fourth accumulator 261 is configured to accumulate the signal of the estimated frequency offset by a plurality of signals. 6 2 After the δ Hai accumulated, the test ♦ RUN Gan name to take the corner To estimate the frequency offset. According to the synchronization system 2 of the present invention, the first time criterion circuit 21, the second time criterion circuit 22, and the combined splitting η are used to estimate the time offset and the minimum reuse rate is Variance error (MMS· algorithm estimates frequency offset. f and 1 error-phase synchronization training symbol, the synchronization system 2〇 of the present invention can reduce the complexity of the minimum mean square error and the resolution of the knife. The training pay element frequency estimator 25 can be expressed as follows: Ή) J^Ns£ k+

Ti·Ti·

N (6) 其中s是訓練符元之週期、^ &amp; 小,d W8纟 』斤為反傳立葉轉換(IFFT)大 ,,代為前Z個符元的起始點,是由(4)式 所決定。 96410.doc -12- 1261987 依據該式(6),該累加複數個訓練符 式對分,且八叫\ 、干拓硎态26將(6) 、對U刀,再令微分值等於 式所示: 卩了汁#頻率偏移,如下 N &amp; Μ灸=0 (々+;·)如 τ·ζ.」ϊ、 ⑺ 個數:大 ,Ζ是所設計要放置訓練符元㈣的 )式料定。並且,解偏移估測㈣ eStlmator), 練符顯示該頻率偏移估測㈣係藉由累加£個訓 门的I至1]不偏(―)。因此在不同的頻率偏移和不 同的㈣比(SNR),所需要的认小是不固定的。 ^此’經模擬在靖師多重路徑的通 :™ n::亡可達到頻率偏移估測器的不偏(亦即L等於10或 p、…只需在前10或11個0應符元前加上同步訓 、、東付^即可同時完成時序同步和頻率同纟,而且對於整 體的頻寬使用效率影響也不大。 、 二發明用於正交分頻多工(〇fdm)系統之同步系統結合 取大相似性债測和最小均方差錯誤同步演算法。並且,在 本發明之OFDM封包架構中,可以利用最大相似性债測和最 小均方差錯誤同時解決0FDM系統中時間和頻率偏移的問 通错由加人週期性的訓練符元在第1個至第L個0FDM符 兀:”能夠增加第i個至第L個符元時間偏移估測的正確 在使用最小均方差錯誤演算法估測頻率偏移時會使 96410.doc -13- 1261987 予上的为析較為簡單。透過數學分析和電腦槎 肩卞偏私估測範圍可以到±4倍 于 太多的頻寬。 戰波間^而不耗損 二例僅為說明本發明之原理及其功效,而非用 明之此,習於此技術之人士可在不違背本發 =對上述實施例進行修改及變化。本發明之權利範 圍應如後述之申請專利範圍所列。 【圖式簡單說明】 圖1為習知OFDM封包架構之示意圖; 圖2為本發明之0FDM封包架構之示意圖; 圖3為本發明之同步系統之示意圖; 圖4為本發明之第-時間準則電路之示意圖; 圖5為本發明之第二時間準則電路之示意圖; 圖6為本發明之結合裝置之示意圖; 圖7為本發明之頻率偏移估測器之示意圖; 圖8為本發明之單—剑練符元頻率估測器之示意圖;及 ®為本U之累加複數訓練符元頻率估測器之示意圖。 【主要元株总祿tii BB Ί 10 本發明之OFDM封 11 第一部份 12 第二部份 20 本發明之同步系統 21 第一時間準則電路 22 第二時間準則電路 96410.doc -14- 1261987 23 結合裝置 24 頻率偏移估測器 25 單一訓練符元頻率估測器 26 累加複數個訓練符元頻率估測器 211 第一延遲電路 212 第一取共軛電路 213 第一乘法器 214 第一累加器 221 第二延遲電路 222 第二取共軛電路 223 第二乘法器 224 第二累加器 231 232 251 252 253 254 261 262N (6) where s is the period of the training symbol, ^ &amp; small, d W8 纟 斤 斤 is the inverse of the inverse transform (IFFT), the starting point of the first Z symbols, is (4) Determined by the formula. 96410.doc -12- 1261987 According to the formula (6), the cumulative number of training symbols is divided, and the eight calls \, the dry extension state 26 will be (6), the U knife, and then the differential value is equal to the equation : 卩 Juice# frequency offset, as follows N &amp; moxibustion = 0 (々 +; ·) such as τ · ζ." ϊ, (7) number: large, Ζ is designed to place the training symbol (4) It is expected. And, the solution offset estimation (4) eStlmator), the training symbol shows that the frequency offset estimation (4) is unbiased (―) by accumulating the lessons of I to 1]. Therefore, at different frequency offsets and different (four) ratios (SNR), the required small size is not fixed. ^This 'simulated in the Jing Shi multi-path pass: TM n:: death can reach the frequency offset estimator unbiased (that is, L equals 10 or p, ... only need to be in the first 10 or 11 0 sign Adding synchronous training and Dongfu^ can complete timing synchronization and frequency synchronization at the same time, and it has little effect on the overall bandwidth usage efficiency. 2. The invention is used for orthogonal frequency division multiplexing (〇ddm) system. The synchronization system combines the large similarity debt measurement and the minimum mean square error error synchronization algorithm. Moreover, in the OFDM packet architecture of the present invention, the maximum similarity debt measurement and the minimum mean square error can be utilized to simultaneously solve the time and frequency in the 0FDM system. The offset error is determined by adding periodic training symbols to the first to Lth 0FDM symbols: "The ability to increase the i-th to L-th symbol time offset estimates is correct. The variance error algorithm estimates the frequency offset, which makes the analysis of 96410.doc -13- 1261987 simpler. Through mathematical analysis and computerized shoulder-slung private estimation range can be ±4 times the bandwidth too much. The two cases of warfare and not depletion are only illustrative of the principle of the present invention. The effects of the present invention may be modified and changed without departing from the present invention. The scope of the present invention should be as set forth in the appended claims. 1 is a schematic diagram of a conventional OFDM packet architecture; FIG. 2 is a schematic diagram of an OFDM packet architecture of the present invention; FIG. 3 is a schematic diagram of a synchronization system of the present invention; 5 is a schematic diagram of a second time criterion circuit of the present invention; FIG. 6 is a schematic diagram of a combined apparatus of the present invention; FIG. 7 is a schematic diagram of a frequency offset estimator of the present invention; Schematic diagram of the symbol frequency estimator; and ® is a schematic diagram of the cumulative multi-symbol frequency element estimator of the U. [Main elementary plant total ti ti BB Ί 10 OFDM seal 11 of the invention Part 1 12 second Part 20 Synchronization system 21 of the present invention First time criterion circuit 22 Second time criterion circuit 96410.doc -14- 1261987 23 Combining device 24 Frequency offset estimator 25 Single training symbol frequency estimator 26 Tired A plurality of training symbol frequency estimators 211, a first delay circuit 212, a first conjugate circuit 213, a first multiplier 214, a first accumulator 221, a second delay circuit 222, a second conjugate circuit 223, a second multiplier 224 Two accumulators 231 232 251 252 253 254 261 262

加法器 尋找峰值電路 第三延遲電路 第三取共軛電路 第三乘法器 第三累加器 第四累加器 取角度電路 96410.docAdder Find peak circuit Third delay circuit Third take conjugate circuit Third multiplier Third accumulator Fourth accumulator Angle take circuit 96410.doc

Claims (1)

1261987 十、申請專利範圍: I:種心正交分頻多工系統之同步系統,該同步系統係 —取大相似性㈣及最小均方差錯誤,該同步系統包 . 括: , &amp;〗間準則電路’用以將-接收訊號延遲一第一 預定:間,並對該訊號處理得—第—時間準則訊號; :第二時間準則電路’用以將該接收訊號延遲一第二 • 預疋寸間’並對該訊號處理得—第二時間準則訊號; 厂结合裝置’用以將該第一時間準則訊號及該第二時 間準則訊號結合處理,以尋找接收信號之符元的起始點; 及 一頻率偏移估測器,用以估測頻率之偏移。 J f J 1之同步系統’其中該第一時間準則電路包括: 一乐一延遲電路,用以將該接收訊號延遲該第一預定 Φ 時間; 昂-取共軛電路,用以將經延遲之該接收訊號取其 共軛複數; 一第—乘法器,用以將該接受訊號及經取共軛複數之 d亥接收訊號相乘;及 乐-累加器,用以將經相乘之訊號累加複數個時間 點,以得到該第一時間準則訊號。 3.如明求項2之同步系統,其中該第一預定時間為反傅立葉 96410.doc 1261987 轉換之大小。 4·如明求項2之同步系統,其中該等複數時間點係為反傅立 葉轉換大小之八分之一。 」^項1之同步系統’其中該第二時間準則電路包括: 一第二延遲電路’用以將該接收訊號延遲該第二預定 時間; 第二取共輕電路 共軛複數; ’用以將經延遲之該接收訊號取其 乐一乘法裔、,用以將該接受訊號及經取共軛複數之 該接收訊號相乘;及 -第二累加器,用以將經相乘之訊號累加複數個時間 點,以得到該第二時間準則訊號。 6.其中該第™為反㈣ 葉轉換其中該等複數時間㈣為反傅立 8. 同步系統,其中該結合裝置包括: 準則气:二用以將該第-時間準則訊號及該第二時間 、祗唬相加處理;及 :找峰值電路’用以將該相加處理之訊號,尋找接 、之起始點,以達到時間之同步。 9·如請求項8之同步 豆 ± '、、’.’、第一日間準則訊號經延遲 96410.doc 1261987 複數個取樣點 之四分之一。 該等取樣點之大小為反傅立葉轉換大 10. 如請求項1之同步系統,其 °川練符元頻率估測器及 器。 中該頻率偏移估測器包括一單 累加複數個訓練符元頻率估測 11. 如請求項1 〇之同步系 器包括: 統,其中該單一訓練符元頻率估測1261987 X. Patent application scope: I: Synchronization system of the heart-shaped orthogonal frequency division multiplexing system, which is based on the large similarity (4) and the minimum mean square error. The synchronization system includes: , &amp; The criterion circuit 'for delaying the -receive signal by a first predetermined: and processing the signal - the first time criterion signal; the second time criterion circuit 'for delaying the received signal by a second The second time criterion signal is processed by the factory and the second time criterion signal is used to combine the first time criterion signal and the second time criterion signal to find the starting point of the symbol of the received signal. And a frequency offset estimator to estimate the frequency offset. a synchronization system of J f J 1 wherein the first time criterion circuit comprises: a music-delay circuit for delaying the received signal by the first predetermined Φ time; and a conjugate circuit for delaying The receiving signal takes its conjugate complex number; a first-multiplier for multiplying the received signal and the conjugate signal of the conjugate complex number; and a music accumulator for accumulating the multiplied signals A plurality of time points are obtained to obtain the first time criterion signal. 3. The synchronization system of claim 2, wherein the first predetermined time is the size of the inverse Fourier 96410.doc 1261987 conversion. 4. The synchronization system of claim 2, wherein the plurality of time points are one-eighth of the inverse Fourier transform size. The synchronization system of the item 1 wherein the second time criterion circuit comprises: a second delay circuit 'for delaying the received signal by the second predetermined time; the second taking the common light circuit conjugate complex number; The delayed received signal is obtained by multiplying the received signal by the received signal and the received signal of the conjugate complex number; and a second accumulator for accumulating the multiplied signals Time points to obtain the second time criterion signal. 6. wherein the TM is an inverse (four) leaf transition wherein the plurality of times (4) is an inverse Fourier. The synchronization system, wherein the combining device comprises: a criterion gas: two for using the first time criterion signal and the second time And 祗唬 add processing; and: find the peak circuit 'used to add the processing signal, find the starting point, to achieve the synchronization of time. 9. If the synchronization of claim 8 is Bean ± ',, '.', the first day of the standard signal is delayed 96410.doc 1261987 A quarter of the multiple sampling points. The size of the sampling points is large for the inverse Fourier transform. 10. As in the synchronization system of claim 1, the chuanchuan symbol frequency estimator and device. The frequency offset estimator includes a single accumulated plurality of training symbol frequency estimates. 11. The synchronization system of claim 1 includes: a system, wherein the single training symbol frequency estimate 上 L遲爸路,用以將該接收訊號延遲該第三預定 時間; -弟三取共軛電路,用以將經延遲之該接收訊號取其 共軛複數; 一弟三乘法器,用以將該接受訊號及經取共軛複數之 該接收訊號相乘;及 弟 累加。t/用以將經相乘之訊號累加複數個時間 點,以得到一估測頻率偏移訊號。 12·如請求項11之㈤步系統,其中該累加複數個訓練符元頻 率估測器包括·· 第四累加器’用以將該估測頻率偏移的訊號累加複 數個;及 一取角度電路’將該累加過後的訊號取其角度,以估 測頻率偏移。 1 3»如請求項丨之同步系統,其中該接收訊號包括一第一部份 96410.doc 1261987 及一第二部分,其中該第一部份包括複數個符元,每一 個符元包括一同步訓練符元、一循環字首及資料;該第 二部份包括複數個符元,每一個符元包括一循環字首及 資料。L delaying the road to delay the received signal by the third predetermined time; - the third of the conjugate circuit is used to take the delayed received signal into its conjugate complex number; Multiplying the received signal and the received signal obtained by taking the conjugate complex number; t/ is used to accumulate the multiplied signals for a plurality of time points to obtain an estimated frequency offset signal. 12. The system of claim 5, wherein the accumulating plurality of training symbol frequency estimators comprises: a fourth accumulator for accumulating a plurality of signals offset by the estimated frequency; and an angle of taking The circuit 'takes the accumulated signal at its angle to estimate the frequency offset. 1 3»A synchronization system as claimed, wherein the received signal includes a first portion 96410.doc 1261987 and a second portion, wherein the first portion includes a plurality of symbols, each symbol including a synchronization A training symbol, a cyclic prefix and data; the second portion includes a plurality of symbols, each symbol including a cyclic prefix and data. 96410.doc -4-96410.doc -4-
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