1259478 九、發明說明： 【發明所屬之技術領域】 本發明為有關於一種可電鍍陣列士、㊆ 电子元件的製造方法，該方 法之技術無在於將_式轉體场喊岭法減—層高阻 抗的絕緣㈣，域服-般傳統_式铸_狀_表 阻值太低、柳_散，甚至無㈣鱗_皆批覆上去1259478 IX. Description of the Invention: [Technical Field] The present invention relates to a method for manufacturing an electroplatable array and a seven-electronic component, and the technique of the method is not to reduce the layer height of the _-type rotating field Impedance insulation (four), domain service - the traditional _ type casting _ shape _ table resistance is too low, Liu _ scattered, and even no (four) scale _ are all approved
的高阻抗絕’乃是_粒尺寸為丨錢_奈米級絕 緣塗料，例如：魏物、二氧化鈦、二—、 石夕酸鹽、氧⑽、玻鱗及石英等，彼覆在_式猶的表面， 再經攝氏_〜麵。c高溫燒結，使該奈錢產生融化，進而在陣 列式讀表面形成-顧孔性材料，以物高表面電阻值的目 的，如此，該陣列仏件即可進行後續的電鑛製程。 【先前技術】 籲⑽近來由於表面黏著技術SMT的發達，對於電鑛型晶片突波吸收 為的要求财強烈，而氧化鋅突波魏器為—種轉體元件，加 上氧化辞本身是—種兩性元素，對騎均相當敏感。—般電鑛時 使用的電賴水是―種酸性物質，其PH值約3〜5，因此晶片型氧 ^突波吸收器的電鑛技術有相當的困難性。AVX於西元1994年 ^晶片元件製作過程時，於喊體表面上批覆-層彻鋅絕緣 層^吏喊表面的電阻率提高爾目當高且可以_，經這種製程 勺曰曰片元件即可進行鍍鎳、鑛錫或錫錯的製程，但這種製程除了 1259478 晶片元件的互相磨擦而有破損， 因破酸鋅較脆’易因電錢過程時， 的絕緣層小心磨 部地方失去保護功能，進而影響產品良率外，還有製 _私麻煩的問題，因此必須將抵覆在端銀上 ^然後才可進行麵的相關製程；或是先將燒結後的陶竟體， 進仃絕緣層的包覆後，接著再將預定端銀處的批覆層去除4 供進行端銀及相關的電鍍製程。 後來’雖然有人提出以有機材料進行批覆，例如樹醋、ρΕτ等 材料進行批覆，但還是有製造流程複雜等問題。另外，曰本三菱 工業於謂年（美國專利67侧丨號)提出事先於配方中加入大量 的二氧化石夕，利用燒結過程中，會有相當數量的ζη务〇化合物 產生在燒結後的晶片表面上，由於Ζη|〇化合物具有高阻值且 雜，因此做後續的電錢沒有問題，但是因為同樣也會有一層 Zn-Si-Ο化合難生在晶及電及介面處，因此將影響 鲁最後製作的晶片元件電壓值，無法達到低壓化的目的，加上配方 中加入大量的魏合物，將影響元件的突波吸收能力。是以，這 個方法顯然不適合量產。 此外，日本TDK公司於1999年提出以抛光的方式，先將燒結 後的喊體置人杯桶中’再加人研磨劑，進行拋光過程，控制產 品表面的粗在G. 6〜G. ，接這再進行端銀過程，完成品即 可進行電鑛過程。城財法會破壞部分的絲燒結表面的氧化 必經界、纟&緣層，如此將影響產品最後的使用壽命。 1259478 對陣歹!式元件而s，右在電鑛前，以研磨方式去除端電極 上面的絕緣層的方法將變的不可行。又紐麟料披覆或是抛光 方式，同樣會有前爾提影品特性的問題。 【發明内容】 本發明目的在於提出-财便且便宜的方法來製作電鑛型陣 列式晶片元件。本發明係使用高絕緣性之奈米材料(麵呢你 mfenal)雜辭導型元件的表㈣_及_性，進而使端銀 喊元件可以進行端電極麵。因此，本發明的重點在 ^墙她邮输糊肅糊壽命等 广口 1續〇 本㈣採_撕段，物⑻嫩緣細料之細微 =料ΓΓ覆方式將陶究燒結體的六面，均勾包覆上一層奈 木材科層，再經高溫燒結後， 絕緣阻抗方式，使元縣面相溶解攤平之高 的奈米層極薄，因此，：外端::表面電阻率。又因這層緻密 會使外端電及鮮米絕極製作時的還原燒附溫度，同樣 内電極產錢接外，也靖2生共魏象，除了使外端電極與 由於這—_、嶋何==刪娜·力。也 導陶究元件可進行，制/層的南表面電阻率，使這些半 及焊接轉，提升元件制在SMD _穩定度 七乂 ^疋巧疋件野澄度、外在環境等使用之可靠度。 如可所述，目输她m，使卿麵列式晶片 1259478 兀件的電鍍製程變為可行。 元件的電鍍製料，進而使，w除解決特殊的_式晶片 製程的可靠度^且最重要的是料命及增進smt 【實施方式】 本發明的可電鑛陣列式電子元件的製 至圖六所示’其實施步驟如下： >· 圖’如圖一 步驟1:首先請參閱第1至第 按照陣列式晶片元件的製领程（不示， 以印刷方式製物物極14，且各層内 化物介電層16，其中内♦榀护^ 同為孟屬氧 體10之晶片。〃父、.日方式堆#而成，製作出陶莞本 t , ·、 '第四及五圖所不，接著進行絕緣披覆層15 ， 杜陶究本體H)上製作一層絕緣彼覆層15。其詳細實施係 :絕緣封孔性材料’披覆在陶細^ 南溫減理，使奈米級絕緣彼覆層15形成液梅解而彼覆於本 體10八面之上’形成一絕緣彼覆層15。而且絕緣披覆層15得與 内祕14及外電極Ua產生共融現象，即該絕緣彼覆層π不會 〜+内、外私極14、11&的連接性，及外電極11a與陶曼本體1〇 的接口 ^，其不意圖如第九圖所示，目中A為絕緣彼覆層15與外 電極11a接點’ B為内電極14與絕緣彼覆層15接點。其中該奈米 材料為粒徑在卜動之碎酸鹽類 、氧化石夕、玻璃粉： 1259478 1259478 -氧化錯…等封孔性材料。 歩驟3:如第七圖所示，將已完成高祖抗被 :端電極11製作。將端電極11材料，例如銀二、：件進 電極u位置，和以埶^板印刷方式，披覆在預定的端 置冉明酿熱處理，使絕緣披 極11細觀伽細電 彼覆層15產生共融現象，故本制 一、、、巴緣 體1〇的接著力。 本一增加端電極11與陶究本 歩驟4:電製作’其製作方式如傳統 將金屬層，如鎳、錫或錫辦，姆端電極lla= Μ 及八圖所示。又電鑛時，需控制電鑛液的PH值在3. 5〜6 ^七 由以上的朗，本發騎提供之可電舞狀電子元件的制 造方法，㈣-種驗的製造方法來製造電鑛型陣列式半導體衣 件二由於不需複雜的製作加工技術，故可大幅提高產品的= 造效率。/外，因為使用奈米絕緣材料的_，該材料於高溫熱 處理過知巾，麵竞本體表面產生液她觸平，使元件本體表 喊生極薄的絕緣封孔性彼覆層。由於此表面彼覆層的緻密性與 兩阻性除可降低元件的表面漏電料，間接也促進元件耐環境| 命。又因端電極U製作過程中，奈米絕緣彼覆層15分別和= 冬體10及端電極11材料產生析出共炫現象，因而提升端電極11 與陶瓷本體10間的接著力。 ％ 10 1259478 壯又本电明並非使用傳統的包覆、研磨技術，而是使用奈米封 衣技衡’製程中不需經由研磨製程，故外電極位置可在元件表面 =任-位置，故有辦列式元件的結構，可以是μ或A型式，及 電極的形式可以為A4、M4、A8、M8···…等形式。 【圖式簡單說明】 第一圖所示係本發明陣列式晶片元件示意圖。The high-impedance is the _ grain size for the money _ nano-level insulating coatings, such as: Wei, Titanium Dioxide, Di-, Oxime, Oxygen (10), Glass Scale and Quartz, etc. The surface, then by Celsius _ ~ face. c high temperature sintering, so that the money is melted, and then formed on the array read surface - the pore material, for the purpose of high surface resistance value, so that the array element can carry out the subsequent electric ore process. [Prior Art] Yu (10) Recently, due to the development of surface adhesion technology SMT, the demand for swell absorption of electro-mineral wafers is strong, and the zinc oxide surge is a kind of rotating component, plus the oxidation word itself is - A gender element that is quite sensitive to riding. In general, the electrolyzed water used in electro-mineralization is an acidic substance with a pH of about 3 to 5. Therefore, the electro-mining technology of the wafer type oxygen surge absorber is quite difficult. AVX was applied to the surface of the shattering body during the production process of the wafer component in 1994. In the surface of the shattering body, the layer of zinc is insulated. The resistivity of the surface of the shouting surface is increased and can be _, and the chip component of the process is It can be used for nickel plating, tin or tin plating, but this process is damaged except for the friction of the 1259478 wafer components. Because the zinc sulphate is brittle, the insulation layer is lost when the electricity is processed. The protection function, in turn, affects the product yield, and there is also a problem of system-private trouble. Therefore, it must be applied to the end silver and then the surface can be processed; or the sintered ceramic body can be advanced. After the cladding of the insulating layer, the cladding layer at the predetermined end silver is removed for the terminal silver and related electroplating processes. Later, although some people proposed to use organic materials for approval, such as tree vinegar, ρΕτ and other materials for approval, there are still problems such as complicated manufacturing processes. In addition, Sakamoto Mitsubishi Industries proposes to add a large amount of dioxide to the formula in advance in the year (U.S. Patent No. 67 side nickname). During the sintering process, a considerable amount of ζ 〇 〇 compound is produced in the sintered wafer. On the surface, since the Ζη|〇 compound has high resistance and impurity, there is no problem in the subsequent electricity money, but since there is also a layer of Zn-Si-antimony which is difficult to be formed at the crystal and electricity and interface, it will affect The voltage value of the chip component finally produced by Lu can not achieve the purpose of low pressure, and adding a large amount of Wei compound in the formulation will affect the surge absorption capacity of the component. Therefore, this method is obviously not suitable for mass production. In addition, Japan's TDK Company proposed in 1999 to polish the body after the sintering, and then add the abrasive to the polishing process to control the surface of the product in the G. 6~G. After this, the end silver process is carried out, and the finished product can be subjected to the electric ore process. The city finance law will destroy some of the oxidation of the silk-sintered surface, and the edge and the edge layer will affect the final service life of the product. 1259478 For the 歹! element and s, right before the electric mine, the method of removing the insulating layer above the terminal electrode by grinding will become infeasible. There is also the problem of the characteristics of the film. SUMMARY OF THE INVENTION An object of the present invention is to provide a method for producing an electric-mine type array type wafer element by a cheap and inexpensive method. The present invention uses the table (4) _ and _ properties of the high-insulation nano material (muffality of your mfenal), and the end silver electrode can be used for the terminal electrode surface. Therefore, the focus of the present invention is on the wall, her postal paste, the life of the paste, and the like. (4) Mining_Tearing section, the material (8) The fineness of the fine-edge fine material = the material covering method, the six sides of the ceramic sintered body The hook layer is coated with the upper layer of the wood layer, and after the high temperature sintering, the insulation resistance method makes the surface layer of the Yuanxian surface dissolve and flatten very thin, therefore, the outer end:: surface resistivity. Because of this dense layer, the outer end of the electricity and fresh rice is extremely reduced when the temperature is reduced, and the internal electrode is produced by the same amount of money, and the Jing 2 is a total of Wei Xiang, except for the external electrode and because of this -_, Why == delete Na. Force. It also guides the ceramic components, the south surface resistivity of the system/layer, so that these semi-and soldering turns, the lifting components are made in SMD _ stability 乂 疋 疋 疋 疋 疋 野 野 、 、 、 、 、 、 、 、 、 degree. As can be described, it is possible to lose her m, making the electroplating process of the 1580478 enamel wafers feasible. Electroplating of the components, in order to solve the reliability of the special _ wafer process ^ and most importantly, the fate and enhancement smt [Embodiment] The invention of the electro-mineral array electronic components of the present invention The steps shown in Fig. 6 are as follows: >· Fig. 1 is as shown in step 1: First, please refer to the first to the first array of wafer elements (not shown, the printed object 14 is printed, and Each layer of internalization dielectric layer 16, in which the inner 榀 ^ ^ 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟 孟Then, an insulating coating layer 15 is formed on the DuPont body H) to form an insulating coating layer 15. The detailed implementation is as follows: the insulating sealing material is covered in the ceramics and the south temperature is reduced, so that the nano-scale insulating layer 15 forms a liquid plume and covers the upper surface of the body 10 to form an insulation. Coating 15. Moreover, the insulating coating layer 15 is coherent with the inner secret 14 and the outer electrode Ua, that is, the insulating coating π does not have the connectivity of the inner and outer private electrodes 14, 11 & and the outer electrode 11a and the ceramic The interface of the galvanic body is not intended to be as shown in the ninth figure. In the present case, A is the contact between the insulating layer 15 and the outer electrode 11a. B is the contact between the inner electrode 14 and the insulating layer 15. The nano-material is a sealing material such as a particle size of a pulverized acid salt, a oxidized stone, a glass powder: 1259478 1259478 - an oxidation fault. Step 3: As shown in the seventh figure, the high-anti-anti-antibody is completed: the terminal electrode 11 is fabricated. The material of the terminal electrode 11 is, for example, silver, the member is placed in the position of the electrode u, and is printed on the predetermined end of the electrode to be heat-treated, so that the insulating coating 11 is finely embossed. The phenomenon of influx is produced, so the adhesion of the body, the body, and the body of the body is one. The present invention adds a terminal electrode 11 and a ceramics step 4: electrical fabrication, which is produced by a metal layer such as nickel, tin or tin, and a m-electrode 11a = Μ and an eight-figure. In the case of electric ore, it is necessary to control the PH value of the electro-mineral liquid at 3. 5~6 ^7 by the above-mentioned Lang, the manufacturing method of the electro-dance electronic component provided by the hair ride, and the manufacturing method of the (four)-species test. The electric ore type array type semiconductor clothing part 2 can greatly improve the product manufacturing efficiency because it does not require complicated manufacturing processing technology. / Outside, because of the use of nano-insulation material, the material is treated with heat at a high temperature, and the surface of the body is liquid, and she is flat, so that the body of the element is shattered with a very thin insulating sealing layer. Since the denseness and the two-resistance of the surface of the surface can reduce the surface leakage of the component, the component is also indirectly resistant to the environment. Further, during the fabrication of the terminal electrode U, the nano-insulation cladding layer 15 and the material of the winter body 10 and the terminal electrode 11 respectively exhibit a precipitation confocal phenomenon, thereby increasing the adhesion between the terminal electrode 11 and the ceramic body 10. % 10 1259478 Zhuang Youben is not using traditional cladding and grinding technology, but using the nano-sealing technology. The process of the external electrode does not need to be through the grinding process, so the position of the external electrode can be on the surface of the component = any position. There is a structure of the array element, which may be of the μ or A type, and the form of the electrode may be in the form of A4, M4, A8, M8, .... BRIEF DESCRIPTION OF THE DRAWINGS The first figure shows a schematic diagram of an array of wafer elements of the present invention.
^二圖所示係本發辦列式晶片元件另—視角視得之示意圖。 这第二®所讀依照第—騎示之陣列式晶片元件A—A切線及 則碩所指方向視得之剖面圖。 第四圖所示係係依照第—圖所示之陣列式晶片耕b_b切線 及筋頭所指方向視得之剖面圖。 第五圖所示係本發明_式晶片元件示意圖一。 第六圖所示係本發明_式晶片元件示意圖二。 第七®所示縣發明具披覆上奈米絕緣層及完成端電極製作 之陣列式晶片元件剖視圖一。 之障tr卿縣發料賴上奈料緣層料《電極製作 之陣列式晶片元件剖視圖二。 第九圖所示縣發明依照第三圖部分放大圖。 【主要元件符號說明】 10 ..............陶瓷本體 11 ..............端電極 1259478^ Figure 2 shows a schematic view of the array of wafer components. This second® reads the cross-sectional view of the arrayed wafer component A-A tangent line and the direction indicated by the master. The figure shown in the fourth figure is a cross-sectional view taken from the direction of the b_b tangent line and the direction of the rib according to the array type wafer shown in the figure. The fifth figure shows a schematic diagram of a wafer element of the present invention. The sixth figure shows a schematic diagram 2 of the wafer element of the present invention. The seventh invention shows a cross-sectional view of an array of wafer elements fabricated with a nano-insulation layer and a completed terminal electrode. The barrier of trqing County, the material of the upper layer of the material, the electrode array of the array of chip components. The county invention shown in the ninth figure is partially enlarged according to the third figure. [Main component symbol description] 10 ..............Ceramic body 11 ..............terminal electrode 1259478
lla.............外電極 14 ...............内電極 15 ...............絕緣彼覆層 16 ................介電層 12Lla.............outer electrode 14 ...............internal electrode 15 ............... Insulating coating 16 ........... dielectric layer 12