TWI251246B - Circuit device and fabricating method of the same - Google Patents

Circuit device and fabricating method of the same Download PDF

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Publication number
TWI251246B
TWI251246B TW93126960A TW93126960A TWI251246B TW I251246 B TWI251246 B TW I251246B TW 93126960 A TW93126960 A TW 93126960A TW 93126960 A TW93126960 A TW 93126960A TW I251246 B TWI251246 B TW I251246B
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TW
Taiwan
Prior art keywords
separation
circuit
width
conductive
conductive pattern
Prior art date
Application number
TW93126960A
Other languages
Chinese (zh)
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TW200512778A (en
Inventor
Kouji Takahashi
Original Assignee
Sanyo Electric Co
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Publication of TW200512778A publication Critical patent/TW200512778A/en
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Publication of TWI251246B publication Critical patent/TWI251246B/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
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    • H01—ELECTRIC ELEMENTS
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    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4828—Etching
    • H01L21/4832—Etching a temporary substrate after encapsulation process to form leads
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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  • General Physics & Mathematics (AREA)
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  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
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  • Manufacturing Of Printed Wiring (AREA)

Abstract

The present invention provides a circuit device and fabricating method of the same such that intervals between each conductive patterns are equally arranged. The fabricating method of the circuit device includes: a step of preparing a conductive foil 40; a step of forming conductive patterns 11 by forming separated trenches 41 with equal intervals in the conductive foil, wherein the conductive patterns 11 are used to constitute an unit 45 including at least circuit elements 12; a step of electrically connecting the conductive patterns 11 with the circuit elements 12; a step of encapsulating with an encapsulating resin to cover circuit elements 12 and filling the resin in the separated trench 41; and a step of removing portions of conductive foil 40 where have not been arranged a thickness of separated trenches 41.

Description

1251246 九、發明說明： 【發明所屬之技術領域】 本發明係關於電路裝置及其製造方法，特別是關於具 有以等間隔分開之導電圖案的電路裝置及其製造方法。 【先前技術】 以往安裝在電子機器内的電路裝置，係被採用於行 電話、手提電腦等，因此必須訴求小型化、薄型化、 化。 里 例如，在電路裝置方面，以半導體裝置為例說明， ，已開發出-種稱為CSP⑽p Slze，晶片尺寸封 裝）之與晶片尺寸相等之晶圓級（wafer scak)csp。 弟11圖顯示採用玻璃環氧基板65作為支撐基板，略 =片尺寸之CSP66。在此’係以在玻璃環氧基板65 女衣黾晶體晶片丁的c S P進行說明。 Μ 2破璃環氧基板65之表面，係形成有帛i電極67、 =2電極68以及晶粒塾（仏_)69，其背面則形成有 二^電極70與第2背面電極7卜此外透過貫通孔扭，使 IS :極67與第1 f面電極7〇連接。再者透過貫通 曰使第2電極68與第2背面電極”電性連接。此 s曰攻墊69中係、固接前述裸電晶體晶片τ，而電晶體之射 ㈣弟1電極67係藉由金屬細線72連接。另外，電晶體 之基極與第2電極68係藉由金 :日日虹 氣美拓以 Κ /Ζ連接。在玻璃環 土 ^ 5上設置有樹脂層73以覆蓋電晶體晶片τ。 前述CSP66係採用玻璃環氧基板65，但不同於晶圓 316193 5 1251246 級CSP，其由晶片T到外部連接用的背面電極7〇、71為 止的延伸構造簡單，而具有製造成本低廉的優累占。.、、、 但是，上述CSP66係以玻璃環氧基板65作為仲介岸 (mterposer)而使用，因此在咖66白勺小型化以及薄型化曰 制。因此乃開發出-種如第12圖所示之無需安裝基： 的電路裝置8〇(例如，參照專利文獻1}。 參照第12圖，在電路裝置8〇中，係 上固接電路元件82。此外，兩路_杜μ ^ .电圖木81 t丄a 兒路兀件82與導電圖荦81私 ，屬細線84連接。封裝樹脂83覆蓋電路元件案：： 萄細線84及導電圖案81而露出導電圖案μ之 孟 此，電路裝置80係省略安襄基板 二。因 CSP66,更能形成輕薄小型狀。 成且車又绪於 電路裝置80之導電圖案81，係 具體而言’首先係利用半崎；二：而形 狀：導電圖案81。接著，於導電圖案IT二表：形成凸 兀件82。然後以覆蓋泰 兒性連接電路 形成封裝_ 83。二二二真充f =離溝打之方式 離溝87之封裝樹脂δ3 ^除導電落直到填充於分 分離。ώ μ 。為止。稭此使各導電圖安只 稭由上34步驟，即可形成期望 Μ木81 [專利文獻1]日本專利 狀的¥電圖案81。 第1圖）本專輪雇卿號公報(第7頁、 之寬’為使導電圖案81彼此接近，而纩, 會產生分離溝87之深度;;、，離溝87 勺問畸。例如將 316193 1251246 分離溝87的寬度設定在15〇 之深度会不沾 …_左右以下時，分離溝87 曰 句一。如上述所示，各導電圖宰 . 於分離溝87之封努抖浐Μ —山&甩巴木81 ’直到填充 導電箱而+ 出為止，係、藉由從背面姓刻 ,b 以分離。局部性形成較淺之分離溝87時，科± 月面蝕刻導電圖案δ1，直 ' 封穿樹胪+山 兄於。亥車乂淺的分離溝87的 曰路出為止。因而，進行過度的蝕刻，合幵m 的導電圖案81。如此一來， ^成較溥 容變小的問題。 I 4生導電圖案以之電流電 此外’當導電圖案8丨彼此之 —士 局部性形成較大的寄生電容的問題。因此n產生 計時’必須考慮到局部形成不同寄生電^的;^订電路設 ;=於電路設計。本發明係基於上述問題而:作：問： 二化：係提供一種使導電圖案彼此間的間隔均 化的书路裝置及其製造方法。 【發明内容] 及斑路裝置’其特徵為具備有：導電圖案；以 及，、剛述ν电圖案電性連接之 彼此之間係以等間隔分開。 而則返導電圖案 再者’本發明之電路裝置，其特徵為具備有 離溝分開之導電圖案；盥前述導干 用刀 件；使前述導電圖案之背面露出並。之電路元 述電路元件之封穿樹月匕電圖案及前 邊曰，而則这導電圖案彼此之間係藉由 刖述分離溝以等間隔分開。 本發明之電路裝置之製造方法，其特徵係具備：準備 316193 7 1251246 :包冷之步驟；藉由於前述導“ 度的分離溝，使導電圖 广白令形成具有等間隔之寬 案與電路元仕 乂成凸狀之步驟；使箭、f , 塔7°件電性連接之步妒. 便別述導電圖 覆蓋前述電路元件，並 二以封裳樹脂進行封裝，以 樹 ，導電落之背面直到溝之步顿，、及去 月曰路出為止的步驟。’、、' 月】处刀碓溝的前述封裝 匕外，本發明之電路 備：準備導電落之步驟；藉由其特徵係具 之第1分離溝，使構成—個單元落令形成等間隔 在前述單元彼 〜圖案形成凸狀，並 2分離溝的步驟；使前二，述第1分離溝為寬的第 步驟；以封她咖農，以; 充於前述第！分離溝以及前述第2 :二=:件’並填 述導電箔之昔面吉壬丨话 刀’冓之乂驟，去除前 分離二 到填充於前述第1分離溝以及前述第2 刀、：溝的可述封裳樹脂露出為止的步驟 ：弟上 述第2分離溝的前述封裝 τ 〃於月，』 單元之步驟。 卩月曰予以切辦’以稭此分離前述 (發明之效果） ，據本發明之電路裝置’藉由將導電圖案彼此間的寬 間隔’可容易預測到產生於導電圖案與封裝 氏曰B的可生電容值。因此’可使兼顧到寄生電容的電路 圖案設計更為容易。 * $據錢明之電路裝置之製造方法，藉由將分離溝之 λ>度設成等間隔’可使經由㈣而形成之分離溝的深度變 316193 8 1251246 為一致。因此，導電圖宰彼此 藉由將分離溝的寬度設為定 〜的情形而製造高品質的電路裝置，經 =一化，可形成所希望之厚“導電_。 後 【實施方式】 卞 苓照第1圖說明本形態之電路裝 圖（Α)為電路裝置之俯視圖，第 ^^。第！ •參照第！圖⑷，本形態之電路裝H〇)為f剖視圖。 導電圖案11 ’·與該導電圖案〗丨命 本具備有·· 以及使導電圖案^之背面露$ =電路元件！2; 圖案】1的封裝樹脂13。 设風电路元件12及導電 導電圖案】1係考慮谭材的 而選擇其材料。具體而言， 接5性、電鑛性 導電羯為主材料之導為主材料之 成之導電㈣作為導電圖案u:SF；；Nl等合金所形 11係形成露出背面且喪埋於 ^。在此，導電圖案 分離溝Ο電性分離。舉例而言^曰13的構造，並藉由 角落，形成安裝有電路元件：在電路裝置10之四個 此外，形成為金屬細線i 4之接4端^的導電圖案U。 成於其間。另外，自封農樹脂^1屮v電圖案11係形 面設有由焊锡等料所形成的卜電圖案π的背 係藉由飯刻形成，且其側面形乂=15。導電圖案η 背面未設置外部電極15的部位成"’曲面。此外，在跋置之 電路元件12係為電晶，叫係以光阻劑16覆蓋。 肢、二極體、1C晶片等半導體 9 316193 1251246 :件s曰片電谷益、晶片電阻等被動元件。此外，厚度雖 會增加’另外還安裝有csp、BGA(BaUGndA㈣，球拇 =列封裝)等面朝了的半導體元件。在此，以面朝上方式安 衣的电路元件12 ’係藉由金屬細、線J 4與其他導電圖案^ ^ 電性連接。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a circuit device and a method of fabricating the same, and, in particular, to a circuit device having a conductive pattern separated at equal intervals and a method of fabricating the same. [Prior Art] Conventionally, circuit devices installed in electronic devices have been used in mobile phones, laptops, etc., and therefore must be miniaturized and thinned. For example, in the case of a circuit device, a semiconductor device has been exemplified, and a wafer level (wafer scak) csp having a wafer size equivalent to CSP (10) p Slze (wafer size package) has been developed. Figure 11 shows the use of a glass epoxy substrate 65 as a support substrate, slightly = chip size CSP66. Here, the description will be made of c S P on the glass epoxy substrate 65. Μ 2 The surface of the glazed epoxy substrate 65 is formed with a 帛i electrode 67, a =2 electrode 68, and a grain 塾(仏_) 69, and a second electrode 70 and a second back electrode 7 are formed on the back surface thereof. The IS:pole 67 is connected to the 1st f-surface electrode 7A by twisting through the through hole. Further, the second electrode 68 and the second back electrode are electrically connected to each other through the through hole. The smashed pad 69 is used to fix the bare transistor wafer τ, and the transistor is irradiated (4). In addition, the base of the transistor and the second electrode 68 are connected by 金 / 藉 by gold: Nikko Mito. A resin layer 73 is provided on the glass ring to cover the electricity. The crystal wafer τ. The CSP66 is made of a glass epoxy substrate 65. However, unlike the wafer 316193 5 1251246 class CSP, the extension structure of the wafer T to the external connection back electrodes 7A and 71 is simple, and has a manufacturing cost. However, the above-mentioned CSP66 is used as a glass epoxy substrate 65 as a mterposer. Therefore, the coffee 66 is miniaturized and thinned. Therefore, it has been developed. As shown in Fig. 12, the circuit device 8 is not required to be mounted (for example, refer to Patent Document 1). Referring to Fig. 12, in the circuit device 8A, the circuit element 82 is fixed. In addition, two paths _ Du μ ^ . Electrogram wood 81 t丄a children's road element 82 and conductive figure 荦81 private The thin film 84 is connected. The encapsulating resin 83 covers the circuit component case: the thin wire 84 and the conductive pattern 81 are exposed to expose the conductive pattern μ, and the circuit device 80 is omitted from the ampoule substrate 2. The CSP66 can be formed into a thin and light shape. The conductive pattern 81 of the circuit device 80 is specifically referred to as 'first using half-saki; second: and the shape: conductive pattern 81. Then, in the conductive pattern IT two: forming the convex member 82. Then Covering the Thai connection circuit to form the package _ 83. 222 true charge f = the way of the groove from the groove 87 of the encapsulation resin δ3 ^ except the conductive drop until the filling is separated. ώ μ. So that makes each conductive In the 34th step of the Tuan, the electric pattern 81 of the Japanese patent form of the desired eucalyptus 81 [Patent Document 1] is formed. Fig. 1) The special wheel of the hiring company (page 7 The conductive patterns 81 are brought close to each other, and the depth of the separation groove 87 is generated;;, the distance from the groove 87 is abrupt. For example, the width of the separation groove 87 of the 316193 1251246 is set at a depth of 15 inches, which is not stained. When the separation ditch 87 曰 sentence one. As mentioned above , each conductive figure slaughter. In the separation ditch 87, the seal is swaying - mountain & 甩巴木81 ' until filling the conductive box and + out, by, from the back of the surname, b to separate. Local formation When the shallow separation groove 87 is used, the conductive pattern δ1 is etched on the surface of the surface, and the straight line is sealed by the tree 胪 + 山兄. The 分离 分离 的 的 的 的 分离 分离 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。导电m conductive pattern 81. As a result, the problem is smaller than the smaller one. I 4 the conductive pattern is used for the current and the 'parallel capacitance of the conductive pattern 8 丨 each other to form a larger parasitic capacitance. problem. Therefore, n generates timing ' must take into account the local formation of different parasitic electrical ^; ^ circuit design; = in the circuit design. The present invention is based on the above problems: Do: Q: The invention provides a book path device for homogenizing the intervals between conductive patterns and a method of manufacturing the same. SUMMARY OF THE INVENTION A zonal device is characterized in that: a conductive pattern is provided; and the ν electric patterns are electrically connected to each other at equal intervals. Further, the conductive pattern of the present invention is characterized in that the circuit device of the present invention is characterized in that it has a conductive pattern which is separated from the groove, and the leading dry conductive blade; and the back surface of the conductive pattern is exposed. The circuit element encloses the tree-shaped electrical pattern and the front side of the circuit element, and the conductive patterns are separated from each other at equal intervals by means of a description of the separation grooves. The method for manufacturing a circuit device according to the present invention is characterized in that: the step of preparing 316193 7 1251246: cold-packing; by means of the separation groove of the above-mentioned degree, the conductive pattern is broadened to form a wide case and a circuit element having equal intervals. The step of forming the convex shape into a convex shape; the step of electrically connecting the arrow, the f, and the 7° piece of the tower. The conductive pattern covers the aforementioned circuit components, and the second is encapsulated with a sealing resin, and the back of the tree is electrically conductive. The steps up to the step of the ditch, and the way to go to the moon. The circuit of the present invention is prepared for the step of preparing the conductive drop; The first separation groove has a step of forming a unit at equal intervals in the unit and forming a convex shape, and separating the grooves; and the first step, wherein the first separation groove is wide; Seal her to the farmer; to fill in the above-mentioned separation groove and the aforementioned 2nd: 2 =: piece 'and fill in the conductive foil of the face of the 壬丨 壬丨 冓 冓 冓 , , , , , , , , The first separation groove and the second knife and the groove can be sealed. The step of exposing the resin: the step of the above-mentioned package τ of the second separation trench is 〃 , 』 』 』 』 』 』 』 』 』 』 』 曰 曰 ' ' ' ' ' ' ' ' 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离 分离By making the wide spacing of the conductive patterns with each other, it is easy to predict the value of the generated capacitance generated by the conductive pattern and the package 曰B. Therefore, it is easier to design the circuit pattern that takes into account the parasitic capacitance. In the manufacturing method of the circuit device of the present invention, the depth of the separation groove formed by (4) can be made uniform by the λ > degree of the separation groove, so that the conductive pattern is mutually separated by the separation groove. When the width is set to a value of 〜, a high-quality circuit device is manufactured, and a desired thickness "conductive_" can be formed. [Embodiment] 电路 Referring to Figure 1, the circuit layout (Α) of this embodiment is a plan view of the circuit device, ^^. The first! • Refer to the first! Fig. 4 is a cross-sectional view of the circuit of the present embodiment. The conductive pattern 11 ’· and the conductive pattern have a ··· and the back surface of the conductive pattern ^ is exposed to the circuit element! 2; encapsulation resin 13 of pattern]. The wind circuit component 12 and the conductive conductive pattern 1 are selected in consideration of the material of the material. Specifically, the conductive material (4) which is a main material of the conductive material of the bismuth and the electric ore conductive bismuth is used as the conductive pattern u: SF; and the alloy of the N1 is formed to expose the back surface and is buried in the ^. Here, the conductive pattern separation trench is electrically separated. For example, the structure of the structure 13 is formed by the corners, and the circuit elements are mounted: four of the circuit devices 10, and a conductive pattern U of the metal thin wires i4 is formed. In the meantime. Further, the self-sealing resin resin pattern 11 is provided with a pattern of the electric pattern π formed of solder or the like, which is formed by a meal, and its side shape is 15=15. The portion of the conductive pattern η on which the external electrode 15 is not provided on the back surface is a "' curved surface. In addition, the circuit component 12 in the device is electrically crystallized, and is covered by a photoresist 16. Semiconductors such as limbs, diodes, and 1C wafers 9 316193 1251246: Passive components such as stencils, electric grids, and chip resistors. In addition, the thickness is increased. In addition, semiconductor components such as csp, BGA (BaUGndA (four), ball thumb = column package) are mounted. Here, the circuit component 12' which is dressed in a face-up manner is electrically connected to the other conductive patterns by the thin metal wires J4.

-封裝樹脂13係使導電圖案11之背面露出而覆蓋電路 兀件12、金屬細線Η以及導電圖案u。封裝樹脂13可採 用熱硬化性樹脂或熱可塑性樹脂。此外，使各導電圖荦U 2的分離溝41填充有封裝樹脂13。此外，本發明之電 路衣置10 ’其整體係由封裝樹脂13所支撐。The encapsulating resin 13 exposes the back surface of the conductive pattern 11 to cover the circuit element 12, the thin metal wires, and the conductive pattern u. The encapsulating resin 13 may be a thermosetting resin or a thermoplastic resin. Further, the separation grooves 41 of the respective conductive patterns U 2 are filled with the encapsulating resin 13. Further, the circuit board 10' of the present invention is entirely supported by the encapsulating resin 13.

Mitt溝41設在各導電圖案11之間，具有使各導電圖 二=生/刀離之作用。此外，分離溝“的寬度们，基 本上不論在哪一個部位JL嘗声朽犯# 左右。換言、:度二成圖如 開。因此，可使填充於分離溝 ，了、主寻間隔分 面之間所產生的寄生電容的值均一化。此外= 寄生電谷之均一化，可汽务I έ 日田 此外，在前雖敘述分離溝41 ^。又。十。 是該「等間隔」係包含有差的等間二：二 ΐ某種程度的誤差。該誤差係包含形成姓刻用之崎覃 言，該_彳_數㈣數而 :溝物一’係由導電圖案 316193 10 1251246 yr 路出導電圖案U之背 係以樹脂所形成的光阻劑16覆：面^樹脂13的背面The Mitt groove 41 is provided between the respective conductive patterns 11 and has a function of making each of the conductive patterns 2 = knife/knife. In addition, the width of the separation groove is basically no matter which part of the JL tastes the sinister #. In other words, the degree is as shown in the figure. Therefore, it can be filled in the separation groove, and the main search interval is divided. The value of the parasitic capacitance generated between the two is uniform. In addition, the parasitic electric valley is uniform, and the steam can be I έ Hita. In addition, although the separation groove 41 ^ is described above, the tenth is the "equal interval" system. There is a difference between the two: two degrees of error. The error includes the formation of the surname used in the slogan, the _彳_number (four) number and: the groove one' is made of the conductive pattern 316193 10 1251246 yr, the back of the conductive pattern U is made of resin to form a photoresist 16 cover: face ^ back of resin 13

的開口部中’形成由焊錫等焊 ’二在光阻劑U 參照第2圖才斤形成的外部電極15。 電路裝置10β之俯視R 、置10B。第2圖係 / — 肝視圖。在該圖所示之雷跤壯里， 係猎由導電圖案u形成配線部uc。 ς⑽中，In the opening portion, 'the surface is formed by soldering or the like, and the external electrode 15 formed by the photoresist U with reference to Fig. 2 is formed. The circuit device 10β has a plan view R and a 10B. Figure 2 is a / liver view. In the Thunderbolt shown in the figure, the wiring portion uc is formed by the conductive pattern u. In ς(10),

彼:之間的分開距離，包含局部相異的部份。二圖案U 之造係與第1圖所示之電路裝置1〇Α相同 ⑽ 在电路裝置10Β令内建右 + 1C晶片之電路元件 电路兀件12。—個是 流開關的半導體元件^ 是進行數安培以上之大電 據由電路= 牛12Β。電路元件一 件。除上述半導體元=”訊號進行開關的半導體元 十4 蛤 件外，電路裝置10Β中亦可内建曰ΰ 笔阻或晶片電容器等其他電路元件。 4 域的於平面上不同的部位形成電性連接領 〆、包圖木11 0例如，在該配線部Uc中，苴一 部係透過金屬細線14與作為IC之電路元件以連接 外’配線部11C之另—端部，係透過金屬細線14， 元件之電路元件12B連接。因此，配線部llc係㈣料 使内建於電路裝置_之元件彼此間形成導通之師之一 部分的機能。另外’配線部11C係延伸於金屬細線14之 下方。在本形態之電路裝置10B卜形成有複數個配線部 11 c此外，在配線部11 c彼此鄰接的部位，配線部丨j c 彼此間所分開的距離大致相同。 11 316193 1251246 在參照第1圖所說明之電路裝置中，所内建之導電圖 案11彼此間的分開距離大致相同，但在第2圖之電路裝置 _中’卻有其距離不一致的部位。具體而言，配置有為 開關元件之電路元件12B的接端面狀晶粒墊11Β Μ他導 2圖案UA分開的距離較其他部位長。在此，其他導電圖 木11Α係包含構成配線部11C之導電圖案U、以及載置有 ^制用IC之電路元件12A的接端面狀導電圖案u。例如’ /、他導電圖案11A彼此間分開之距離為⑼以m左 右、’相對地，晶粒墊11B與其他導電圖案UA之分開距離 則為2 5 0 // m左右。 如上述所示，加大晶粒墊仙與其他導電圖案iia間 的距離的理由，係為了確保晶粒墊ub的耐壓性。進行大 電流（例如250V、2A左右）„的電路元件ΐ2β，係透過悍 錫或導電性糊膏等具導電性之黏接劑固接在晶粒塾 上。因此，電路元件12Β執行⑽之動作時，晶粒墊ub 上也會流通上述大電流。相對地’在其他導電圖案"A中， 係通過控制用之較小電性訊號（例如數ν、數十mA左右）。He: The separation distance between them, including the partially different parts. The second pattern U is formed in the same manner as the circuit device 1A shown in Fig. 1 (10) The circuit component circuit 12 of the right + 1C chip is built in the circuit device 10. One is the semiconductor component of the flow switch ^ is a large circuit of several amps or more by the circuit = cow 12 Β. One piece of circuit components. In addition to the above-mentioned semiconductor element = "signal semiconductor device switching, the circuit device 10" can also be built with other circuit components such as pen resistance or chip capacitor. 4 The domain is electrically formed at different parts of the plane. For example, in the wiring portion Uc, the first portion is transmitted through the thin metal wires 14 and the circuit component as the IC to connect the other end portion of the outer wiring portion 11C, through the thin metal wires 14 The circuit component 12B of the device is connected. Therefore, the wiring portion llc is a function of a part of the division of the components built into the circuit device to be electrically connected to each other. The wiring portion 11C extends below the thin metal wires 14. In the circuit device 10B of the present embodiment, a plurality of wiring portions 11c are formed, and the distance between the wiring portions 丨jc is substantially the same at a portion where the wiring portions 11c are adjacent to each other. 11 316193 1251246 Referring to Fig. 1 In the circuit device of the description, the built-in conductive patterns 11 have substantially the same separation distance from each other, but in the circuit device of FIG. 2, there is a portion where the distances do not match. Specifically, The distance between the end face-like die pad 11 of the circuit component 12B for the switching element and the pattern UA is longer than the other portions. Here, the other conductive patterns 11 include the conductive pattern U constituting the wiring portion 11C. And an end face-shaped conductive pattern u on which the circuit element 12A of the IC is mounted. For example, the distance between the other conductive patterns 11A is (9) about m, 'relatively, the die pad 11B and the other The separation distance of the conductive pattern UA is about 250 // m. As described above, the reason for increasing the distance between the die pad and the other conductive pattern iia is to ensure the pressure resistance of the die pad ub. The circuit element ΐ2β which is subjected to a large current (for example, about 250 V and about 2 A) is fixed to the die by a conductive adhesive such as bismuth tin or a conductive paste. Therefore, when the circuit element 12 is operated (10), the large current flows through the die pad ub. Relatively in other conductive patterns "A, through the control of the smaller electrical signals (such as the number ν, tens of mA or so).

根據前述，因晶粒墊11B盥導雷圄安η A /、凃电圖木11A之電位差大，因 二何，兩者保持距離以確保耐壓性則更形重要。根據本 形怨，通過晶粒藝11B之大電流，可抑止在通過導電圖安 11A的控制訊號中產生雜訊。此外，亦可使盘上述功率么 之半導體元件之源極或淡極連接的導電圖案H他導: 圖案分開。藉此，可進-步使内建於電路裝置内的電路=According to the foregoing, since the potential difference between the die pad 11B and the galvanic steel 11A is large, it is more important to maintain the distance to ensure the pressure resistance. According to this form, the large current of the grain art 11B can suppress the generation of noise in the control signal passing through the conductive pattern 11A. In addition, the conductive pattern H of the source or the light pole of the semiconductor device of the above-mentioned power can be made to be separated: the pattern is separated. Thereby, the circuit built in the circuit device can be further advanced =

加安定。 K 316193 12 1251246 、而言之…使第1分離溝的深度均-化，。要使 以平均。因Γ,二 度確實均一化其深度便得 , 月面進仃之豬由蝕刻分離各導電 Γ得以良好進行。但是，在通過大電流之導電圖; ，為確保與其他導電圖案η之魏，必 過預定程度的距離使兩者分開。 乂須以起 原則，有時也會將部分確=彻生的 2圖中係以W2表示。 又σ見。δ亥見度在第 以上，係說明2種使用導電箔 他圖案，故於下文說明。 θ木圖，此外尚有其 與分離型之電路元件等電性 有電路元件之接端面周圍的接’配置於固接 特別適用於端子數較少之冗或内二成的圖案。該圖案 裝置。 建刀尚隹的電晶體的電路 2 :與銷數多的電路元件(例 在配置有電路元件之接端面周 “生連#且為了 宰。由恭卜41k j图進仃再配線而引繞的圖 二'連接電路元件之焊墊延續伸展的圖案。 在 SIP(System in Package)中,. 被動开杜+ #〜 J r ’内建有電晶體、1C、 被動兀件或該等裝置之集合體。該 部叫電性連接。該配線部llc之^路元件係透過配線 除延伸為細長之形狀外，亦可採用升:：’如第2圖所示， η作為配線部llc。 ^成l字狀之導電圖案 =3圖以下之圖表說明電路楚置1Q之製造方法。 月之弟1步驟，如第3圖至第6圖所示， 316193 13 1251246 I二：40 ’並藉由形成分離溝41而形成突出A 毛圖案11。 出為凸狀的導 在本步驟中，首先如第3圖（A)所 箱40。該導電箱40係考慮焊材之_，準備片狀之導電 =選擇其㈣“具體的材二 所形成的導電荡等。導電箱之厚度X，等合金 二考量，最好在_…〇。㈣左：：且::餘刻作業 圖_示，形成複數個單元的區塊42係、：^ ，亚列之方式排列在短長方形之導〇、 4,5個分 有縫隙43,可吸收在模塑步驟； =導電绪40的應力。另外在導電落4〇=:處理所產生 疋間隔設置索引孔（index h〇le)44，以用於久牛:端係以— 接著，形成各巴挣47々省币 、口 乂驟之定位。 圖所亍… 之導電圖案11。首先，如第4 以使除了开^=〇安上^耐_遮罩之光阻劑叹，並 出之方式使以外的導電落4〇得以露 遮罩而進行濕_，藉 =:落4。：形成分離溝41。為形成等間隔之分離：:， "⑽之露出部的寬度W1係以等間隔形成 先阻劑m之圖案化係藉由曝光门 此有時會產生某種程度的誤差。 八進仃，因 ^第5圖，說明經由祕刻所形成之分離溝4】之 見又w與深度0的闕係。第5圖⑷為藉由钱刻所形成之 316193 14 1251246 圖（B)為 γ 、/、刀離溝之寬度與深 7刀離溝41的剖視圖，第 度之關係圖。 麥照第5圖（A)，說明形成於導 的剖面形狀。在此，係以符號％表:之分離溝41 而以符號D表示其深度。藉：二 面，係依照等方性形成。因而溝= 分離溝的寬度W受_條件支配。亦的:度D係^ W加大時，其深度0也會變大。此外^刀4溝之見度 分離溝之深度D也會變深。 強度時’ 參照第5圖⑻之圖表，說明分離溝之寬度w :的關連。該圖之圖表係顯示在同—濕餘；二 成複數個寬度相異之分離溝的結 ，下形 省沾办庙爪 另外’亦將各個分離 二及深度_成圖表。另外，亦藉由該等點 “：而描、％出以統計學的手法算出的近似曲線& 、百先，說明近似曲線。分離溝的寬度由〇至150//m 為止，其深度會隨著分離溝之寬度w的增加而增加。接 =當分離溝的寬度W超過15〇㈣日夺，分離溝的深度會 了遠在一疋程度。亦即’意指具有寬度超過ΐ5〇ρ的分 離溝41的深度會成為大致一定。 … 接者，况明上述寬度與深度之值的不均。將近似曲線 所顯示之深度’與該點所顯示之深度的差設定為D1。如此 一來，分離溝4"勺深度在職15〇㈣為止的領域内，⑴ 的值會變得極大。此意味著形成寬度小於l5〇"m的分離 溝41時，各分離溝41的深度會產生極大的不均。相對於 316193 15 1251246 ^當分離溝41之寬度W超過W/zm時，近似曲線L1 俨、八之深度，與各點所顯示之深度的差會變得極小。具 示二在5亥領域中，近似曲線所顯示之深度與各點所顯 之'衣度的差係在數“ m左右。因此，將寬度W設成1 50 、上日才，即可形成均—性良好的分離溝4 1。 、、re择此外’在上述說明中’經由儀刻形成之分離溝41的 2度成為一定的寬度ws係在15〇/im以上。但是，該寬 ;=會因_條件而變動。亦即根據將㈣（咖 電：r之表面的方法，以及將導電落浸潰在㈣ 、方法’有日可會使寬产w q g 在導恭苇4Π々a ’又 產生差異。此外，根據使用Add stability. K 316193 12 1251246 In other words, the depth of the first separation groove is made uniform. To make it average. Because of the fact that the second degree is indeed uniformized, the pigs that have entered the moon are separated by etching. However, in the case of a conductive pattern passing through a large current, in order to ensure that the other conductive patterns η are separated, the two must be separated by a predetermined distance. It is not necessary to follow the principle, and sometimes it will be indicated by W2 in the 2 figures that are partially = completely. See also σ. The δ visibility is in the above, and two types of conductive foil patterns are used, so it is explained below. The θ wood map has a pattern in which the connection around the end face of the circuit element of the circuit type of the separate type is disposed in a fixed manner, and is particularly suitable for a pattern having a small number of terminals or a second inner portion. The pattern device. The circuit 2 of the transistor that is still built is a circuit component with a large number of pins (for example, in the end face of the circuit component, which is connected to the end face) and is used for slaughtering. Figure 2 'The solder pad connecting the circuit components continues the stretch pattern. In SIP (System in Package), Passive Open Du + #~ J r ' Built-in transistor, 1C, passive device or such devices The assembly is called an electrical connection. The component of the wiring portion of the wiring portion is extended by the wiring to an elongated shape, and may be as follows: "As shown in Fig. 2, η is used as the wiring portion llc. Conductive pattern in the form of l-character = 3 The following diagram illustrates the manufacturing method of the circuit 1Q. The 1st step of the month, as shown in Figures 3 to 6, 316193 13 1251246 I 2: 40 ' and by The separation groove 41 is formed to form the protruding A hair pattern 11. The guide is formed in a convex shape. First, the case 40 is as shown in Fig. 3(A). The conductive case 40 is prepared in the form of a sheet. Conductive = select it (4) "The specific material 2 formed by the conductive sway, etc. The thickness of the conductive box X, and other alloys 2 considerations, preferably in _四. (4) Left:: and:: Remaining operation diagram _ shows that the block 42 of the plurality of cells is formed, and the sub-columns are arranged in a short rectangular guide, and 4, 5 are separated by a gap 43, It can be absorbed in the molding step; = the stress of the conductor 40. In addition, the index drop (index h〇le) 44 is set in the 疋 interval of the treatment to be used for the long-term: end system to - then Forming each bus to earn 47% of the provincial currency, the position of the mouth. The conductive pattern of the picture... First, as the fourth to make the photoresist sigh except In a manner such that the outer conductive layer is exposed to the mask and wet, _ = = 4: forming the separation groove 41. To form the separation at equal intervals::, " (10) the width of the exposed portion W1 The patterning of the pre-resistor m at equal intervals sometimes causes some degree of error by the exposure gate. 八进仃, because of the fifth figure, illustrates the separation trench formed by the secret engraving 4] Also w and the depth 0 of the tether. Figure 5 (4) is formed by the money engraved 316193 14 1251246 Figure (B) is γ, /, the width of the knife and the depth of the knife 7 Fig. 5 is a cross-sectional view showing the cross-sectional shape formed in the guide. Here, the depth is indicated by the symbol % table: the separation groove 41, and the depth is indicated by the symbol D. The groove is formed according to the isotropic property. Therefore, the width W of the separation groove is governed by the _ condition. Also, when the degree D is increased, the depth 0 is also increased. In addition, the visibility of the groove is further separated. The depth D of the groove will also become deeper. In the case of strength, refer to the chart in Figure 5 (8), which shows the relationship between the width w: of the separation groove. The chart of the figure shows the same-wet residue; the second and the multiple widths are different. The knot of the separation ditch, the lower shape saves the temple claws, and the other separations and depths are also plotted. In addition, the approximate curve is also calculated by the approximate curve & and the first calculation calculated by the statistical method. The width of the separation groove is from 〇 to 150//m, and the depth will be As the width w of the separation groove increases, the width of the separation groove exceeds 15 〇 (4), and the depth of the separation groove will be farther away. That is, it means that the width exceeds ΐ5〇ρ. The depth of the separation groove 41 is substantially constant. The difference between the width and the depth is given by the difference. The difference between the depth displayed by the approximate curve and the depth displayed by the point is set to D1. In the field of the separation groove 4" the depth of the spoon is 15 〇 (4), the value of (1) becomes extremely large. This means that when the separation groove 41 having a width smaller than l5 〇 " m is formed, the depth of each separation groove 41 is extremely large. In contrast to 316193 15 1251246 ^When the width W of the separation groove 41 exceeds W/zm, the difference between the depths of the approximate curves L1 俨 and 八, and the depth displayed by each point becomes extremely small. In the 5H field, the depth and points shown by the approximate curve The difference in the 'clothing degree' is shown to be several "m". Therefore, by setting the width W to 1 50 and the previous day, the separation groove 4 1 having good uniformity can be formed. Further, in the above description, the 2nd degree of the separation groove 41 formed by the lithography has a constant width ws of 15 〇/im or more. However, the width ;= will vary depending on the _ condition. That is to say, according to the method of (4) (Caf: the surface of r, and the impregnation of the conductive fall in (4), the method may have a difference in the wide yield of w q g in the guide 4苇a ’. In addition, according to the use

之^ 钱刻劑的種類’亦可預測寬度WS 宰1=16圖^㈣在本步驟中所形成之具體的導電圖 木11的形狀。弟6圖㈧係形成有 的剖視圖’第6圖(B)係其俯視圖。 之一 40 =6圖㈧，係在導電落4。表面形成分離溝41。 亥刀離溝41係由第1分離溝41A以及第2分離、、冓52所 構成。第i分離溝41A係用以在—個…弟2刀料52所 Π:;_分離溝。而第2分離溝 :離的分離溝，其所形成之寬度係大於前述第1分:: :Α。該弟2分離溝52係在之後的模 : 2分…的封編加《分:：各 步驟。在此，單元係指構成一個電路裝置的構成要; 16 316193 !251246 具體而言，第i分離溝41A的寬度％丨可設定為i5〇 以m左右。另外，第2分離溝52的寬度W2可做成W1之 2倍左右（300/zm)。藉由將第！分離溝41八之寬度|丨設 定為左右，可使各個第丨分離溝41八的深度均: 化。此外，由於該m的寬度，係為可確保深度之均 :性的最小寬度’因此可使各導電圖㈣彼此分開的距離 攻小化。因此’可增加作為露雷同安 部的有效面積。為W圖案11之用的電路裝置内 弟ό圖（B)係顯示具體之導雷 圖⑻所示之-個區塊42的::圖^ 份係表示-個單元45。一個線所圍繞之-個部 複數個單元45,每—罩_ 4/鬼中’係以矩陣狀配列 此俜m- 9 置有同—導電圖案11。在 匕係形成2仃2列共4個單元45 元45。此外，上述第2分離溝多數的單 窗格狀。 係在各早兀45之間形成 圖⑻til:二步驟’如第7圖㈧之剖視圖以及第7 中固U:::’係在期望之導電圖案η之各單元45 電極與期2之_^成使各早70 45之電路元件12的 電路：圖案Η電性連接的連接裝置。 兀件12係為電晶體、二極體、ΙΓ曰ΰ斤 兀件、晶片電交 1C日日片寻半導體 會變厚，但二:二=被動元件。此外，厚度雖 本發明…半導體元件。 之電路元件12 — 圖所不，係將各單元45 —併復蓋，並以封裝樹脂13進行模塑以填 316193 17 1251246 充於分離溝41。 在本步驟中，封裝樹脂13係覆 數個導電圖案U，在導泰 件12以及禝 封务m “ 案1間的分離溝41中則填充 封衣秘月日u。此外，封裝 -兄 彎曲構造嵌合並緊密,士八 l〜圖-11侧面的 同安17 ~ δ。亚措由封裝樹脂π來支撐導兩 二:二:、，在ί步驟卜可藉由移轉模塑法、射出成 土/ 2，叉，貝法來貫現。封裝樹脂可以移轉模朔杳現 樹脂等熱硬化性樹脂，而 w心，、現_ 取# 射出成型貧現聚酿亞胺藉匕、 聚苯越硫化物等熱可塑性樹脂。另外， ^月^ 1分離溝41A以及第2分離、、冓52 _ ^ ，在第 刀離溝52雙方填充封裝樹脂13。 +本A之優點在於到覆蓋封裝樹脂13為止， :圖案U之導電f| 4〇係形成支樓基板採· 本不需要的支擇基板。在本發明中，形成支 箱40係電極材料之必要材料。因此，且 土反之V电 材料進行作業的優點’同時亦可降低成/ ^省構成 本發明之第4步驟’如第9圖所示，係將各導電圖宰 予以電性分離。在此係去除導電^Q之背面直到” 填充於分離溝41的封裝樹脂13 。 進仃各導電圖牵 L1的分離。本㈣係以化學方式〜或物理方式去除導Γ 伯40的背面，而分離為導電 ’、、私 m窳& 1本步驟係藉由拋光、 刻、雷射之金屬蒸發等進行。特別在藉由敍刻去 = : =，可獲得填充於分離溝41的封裝樹脂朝下 如第6圖⑷所示，形成較大寬度之第2分離溝52的 316193 18 1251246 =：第1分離濟41A的深度大致相等。因此，藉由濕 二進:上述去除步驟時，填充於第2分離溝η以及第 爾:1Α的封裝樹脂，會以相同程度朝下方突出。 止1進订導電圖案11之背面處理，而獲得第1圖 中：：：終構造。亦即，係視需要在露出之導電圖案11 中復盖焊錫料電材料以形成f面電極15，並完成電路褒 置。 封"tr月之第5步驟’如第10圖所示，係藉由分割將 封I樹脂13分離為各單元45。 1 本步驟中’係利用切割刀49沿著各單元45間的切 裝樹\13加以切割，以分離成各個電路裝置。在 / @切Μ線中僅留有填充於分離溝的封裝樹脂 毛、真而1可減> 切剔刀49的磨耗。並且’亦不會產生金屬 =:以切割成極為準確之外形。更詳而言之，係沿著 二 早70 45間的第2分離溝52的中間部進行上述切 吾丨J 〇 使用於上述切割的切割刀49的厚度例如為 因此’藉由將進行切割之第2分離溝52的寬度加寬， 即可避免切割刀49與導電圖案11接觸。 【圖式簡單說明】 、弟1圖為顯示本發明之電路裝置之俯視圖（Α)、剖視圖 (Β)。 =2圖為顯示本發明之電路裝置之俯視圖。 第3圖$聶頁示本發明之電路裝置之製造方法之剖視圖 316193 19 1251246 (A) 、俯視圖（B)。 第4圖為顯示本發明之 ^ C p, . ^峪衣置之剖視圖。 弟3圖為頭示本發明之㊉ (B) 。 电路衣置之剖視圖（A)、特性圖 路衣置之製造方法之剖視 圖 第1 2 3 4 5 6圖為顯示本發明之電 (A)、俯視圖（B)。 之製造方法之剖視圖 第7圖為顯示本發明之電 (A)、俯視圖（B)。 、 第8圖為| 圖。 、Χ明之電路裝置之製造方法之剖視 圖 圖 第9圖為 第1〇圖為 貢不本發明之電路裴置之製造方法之剖視 I示本發明之電路裝置之製造方法之俯視 第11圖為k _ 繁17m:·項示習知之電路裝置之剖視廣 電路裝置 2$. ^ rsn j±> 命包團案 晶粒塾 配線部 電路元件 封裝樹脂 金屬細線 20 316193 1 i - π»、頌示習知之電路裝置之剖視围 2 主要兀件符婕說明】 3 10、 10Α、10Β、 4The type of money engraving agent can also be predicted as the width WS slaughter 1 = 16 Fig. (4) The shape of the specific conductive pattern 11 formed in this step. Fig. 6 (E) is a cross-sectional view formed. Fig. 6(B) is a plan view thereof. One of 40 = 6 (8) is tied to the conductive 4 . The surface forms a separation groove 41. The sea knife is separated from the groove 41 by the first separation groove 41A and the second separation and the weir 52. The i-th separation groove 41A is used for the separation groove of the ... And the second separation groove: the separated separation groove is formed to have a width larger than the first point:::Α. The brother 2 separation groove 52 is attached to the following mold: 2 points... The seal is added: ":: each step. Here, the unit means a configuration constituting one circuit device; 16 316193 !251246 Specifically, the width % 第 of the i-th separation groove 41A can be set to about i5 m m. Further, the width W2 of the second separation groove 52 can be made about twice (300/zm) of W1. By the first! The width | 丨 of the separation groove 41 is set to be left and right, and the depth of each of the second separation grooves 41 can be made uniform. Further, since the width of m is such that the minimum width of the depth can be ensured, the distance between the respective conductive patterns (4) can be reduced. Therefore, it can increase the effective area as the Department of Lu'an. The circuit device for the W pattern 11 is shown in Fig. (B) as a block 42 of the specific guide ray diagram (8): Fig. 4 shows the unit 45. A unit surrounded by a line, a plurality of units 45, each of which is arranged in a matrix, and the 俜m-9 is provided with the same conductive pattern 11. In the lanthanide system, a total of 4 units of 45 elements 45 are formed in 2仃2 columns. Further, the second separation groove has a plurality of single pane shapes. The figure is formed between each early 45 (8) til: two steps 'as shown in Fig. 7 (8) and the seventh central solid U:::' is in the desired conductive pattern η of each unit 45 electrode and period 2 _^ The circuit of the circuit component 12 of each of the early 70 45 is connected to the device electrically connected. The device 12 is a transistor, a diode, a pin, a chip, and a wafer is electrically connected. The 1C solar chip is thickened, but two: two = passive components. Further, the thickness is the semiconductor element of the present invention. The circuit component 12 is shown in the figure, and the respective cells 45 are covered and molded by the encapsulating resin 13 to fill the separation trench 41 with 316193 17 1251246. In this step, the encapsulating resin 13 is coated with a plurality of conductive patterns U, and the sealing grooves 41 are filled in the separation grooves 41 between the guide member 12 and the sealing member m. In addition, the package-brow bending The structure is chiseled and compact, and the side of the octagonal layer is from the encapsulation resin π to support the two two: two:, in the ί step, by transfer molding, injection into Soil / 2, fork, shellfish come to the fore. Encapsulation resin can transfer thermosetting resin such as resin, and w-heart, now _ take # injection molding poor poly-imine, benzene, polystyrene Further, a thermoplastic resin such as a sulfide is formed. Further, the separation groove 41A and the second separation and the 冓52 _ ^ are filled with the encapsulating resin 13 in both the first and second grooves 52. The advantage of the present A is that the encapsulating resin is covered. 13: The conductive film f of the pattern U is formed as a supporting substrate for the support substrate. In the present invention, a material necessary for the electrode material of the support box 40 is formed. The advantage of the material to carry out the work 'can also be reduced to / ^ to form the fourth step of the present invention' as shown in Figure 9, Each of the conductive patterns is electrically separated, and the back surface of the conductive material Q is removed until "the encapsulating resin 13 filled in the separation groove 41". The separation of each conductive pattern leads to L1. This (4) chemically removes or physically removes the back side of the guide 40, and separates it into conductive ‘, 私 m窳& 1 This step is performed by polishing, engraving, laser evaporation of the metal, and the like. In particular, by engraving = = =, the encapsulating resin filled in the separation groove 41 can be obtained as shown in Fig. 6 (4), and the second separation groove 52 having a large width is formed. 316193 18 1251246 =: the first separation The depth of the JI 41A is roughly equal. Therefore, by the wet separation: in the above removal step, the encapsulating resin filled in the second separation groove η and the first: 1 突出 protrudes downward to the same extent. The back surface processing of the conductive pattern 11 is completed, and the final structure of the first::: is obtained. That is, it is necessary to cover the solder material in the exposed conductive pattern 11 to form the f-face electrode 15, and complete the circuit arrangement. The fifth step of sealing "tr month' is as shown in Fig. 10, and the sealing I resin 13 is separated into units 45 by division. 1 In this step, the cutting blade 49 is cut along the cutting tree \13 between the units 45 to separate into individual circuit devices. In the / @cut line, only the encapsulating resin filled in the separation groove is left, and the 1 can be reduced by > the wear of the cutter 49. And 'will not produce metal =: to cut into an extremely accurate shape. More specifically, the thickness of the cutting blade 49 used for the cutting is performed along the intermediate portion of the second separation groove 52 between 70 and 45 in the morning, for example, so that the cutting is performed by The width of the second separation groove 52 is widened to prevent the cutting blade 49 from coming into contact with the conductive pattern 11. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view (Α) and a cross-sectional view (Β) showing a circuit device of the present invention. Fig. 2 is a plan view showing the circuit device of the present invention. Figure 3 is a cross-sectional view showing a method of manufacturing the circuit device of the present invention 316193 19 1251246 (A), top view (B). Figure 4 is a cross-sectional view showing the ^ C p, . Figure 3 is a diagram showing the tenth (B) of the present invention. Cross-sectional view (A) of the circuit-mounted device, and characteristic diagram A cross-sectional view of the manufacturing method of the road-coating device Fig. 1 2 3 4 5 6 shows the electric (A) and top view (B) of the present invention. Cross-sectional view of the manufacturing method Fig. 7 is a view showing the electric (A) and the top view (B) of the present invention. Figure 8 is a diagram. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 9 is a cross-sectional view showing a method of manufacturing a circuit device according to the present invention. FIG. 11 is a plan view showing a circuit device according to the present invention. k _ 繁 17m:·The schematic circuit diagram of the circuit device of the conventional device 2$. ^ rsn j±> The die-shaped chip 塾 wiring part circuit component package resin metal thin wire 20 316193 1 i - π»,剖 剖 之 电路 电路 电路 电路 电路 电路 电路 电路 电路 电路 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3

11、 81 11Β、69 11C、11V 5 12、 12Α、12Β、& 6 13、 83 7 14 、 72 、 84 1251246 15 16、PR 4011, 81 11Β, 69 11C, 11V 5 12, 12Α, 12Β, & 6 13、83 7 14 , 72 , 84 1251246 15 16 , PR 40

41、87 41A 42 43 45 49 52 65 66 67 68 70 72 73 W、W1、W2 D 外部電極 光阻劑 導電箔 分離溝 第1分離溝 區塊 缝隙 ΧΙΟ 一41, 87 41A 42 43 45 49 52 65 66 67 68 70 72 73 W, W1, W2 D External electrode Photoresist Conductive foil Separation trench 1st separation trench Block gap ΧΙΟ 1

早兀 切割刀 第2分離溝 玻璃環氧基板 CSP 第1電極 第2電極 第1背面電極 第2背面電極 樹脂層 寬度 深度Early 兀 Cutting knives 2nd separation groove Glass epoxy substrate CSP 1st electrode 2nd electrode 1st back electrode 2nd back electrode Resin layer Width Depth

Claims (1)

,_______^ 一一一咖一一一 -ΙΛ\ 第93126960號專利申請案 申請專利範圍修正本 】一種曾 （94年9月15曰、 ' 電路政置，其特徵為具備有·導+ PH . v t ' 述導電圖案電性連接之^/¥_!圖案’以及與前 之間#]^$ 包路兀件，而前述導電圖案彼此 心间係以寺間隔分開。 2.Γΐ=ϊ置，其特徵為具備有：利用分離溝加以分開 及使^卜“34導電圖案電性連接之電路元件；以 前、二 案之背面露出並覆蓋前述導電圖案及 則述電路元件之封裝樹脂， 茶及 間隔=述導電圖案彼此之間係藉由前述分離溝以等 3·=請專利範圍第1項或第2項之電路裝置，1中，前 4.二:間的分開距離係在15—以上。 甲明專利乾圍第2項之電路步罟，甘山、， 係形成均一的深度。$路衣置’其中’嘯離溝 5·如申請專利範圍第1項或第2項之電路 有前述導電圖案係以等間隔分開。&中’所 6‘如申請專利範圍第】項或第2項 迷導雷同安# 4衣置其中’所 ’：圖木係“固接有半導體元件之晶粒墊， 粒墊與其他前述導㈣案之㈣ 他則述導㈣案彼此之_分開 - 7·如申請專利範圍第6項之電路果置，：：。 凡件係功率系之半導體元件。 』1牛¥月豆 316193(修正版） 1 正替毖頁I 8. 一種電路裝置之製 準備導電落之步驟；’其特徵係具備： 溝 藉由於前述導雷和 使導電圖案形成凸？成等間隔之寬度之分離 使前述導電圖案與㊉二驟， 以封壯执 ^ ^ A路元件電性連接之牛ξ取 以封衣樹脂進行封裝 一义、、要之步驟； 充於前述分離溝之步驟以及復風則述電路元件，並与 去除别述導雷％ 从 之背面直到埴充於俞、+、\ 則迷封裝樹脂露出為止的步㉟ ㈣分離溝的 9.=請專利範圍第8項之㈣裝置之 則彻溝的寬度係形成為150…上 其中， 1 〇.如申請專利範圍第δ項之電路 前述分離溝的寬度係形成大於其深度Γ法，其中， 11. 一種電路裝置之萝止 又 準備導電其特徵係具備： 成-個藉:元在:導”::二成_ 間設置寬卢二:，成凸狀，並在前述單元彼此之 驟； ϋ述弟1分離溝為寬的第2分離溝的步 使前料電圖案與電路元件電性連接之步驟； 以封裝樹脂進行封裝，以覆 奋於前、十、楚；\ ^復盍刖述電路元件，並埴 充於則述弟1分離溝以及第2分離溝之步驟； ’、 去除前述導電猪之背面直到填找笛 、、後以乃今、+、μ 1 、、月j迹乐1分離 溝及則述弟2分離溝的前述封裝樹脂露出為止的步 316193(修正版） 2 .-W'lnhfu.iMiiii mmι_ιιι ttm m me 丨 |T_」-门-门-r -----華**^*_乂，〜..,··π丨·_ _ •丨一 替換頁 »»>·»*，WW»W^ «.__Ifl^M _ 以及 驟 —~ 將填充於前述第2分離、、盖从、， 斷，《藉此分離前述單元之步\的两述封裝樹脂予以切 Ί利範圍第11項之電路裝置之製造方法，其 :。述#2分離溝的寬度係前述第1分離溝的2倍左 13.如申請專利範圍第丨丨 ,. 貝之甩路I置之製造方法，苴 中，W述第1分離溝以及前述筮 八 同的深度。 月』边弟2分離溝係具有大致本 14.如申請專利範圍第n項之電路裝置之製造方法，豆 中，前述第！分離溝的寬度係形成為15〇…上、。 5·Ι=路裝置，其特徵為具備：藉W所形成之 溝而互相分離之導電圖案；電性連接於前述導電圖 :之電路兀件；以及使前述導電圖案之背面露出且覆蓋 刖述電路元件及前述導電圖案之封裝樹脂， 且具有：在相同蝕刻條件了，蝕刻的寬度從較小的 、以變化成較大的寬度時之_深度處，前述分離溝的 淥度不會隨著前述蝕刻的寬度變大而改變的區域， 同時，前述分離溝的寬度係設為前述深度不會改變 之區域的寬度。 其中，將前述分 其中，將前述分 16 ·如申请專利範圍第15項之電路裝置 每隹溝之览度設為150μιη以上。 17 ·如申請專利範圍第15項之電路裝置 離溝之寬度設為等間隔。 316193(修正版） 3, _______^ One-to-one coffee one-one-one 第 \ Patent application No. 93126960 patent application scope revision] a former (September 15th, 1994, 'circuit management, characterized by possession · guidance + PH. Vt 'The conductive pattern is electrically connected to the ^/¥_! pattern' and the front of the #]^$ wrapping element, and the aforementioned conductive patterns are separated from each other by the temple interval. 2.Γΐ=ϊ, The utility model is characterized in that: the circuit component which is separated by the separation groove and electrically connected to the "34 conductive pattern; the sealing resin which is exposed on the back surface of the previous and the second case and covers the conductive pattern and the circuit component, tea and interval = The conductive patterns are connected to each other by the separation trenches, etc., and the circuit device of the first or second aspect of the patent range is 1, wherein the separation distance between the first and the second is between 15 and above. The circuit steps of the second paragraph of the patent circumstance, Ganshan, and the system form a uniform depth. $Lu Yi set 'where ' Xiao Ligou 5 · If the circuit of the first or second application of the patent scope has the aforementioned conductivity The patterns are separated at equal intervals. & The scope of the first item or the second item of the fascination Lei Tongan # 4 clothing set the 'station': the figure is "fixed with the semiconductor element of the die pad, the grain pad and other aforementioned guides (four) case (four) he describes (4) Separate from each other - 7 · If the circuit of the scope of the patent application is set to 6,:: The semiconductor component of the power system. 』1牛¥月豆316193 (Revision) 1 Replacement page I 8 A circuit device for preparing a conductive drop; the feature is characterized in that: the trench is formed by the separation of the conductive layer and the width of the conductive pattern by the separation of the width of the conductive pattern The method of encapsulating the electrical connection of the components of the ^ ^ A circuit is a step of encapsulating the sealing resin, and the steps are required; filling the steps of the separation trench and the re-winding circuit components, and removing the Steps from the back to the 俞, +, \, then the encapsulation resin is exposed. (4) Separation trenches 9.= Please refer to paragraph 8 of the patent scope (4) The width of the trench is formed as 150... , 1 〇. If you apply for the δ item of the patent scope The width of the separation trench is formed to be greater than the depth Γ method, wherein, 11. The circuit device is further prepared to be electrically conductive, and the characteristic system has the following features: ——::::::::::: 2: a convex shape, and the steps of the foregoing units are mutually abrupt; the step of separating the trench 1 into a wide second separation trench to electrically connect the pre-charged electrical pattern to the circuit component; encapsulating with the encapsulating resin, In order to cover the front, ten, and Chu; \ ^ repeat the circuit components, and add to the step of the Shudi 1 separation trench and the second separation trench; ', remove the back of the conductive pig until the fillet, Step 316193 (Revised Edition) 2,-W'lnhfu.iMiiii mmι_ιιι ttm m, after the present, +, μ 1 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Me 丨|T_"-门-门-r -----华**^*_乂,~..,··π丨·_ _ •丨一替换页»»>·»*,WW» W^ «.__Ifl^M _ and —-~ will be filled in the above-mentioned second separation, cover, and break, and the two encapsulating resins which are used to separate the above steps are Lee range Ί circuit device manufacturing method of Paragraph 11, which:. The width of the #2 separation groove is twice as long as the first separation groove. 13. As for the scope of the patent application, the manufacturing method of the 甩 甩 I I I I I I I I I I I I I I I I I I I I I I I I I The depth of the eight. The month of the brothers 2 separation ditch system has roughly the same. 14. The manufacturing method of the circuit device of the nth item of the patent application scope, the bean, the aforementioned! The width of the separation groove is formed to be 15 〇. 5·Ι=路装置, characterized in that: a conductive pattern separated from each other by a groove formed by W; electrically connected to the conductive pattern: a circuit element; and the back surface of the conductive pattern is exposed and covered The circuit component and the encapsulating resin of the conductive pattern have: at the depth of the etching, the width of the etching is changed from a small to a large width, and the separation groove does not follow The region where the width of the etching is changed to be large, and the width of the separation groove is set to be the width of the region where the depth does not change. In the above, the circuit device of the above-mentioned sub-section 16 is set to have a visibility of 150 μm or more per circuit. 17 · Circuit device as claimed in item 15 of the patent scope is set at equal intervals. 316193 (revision) 3 18. 置之製造方法，其特徵 衣面，編刻形成比前述導電落之；二在^電落的 溝，藉此使預定形成之導電圖宰突出=更堯之分離 電路元件電性連接於前述 ^狀之步驟；將 述分離溝以覆蓋前述電路_ # R步n真充於前 步驟；以及將前述導電荡從背面去除直 離溝之前述封裝樹脂露出為正之步驟，@ 、心刀 寬产=!:在相同峨条件下’钱刻的寬度從較小的 听又交化成較大的寬度時之姓刻深度處，前述分離溝的 冰度不t隨著前述姓刻的寬度變大而改變的區域， 同時，前述分離溝的寬度係設為前述深度不會改變 之區域的寬度。 19·如申凊專利範圍第18項之電路裝置之製造方法，其 中，將前述分離溝之寬度設為15〇μιη以上。 20·如申請專利範圍第a項之電路裝置之製造方法，其18. A manufacturing method, characterized in that the clothing surface is formed to form a lower than that of the foregoing conductive; and the second is in the groove of the electric drop, whereby the predetermined formed conductive pattern is protruded = the more discrete separation circuit element is electrically connected to the foregoing a step of forming a separation trench to cover the foregoing circuit _ # R step n is really charged in the previous step; and exposing the aforementioned sealing resin to the front of the package resin directly from the back surface, the step of exposing the package resin to positive =!: Under the same 峨 condition, the width of the money engraved from the smaller one to the greater width, the ice of the separation groove does not increase with the width of the aforementioned surname. The changed area, at the same time, the width of the separation groove is set to the width of the area where the aforementioned depth does not change. The method of manufacturing a circuit device according to claim 18, wherein the width of the separation groove is 15 μm or more. 20. The method of manufacturing a circuit device according to item a of the patent application, 中’將前述分離溝之寬度設為等間隔。 4 316193(修正版）In the middle, the widths of the separation grooves are set to be equal intervals. 4 316193 (revision)
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