1244668 A7 一 __ _ B7 五、發明説明（1 ) 發明領域 本發明係關於一種捲帶式封裝件，特別是關於一種利用 改良之捲帶冗成多晶片模組封裝之封裝件。 發明背景1244668 A7 __ _ B7 V. Description of the invention (1) Field of the invention The present invention relates to a tape and reel package, and more particularly to a package that uses an improved tape and reel to multi-chip module package. Background of the invention
捲帶式封裝是一種已廣泛應用在液晶顯示面板（LCD panel)的驅動元件之封裝方式，其具有線路密實、重量輕 和厚度薄之特性’故利於應用在半導體的封裝製造。圖1 係一習知之捲帶式封裝件所使用捲帶之示意圖。該捲帶i 〇 之外觀類似照相機的膠捲底片，有許多作業單元連續地佈 局在其長帶狀的構造上，靠近捲帶10的兩長邊分別設有多 個孔洞14，該孔洞14係用於嵌合生產之定位傳輸機構（圖 未7F出）。 涘捲Τΐ〇之主要構造包含有兩層物質，一層是可撓性的 膠帶1 1，另一層是由銅箔蝕刻成的線路層，其固定在膠帶 1 1上。上述此種構造與可撓性電路板的形式相似。該線路 層又包s複數個内接合引腳丨2 ( inner Lead Bond ; ILB )及 複數個外接合5丨腳1 3 ( Outer Lead Bond ; OLB )兩個部分， 位於該兩個部分之膠捲丨丨為鏤空型式，即内接合引腳。與 外接合引腳13露出於外，且無膠捲n的固定。圖i顯示兩 個完整的作業單元，該兩個作業單元的線路層係獨立存 在，而其相鄰之外接合引腳13並無電性連接之關係存在。 圖2係習知之捲帶式BGA封裝件，在封，裝件2〇之膠體以 内有捲帶1〇的一個作業單元及晶片21。該晶片21之複數 個鮮塾各具有金凸塊22，利用高熱及高壓將每個金凸塊22 日月光台灣專利^助4(7侧)D〇c 1244668 A7Tape and reel packaging is a packaging method that has been widely used in driving elements of liquid crystal display panels (LCD panels). It has the characteristics of dense circuit, light weight and thin thickness, so it is useful for packaging manufacturing of semiconductors. Figure 1 is a schematic diagram of a tape used in a conventional tape and reel package. The appearance of the tape i 〇 is similar to the film negative of a camera. Many operating units are continuously arranged on its long strip-like structure. The two long sides near the tape 10 are respectively provided with a plurality of holes 14. The holes 14 are used for Positioning transmission mechanism in mosaic production (shown in Figure 7F). The main structure of the roll coil T2O includes two layers, one is a flexible tape 11 and the other is a circuit layer etched from copper foil, which is fixed on the tape 11. Such a construction is similar to the form of a flexible circuit board. The circuit layer includes two parts of inner lead bond (IBB) 2 and outer lead bond 5 (Outer Lead Bond; OLB), which are located in the film of the two parts.丨 is a hollow type, that is, the internal bonding pin. The external bonding pins 13 are exposed to the outside, and there is no fixation of the film n. Figure i shows two complete operation units. The circuit layers of the two operation units exist independently, and there is no electrical connection relationship between the adjacent bonding pins 13 outside. Fig. 2 shows a conventional tape-and-reel BGA package. Within the gel of the package and package 20, there is an operation unit of the tape 10 and the wafer 21. The plurality of wafers 21 each have gold bumps 22, and each gold bump 22 is made of high temperature and high pressure. Taiwan Moonlight Taiwan Patent Assistance 4 (7 sides) Doc 1244668 A7
㈣應之内接合引腳12鎔接在—起，該内接合引腳12表声 具有-鎳金成分之㈣，以㈣和金凸塊22產生业晶: 合。在捲帶式封裝作業的步驟中，係先將整摘捲帶ι〇 = 個晶片21接合完畢後，於内接合引㈣及晶片η之空隙 處點上保護用的絕緣膠2 3，#切開成為個別之作業單元， 且分別接合在基板24的接點27上，該接點27與外接合引 腳13係制銲㈣接結合。在基_的下方設有複數個鲜 球26係作為與外在系統（例如主機板或玻璃基板）之接點 與固定的用途。 簡要說明 本發明之第一目的係提供一種改良的捲帶，可整合相鄰 的兩個作業單元之線路，並擴充與其結合之晶片容量。 本發明之第二目的係提供一種減少封裝件使用基板之線 路層數的方法，降低該基板之製造成本。 為了達到上述目的，本發明提供一種捲帶式封裝件，係 用於製造半導體晶片之封裝件，特別是關於整合並擴充記 憶體晶片的容量。該封裝件採用一改良之捲帶，該捲帶為 連續式之作業單元，相鄰之作業單元藉著連通之線路有電 性連接的關係，如此可整合與該作業單元結合的晶片。 在進行該捲帶之外接合引腳的結合動作時，可一次將至 少兩個已與晶片結合好的作業單元和基板接合在一起，該 至少兩個作業單元因電性連接故可彼此傳遞訊號，如此達 到容量或功能擴充的目的。 凰簡單說明 h:\hu\lGC\日月光台灣專利·Κ274(745叫意 一 5 _ Α4規格—Χ297公愛）---- 1244668 A7 B7 五、發明説明（3 本發明將依照後附圖式來說明，其中： 圖1係一習知之捲帶式封裝件所使用捲帶之示意圖； 圖2係一習知之捲帶式B 〇 a封裝件； 圖3係本發明之捲帶式封裝件所使用捲帶之示意圖；及 圖4係本發明之捲帶式封裝件。 元件符號說明 10 習知之捲帶 11 膠帶 12 内接合引腳 13 外接合引腳 14 孔洞 20 習知之封裝件 2 1 晶片 22 金凸塊 23 絕緣膠 24 基板 25 膠體 26 銲球 27 基板之接點 3 0 本發明之捲帶 3 1 膠帶 3 2 内接合引腳 33 外接合引腳 34 孔洞 3 5 連通線路 40 本發明之封裝件 4 1 弟一晶片 42 第二晶片 43 基板之接點 44 基板 45 絕緣膠 46 金凸塊 例說明 捲本—發明之捲帶式封裝件所使用捲帶之示意圖，該 p. I 構物’其包含膠帶3卜銅線路層與 防鮮漆（或稱為綠漆）。捲帶3〇的寬度有三種主要：規 L 酿咖月光台灣專利US助魏w 1244668 A7 B7The internal bonding pin 12 should be connected at the same time, and the internal bonding pin 12 has a sound of nickel-gold composition, and the crystal and the gold bump 22 are produced. In the step of the tape and reel packaging operation, firstly, the whole tape is removed, and the wafer 21 is bonded. Then, the insulating adhesive 2 3, # is cut at the gap between the inner bonding lead and the wafer η. It becomes an individual operation unit, and is respectively bonded to the contact 27 of the board | substrate 24, and this contact 27 and the outer bonding pin 13 are soldered together. A plurality of fresh balls 26 are provided below the base plate for use as contacts and fixing with external systems (such as a motherboard or a glass substrate). Brief description The first object of the present invention is to provide an improved tape and reel, which can integrate the wiring of two adjacent operation units and expand the capacity of the wafer combined with it. A second object of the present invention is to provide a method for reducing the number of circuit layers of a substrate used by a package, and reducing the manufacturing cost of the substrate. In order to achieve the above object, the present invention provides a tape and reel package, which is used for manufacturing a semiconductor wafer package, and particularly relates to integrating and expanding the capacity of a memory wafer. The package adopts an improved tape. The tape is a continuous operation unit. Adjacent operation units are electrically connected through the connected lines, so that the chip combined with the operation unit can be integrated. When performing the bonding action of the bonding pins outside the tape, at least two working units and the substrate that have been bonded to the wafer can be bonded together at a time, and the at least two working units can transmit signals to each other due to electrical connection. , So as to achieve the purpose of capacity or function expansion. Brief description of the Phoenix: h: \ hu \ lGC \ Sun Moonlight Taiwan Patent · K274 (745 means one 5 _ A4 specification-X297 public love) ---- 1244668 A7 B7 V. Description of the invention (3 The invention will be based on the following drawings For illustration, FIG. 1 is a schematic diagram of a tape used in a conventional tape and reel package; FIG. 2 is a conventional tape and reel B oa package; and FIG. 3 is a tape and reel package of the present invention. 4 is a schematic view of a tape and reel package according to the present invention. Component symbol description 10 Conventional tape 11 Tape 12 Inner bonding pin 13 Outer bonding pin 14 Hole 20 Conventional package 2 1 Wafer 22 Gold bumps 23 Insulating glue 24 Substrate 25 Gel 26 Solder balls 27 Contacts of the substrate 3 0 Tapes of the present invention 3 1 Tape 3 2 Inner bonding pins 33 Outer bonding pins 34 Holes 3 5 Connecting lines 40 Packaging of the present invention Piece 4 1 First wafer 42 Second wafer 43 Substrate contacts 44 Substrate 45 Insulating adhesive 46 Gold bumps Explaining the volume—the schematic diagram of the tape used in the tape and reel package of the invention, the p. I structure ' It contains tape, 3 copper circuit layers and anti- Paint (or masking) the width of the tape There are three main 3〇: Regulation L brewing coffee moonlight Taiwan Patent US Wei w 1244668 A7 B7 co
格：30mm、4 8mm及7〇mm。膠帶31之材質為高分子聚 合物，一般多使用玻璃轉換溫度較高的聚乙醯胺 (polyimide)，其厚度約為〇.125mm。鋼線路層係做為晶 片與外在基板的訊號連接之傳輸途徑，其厚度主要有三 種：18/zm、25"m 及 35#ιη。 該銅線路層包含三個主要的部分，分別為内接合引腳 3 2、外接合引腳3 3及連通線路3 5。複數個内接合引腳3 2 直接和晶片上的金凸塊鎔接結合，而外接合引腳3 3是和外 在基板的接點接合在一起。本發明之特徵是在不同之作業 單元的外接合引腳33間設一連通線路35，該連通線路35 可依照晶片之凸塊接點的功能特性選擇需要連接之外接人 引腳3 3。舉例而言，該晶片若為記憶體晶片，可以將其負 責位址匯流排（address bus )及控制匯流排（c〇ntr〇1 bus )的 相關外接合引腳33並聯實施，而負貴資料匯流排（如“ bus)的相關外接合引腳33則仍保持獨立。如此線路之安排 可整合不同晶片之相同功能的區塊，而達到擴充記憶體之 容量的目的。 圖4係本發明之捲帶式封裝件。其中該捲帶3〇之以一連 通線路3 5連接之兩個作業單元被擴取出。該兩個單元各有 一第一晶片4 1及第二晶片4 2，分別與内接合引腳3 2接 合’並有絕緣膠45覆蓋在該内接合引腳32之範圍，其外接 合引腳33與基板44對應之接點43結合。基板44之上表面 可以覆蓋膠體，而基板44之下表面設有複數個接點可與鮮 球結合。該基板4 4也可以被一記憶體模組用的電路板或玻 H:\HU\LGC\ 日月光台灣專利认5£幻74(74501 ).DOC — 1 一 本紙^^^適㈤巾B ®家標準(CNS) A4規格(21GX297公釐） 一 --------- 358 1244668 A7 ____— B7 五、發明説明（5 ) 璃基板取代’同時將八個或更多電路彼此相連的作業單元 與遠電路板結合，在晶片上與需要保護線路之區域覆蓋膠 組即可成為電腦所使用的記憶體模組。該電路板之部分線 路功能已被捲帶3 〇之線路層所取代，故可減少該電路板之 線路層數目’或者增加該電路板可讀取的晶片容量。如圖 3所7F ’僅相鄰之兩個作業單元有電路連接的關係，但本 發明並不受此限，使用者仍可以依需求目的及限制條件而 設計連通線路，使連續數個作業單元有電路連接的關係。 本發明之技術内容及技術特點巳揭示如上，然而熟悉本 項技術之人士仍可能基於本發明之教示及揭示而作種種不 背離本發明精神之替換及修飾。因此，本發明之保護範圍 應不限於實施例所揭示者，而應包括各種不背離本發明之 替換及修飾，並為以下之申請專利範圍所涵蓋。 H:\HU\LGC\日月光台灣專利认5£1<：274(745〇】) D〇c 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐）Grid: 30mm, 48mm and 70mm. The material of the adhesive tape 31 is a high molecular polymer. Generally, polyimide with a high glass transition temperature is used, and its thickness is about 0.125 mm. The steel circuit layer is used as a transmission path for the signal connection between the wafer and the external substrate. There are three types of thickness: 18 / zm, 25 " m, and 35 # ιη. The copper circuit layer includes three main parts, which are an inner bonding pin 3 2, an outer bonding pin 3 3 and a connecting line 35. The plurality of inner bonding pins 3 2 are directly bonded to the gold bumps on the wafer, and the outer bonding pins 3 3 are bonded to the contacts of the external substrate. The present invention is characterized in that a communication line 35 is provided between the external joint pins 33 of different operation units, and the communication line 35 can be selected according to the functional characteristics of the bump contacts of the chip to be connected to external access pins 33. For example, if the chip is a memory chip, the relevant external bonding pins 33 responsible for the address bus (control bus) and the control bus (c0ntr〇1 bus) can be implemented in parallel, and the valuable data The related external bonding pins 33 of the bus (such as "bus") remain independent. In this way, the arrangement of the circuit can integrate the same functional blocks of different chips to achieve the purpose of expanding the memory capacity. Figure 4 is the invention Tape-and-reel package. The two working units connected to the tape 30 by a connecting line 35 are expanded. The two units each have a first wafer 41 and a second wafer 42, respectively. Bonding pins 3 2 are bonded, and an insulating glue 45 covers the range of the inner bonding pins 32, and the outer bonding pins 33 are combined with the contacts 43 corresponding to the substrate 44. The upper surface of the substrate 44 may be covered with a gel, and the substrate The lower surface of the 44 is provided with a plurality of contacts that can be combined with fresh balls. The substrate 44 can also be used by a circuit board or a glass for a memory module. H: \ HU \ LGC \ Sun Moonlight Taiwan Patent 5 £ 幻 74 ( 74501) .DOC — 1 piece of paper ^^^ Compatible Towel B ® Standard (CNS) A4 Grid (21GX297 mm) I --------- 358 1244668 A7 ____ — B7 V. Description of the invention (5) Glass substrate replaces' Operating unit and remote circuit board that connect eight or more circuits to each other at the same time In combination, covering the rubber group on the chip and the area where the circuit needs to be protected can become a memory module used by the computer. Part of the circuit function of the circuit board has been replaced by the circuit layer of the tape, so the circuit can be reduced. The number of circuit layers of the board 'or increase the chip capacity that can be read by the circuit board. As shown in Figure 7F 7F' only two adjacent operating units have a circuit connection relationship, but the invention is not limited to this, the user still The connection line can be designed according to the requirements and restrictions, so that several consecutive operating units have a circuit connection relationship. The technical content and technical characteristics of the present invention are disclosed above, but those familiar with the technology may still be based on the teachings of the present invention. Various changes and modifications are made without departing from the spirit of the present invention. Therefore, the protection scope of the present invention should not be limited to those disclosed in the embodiments, but should include various alternatives without departing from the present invention. And modification, and it is covered by the following patent application scope: H: \ HU \ LGC \ Sun Moonlight Taiwan Patent Recognition 5 £ 1 <: 274 (745〇)) D〇c This paper size applies Chinese National Standard (CNS) A4 specifications (210 X 297 mm)