TWI227629B - Method and related processing circuits for reducing memory accessing while performing de/compressing of multimedia files - Google Patents
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1.…一2_號 92134163 车 q 〇 修 ίΕ 五、發明說明^ " ------丄 " 【技術領域】 $ ^月提供一種在壓縮/解壓縮多媒體檔案時減少對記憶 、:子取之方法與相關裝置,尤指一種以避免零值頻域資 料之存取來減少記憶體存取之方法及相關裝置。 【先前技術】 由,訊號感測、處理技術的發展與進步,不論靜態影像 或是動態影音資訊,都已經能在低失真的情況下,以電 子(尤其是數位)訊號的形式加以保存、處理、傳輪。 不過’一般來說,包含各種影音資訊的多媒體檔案,其 檔案大小都相當大,勢必要經過適當地壓縮處理,才能 方便地保存、傳輸。對應地,壓縮過後的多媒體檔案則 要經過解壓縮的處理才能播放。其中,在多媒體檔案中 的影像資料,由於其富含高維度的資料(包括二維影像 及/或時間軸上的變化),將其壓縮/解壓縮的過程也特 別耗費系統資源。因此,如何以高效能、低成本的方式 來壓縮/解壓縮多媒體檔案中的影像資料,也就成為現代 資訊廠商研發的重點。 請參考圖一。圖一示意的是典型影像壓縮的概略流程 (像是Μ P E G規格下的壓縮流程,Μ P E G即Μ 〇 t i ο η P i c t u r e E xp e r t G roup)。如熟知技術者所知,影像壓縮可視為 一種將影像資料編碼的過程,解壓縮也就對應地成為—1.… 一 -2_ 号 92134163 车 q 〇 修 ίΕ V. Description of the invention ^ " ------ 丄 " [Technical Field] $ ^ month provides a way to reduce memory, compress and decompress multimedia files, : Sub-fetching method and related device, especially a method and related device for reducing memory access by avoiding access to zero-value frequency-domain data. [Previous technology] As a result, the development and progress of signal sensing and processing technology, regardless of still images or dynamic video and audio information, can be stored and processed in the form of electronic (especially digital) signals with low distortion. , Pass. However, generally speaking, multimedia files containing various audio and video information have a fairly large file size, and they must be appropriately compressed to be easily saved and transmitted. Correspondingly, compressed multimedia files can only be played after being decompressed. Among them, because the image data in multimedia files is rich in high-dimensional data (including 2D images and / or changes on the time axis), the process of compressing / decompressing them also consumes system resources. Therefore, how to compress / decompress the image data in multimedia files with high performance and low cost has become the focus of research and development by modern information manufacturers. Please refer to Figure 1. Figure 1 shows the outline of a typical image compression process (such as the compression process under the MPPE specification, MPPE is M o t i ο η p i c t u r e E xp e r t G roup). As known to those skilled in the art, image compression can be regarded as a process of encoding image data, and decompression accordingly corresponds to—
^1211629 Λ_Κ. 五、發明說明(2) 種解,的過程。如圖一所示意的,一動態的影像資料Μ (像是,,、動晝)可視為多幅靜態晝面Α卜Α2、A3、 Α4、A等的組合;隨時間改變而展現不同的晝面,動 態影像資料Μ就能呈現為動態的影像。為了要有效提高壓 縮率’在對影像資料Μ進行壓縮編碼時,可先在流程1 〇進 行一晝面間差異偵測/編碼(i n t r a — c 0 d i n g),分析各晝面 間的差異;再針對流程1 〇的結果,在同一晝面中進一步 進行編碼(即inter-coding),也就是流程12。 如熟知技術者所知,在呈現一連續動作的一段動態影像 中,其實各晝面間的差異並不大。舉例來說,在圖一 中,由畫面Al、A2、A3組成的這一段動態影像,是要呈 現一個物體0 j在同一背景Bk中移動的動態;除了物體〇 j 的位置會在不同畫面間改變之外,背景Bk的影像變化並 不大。在流程1 〇中,即可進行一動態偵測(mo t i on detection),比較各畫面間相同與相異的部份。以圖一 中的例子來說,對晝面A卜A2進行動態偵測,就可大致 分析出物體0 j之影像是在移動的,而背景B j的影像是不 動的;另外,也可計算出一向量V1 2來代表物體〇 j之影像 在畫面上移動的方向與距離。換句話說,將畫面A1中物 體0 j的影像沿著向量V1 2移動(稱為動態補償),大致上 就可得到畫面A2的情形。將晝面A1中物體〇 j•的影像沿著 向量V 1 2移動後所形成之影像,可稱作一預測畫面P2 (未 示於圖一),當作是對晝面A 2的推測結果。當然’此預 測畫面P2不一定會和實際的晝面A2完全吻合(譬如說物^ 1211629 Λ_Κ. V. Description of the invention (2) Process of solution. As shown in Figure 1, a dynamic image data M (such as,, and moving day) can be regarded as a combination of multiple static day surfaces Ab A2, A3, A4, A, etc .; showing different daylight with time On the other hand, the moving image data M can be presented as a moving image. In order to effectively improve the compression ratio, when compressing and encoding the image data M, a day-to-day difference detection / encoding (intra-c 0 ding) can be performed in the process 10 to analyze the difference between the day-to-day differences; For the result of the process 10, further encoding (ie, inter-coding) is performed in the same day, that is, process 12. As is known to those skilled in the art, in a section of moving image showing a continuous action, in fact, the difference between the day and the day is not large. For example, in Figure 1, this dynamic image composed of frames Al, A2, and A3 is to show the dynamics of an object 0 j moving in the same background Bk; except that the position of object 0j will be between different frames. Beyond the changes, the background Bk image does not change much. In the process 10, a motion detection (mo t i on detection) can be performed to compare the same and different parts between the pictures. Taking the example in Figure 1, for example, by performing dynamic detection on the day surface A and A2, it can be roughly analyzed that the image of the object 0 j is moving, and the image of the background B j is stationary; in addition, it can also be calculated A vector V1 2 is generated to represent the direction and distance of the image of the object 0j moving on the screen. In other words, by moving the image of the object 0 j in the picture A1 along the vector V1 2 (called motion compensation), roughly the picture A2 can be obtained. The image formed by moving the image of the object 0j • in the diurnal plane A1 along the vector V 1 2 can be called a prediction picture P2 (not shown in Figure 1), which is regarded as the result of the estimation of the diurnal plane A 2 . Of course ’this predicted picture P2 may not exactly match the actual daytime face A2 (such as objects
第8頁 〈I22f _,: 案號敗134163_年月曰 修正___ 五、發明說明(3) 體〇j的反光在晝面A卜A2間可能有細微的變化等等), 但兩者間的差異應該不大,故可將此預測畫面P2和實際 的晝面P 2相減,得到一差異晝面D 1 2。也就是說,將晝面 A1經過動態補償後再加上差異畫面!) 1 2,就可得到晝面 A2°這就代表畫面Al、A 2兩者的所有影像資訊可由晝面 A1、向量VI 2及差異晝面D1 2來涵蓋;而由於預測晝面P2 及晝面A2間的差異不大,差異晝面!) 12包含的影像資訊也 不多’就可以進行較大程度的壓縮,等效上也就是對晝 面Al、A2進行壓縮。 ~ 畫面A2及對應 A卜A 2、A 3這 由晝面A1、差 荨效上就是對 當然,影像資 像是畫面A 4、 景中移動的片 ί尤不必對晝面 外進行動態偵 片段進行流程 根據相同的道理,圖一中的畫面A3也可由 的向量V23、差異晝面])23來取得,而畫面 一系列影像所組成的動態影像片段,就能 異晝面D12、D2 3及向量vi2、V2 3來代表, 這丰又動悲影像片段進行了第一重的壓縮。 料Μ中可能包括有許多不同的不相關片段, A5可能是完全不同的物體在完全不同的背 段,故晝面A4與晝面A3的差異甚大,此 A3、A4進行動態偵測,而可針對A4、八5另 測,以對晝面A4、A5這一系列的動態影像 1 0之壓縮。 m 在流程1 0中針對晝 行至流程1 2,針對 像在圖一中,晝面 面間的差異進行壓 畫面或差異晝面分 Al、Α4與差異畫面 縮/編碼後,就可進 別進行壓縮/編碼。 Dl2、D23及 D45都能Page 8 "I22f _: Case No. 134163_ Years and Months Amendment ___ V. Description of the invention (3) The reflection of the body 0j may have slight changes between the day and day A and A2, etc.), but both The difference between them should be small, so this predicted picture P2 can be subtracted from the actual daytime plane P2 to get a difference daytime plane D 1 2. In other words, add the difference screen after dynamic compensation of the day surface A1! ) 1 2 can obtain the daytime plane A2 °, which means that all the image information of the pictures Al, A 2 can be covered by the daytime plane A1, the vector VI 2 and the difference daytime plane D1 2; and because the predicted daytime plane P2 and daytime The difference between faces A2 is not big, the difference is day and night! ) 12 contains a small amount of image information ', so it can be compressed to a large degree, which is equivalent to compressing Al and A2 in the daytime. ~ Picture A2 and corresponding A1 A2, A3 This is correct by the daytime surface A1, the difference is of course, the image data is like the picture A4, the moving picture in the scene does not need to perform dynamic detection clips outside the daytime surface According to the same reason, the picture A3 in Figure 1 can also be obtained by the vector V23, the difference day surface]) 23, and the dynamic image segment composed of a series of images on the picture can be the day surface D12, D2 3 and The vectors vi2 and V2 3 represent the first and the second image compression. Material M may include many different irrelevant segments. A5 may be completely different objects in completely different back segments. Therefore, the difference between daytime surface A4 and daytime surface A3 is very large. This A3 and A4 are used for dynamic detection and can be For A4 and A5, another test is performed to compress the series of dynamic images A4 and A5 in the daytime. m In the process 10, for the day to process 12, for the difference between the day and the surface, as shown in Figure 1, press the screen or the difference between the day and the day, Al, A4, and the difference screen are reduced / encoded, then it can be distinguished. Compression / encoding. Dl2, D23 and D45 all
第9頁 122▼碰 「羞號 92134163 年 月_Θ_修正Page 9 122 ▼ Touch "Shame 92134163 Month _Θ_ Correction
五、發明說明(4) 再進行壓縮,以增加壓縮率。至於流程1 2中所要進行的 步驟,請繼續參考圖二。圖二即為流程1 2中進行壓縮/编 碼的流程示意圖。要將一晝面A (可以是晝面A卜A4或矣 異畫面D 1 2、D 2 3等等)進一步壓縮時,可先將畫面A分割 成複數個小區塊B,各區塊B (b 1 〇 c k)由複數個像素B i 组 合而成。對每一區塊B分別進行二維的頻域轉換(像是離 散餘弦轉換,Discrete Cosine Transform,DCT)所得 到的輸出資料,也就是包括有複數個資料元素C i j之頻威 資料陣列C。換句話說’各資料元素C i j就代表區塊B在頻 域之分量。而對各資料元素C i j量化所得之資料元素 Q i j,就能組成量化後之頻域資料陣列Q (也就是一頻域 陣列)。將二維資料陣列Q中的每個資料元素Q丨j依照一 特定的順序排列為一序向的一維資料陣列S,即為串流化 掃描。資料陣列s在經過一浮動長度編碼(running length coding)可得另一個一維的資料陣列R。將資料陣 =R再經過霍夫曼編碼(Hoffman c〇ding),就能得到一資 二2 L ΐ合各區塊_別對應的資料陣列H,就能完成 對畫面A的編碼。 入 Ϊ Ϊ程i2進行的步驟中,由於各區塊雎是晝面A的一小 ΐΐ 2二ΓίΓ的各個像素Bij,其值應該也相i 頻個拽\ ΐ將區塊B進打頻域轉換及量子化之後,代表古 頻頻域分里的資料元素c i〗與Q 代表间 T的極小值),也就是說,頻域資料二零^;; (咖⑴)的陣列。連帶地,在將資料陣列Q掃^排列稀為&一5. Description of the invention (4) Compression is performed to increase the compression ratio. As for the steps to be performed in the process 12, please continue to refer to FIG. Figure 2 is a schematic diagram of the compression / encoding process in Process 12. To further compress the diurnal plane A (can be the diurnal plane A1 or A4 or the strange pictures D 1 2, D 2 3, etc.), first divide the picture A into a plurality of small blocks B, each block B ( b 1 ck) is a combination of a plurality of pixels B i. For each block B, the output data obtained by performing a two-dimensional frequency domain transformation (such as discrete cosine transform (DCT)) is a frequency data array C including a plurality of data elements C i j. In other words, each data element C i j represents the component of block B in the frequency domain. The data element Q i j obtained by quantizing each data element C i j can form a quantized frequency domain data array Q (that is, a frequency domain array). Each data element Qj in the two-dimensional data array Q is arranged into a one-dimensional one-dimensional data array S in a specific order, which is a streaming scan. The data array s can obtain another one-dimensional data array R after running length coding. The data array = R is then Hoffman coding (Hoffman coding), we can get a data 2 L combined with each block _ different corresponding data array H, and can complete the coding of the picture A. In the process performed by the process i2, since each block 雎 is a small pixel Bij of the daytime plane A, the value of the pixel Bij should also be dragged from time to time. After conversion and quantization, it represents the data element ci in the ancient frequency-frequency domain and Q represents the minimum value of T), that is, an array of frequency-domain data 2020; Increasingly, the data array Q is arrayed as &
第10頁 mmm'. 修正Page 10 mmm '. Corrections
以m::陣,中的資料元素“(各等於-浮動長产編碼护 有^許多個為零。在對資料陣列S進行 值資料ί素的:數合m資料元素以之間所包含的零 舉例來說,在苹一’以壓縮資料陣列s的長度。 s ]之間有π)個L C素s 1和i 一非零資料元素 過浮動長度編碼,來二表i fS :二,70素s j就可經 束這樣就零 號 921341 防 五、發明說明(5) R,其位貝元長VLt: J J巧長度編碼,得f的資料陣列 料陣列R的位元長度就1 H,在,過隹夫曼編碼後,資 H。將每一區塊t壓缩後曰所曰進一/壓f而成為資料陣列 得到晝面A壓縮後之^\所^\資/斗陣/彳眯合起來,就可 %伋<、、。果,成為壓縮後之多媒體檔案。 “行ί ” ΐ: J f 〇資:為靜態的影像資料,也就不 流程i2(像是JPEG規格的資料進行 案進行解壓縮時,ίΞ壓i的!;=縮後”、媒體檔 之反向流程。壓縮後多蛘體二二土2疋i縮流程 ^ t ,,, s 反掃描),對資料陣列Q進 貝寸平^ ^ 了知為 後可得到頻域資料陣列^^ = j deqUantlzation) 換(像是逆離散餘弦&再=料陣/JC進行逆頻域轉 transform,ΤΠΓΤ、」吳 ^nverse d 1 screte c〇sine ’就能得到區塊B ;組合不同的區塊b 國Take the data elements in m :: array, "(each equals-floating long-term code protection, and many of them are zero. When performing value data on the data array S, the number: For example, in Ping Yi's compressed data array s length. There are π) LC primes s 1 and i a non-zero data element over-floating length encoding, to two tables i fS: two, 70 The prime sj can be bundled with zero number 921341. Fifth, the description of the invention (5) R, the bit length is VLt: JJ length encoding, the bit length of the data array material R obtained by f is 1 H, After Huffman coding, the data H. Compress each block t by one / press f to become the data array after the day surface A is compressed ^ \ 所 ^ \ 资 / 斗 阵 / 阵 合When you get up, you can% < ,, ..., and become a compressed multimedia file. "行 ί" ΐ: J f 〇 Assets: It is static image data, so it does not flow i2 (such as JPEG specifications) When decompressing a file, compressing i !; = shrinking ", the reverse process of the media file. Compressed multi-body two-soil 2 shrinking process (t, ,, s anti-scan) After knowing the data array Q ^ ^ ^ ^ know that you can get the frequency domain data array ^^ = j deqUantlzation) transformation (such as inverse discrete cosine & then = material array / JC inverse frequency domain transform, TΠΓΤ, "Wu ^ nverse d 1 screte c〇sine 'can get block B; combine different block b countries
第11頁 1遞簡9 曰 修正 ^1^92134163 五、發明說明(6) 1 尤 ^ 至丨丨 | 可$ :^面A。若原來的影像資料為動態影像資料,就 二=、口,f晝面進行對應的動態補償(也就是圖一中流程 . 斤),以組合出原來的動態影像資料,達到解 壓細(解碼)的目的。 請參考圖 圖;處理 就是影像 處理單元 一頻域轉 及一内部 單元14用 實現直接 能,使處 外部記憶 中的流程 而在進行 用來實現 反量化模 列還原為 面。為 2 0本身也 所需的資 二。圖三為一習知處理電路2 0功能方塊的示意 ,路2 0即用來處理影像資料的壓縮/解壓縮(也 資料的編碼/解碼)。處理電路2 0中設有一中央 1 4、一記憶存取模組i 6、一動態估計模組i 8、 換/量化模組22、一逆頻域轉換/反量化模組24 記憶體2 8 (像是隨機存取記憶體)。中央處理 來主控處理電路2 0的運作,記憶存取模組丨6可 記憶存取(direct memory access,DMA)的功 理電路2 0能直接存取一外部記憶體2 6 (像是由 體26中載入待壓縮的影像資料)。在進行圖一 1 0時,動態估計模組1 8可用來進行動態估計; 圖一中的流f 1 2時,頻域轉換/量化模組22即可 頻域轉換、,化等過程。相對地,逆頻域轉換/ 組24則可將壓縮後多媒體檔案中的一維資料 對應的=維^塊,以解壓縮(解碼)得到各個 了支援處理電路20中各模組之賀你 :j 個 外有一内部記愔體2 8,用十運作’处理電路 汉有円I ^體28,用來暫存各模組運作時 料。 (編 舉例來說,在窖夫處里電路2 0進行影像資料的壓縮 .:· 1 { - '一 'ν· *ί V ¥ .-·:-V j 1號 92134163 :ί2·關Page 11 1 Reduction 9 Revision ^ 1 ^ 92134163 V. Description of the Invention (6) 1 Especially ^ to 丨 丨 | Available $: ^ 面 A. If the original image data is dynamic image data, the corresponding dynamic compensation (ie, the process in Figure 1) is performed on the two planes, f, and f, to combine the original motion image data to achieve decompression (decoding). the goal of. Please refer to the figure; the processing is the image processing unit, a frequency domain conversion and an internal unit 14 to achieve direct performance, so that the process in the external memory is being used to implement the inverse quantization model to restore the surface. The resources required for 20 itself are also two. Figure 3 is a schematic diagram of the functional block of a conventional processing circuit 20, and the channel 20 is used to process the compression / decompression of the image data (also the data encoding / decoding). The processing circuit 2 is provided with a central 14, a memory access module i 6, a dynamic estimation module i 8, a conversion / quantization module 22, an inverse frequency domain conversion / inverse quantization module 24, and a memory 2 8 (Like random access memory). The central processing is used to control the operation of the processing circuit 20, and the memory access module 6 can be used for direct memory access (DMA). The power circuit 2 0 can directly access an external memory 2 6 (such as by The image data to be compressed is loaded into the body 26). When performing FIG. 10, the dynamic estimation module 18 can be used to perform dynamic estimation. When the stream f 1 in FIG. 1 is used, the frequency domain conversion / quantization module 22 can perform frequency domain conversion, conversion, and other processes. In contrast, the inverse frequency domain conversion / group 24 can decompress (decode) the one-dimensional data corresponding to the one-dimensional data in the compressed multimedia file to obtain each module in the support processing circuit 20: There is an internal memory body 2 8 outside the j pieces, and a processing circuit with ten operations is used. The body 28 is used to temporarily store the operating time of each module. (Edit For example, the circuit 20 performs image data compression in the cellphone office.:·1 {-'一' ν · * ί V ¥ .- ·: -V j 1 92134163: ί2 · guan
五、發明說明(7) 碼^時,頻域轉換/量化模組22會將各畫面的區塊β (浐 一併參考圖二)轉換/量化為二維的資料陣列Q,而此^ 料陣列Q的各個資料元素Q i j就會被——寫入(错存)至 内部記憶體28。等到要進行串流化掃描時,此資料陣列 的各個資料元素又會由内部記憶體28中被依序讀取出 來’形成一維資料陣列S,再進行後續的編碼過程。 由以上描述可知,在習知處理電路2 〇中,需要對内部記 憶體2 8進行頻繁的存取。由圖一、圖二可知,一影像資 料Μ可能會包括有許多晝面a,一晝面a中又有許多區塊 B各^區塊B有其對應的頻域資料陣列Q。在習知處理電路 2 0進仃影像壓縮時,每一個資料陣列Q中的每一個資料元 素Ql j都要一一被儲存至内部記憶體28中,而在進行串流 =掃描時,^要將每一個資料元素Qi〗依序一 一讀出。事 二上,就如前面討論過的,其實頻域資料陣列Q很有可能 ^二=稀疏矩陣,大部分的資料元素Qi〗都是零,這也就 ^ ^ ,度編碼能將陣列S縮短的原因;因為浮動長度編 二1, ^貝料陣列[口、需記錄零值資料元素的個數,不需在 二枓陣列R中一 一陳列這些零值資料元素。然而,在習知 二=電路2 0於内部記憶體2 8中存取資料陣列Q時,卻沒有 乂佳的方法來利用此一稀疏矩陣的特性,還是只能-- ^取各個貧料元素Q i j。這也使得習知處理電路2 0在編 ^ /解碼的過程中需要對其内部記憶體2 8進行頻繁的資料 I取1其所佔用的記憶體資源無法有效減少。若要實現 向速壓縮/解壓縮的功能,習知處理電路2 0就要使用高頻V. Description of the invention (7) When the code is ^, the frequency domain conversion / quantization module 22 will convert / quantize the block β (refer to Figure 2) of each picture into a two-dimensional data array Q, and this data Each data element Q ij of the array Q will be written into (stored in) the internal memory 28. When a streaming scan is to be performed, each data element of the data array will be sequentially read out from the internal memory 28 to form a one-dimensional data array S, and then the subsequent encoding process is performed. As can be seen from the above description, in the conventional processing circuit 20, frequent access to the internal memory 28 is required. It can be known from Figures 1 and 2 that an image data M may include many diurnal planes a, and a diurnal plane a may have many blocks B. Each block B has its corresponding frequency domain data array Q. When the conventional processing circuit 20 performs image compression, each data element Ql j in each data array Q is stored in the internal memory 28 one by one, and when streaming = scanning, it is necessary to Read each data element Qi sequentially one by one. In fact, as discussed earlier, in fact, the frequency domain data array Q is very likely ^ 2 = sparse matrix, most of the data elements Qi are zero, which is ^ ^, the degree encoding can shorten the array S The reason is that because the floating length is edited, the number of zero-valued data elements needs to be recorded. It is not necessary to display these zero-valued data elements one by one in the two-dimensional array R. However, there is no good way to take advantage of the characteristics of this sparse matrix when the data array Q is accessed in the internal memory 2 8 by the circuit 2 0. It is still only possible to-^ Q ij. This also makes the conventional processing circuit 20 need to perform frequent data on its internal memory 28 during the encoding / decoding process. Taking 1 as its memory resource occupied cannot be effectively reduced. In order to achieve the function of speed compression / decompression, the conventional processing circuit 20 needs to use high frequency
第13頁 92134163 _η 曰 修正 五、發明說明(8) 寬(也就是單位時間内能存取較多資料)的内部記憶 體,使其電路設計、製造的成本無法減少。 内容 因此,本發明之主要目的,即是利用頻域資料陣列為 稀疏矩陣之特性,提出一種能在影像資料壓縮/解壓縮過 程中減少對内部記憶體存取次數的方法及相關裝置,以 減少壓縮/解壓縮過程中所需佔用的記憶體資源,克服習 知技術的缺點。 在本發明之較佳實施例中,係以一個可由平移暫存器 實現的暫存模組來暫存一二維的位元平面(b i t ρ 1 a n e )作 為一二維參考陣列,此一位元平面的每一個位元各對應 於頻域資料陣列的一個資料元素,用來代表該資料元素 之值是否為零。 在本發明進行影像資料壓縮的過程中,當頻域陣列資 料的每一個資料元素逐一被量化而要儲存於内部記憶體 時,就可連帶地將其是否為零之狀態記錄至位元平面 中;而只有非零值之量化頻域資料元素會被實際儲存於 内部記憶體中,零值之量化頻域資料元素就不必被實際 儲存至内部記憶體。 對應地,當要進行串流化掃描時,本發明之技術就可根Page 13 92134163 _η Name Amendment V. Description of the invention (8) The internal memory with a wide width (that is, more data can be accessed per unit time) makes it impossible to reduce the cost of circuit design and manufacturing. Therefore, the main object of the present invention is to propose a method and related device that can reduce the number of accesses to internal memory during the compression / decompression of image data by utilizing the characteristics of the frequency domain data array being a sparse matrix. The memory resources required during the compression / decompression process overcome the shortcomings of the conventional technology. In a preferred embodiment of the present invention, a two-dimensional bit plane (bit ρ 1 ane) is temporarily stored as a two-dimensional reference array by a temporary storage module implemented by a translation register. Each bit of the meta-plane corresponds to a data element of the frequency domain data array, and is used to represent whether the value of the data element is zero. In the process of compressing image data in the present invention, when each data element of the frequency domain array data is quantized one by one and is to be stored in the internal memory, the state of whether it is zero or not can be recorded in the bit plane together. ; Only non-zero-valued quantized frequency-domain data elements are actually stored in the internal memory, and zero-valued quantized frequency-domain data elements do not have to be actually stored in the internal memory. Accordingly, when streaming scanning is to be performed, the technology of the present invention can be
第14頁 "12齡 P9; 丨着號92134163 五、發明說明(9)Page 14 " 12-year-old P9; 丨 Number 92134163 V. Description of the invention (9)
據位元平面來判斷某一資料 讀出。若某一資料元素在位 料元素為零,就不必實際地 元素。另一方面,在根據串 元平面之位元時,也可檢查 為零。若所有未被讀取之資 結束串流化掃描,同時也結 於量化頻域資料陣列多半是 可能只要進行到某一程度, 元素讀出。而本發明即可利 一頻域陣列資料的串流化掃 記憶體的存取。 元素是否要由内部記憶體中 元平面對應之位元代表該資 由該内部記憶體讀取該資料 流化掃描之順序逐一檢查位 未被讀取之資料元素是否皆 料元素皆為零,就可以直接 束對内部記憶體的存取。由 稀疏矩陣,串流化掃描拫有 就已經將所有的非零值資料 用此一特性,快速地完成對 描,也可以大幅減少對内邙 料陣同列理反,掃在描本為發二 面,並根據位;枓:列時:即可建立位元平貝 資料陣列實際寫入 “判斷疋否要將二維頰埤 ϊΐίΐΐ是據位元平面中的位元來檢查交Ϊ; 素疋否皆為零’來簡化逆頻域轉換之運算。’ 換句話說,Α 士 αAccording to the bit plane, a certain data is read out. If a data element is in place, the actual element is not necessary. On the other hand, when it is based on the bit of the string plane, it can be checked to be zero. If all the unread data ends the streaming scan, it is also possible that as long as the quantized frequency domain data array is performed to a certain extent, the element is read out. The present invention can facilitate the access of the streaming scan memory of the frequency domain array data. Whether the element should be represented by the bit corresponding to the meta plane in the internal memory. The data is read by the internal memory. The sequence of the data stream scan is checked one by one whether the unread data elements are all zero. Can directly access the internal memory. From the sparse matrix, streaming scans have already used all non-zero values of this feature to quickly complete the mapping, which can also greatly reduce the concurrency of the internal data matrix.枓: When column: you can create a bit array data array to actually write "judge whether you want to check whether the two-dimensional cheek is a bit in the bit plane; All are zero 'to simplify the inverse frequency domain conversion operation.' In other words, Α 士 α
,鱿 中 维/ X 零值資料元素分佈^降匱况下,了解頻域陣列1 存取,以減少對=邱,形,進而避免對零值資料i 解壓縮過程中佔用^ 5己憶體的存取,降低影像資冲 佔用的記憶體資源以及對内部記憶骨In the case of dimensional / X zero-valued data element distribution, understand the frequency domain array 1 access to reduce pairs = Qiu, shape, and thus avoid occupying ^ 5 memory during decompression of zero-valued data i Access, reducing memory resources occupied by image resources and internal memory
第15頁 1227^629 gi 號 92134163 年月日 修正 五、發明說明(10) 的需求,使得壓縮/解壓縮之處理電路能夠有較佳的效 能,較低的成本及功率消耗。 【實施方法】 言月參考圖四。圖四即為本發明處理電路3 〇 一實施例之 功能方塊示意圖。處理電路3 〇可用來壓縮影像資料(也 就是將影像育料編碼為較小的檔案)。處理電路3 〇中設 =一中央處理單元32、一記憶存取模組36、一動態估計 果ί 3 8、一内部記憶體5 2、一頻域轉換/量化模組4 〇 ;為 =只,本發明之技術,處理電路3 〇中還另外設有一資料 f生器46、、,一判斷模組48A、一檢查模組48B、一暫存模 $ 5 0及一平移控制模組5 4。中央處理單元3 2用來主控處 却ί ί ^的運作’記憶存取模組36用來直接存取一外部 i 7胃體^ 動態估計模組38用來進行動態估計。頻域轉 ί = i;t0:則?有-頻域轉換模^ 進行頻域轉換(^象正曰权雜Ί 42c’其中頻域轉換模組42人用來 —併參考圖二)Ϊ疋離政餘弦轉換),以將一區塊B (請 則用來將頻域次#,為一頻域資料陣列C,量化模組4 2 Β 化修正模組4 2 d’ / #列^里2為量化頻域資料陣列〇。量 Prediction)的3貝現二f流/直流預測(AC/DC 結果。整體來說%頻域 修正量化模組42B的量化 的區塊Β進行頻域斑― 、里化模組40就是要將畫面中 Q另外,内部記憶體52則用t為罝化頻域資料陣列 又援上述各模組的運作,Page 15 1227 ^ 629 gi No. 92134163 Rev. V. The requirement of invention description (10) enables the compression / decompression processing circuit to have better performance, lower cost and power consumption. [Implementation method] Refer to Figure 4 for words. FIG. 4 is a functional block diagram of a processing circuit 300 according to an embodiment of the present invention. The processing circuit 3 can be used to compress the image data (that is, to encode the image feed into smaller files). Processing circuit 3 〇 set = a central processing unit 32, a memory access module 36, a dynamic estimation result 3 8, an internal memory 5 2, a frequency domain conversion / quantization module 4 〇; == only In the technology of the present invention, the processing circuit 3 is additionally provided with a data generator 46, a judgment module 48A, an inspection module 48B, a temporary storage module $ 50, and a translation control module 54. . The central processing unit 32 is used to control the operation of the control unit. The memory access module 36 is used to directly access an external body 7 and the motion estimation module 38 is used to perform motion estimation. Frequency domain conversion ί = i; t0: then? There are frequency-domain conversion modules ^ Perform frequency-domain conversion (^ Xiang Zhengquan Quanzai 42c 'of which 42 people use the frequency-domain conversion module — and refer to Figure 2) Ϊ 疋 cosine conversion from the political party) to convert a block B (Please use the frequency domain number # to be a frequency domain data array C, the quantization module 4 2 Β into the correction module 4 2 d '/ # ^^ 2 is the quantized frequency domain data array 0. 量 Prediction ) 3 current and 2 f-stream / DC prediction (AC / DC result. In general, the% frequency-domain correction quantization module 42B quantizes the block B to perform frequency-domain speckles-and the digitization module 40 is to place the image in the picture. In addition, the internal memory 52 uses t as the normalized frequency domain data array and supports the operations of the above modules.
^109: \ 曰 修正 MM 92134163 年 __^ 五、發明說明(11) 暫存上述模組運作時所需的資料。 取 作 包 元 Γ Λ了双控制量化頻域資料陣列Q於内部記憶體52的存 為存:組::可用來暫存一位元平面敝 ΐ右:ί 平面N為一二維的參考陣列,並内 2有稷數個一位元的參考元素Ni ]·,各個一位元之2 2 ,& j對應於資料陣列Q中的一個資料元素Qi〗,ς 伽灸」「lj ·來代表資料元素Qi j之值是否為零。由於各 多考元素N i j僅為一位元的資料,暫存模组 、^时 暫存器(shift register)來實現;平移控以.Γ模單 元則能控制暫存模組50中的位元平移,以存取各個位 之值。而判斷模組48A、檢查模組48B就可根據位元 的^的各個位元Mj來控制資料陣列Q於内部記憶體52中 關於暫存模組5 0中位元平面N的暫存配置,锖進一 If圖五(並一併參考圖四)。圖五為本發明D中位^ 109: \ Said to amend MM 92134163 __ ^ V. Description of the invention (11) Temporarily store the data required for the operation of the above modules. It is taken as a packet element Γ Λ. The dual-control quantized frequency-domain data array Q is stored in the internal memory 52 as: group :: can be used to temporarily store a one-bit plane. Right: ί plane N is a two-dimensional reference array. There are several one-bit reference elements Ni] in the 2 and each bit 2 2, & j corresponds to a data element Qi in the data array Q. Represents whether the value of the data element Qi j is zero. Since each multi-test element N ij is only one-bit data, the temporary storage module and shift register are used to implement the translation control; the .Γ mode unit Then, the bit shift in the temporary storage module 50 can be controlled to access the value of each bit. The judgment module 48A and the check module 48B can control the data array Q according to each bit Mj of the bit ^. In the internal memory 52, regarding the temporary storage configuration of the median plane N of the temporary storage module 50, FIG. 5 (refer to FIG. 4 together). FIG. 5 is the median position D of the present invention.
己置時一實施例之示意圖。在現行常用的影像壓縮干 、。中(像是MPEG規格),一區塊b中有8*8個像素.在 情況下,量化頻域資料陣列Q中也有8*8個資料元素 丧元平面騰應地也應該有8*8個位元。在本發明的較^ =施例中,就可以用8個8位元的單位元平移暫存器(8" =hift regist:r with 卜bit shifter)來實現 ^组50。就像圖五中所示,量化頻域資料陣列昉 貝料凡素Q00-Q07、Q10-Q17等等至q7〇_Q77。對應地,It is a schematic diagram of an embodiment. Compression is commonly used in current image compression. Medium (like the MPEG specification), there are 8 * 8 pixels in a block b. In the case, there are also 8 * 8 data elements in the quantized frequency domain data array Q. There should also be 8 * 8 in the plane of the element. Bits. In the comparative example of the present invention, eight 8-bit unit cell shift registers (8 " = hift regist: r with bit shifter) can be used to implement ^ group 50. As shown in Figure 5, the quantized frequency-domain data array 昉 昉 料 凡 primes Q00-Q07, Q10-Q17, etc. to q7〇_Q77. Accordingly,
面N中也有8*8個位元N00_N07、N10_N17等等至N7〇一 ;H_N〇7這8個位元組合為行(r〇W)R0,位元 N10-N17組合為行R1,以此類推。 y 於本明技術在影像資料壓縮(編碼)過程中的實 :二討論。首先1頻域轉換二匕 ϊ ; i i tv: :J f, ^ ^) # ^ ^ q i ^ ^ ^ ^ 5 ^ ^ f ^ ^ ^There are also 8 * 8 bits N00_N07, N10_N17, and so on in plane N to N701. The eight bits H_N〇7 are combined into row (r0W) R0, and bits N10-N17 are combined into row R1. analogy. y Yu Benming technology in the process of image data compression (encoding): the second discussion. First, the frequency domain transforms two daggers; i i tv:: J f, ^ ^) # ^ ^ q i ^ ^ ^ ^ 5 ^ ^ f ^ ^ ^
Qu·是否要被實際寫人至= ^ = (並-併參考圖四、圖五);_ 中㈤參考圖,、 量化頻域資料陣列·存至内V /、不思的是本發明在將 48棘控制資料元素寫入的以f體,J f判斷模, 料陣列Q多半為一稀疏矩陣7 ‘右〇 =别,討論過的,資 零。假設頻域轉換/量化模組:〇在。J::資::直二 0〇ί 'bQ〇 ^ ΪΠ '^2!^ ^ ^ ^ ^ Ϊ ί ^ ^ 零。如圖六的步驟62八所示:其餘資料元素皆為 記憶體52之前,對應之位元Q被儲存至内部 位元可先重設(reset)為位數0位十面/尚未/建立,其内的各個Whether Qu · should be actually written to = ^ = (and-and refer to Figures 4 and 5); _ in the reference figure, quantized frequency domain data array · stored in V /, without thinking that the present invention The 48 spine control data elements are written in the f-body, J f judgment mode, and the material array Q is mostly a sparse matrix. 7 ′ right 〇 = no, discussed, zero. Assume the frequency domain conversion / quantization module: 0 in. J :: 资 :: Straight 0〇ί 'bQ〇 ^ ΪΠ' ^ 2! ^ ^ ^ ^ ^ Ϊ ί ^ ^ Zero. As shown in step 62 of FIG. 6: before the rest of the data elements are in the memory 52, the corresponding bit Q is stored in the internal bit, and it can be reset to 0 digits, ten faces, not yet established. Each within
“ί;ί:;ΐ:的各個位元Nlj是以數位「。」來代 對應於一#零值資料元i·零而以數位「1」來代表其"Ί; ί:; ΐ: Each bit Nlj is represented by a digital". "Corresponding to a #zero value data element i · zero and represented by a digital" 1 "
或轉換/量化模組40對資料陣列Q的第一個資料元素 Q00元成量化後,因其量化後之值非零,故其在位元平面 上對應之位元應為數位Γ丨」,而在圖六中的步驟62B, 就可將此一數位「丨」位元以位元平移的方式暫存至行R0 最右邊的一個位元;在此同時,判斷模組48A就會根據此 一數位「1」位元得知資料元素Q0 0之值非零,使資料元 素Q〇〇會被實際寫入至内部記憶體52。在步驟62C,'頻域 轉換/里化模組4 0繼續完成次一資料元章之量化而產生出 資料元素Q 〇 1時’因其值亦非零,故在位元平面N上需以 另一個數位「1」位元來代表,而此數位「1」之位元就 可以繼續利用位元平移的方式,被存入至行⑽的最右邊 的一個位元;連帶地,原先對應於資料元素Q 〇 〇的數位 「1」位元會被向左平移(沿著箭頭6 4之方向)一個位 元。同時,判斷模組4 8 A也會因資料元素Q 〇 1對應之數位 「1」位元,使非零資料元素Q 0 1被實際寫入至内部記憶 體52 0 在步驟62D中,頻域轉換/量化模組40產生第三個量化後 之貢料元素Q02’因其ϊ化後之值為零’在行R〇的最右邊 也會以位元平移的方式記錄一數位「0」之位元;原先對 應於資料元素Q 〇 〇、Q 〇 1的兩個數位「1」位元也就被繼續 向左平移一個位元。判斷模組48A根據資料元素Q0 2對應 之數位「0」位元,就不會將資料元素Q 〇 2實際寫入至内 部記憶體5 2中,減少對内部記憶體5 2的存取次數。Or the conversion / quantization module 40 quantizes the first data element Q00 of the data array Q. Because the quantized value is non-zero, the corresponding bit on the bit plane should be a digital Γ 丨 ", In step 62B in FIG. 6, this one-digit “丨” bit can be temporarily shifted to the rightmost bit in row R0 by bit-shifting; at the same time, the judgment module 48A will use this to A digital "1" bit knows that the value of the data element Q0 0 is non-zero, so that the data element Q00 is actually written into the internal memory 52. In step 62C, 'the frequency domain conversion / liquidation module 4 0 continues to complete the quantization of the next data element chapter and generates a data element Q 〇1', because its value is also non-zero, it is necessary to use Another digital "1" bit is used to represent, and the digital "1" bit can continue to use the bit shifting method to be stored in the rightmost bit of the line; The digital "1" bit of data element Q 00 is shifted to the left (in the direction of arrow 64) by one bit. At the same time, the judgment module 4 8 A will also cause the non-zero data element Q 0 1 to be actually written into the internal memory 52 0 due to the digital "1" bit corresponding to the data element Q 〇1. In step 62D, the frequency domain The conversion / quantization module 40 generates a third quantized tributary element Q02 'because of its quantized value is zero'. At the far right of row R0, a digital "0" is also recorded in a bit-shifting manner. Bits; the two digital "1" bits that originally corresponded to the data elements Q 〇〇, Q 〇1 will continue to be shifted to the left by one bit. The judgment module 48A will not actually write the data element Q 02 to the internal memory 52 according to the digital "0" bit corresponding to the data element Q0 2 and reduce the number of accesses to the internal memory 52.
\ Ίί ^Γ -:土 ”,\ Ίί ^ Γ-: 土 ",
It2i2ffei9 ^ \ > ! _號 92134163 曰 修正 五、發明說明(14) |根據類似的步驟,當頻域轉換/量化模組4 0依序輸出量化 後之資料元素Q 0 3至Q 〇 7時,各資料元素在位元平面n上對 應之位元也會以位元平移的方式逐一記錄至行r 〇中,而 判斷模組48A就能依據各資料元素對應之位元來判斷該資 |料元素應不應該被實際寫入至内部記憶體5 2中。到了步 |驟6 2 E,頻域轉換/量化模組4 0產生量化後之資料元素 Q 0 7,其對應之位元為數位「〇」,也以位元平移的方式 1記錄至行R 0 ;而判斷模組4 8 A也不會使資料元素Q 〇 7被實 際寫入至内部記憶體5 2中。至此步驟’頻域轉換/量化模 !組4 0已經輸出資料陣列q第一行的所有資料元素Q00至 Q07,連帶地位元平面n的行R〇也被建置完成。接下來頻 |域轉換/量化模組40會繼續輸出資料陣列Q第二行的資料 元素Q 1 0至Q1 7,位元平面N的行R1也會以位元平移的方式 |逐一記錄對應各資料元素的位元,使判斷模組48A控制内 部記憶體5 2對這些資料元素的存取。以此類推,等到頻 |域轉換/量化模組4 0輸出量化頻域資料陣列Q的所有資料 元素後,連帶地位元平面N也會建立完成。請參考圖七 (並一併參考圖四至圖六)。延續圖六中的例子,圖七 即為位元平面N建立完成後的示意圖;各位元N i j就對應 |於資料陣列Q的一個資料元素Q i j。 |在本發明於圖六、圖七的例子中,由於資料陣列q僅有五 個非零資料元素,故當資料陣列Q被完整儲存於内部記憶 體5 2中時,其實僅需實際存取(寫入)内部記憶體5 2五 I次。相較之下,因為習知技術的處理電路並不會在儲存It2i2ffei9 ^ \ >! _ No. 92134163 Revision V. Description of the Invention (14) | According to similar steps, when the frequency domain conversion / quantization module 4 0 sequentially outputs the quantized data elements Q 0 3 to Q 〇7 , The bit corresponding to each data element on the bit plane n will also be recorded in the row r 0 one by one in a bit-shifting manner, and the judgment module 48A can judge the asset according to the bit corresponding to each data element | The material element should not be actually written into the internal memory 5 2. At step | step 6 2 E, the frequency domain conversion / quantization module 4 0 generates a quantized data element Q 0 7 whose corresponding bit is a digital "0", and it is also recorded to row R in bit shifting manner 1 0; and the judgment module 4 8 A does not cause the data element Q 〇7 to be actually written into the internal memory 52. At this step, the frequency domain conversion / quantization mode! Group 40 has output all data elements Q00 to Q07 in the first row of the data array q, and the row R0 with the status element plane n is also completed. Next, the frequency domain conversion / quantization module 40 will continue to output the data elements Q 1 0 to Q1 7 of the second row of the data array Q, and the row R1 of the bit plane N will also be bit-shifted. The bits of the data elements enable the judgment module 48A to control the internal memory 52 to access these data elements. By analogy, after the frequency domain conversion / quantization module 40 outputs all the data elements of the quantized frequency domain data array Q, the status element plane N will be established. Please refer to Figure 7 (also refer to Figures 4 to 6). Continuing the example in FIG. 6, FIG. 7 is a schematic diagram after the bit plane N is set up; each element N i j corresponds to a data element Q i j of the data array Q. In the examples of the present invention in FIGS. 6 and 7, since the data array q has only five non-zero data elements, when the data array Q is completely stored in the internal memory 5 2, only actual access is actually needed. (Write) Internal memory 5 2 5 I times. In contrast, because the processing circuit of the conventional technology is not stored in
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92134163 五、發明說明(15) 曰 修正 資料陣列Q時進行零值/非零值之判斷,即使資料元素Q i j 為零,也必需實際將其寫入至内部記憶體,佔用龐大的 記憶體資源。請注意,即使資料元素Q i j之值為零,並不 代表此一資料元素Q i j僅為一筆數位「〇」之單一位元資 料’因為資料元素Q i j中應該都要以數個位元來記載其 值’這也表示習知技術對零值資料元素Q i j之存取相當地 耗費記憶體資源。 在某些情況下(譬如說進行交流/直流預測時),量化修 正模組4 2 C會修正某些量化資料元素Q i j之值(像是在合 理情況下將非零值改變為零),此時也可根據量化修正 模組42C的修正結果連帶地修正位元平面N上的對應位 元。請參考圖八。圖八即為本發明於暫存模組5〇f修正 位元平面N之示意圖。在進行此種修正時,通常僅合〃 資料凡素Q00至Q07、Q〇〇至Q70,此時就可依照圖八曰中所 乔意的,同樣以位元平移的方式來修正各資料元素對鹿 之位元。 在將資料陣列Q的非零資料元素存入内部記憶體5 2、並建 立對應之位元平面N之後,接下來’當要將資料陣列Q讀 出時,本發明也能根據位元中面N之資訊來控制對資料陣 列Q之讀取。就如圖二及相關敫述中討論過的,量化頻域 資料陣列Q會由内部記憶體中被讀取出來以進行串流化掃 描,將二維資料陣歹4 Q=:個資料元素依據特定的 排列為一維的資料陣列。請參考圖九至圖十一(並一併92134163 V. Description of the invention (15) The zero / non-zero judgment is performed when the data array Q is modified. Even if the data element Q ij is zero, it must be actually written into the internal memory, occupying a large amount of memory resources. . Please note that even if the value of the data element Q ij is zero, it does not mean that this data element Q ij is only a single bit of data with a number "0", because the data element Q ij should all be in several bits. Recording its value 'also means that the conventional technology's access to the zero-valued data element Q ij consumes considerable memory resources. In some cases (such as when performing AC / DC prediction), the quantization correction module 4 2 C will correct the values of certain quantized data elements Q ij (such as changing non-zero values to zero under reasonable circumstances), At this time, corresponding bits on the bit plane N may also be corrected according to the correction result of the quantization correction module 42C. Please refer to Figure 8. FIG. 8 is a schematic diagram of the modified bit plane N of the temporary storage module 50f according to the present invention. When making such corrections, usually only the data elements Q00 to Q07 and Q00 to Q70 are combined. At this time, the data elements can be modified in the same way as bit shifting as shown in Figure 8 To the deer. After the non-zero data elements of the data array Q are stored in the internal memory 52, and the corresponding bit plane N is established, next, when the data array Q is to be read out, the present invention can also N to control the reading of data array Q. As discussed in Figure 2 and related descriptions, the quantized frequency-domain data array Q will be read from the internal memory for streaming scanning, and the two-dimensional data array 歹 4 Q =: data element basis The specific arrangement is a one-dimensional data array. Please refer to Figure 9 to Figure 11 (and together
轉虎921341肋 _鉍_. 五、發明說明(16) 參ί ί ί上的影像資料壓縮/解壓縮規格中,有 二種节用?的串“匕知描順序,分別為變形垂直掃描 alterna^ vertical scan)、變形水平掃描(aiternate horizontal scan)以及 7宝帘搞 j从 χ 從ρ如七斗、λα松w 叹Z子开/田(Zigzag scan);此三 種#拙方式的知描順序,即分別示於圖九至圖十一。在 圖九ί圖十I中,ί資料陣列Q之各資料元素QU上均有 一標唬,即2表該貧料元素被掃描的順序;標號較小 的,代表其較先被排列(掃描)至一維陣列中。舉例來 說,在圖九中,各資料元素Q i ]•會依照資料元素Q〇 〇、 10、Q20、Q30、Q01、QU、Q〇2、Q12、Q21、Q31、 40、 Q50、 Q60、 Q70、 Q7卜 Q61等等直到 Q47、 Q57、 )7 γ . Q 7 7之順序排列為一維陣列。在圖十中,各資料元 素Qi j被排列為一維陣列之排列順序則為Q〇〇、Q〇1、 Q02、 Q03、 Q10等等至 Q74' Q75、 Q76、 Q77。 一般來說,在量化頻域資料陣列卩中,資料元素Q〇〇即代 表對應區塊B在頻域中的直流分量(故可將其稱為直流 ,兀素)\相對地,其他資料元素則為頻域中的交流分 Ϊ (故可稱為交流頻域元素)。在資料陣列Q中,離資 兀素Q 0 0越遠的資料元素(像是在陣列时下角的資料元 素’其對應的頻率越高,而其值極有可能是零。故在 將資料陣列Q的各資料元素排列為一維陣列時,圖九至 十二中的掃描方式都會優先掃描左上角的資料元素(靠胃 近資料元素Q 0 0之資料元素),以便利後續浮動長度編 的進行。 μZhuanhu 921341 rib _ bismuth_. V. Description of the invention (16) Reference ί ί There are two types of string "dragging" order in the compression / decompression specifications of the video data, which are deformed vertical scanning alterna ^ vertical scan), deformation horizontal scan (aiternate horizontal scan), and the 7 treasure curtains from j to χ from ρ such as seven buckets, λα pine w sigh Zzizag scan; the order of the three descriptions That is, they are shown in Figs. 9 to 11. In Fig. 9 and Fig. 10, each data element QU of data array Q has a label, that is, 2 indicates the order in which the lean element is scanned; Smaller, it means that it is arranged (scanned) into the one-dimensional array first. For example, in Figure 9, each data element Q i] • will be based on the data elements Q〇〇, 10, Q20, Q30, Q01, QU, Q〇2, Q12, Q21, Q31, 40, Q50, Q60, Q70, Q7, Q61, etc. up to Q47, Q57,) 7 γ. Q 7 7 is arranged in a one-dimensional array. In Figure 10, The order in which each data element Qi j is arranged as a one-dimensional array is Q〇〇, Q〇1, Q02, Q03, Q10, etc. to Q74 'Q75, Q76, Q77. In general, in the quantized frequency domain data array 卩, the data element Q〇〇 represents the DC component of the corresponding block B in the frequency domain (hence it can be called DC, Wusu) \ Relatively, other The data element is the AC component in the frequency domain (so it can be called the AC frequency domain element). In the data array Q, the data element farther from the element Q 0 0 (such as the data element in the lower corner of the array) 'The corresponding frequency is higher, and its value is likely to be zero. Therefore, when the data elements of the data array Q are arranged in a one-dimensional array, the scanning methods in Figures 9 to 12 will preferentially scan the data in the upper left corner. Element (data element near the stomach near the data element Q 0 0) to facilitate subsequent floating length editing. Μ
而在本發明中’當要將儲存於内部記憶體5 2 次、,、 列Q依掃描之順序將各資料元素讀出時,也可依^^料陣 順序來存取位元平面N中的各個對應位元,並^ 掃插的 值來判斷是否要實際將對應之資料元素由内部^己康位元之 中讀取出來。另外,本發明還可在讀取頻域資料思f 5士2 檢查剩下的(未讀取的)資料元素是否皆為交素時 的資料元素已經都是零了,就可直接、快速二結二$ 3 料陣列的讀取,減少對内部記憶體5 2的存取次數。為貪 現上述檢查步驟,本發明中之檢查模組48β (見圖°四為實 以將位元平面N中的各位元一起作或運算,以得二=)可 STP(即 STP= !(R0| Rll R2I R3I R4| R5| R6| 襟 並根據旗標S T P來決定掃描是否已經可以結束。 為了具體說明本發明在進行串流化掃描時的實施情形, 請參考圖十二、十三(並一併參考圖四、圖七及^ 7 ’ 九)。延續圖七中的例子,假設資料陣列Q及其對應之 元平面N即如圖七中所示,並要以圖九中的順序來^資= 陣列Q進行串流化掃描。如圖十二中的步驟6 6 A所示,^ 串流化掃描未開始時,位元平面N就和圖七中所示一樣田。 當串流化掃描開始之後,因為旗標STP為數位「〇」 元平面N中有數位「1」之位元),故檢查模組48B判斷兩 進行掃描。依據掃描的順序(如圖九),要先取得資料而 元素Q00之值,此時判斷模組48A就可依據行“第一個仇 元(最左邊的位元)來判斷是否要實際由内部記憶體5 2In the present invention, when the data elements are to be stored in the internal memory 5 times, and the column Q is read out in the scanning order, the bit plane N can also be accessed in the order of the matrix. Each corresponding bit of ^, and ^ interpolate the value to determine whether to actually read the corresponding data element from the internal ^ jikang bit. In addition, the present invention can also read the frequency domain data and consider whether the remaining (unread) data elements are all cross-primary data elements when they are all zero. The second $ 3 read of the material array reduces the number of accesses to the internal memory 5 2. In order to embody the above-mentioned inspection steps, the inspection module 48β in the present invention (see Fig. 4 is true to perform an OR operation on the bits in the bit plane N to obtain two =). STP (that is, STP =! ( R0 | Rll R2I R3I R4 | R5 | R6 | and determine whether scanning can be finished according to the flag STP. In order to specifically explain the implementation of the present invention when performing streaming scanning, please refer to FIGS. 12 and 13 ( Refer to Figure 4, Figure 7 and ^ 7 '9). Continuing the example in Figure 7, suppose the data array Q and its corresponding element plane N are as shown in Figure 7, and in the order shown in Figure 9 Source data = Stream scan is performed by array Q. As shown in step 6 A in Figure 12, when the stream scan is not started, the bit plane N is the same as shown in Figure 7. When the stream After the fluidization scan is started, because the flag STP is a digital "0" in the digital plane N), the inspection module 48B judges two scanning. According to the scanning order (see Figure 9), it is necessary to First obtain the data and the value of the element Q00. At this time, the judgment module 48A can Whether element) to be actually determined by the internal memory 52
第23頁 £[22翁麵) #_號 92134] 63 年月日_修正 五、發明說明(18) 中讀取資料元素Q 0 0。因為行r 〇的第一個位元為數位 「1」,代表資料元素Q00非零,故判斷模組48A會使資料 元素Q0 0被實際由内部記憶體52中讀取出來。在讀取資料 元素Q 0 0後,平移控制模組5 4 (圖四)也會將行R 〇的各位 元向左平移一個位元,最右邊的位元則記錄一數位「〇」 (也就是圖十二中標記為「X」之位元),就像步驟66B 中所示。此位元平移就代表行R〇中對應資料元素Q〇 〇之位 元已經處理過了。 到了步驟66B中,檢查模組48B會因為旗標STP仍為數位 「0」而不中止串流化掃描(其中標記「X」為數位 「0」),依照圖九中的順序,在此步驟中應該取得資料 元素Q10之值乂故判斷模組48A就會依據行ri最左邊的位 元(對應資料元素Q1 0之位元),來判斷是否要讀取資料 兀素Q10之值。由於此位元為數位r 〇」,故判斷模組48a 就不會實際由内部έ己憶體5 2中讀取資料元素q 1 〇之值(事 實上内部記憶體5 2中也不用儲存零值之資料元素卩1 〇), 而可配合資料產生器46來處理資料元素Q1 〇之值,以減少 對内部記憶體52的存取。在處理完對資料元素Q1 〇之讀取 判斷時,在位元平面N中的行R1也會被向左平移一個位元 並在最右端記入一位元「〇」(標記「χ」),代表行R i 中對應資料元素Ql 〇之位元已經被處理過了。位元 之位元平面N就如步驟6 6 C中所示。 在步驟66C中’檢查模組48B因數位「〇」之旗標STp而使 ^^ 92134163 年 月 曰 五、發明說明(19) 串流化掃描繼續進行(位元平面N上的兩個標記「X」皆 為數位「〇」)。依照圖九中的順序,此步驟要處^資0料 元素Q20之讀取判斷,而判斷模組48B會因為行第一個 位元(對應資料元素Q2 0之位元)為數位r 〇」而不必實 際讀取資料Q20。處理完資料元素Q20之讀取&斷,位^ 平面N的行R2也會向左平移一個位元並記錄—個數位 「0」(標記「X」),成為步驟66D中的樣子。 同樣地,到了步驟66D,旗標STP仍為數位「〇」,串流化 掃描要繼績處理資料元素Q 3 0,而判斷模組4 8 A會因為行 R3的第一個位元為數位「〇」而不必實際讀取資料元素 Q30。處理完資料元素Q30後,行R3也會向左平移一個位 元,並記入一位元「〇」(記號「X」處),成為步驟66E 中的樣子。 在步驟66E,旗標STP為數位「0」,串流化掃描要繼續處 理資料元素Q0 1 (如圖九所示)。因為行R0的第一個位元 (在經過步驟6 6 A之位元平移後,該位元即為對應資料元 素Q0 1之位元)為數位「1」,判斷模組48A就會使資料元 素Q 0 1實際由内部記憶體5 2中被讀取出來。處理完資料元 素Q01之後,行R0同樣也以向左平移一個位元的方式記入 一個數位「0」(記號「X」),成為步驟66F中的樣子。 隨著串流化掃描的持續進行,處理過的資料元素增加, 位元平面N中應該會有越來越多的數位「0」位元,因為P.23 £ [22 翁 面) #_ 号 92134] YYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYYIIIIII Three Days of the Year_Amendment 5. Read the data element Q 0 0 in the description of the invention (18). Because the first bit of the row r 0 is a digital "1", which indicates that the data element Q00 is non-zero, the judgment module 48A will cause the data element Q0 0 to be actually read from the internal memory 52. After reading the data element Q 0 0, the translation control module 5 4 (Figure 4) will also shift each bit of the row R 0 to the left by one bit, and the rightmost bit will record a digital "0" (also Is the bit labeled "X" in Figure 12), as shown in step 66B. This bit shift means that the bit corresponding to data element Q00 in row R0 has been processed. In step 66B, the inspection module 48B will not abort the streaming scan because the flag STP is still a digital "0" (where the mark "X" is a digital "0"). According to the sequence shown in Figure 9, at this step The value of the data element Q10 should be obtained, so the judgment module 48A will determine whether to read the value of the data element Q10 according to the leftmost bit of the row ri (corresponding to the bit of the data element Q1 0). Since this bit is a digital r 0 ", the judgment module 48a will not actually read the value of the data element q 1 〇 from the internal memory 5 2 (in fact, it is not necessary to store zero in the internal memory 5 2 Data element Q1 0), and the data generator 46 can be used to process the value of data element Q1 0 to reduce access to the internal memory 52. After the reading judgment of the data element Q1 〇 is processed, the row R1 in the bit plane N will also be shifted to the left by one bit and a bit “0” (labeled “χ”) will be entered at the far right. The bit corresponding to the data element Q10 in the representative row R i has been processed. The bit plane N of the bit is as shown in step 6 C. In step 66C, the "check module 48B" is caused by the flag STp of the digital "0" ^^ 92134163 5th, invention description (19) Streaming scanning continues (the two marks on the bit plane N " X "are all numbers" 〇 "). According to the sequence in Figure 9, this step is to read and judge the data element Q20, and the judgment module 48B will because the first bit of the row (corresponding to the bit of the data element Q2 0) is the number r 0. " It is not necessary to actually read the data Q20. After processing the reading & breaking of the data element Q20, the row R2 of the bit ^ plane N will also be shifted to the left by one bit and recorded-a digit "0" (marked "X"), which will become what it was in step 66D. Similarly, at step 66D, the flag STP is still a digital "0". The streaming scan will continue to process the data element Q 3 0, and the judgment module 4 8 A will be because the first bit of row R3 is a digital "〇" without actually reading data element Q30. After processing the data element Q30, the row R3 will also be shifted to the left by one bit, and a single bit “0” (marked with “X”) will be entered, and it will become as in step 66E. At step 66E, the flag STP is a digital "0", and the streaming scan continues to process the data element Q0 1 (as shown in Figure 9). Because the first bit of row R0 (after the bit translation of step 6 6 A, the bit is the bit corresponding to the data element Q0 1) is the digital "1", the judgment module 48A will make the data Element Q 0 1 is actually read from internal memory 5 2. After processing the data element Q01, the row R0 also records a digit "0" (symbol "X") by shifting one bit to the left, which becomes the state in step 66F. As streaming scanning continues, the number of processed data elements increases, and there should be more and more digital "0" bits in bit plane N, because
第25頁 修正Page 25 Correction
處理過的資料元素對應之位元皆被記為數位「〇」(即標 記「X」)。就如步驟6 6 F至6 6 J (由圖十二接至圖十三) 所示,串流化掃描每處理完一個資料元素,位元平面N在 對應位元所屬之行皆會以位元平移的方式記入一個位元 「〇」(即記號「X」),而讓檢查模組48B能根據位元平 移後之位元平面N來判斷亊流化掃描是否應該繼續進行。 如圖十三所示,到了步驟6 6 K,串流化掃描進行至資料元 素Q40,判斷模組48B會依據行R4之第一個位元而使資料 元素Q4 0由内部記憶體52中被實際讀取出來,而位元平面 N的行R4也會以位元向左平移的方式記入一個數位「〇」 之位元(標記「X」之處),成為步驟66L中的樣子。在 步驟6 6 L中’由於位元平面N上的所有位元皆為數位 一 〇」,代表未處理過之資料元素皆為零,此時旗桿STP 變成數位「1」,而檢查模組48B就可根據旗標ST 流化掃描直接結束,完成整個串流化掃描的進行。之甲 換句話說,在進行串流化掃描而逐一處理 之讀取時,本發明有兩個機制來,個貝枓兀素 取。其一為判斷模組48A之運作 、内σ卩記憶體的存 進行存取。另一機制為檢查模組零之資料元素 STP來判斷未處理之資料元素是 β之運作,以根據旗標 能直接、快速地完成串流化、掃,白為零。若皆為零,就 存取刺下的零值資料元素。藉:暫=必對内部記憶體5 2 元平面Ν,本發明就能在不日 子於暫存模組50之位 實際存取内部記憶體的情況 修正The bits corresponding to the processed data elements are all recorded as a digital "0" (ie, marked "X"). As shown in steps 6 6 F to 6 6 J (from Fig. 12 to Fig. 13), each time a data element is processed in the streaming scan, the bit plane N will be bitwise in the row where the corresponding bit belongs. The method of meta-translation is recorded in a bit "0" (ie, the symbol "X"), so that the inspection module 48B can judge whether the radonization scan should continue according to the bit-plane N after the bit-translation. As shown in FIG. 13, at step 66 K, the streaming scan proceeds to the data element Q40, and the judgment module 48B causes the data element Q4 0 to be deleted from the internal memory 52 according to the first bit of the row R4. It is actually read out, and the row R4 of the bit plane N is also recorded with a bit “0” (marked with an “X”) in a bit-shifting manner to the left, which becomes the state in step 66L. In step 6 6 L, 'Because all the bits on the bit plane N are digits 10', which means that the unprocessed data elements are all zero. At this time, the flagpole STP becomes a digital "1", and the check module 48B According to the flag ST, the streaming scan can be ended directly, and the entire streaming scan can be completed. In other words, the present invention has two mechanisms for reading one by one when performing streaming scanning and processing one by one. One is the operation of the judgment module 48A and the access of the internal σ 卩 memory. The other mechanism is to check the zero data element STP of the module to determine that the unprocessed data element is the operation of β, so that the stream and scan can be completed directly and quickly according to the flag. If they are all zero, then access the zero-valued data element. Borrow: temporary = 5 2 plane N of internal memory, the present invention can actually access the internal memory in the temporary storage module 50
pd 號 921341 五 下 、發明說明(21) ,快速地判斷各資料元素是否為零。相較 中的習知技術就缺乏上述的機制來判卜’圖三 為零,故J在進行串流化掃描時,必需將W K J否 有資料元素逐一讀出,不論其資料元素之佶b早歹】的所 因此,習知技術就要耗費大量的記情體次疋否為零。 十三的例子中,本發明3 彳v η — M a a τ 疋在處理過每一個資 以同一仃間向左平移的方 I貝 151 — #4 一加%水更新位凡平 在圖十一 料元素後 面, 一方面將同一行的次一個位亓曰 ’ 行的第一個位元),使得判斷模組_就是^ 個資料元素進行存取判斷時,可吉士同仃的_人一 的位元來判斷其是否為零。像在 ^據對,行最左邊 66Α、66Ε及步驟66G中,步驟66Α蔣次;、十三的步驟 元平移至行R0的最左邊,使得判==f兀素對應之位 66E時依據行R0最左邊的位元來]斷\且48A能在進行步驟 料元素Q00同一行)是否為雯 J,貝料兀素Q01 (與資 素Q02對應之位元又被平移;驟66E中,資料元 驟66G時,判斷模組48八又ϋ取左邊。等到進行步 來判斷資料元素Q02 (盥資料依據行R0最左邊的位元 為零。觀察圖九、圖十、—貝中枓的2 _、Q〇i同-行)是否 的資料元素來說,4資料元:2順序可知,對同-行 的資料元素優先,故圖十二了卜序的順序皆會比其右邊 式可以完全適用於圖九、&丄1二中向左位元平移的方 回卞一中的掃描順序。 相對地,要以圖十的掃描順 斤不進仃串流化掃描時,各PD No. 921341 Five, Invention Description (21), quickly determine whether each data element is zero. Compared with the conventional technology, the above-mentioned mechanism is lacking to judge 'Figure 3 is zero. Therefore, J must read out the data elements of WKJ one by one when performing the streaming scan, regardless of whether the data elements are earlier.歹] Therefore, the knowledge technology will consume a large number of memorizing styles. Is it zero? In the thirteen examples, the present invention 3 彳 v η — M aa τ 处理 has processed every square 151 which has been translated to the left with the same time interval 151 — # 4 plus one percent water renewal position. Behind the element, on the one hand, the next bit of the same line (the first bit of the line), so that the judgment module _ is the ^ data element for access judgment, the same as the _ Renyi Bit to determine if it is zero. For example, in the data pair, the left-most line 66A, 66E and step 66G, step 66A Jiangci; the thirteenth step element is translated to the left-most line R0, so that when the corresponding bit 66E of the == f prime element is determined, according to the line The bit on the far left of R0] is broken, and if 48A can be in the same row as the element Q00, is it Wen J, and the element Q01 (the bit corresponding to the element Q02 is shifted again; in step 66E, the data At step 66G, the judgment module 48 takes the left again. Wait until the step is performed to determine the data element Q02 (the leftmost bit of the data according to row R0 is zero. Observe Figure 9, Figure 10, and 2 of Beizhongyi _, Q〇i same-line) whether the data element is 4 data elements: 2 sequence can be known, the data element of the same-line takes precedence, so the order of the sequence in Figure 12 will be more complete than its right-hand form It is applicable to the scanning sequence in Figure 9 and Fang Huiyi, which is shifted to the left in the middle of & 丄 1. 2. In contrast, when you want to use the scan in Figure 10 to avoid the stream scanning, each
第27頁 p 虎 9213416$Page 27 p Tiger 9213416 $
五、發明說明(22) 資料元素排序的順序就不一定 先。如圖十所示,像在第二行 元素 Q14、 Q15、 Q16、 Q17,其 1 7、1 6、1 5至1 4。同樣地,在 Q 2 3的優先順序分別是1 9、1 8 移存取之方式可以適用於圖十 的暫存模組5 0可以用圖十四中 所示’針對位元平面N的行R 1 關的多工器6 8及控制位元平移 切換實現不同的平移控制,使 切換支援圖九至圖十一的所有 移控制模組5 4可以使用一位元 位元平移的方式。 比其右邊的資料元素優 中,由左至右排列的資料 ,序的優先順序卻分別是 第三行中,資料元素Q22、 3為了使位元平面N位元平 中的掃描順序,本發明中 的電路來實現。如圖十四 k R 2 ’本發明特別設置了相 方向的平移控制器7 〇,以 得本發明之暫存模組可以 排序順序。而本發明之平 的控制訊號Cb來切換控制 請參考圖十五、十六(並一併參考圖十四)。圖十五、 十六即為圖十四中暫存模組5 0在不同情況下進行平移# 制的情形。如圖十五所示,當控制訊號Cb為數位「丨」卫 時’其位元平移的方向就是向左平移(未被致能的位"元 平移方向則已省略),可配合圖九、圖十一中的掃描順 序來進行本發明於串流化掃描中的記憶體存取控制。$另 一方面’當控制訊號Cb為數位「〇」時,其所致能的位元 平移方向就如圖十六所示,以便在以圖十中之掃描順序 進行串流化掃描時’支援位元平面N之更新。配合第 '一行 中資料元素Q 1 4至Q 1 7的排列順序,位元n 1 4至N 1 ¥是以—向^ 右平移的方式來進行位元平移;換句話說,對位元N丨j至V. Description of the invention (22) The order of the data elements is not necessarily the first. As shown in Fig. 10, like the elements Q14, Q15, Q16, and Q17 in the second row, they are 1, 7, 16, 15, and 14. Similarly, the priority order in Q 2 3 is 19 and 18 respectively. The method of shifting and accessing can be applied to the temporary storage module of FIG. 10. The 0 can be used as shown in FIG. 14 for the row of bit plane N. The multiplexer 68, which is closed by R 1, and the control bit shift switch realize different translation control, so that the switch supports all the shift control modules 5 4 in FIG. 9 to FIG. 11, which can use a one-bit bit shift method. In the data element that is superior to the right, the data arranged from left to right has the order of precedence in the third row, respectively. The data elements Q22 and 3 are for the scanning order of the bit plane N bit plane. The present invention Circuit. As shown in FIG. 14 k R 2 ′, the present invention specifically sets a phase direction translation controller 70, so that the temporary storage module of the present invention can be sorted in sequence. For the control signal Cb of the present invention for switching control, please refer to Figs. 15 and 16 (also refer to Fig. 14 together). Figures 15 and 16 are the situations where the temporary storage module 50 in Figure 14 performs the panning # system in different situations. As shown in Figure 15, when the control signal Cb is a digital "丨" guard, the direction of its bit translation is to the left (the un-enabled bit " yuan translation direction has been omitted). The scan sequence in FIG. 11 is used to perform the memory access control in the streaming scan of the present invention. $ On the other hand, when the control signal Cb is a digital "0", the direction of the enabled bit shift is as shown in Fig.16, so as to perform streaming scanning in the scanning sequence in Fig.10. Update of bit plane N. In accordance with the arrangement order of the data elements Q 1 4 to Q 1 7 in the first row, the bits n 1 4 to N 1 ¥ are bit-shifted in the manner of —to the right shift of ^; in other words, for bit N丨 j to
第28頁 _號 92134163 年月日 修正Page 28 _ No. 92134163 Revised
五、發明說明(23) N1 7來說,位元N 1 7的位元會最先被平移至行R 1的最左 邊,接下來才是位元N16、N15、N14的位元。同理,行R2 中的位元N22、N2 3也是以向右平移的方式來配合資料元 素Q2 2、Q2 3。換句話說,在依照圖十中的順序來進行串 流化掃描時,本發明仍然可以利用簡單的位元平移,來 依序存取各資料元素對應之位元,據此進行資料元素於 内部記憶體5 2中之存取控制。 ' 請參考圖十=。圖十七為本發明處理電路另一實施例8 〇 之功能方塊示意圖。處理電路8 〇可用來進行壓縮影像 料的解壓縮(也就是解碼)。處理電路8 〇中設有一中央 處f單元82、一記憶存取模組86、一内部記憶體1〇2、、一 動態補償模組8 8、一反掃描模組9 2 A、一資料產生哭 ::月可之變實長广馬/碼模組92C、及一轉換模組9;。配 合本發明之實施,處理電路8〇中亦設有一暫存模 一平移控制模組1 Q 4及一判斷模組9 8。中 來主控處理電路80之運作,节俨六* π z 早70 82用 生器92Β及反掃描模組9心:^:;=2。、資料產 併參考圖二)、反掃描為沾if枓陣列解瑪R(請〆 資料陣列Q反量化之後/轉換、里匕頻域資料陣列Q。將 轉換(像是逆離散餘弦轉轉 列,而動態補们莫組88則㈣進^屢區塊像素陣 等等,以完成對壓縮影像資料之 、、、。二,動態補償 則用來支援上述各模組運作時 2 "卩g己憶體1 〇 2 卬寸所需之记憶體資源。V. Description of the invention (23) For N1 7, the bit of bit N 1 7 is first shifted to the leftmost edge of row R 1, and the bits of bits N16, N15, and N14 are next. Similarly, bits N22 and N2 3 in row R2 are also matched with data elements Q2 2 and Q2 3 by shifting to the right. In other words, when streaming scanning is performed in accordance with the sequence in FIG. 10, the present invention can still use simple bit shifting to sequentially access the bits corresponding to each data element, and perform data element internalization accordingly. Access control in memory 52. 'Please refer to Figure X =. FIG. 17 is a functional block diagram of a processing circuit according to another embodiment 80 of the present invention. The processing circuit 80 can be used for decompressing (ie, decoding) the compressed video material. The processing circuit 8 is provided with a central unit f 82, a memory access module 86, an internal memory 102, a dynamic compensation module 8 8, an anti-scanning module 9 2 A, and a data generation module. Cry :: Yue Ke's Realization Chang Guang Ma / Code Module 92C, and a Conversion Module 9 ;. In conjunction with the implementation of the present invention, the processing circuit 80 is also provided with a temporary storage module, a translation control module 1 Q 4 and a judgment module 98. The main control processing circuit 80 operates in China, and the sixty-sixth * π z early 70 82 uses the generator 92B and the anti-scan module 9 cores: ^:; = 2. , Data production and refer to Figure 2), the inverse scan is the 枓 if 枓 array solution R (please click the data array Q after inverse quantization / transformation, and the frequency domain data array Q. transform (like inverse discrete cosine transposition , And the dynamic complementer Mo group 88 is ^ repeated block pixel array, etc., to complete the compressed image data, two, two. Dynamic compensation is used to support the operation of the above modules 2 " 卩 g Memory resources required by the memory 1 〇2 inch.
_號 921341Μ 五、發明說明(24)_ No. 921341M V. Description of the invention (24)
在可變長度碼解碼模組92C、資料產生哭g 組92A運作時,經過可變長度編碼、霍& @編 ^描模〜 料陣列R會被解碼為一維資料陣列 &二”'',’一 ^資 f資=元素QU;經過反掃描後,一維/料陣)列二 Λ會被重新排列為二維資料陣列Q;而此資料陣貝列 Q要被儲存入内部記憶體102中,以量車= 被儲存進内部記隐體 m月就可在暫存模組1〇〇中建立其對應之位元平面 位元平面N中的各個位元來判斷 本兩^1素QJ疋否為零’是否要將其實際儲存(寫入) 著斗ί 體\〇2中。當可變長度碼解碼模組92C、’資料 盗92B及反掃描模組92A將各個資料元素Qi ‘解碼出 2能確定資料元素Qij是否為零;連帶mj 、r 對應之位70 N ij就能確定,並能以位元平移的方式 ί t暫Λί莫。@時,判斷模組98也就能依據該位 體1 ϊ ϊ ί 素.Qi j是否要實際儲存入内部記憶 . 。右貝料70素卩“之值為零,就不用實際將其儲 體取m’相本發明目的之一,減少對内部 專到貧料陣列Q被儲存至内部記憶體i 〇 2後,其對應之位 兀=面N也被建立完成。等到要將資料陣列Q讀出而進行 反=化之步驟時,本發明之判斷模組98也就可以依據位 兀、/面N中的各個位元N i j,來判斷是否要由内部記憶體When the variable-length code decoding module 92C and the data generation group 92A are operating, after variable-length coding, Huo & @ 编 ^^ 模 ~ the material array R will be decoded into a one-dimensional data array & two "' ',' 一 ^ 资 f 资 = Element QU; After inverse scanning, the two-dimensional array Λ will be rearranged into a two-dimensional data array Q; and this data array Q is to be stored in internal memory In the body 102, each bit in the corresponding bit plane bit plane N can be established in the temporary storage module 100 by measuring the car = stored in the internal hidden body m months to determine this two ^ 1 If the QQ is zero, do you want to actually store (write) it in the body \ 〇2. When the variable-length code decoding module 92C, 'data theft 92B, and anti-scanning module 92A Qi 'decoded 2 can determine whether the data element Qij is zero; the corresponding bit 70 N ij can be determined together with mj and r, and can be temporarily shifted in a bit-shifting manner. @ 时, judging module 98 also Can be based on whether the body 1 ϊ ί 素. Qi j is actually stored in the internal memory.. Right shell material 70 卩 "value is zero, you do not need to actually save Chu body takes m 'is an object of the present invention with, designed to reduce the internal array of Q-lean material is saved to the internal memory of i 2 billion, which corresponds to the bit plane Wu = N is also established. When the data array Q is read out and inverted, the judgment module 98 of the present invention can also judge whether to use the internal memory based on the bits N i j in the bit / plane N.
第30頁Page 30
五、發明說明(25) 之資料元素Qij讀取出來。若某-資 組98就不必實際將資料元u.t貝敗〜元素為零,判斷模 資料元素也未儲存於内;U1二ί來(事實上巧 產生器92Β與其產生之位址上體而:配料 之處理。i言揭一办 士广貝成以兀成對該資料兀素Qi j 之存取#制,再声^明又能藉由非零值資料元素Q i」 控制再度減少對内部記憶體102的存取次數。 ί $:ΐ述2 f量化時,本發明可配合-迴轉式的位元 位元平面中的資訊。關於此情形,請參5. The data element Qij of the description of the invention (25) is read out. If a certain asset group 98 does not have to actually delete the data element ut ~ the element is zero, and the judgment module data element is not stored in the U1 (in fact, the generator 92B and the address generated by it are: The processing of ingredients. The report reveals that Guang Beicheng uses Wucheng's access to the data element Qi j to access the data system, and then clarifies that it can reduce the internal The number of accesses to the memory 102. ί $: 2 When the f is quantized, the present invention can cooperate-rotate the information in the bit plane. For this situation, see
位二平f方;者。=為暫存模組102以迴轉式(r〇tati〇n: ―次祖f/現的不意圖。舉例來說,在處理對第一 ϋ二=^ / 〇至+Q〇7之讀取時,判斷模組98可先根據行 ΐ t斷是否要實際讀取資料元素_。完 貝 處理後,行R0的各個位元會向左平移 η ^兀’讓對應於資料元素Q〇1之位元被左移至行…的 =^ ^,但對應於資料元素Q〇〇之位元會依照迴轉之方向 H f行/0的最右邊。接下來’當要處理對資料元素 一 '取日守’判斷模組98仍然可以根據行R0最左邊的位Bit two flat f party; person. = For the temporary storage module 102 in a rotary type (r〇tati〇n: ―The second ancestor f / present is not intended. For example, in the process of reading the first two = = / 〇 to + Q〇7 At this time, the judging module 98 may first determine whether to actually read the data element according to the line t. After the processing is completed, each bit of the line R0 will be shifted to the left by ^^ ′ to correspond to the data element Q0 The bit is shifted to the left of the line ... = ^ ^, but the bit corresponding to the data element Q〇〇 will follow the direction of rotation H f row / 0 to the far right. The next 'to be processed for data element one' Day guard 'judgment module 98 can still be based on the leftmost bit of row R0
兀,來判斷是否要實際讀取資料元素Q〇丨(因為其對應之 f兀^被平移至行R0的最左方);處理完資料元素Q〇i 後:仃R0的各個位元一樣向左平移,資料元素Q〇i對應之 位兀又被迴轉平移至行以的最右方。這樣一來,當處理 完Ϊ料元ΐ Q〇〇至Q〇7的讀取時,位元平面腸行r〇剛好會 迴轉回為取初的狀態(也就是位元平面^^剛被建立完成時To determine whether to actually read the data element Q〇 丨 (because its corresponding f ^^ is translated to the far left of row R0); after processing the data element Q〇i: the bits of 仃 R0 are the same Pan left, and the position corresponding to data element Q0i is shifted to the far right of the row. In this way, when the reading of the material elements Q〇〇 ~ Q〇7 is completed, the bit plane intestine row r0 will just return to the initial state (that is, the bit plane ^^ has just been established When done
第31頁 觀號 92134163 年 —月 曰 修Λ 五、發明說明(26) 的情形),保留行R 0的資訊。以此類推,當處理完各個 >料元素Q i j之讀取時,位元平面Ν還會保留所有對應的 資訊。 利 時 在 域 料 用位 ,進 進行 轉換 素 頻域資 輪出陣 常數) 域資料 在頻域 如圖十 級9〇來 轉換 組 96B, 行進 該行在 域資料 最左邊 域陣歹,j 分量皆 元平面N的資訊,本發明還可在進行逆頻城轉換 一步精簡逆轉換的進行。如熟知技術人士所知, 韻盛鐘施换,i日眷从、仏τ >雜;Μ ^ <rx w yv 1 ^ ——,轉換時,相當於進行兩重的〆維逆頻 在進行一維逆頻域轉換時,若在某行的頻域資 中僅有直流的頻域資料元素並非零,其餘交流之 料疋素皆為零,一維逆頻域轉換出來的一維空間 列就是一個常數陣列(也就是各元素皆相等為一 二=f本發明中,由於位元平面經記錄了各頻 疋否為苓,就可利用位元平 來 貧料陣列中的各行是否具有上述的:v。 維 七所示’在本發明之處理雷 進行二維逆镅祕絲你 路8 0中,是以轉換模 檢查模組94’二常數運:”組90中即設有 '以進行-維逆頻域轉換轉換運算模 行一維逆頻域轉換時,轉換於杳貝域貧料陣列的某 位元平面N上對應之行,來檢檢杳查θ铋組94就可依據 =素為非零值,也就是位元平一疋^,有直流之頻 之位元為數位「丨 人 _應打是否僅有 =中的該行僅有直流頻付域;上量述,的代表頻 為零’而其一維逆頻域轉 /、餘交流頻域 、®果的一維輸出陣列Page 31 View No. 92134163 — Month Revision Ⅴ. Case of Invention Description (26)), keep the information of row R 0. By analogy, when the reading of each > material element Q i j is finished, the bit plane N will also retain all corresponding information. The time is used in the domain material, and the conversion is performed in the prime frequency domain. The domain data is used to transform the group constants in the frequency domain. The domain data is converted to group 96B in the frequency domain as shown in Figure 10. The information of the meta-plane N can also be used to simplify the inverse conversion in one step when performing the inverse frequency city conversion. As is well known to those skilled in the art, Yun Shengzhong exchanges, i day dependent, 仏 τ >miscellaneous; M ^ < rx w yv 1 ^ ——, when converting, it is equivalent to performing a double dimensional inverse frequency in When performing one-dimensional inverse frequency domain conversion, if only DC frequency-domain data elements in a line's frequency-domain data are not zero, the remaining AC materials are all zero, and one-dimensional space converted from one-dimensional inverse frequency domain A column is a constant array (that is, each element is equal to one or two = f. In the present invention, since the bit plane has recorded whether each frequency band is Ling, it can be used to determine whether each row in the array has The above: v. Dimension 7 shows that in the processing process of the present invention, the two-dimensional inverse loop of the mysterious silk thread 80 is performed by the conversion module inspection module 94. The two constant operations: "set in group 90" When performing a one-dimensional inverse frequency-domain conversion operation mode to perform a one-dimensional inverse frequency-domain conversion, the corresponding row on a bit plane N of the lean matrix array in the rubidium domain is converted to check the θ bismuth group 94. According to = prime is a non-zero value, that is, the bit is flat, and the bit with a frequency of DC is a digital "丨 人 _ 应 打 是否= Current in this row only pay frequency domain; said quantity, representing the frequency zero 'and the one-dimensional inverse frequency domain rpm /, I AC output frequency one-dimensional array fields, fruit ®
第32頁 I 1 - ‘ V、、. '陶遽雜 92134163^ 年 月 曰 修正 五、發明說明(27) 就應該是常數陣列。此時’就可利用常數運算模組9 6 A來 計算出該常數陣列,作為一維逆頻域轉換之輸出陣列 Ο p。相對地,若位元平面N之對應行顯示該行有非零之交 流頻域分量,就要由轉換運异模組9 6 B來實際進行一維逆 頻域轉換,產生對應的輸出陣列〇P。 請參考圖十九(並一併參考圖十七)。圖十九就是以一 演算法來描述上述一維逆頻域轉換進行之情形。假設現 要對某行之頻域資料元素BmO、Bml、…Bm7 ( m為一整 數)進行一維逆頻域轉換,位元平面上的位元Nm0、Page 32 I 1-‘V ,, '' Tao Yanza 92134163 ^ month, month, day, amendment 5. Invention description (27) should be a constant array. At this time, the constant array 9 6 A can be used to calculate the constant array as an output array of one-dimensional inverse frequency domain conversion 0 p. In contrast, if the corresponding row of the bit plane N shows that the row has a non-zero AC frequency domain component, the conversion operation module 9 6 B will actually perform a one-dimensional inverse frequency domain conversion to generate a corresponding output array. P. Please refer to Figure 19 (also refer to Figure 17). Figure 19 is an algorithm to describe the above-mentioned one-dimensional inverse frequency domain conversion. Suppose that one-dimensional inverse frequency domain conversion is performed on the frequency domain data elements BmO, Bml, ..., Bm7 (m is an integer) of a row, and the bits Nm0,
Nml、…Nm7即對應上述這些頻域資料元素,分別代表這 些頻域資料元素是否為零。要進行一維逆頻域轉換時, 本發明即可利用位元Nmi、Nm2至Nm7這些對應交流頻域資 ^,素的位元’來判斷交流頻域資料元素是否皆為零。 若是丄就可將輸出陣列0P的各個元素〇P〇、〇pl至0P7設為 同一 ^數C0 (此常數可由常數運算模組96A來計算)。若 否’就要由轉換運算模組9 6B實際進行一維的逆頻域轉 換’產生輸出陣列〇p。常數運算模組9 轉換運算模組 96B的輸产陣列再經過另一重之一維逆頻域轉換,就能 出頻域資料陣列對應的區塊。Nml, ... Nm7 correspond to the above-mentioned frequency-domain data elements, which respectively represent whether these frequency-domain data elements are zero. To perform one-dimensional inverse frequency domain conversion, the present invention can use bits Nmi, Nm2 to Nm7 to correspond to AC frequency domain data, prime bits' to determine whether the AC frequency domain data elements are all zero. If it is 丄, each element of the output array OP can be set to the same number C0 (this constant can be calculated by the constant operation module 96A). If not, an output array oop is generated by the conversion operation module 96B actually performing a one-dimensional inverse frequency domain conversion. The constant operation module 9 conversion operation module 96B's output array is then subjected to another one-dimensional inverse frequency domain conversion to produce the corresponding block of the frequency domain data array.
t Γΐ ^在影像資料壓縮/解壓縮(也就是編碼/解 碼 二^私中’需要以處理電路中的内部記憶體處理對 一 ί1貝=陣列之存取。此一頻域資料陣列通常呈現為 一稀&矩陣’有多個資料元素皆為零。但在習知技術t Γΐ ^ In the compression / decompression of image data (that is, encoding / decoding), the internal memory in the processing circuit needs to access an array of 1 = = array. This frequency domain data array is usually presented as A sparse & matrix has multiple data elements that are all zero.
第33頁 中,卻無法利用此一特性, 個資料元素都要在内部記音 量的記憶體資源,並增加; 相較之下,在本發明中, 暫存模組,以暫存一位元平 位元對應地記錄下各頻域資 一來,就能便捷地以位元I 的各個位元,快速地根據位 資料元素是否為零,進而控 體中的存取,並使影像資^ 在圖四至圖十六討論的實施 面之資訊,讓零值頻域資料 部記憶體的記憶體資源,還 地完成。同理,在圖十七至 之資訊也讓零值頻域資料元 體,還能使逆頻域轉換之進 列稀疏的特性,本發明之技 的過程中釋放大量的記憶體 頻寬需求及相關功率消耗, 的成本降低,效能提高。在 組可以用硬體的電路來實現 處理單元執行韌體程式碼以 電路30、8 0也可整合為單一 能的處理電路。舉例來說, 使得頻域資料陣列中的^ 體進行實際的存取,耗 内部記憶體的頻寬需求。、大 是以簡單之平移暫存器形 面’利用此位元平面之各 料陣列元素是否為零。這$ 移的方式來存取位元平^中 元平面之資訊來判斷各頻2 制頻域資料陣列在内部記& 壓縮/解壓縮的過程更快速。 例中,本發明即利用位元平 元素之存取不會實際佔用内 能讓串流化掃描的程序更快 十八的實施例中,位元平面 素不會實際存取於内部記憶 行更快速。利用頻域資料陣 術能在影像資料壓縮/解壓縮 資源,降低對内部記憶體的 使相關處理電路設計、生產 本發明的各實施例中,各模 ’或是由處理電路中的中央 實現其功能。而前述的處理 一個同時具有壓縮/解壓縮功 處理電路3 0、8 0中的判斷模On page 33, this feature cannot be used. Each data element must internally record the volume of the memory resource and increase it. In contrast, in the present invention, the module is temporarily stored to temporarily store a bit. By recording the frequency domain data correspondingly in the flat bit, one can quickly use the bits of bit I to quickly determine whether the bit data element is zero, and then control the access in the body and make the image data ^ The implementation information discussed in FIGS. 4 to 16 allows the memory resources of the memory of the zero-value frequency-domain data department to be completed. Similarly, the information in Fig. 17 to also allows zero-valued frequency-domain data elements, and also makes the inverse frequency-domain conversion sparse. The process of the present invention releases a large amount of memory bandwidth requirements and The related power consumption reduces the cost and improves the efficiency. In the group, hardware circuits can be used to implement the processing unit to execute the firmware code. The circuits 30 and 80 can also be integrated into a single-function processing circuit. For example, the actual access of the memory in the frequency domain data array consumes the bandwidth requirement of the internal memory. It is a simple translation of the register surface ’to determine whether the array elements of this bit plane are zero. This $ shift method is used to access bit plane and mid plane information to judge that each frequency 2 system frequency domain data array internally records & the compression / decompression process is faster. For example, in the present invention, the use of bit-level element access does not actually occupy the internal memory, which can make the streaming scan process faster. In the eighteenth embodiment, the bit-plane element does not actually access the internal memory line. fast. Using frequency domain data array technology can compress / decompress resources in the image data, reduce the internal memory and make relevant processing circuits. In the embodiments of the present invention, each module 'or the center of the processing circuit can achieve its Features. The aforementioned process has a judgment mode in the processing circuits 3 0 and 80
第34頁 日_號 92134163 曰 修正 五、發明說明(29) 組可整合為同一個判斷模組,在壓縮/解壓縮的過程中控 制非零值資料元素於内部記憶體的存取。同樣地,壓縮/ 解壓縮過程中也可使用同一個暫存模組來暫存位元平 面0 以上所述僅為本發明之較佳實施例,凡依本發明申請 專利範圍所做之均等變化與修飾皆應屬本發明專利之涵 蓋範圍。Page 34 Date_No. 92134163 Revision V. Description of Invention (29) Group can be integrated into the same judgment module to control the access of non-zero data elements to internal memory during the compression / decompression process. Similarly, during the compression / decompression process, the same temporary storage module can also be used to temporarily store the bit plane. 0 The above description is only a preferred embodiment of the present invention, and all changes made equally according to the scope of the patent application of the present invention Both the modification and the modification should be covered by the patent of the present invention.
第35頁 索號 92134163 A_ 曰 修正 圖式簡單說明 圖式之簡單說明 意 示 -s' 步 。之 圖時 意碼 示編 程別 流個 之行 縮進 壓面 料晝 資各 像對 影中 型程 典流 1 -為圖 一二 圖圖 方 能 功 的 路 ^6- OHL ίι 處 縮 壓 解 / 縮 壓 料 資 像 影 之 知 習一 為 。 三 圖圖 圖 意 示 塊 方 能 功 之 例 施 實一 路 ^¾ J 11 J1 處 明 。發 一置本 意為 示四 塊圖 平 元 。位 圖立 意建 示列 之陣 面料 平資 元域 位頻 1 一 存據 儲依 組路 模電 存理 暫處 中中 四四 圖圖 為為 五六 圖圖 圖 意 示 之 後 立 ^-^ 面 。平 圖元 意位 示中 程六 過圖 之為 時七 面圖 種 三 時 。描 圖掃 意化 示流 之串 正行 修進 化路 量電 行理 進處 組中 模四 存圖 暫為 中一 四十 圖圖 為至 八九 圖圖 4gl 料意 資示 域之 頻程 中過 六新 圖更 對面 路平 電元 理位 處應 。中對 圖四其 意圖時 示為描 之三掃 序十化 順圖流 描、_ 掃二行 同十進 不圖列 位 行 進 下 。況 圖情 意同 示不 之於 例組 施模 實存 一暫 組中 模四 存十 暫圖 中為 四六 圖十 為、 四五 。十十 圖圖圖 意 示 塊 方 能 功 之 例 施 實一 另 路 ?|1 JJ 。處 圖明 意發 示本 之為 移七 平十 元圖 圖圖 時 移 平 元 位 行 進 式 方 轉 迴 以 組 模 存 暫 中 七 十 圖 為 八Page 35 Call No. 92134163 A_ Revision Modification Simple Description of the Schematic Brief Description of the Schematic Means -s' step. The picture is intended to show the code. Do n’t go alone. Indent the fabric. Press the fabric. Daytime image. The middle-class code flow. 1-It is the road that can work only as shown in Figure 1-2. OHL Shrinking Solution / Shrinking Material Knowledge of the image and shadow is a practice. The three diagrams and diagrams show the example of the block energy function. The implementation is all the way ^ ¾ J 11 J1 is explained. Sending a book is meant to show four picture elements. The bitmap is intended to display the array of fabrics. The flat frequency of the Yuanyuan bit frequency is 1. A data bank is stored in the middle of the road. The fourth and fourth pictures are shown in the figure. . The flat image element is shown in the middle distance. The drawing is sweeping, the stream is being repaired, the evolution path, the electric line management department, the fourth mode is temporarily stored, the first is forty, the picture is from eight to nine, and the figure is 4gl. The figure should be opposite the Luping electric element. In Figure 4, the intention is shown as the third part of the description. The sequence is sequenced, the flow is described, and the two rows are the same as the decimal place. The situation in the picture is the same as that in the example group, and the model is actually stored in the first group, the fourth in the group is saved, and the ten is stored in the temporary group. Ten diagrams and diagrams show an example of a block's ability to perform another way? | 1 JJ. The figure clearly indicates that the display version is shifted to seven levels and the ten-level chart is shifted. The time-shifted level is shifted back to the mode to save the group temporarily. The number seventy is eight.
第36頁 1 秦號 92134163 A_3. 曰 修正 圖式簡單說明 的不意圖。 圖十九為圖十七中處理電路進行一維逆頻域轉換時之演 算法示意圖。 圖式之符號說明 10-12 流程 14、32、82 中央處理單元 1 6、3 6、8 6 記憶存取模組 1 8、3 8 動態估計模組 20、30、80 處理電路 22、40 頻域轉換/量化模組 2 4 逆頻域轉換/反量化模組 2 6、3 4、8 4 外部記憶體 2 8、5 2、1 0 2 内部記憶體 42A 頻域轉換模組 4 2 B 量化模組 4 2 C 量化修正模組 46、92B 資料產生器 48A、98 判斷模組 48B 檢查模組 5 0、1 0 0 暫存模組 5 4、1 0 4 平移控制模組 62A-62E、 66A-66L 步驟Page 36 1 Qin No. 92134163 A_3. Revision Amendment The diagram is not intended to be simply explained. FIG. 19 is a schematic diagram of an algorithm when the processing circuit in FIG. 17 performs a one-dimensional inverse frequency domain conversion. Symbol description of the drawings 10-12 Process 14, 32, 82 Central processing unit 1 6, 3 6, 8 6 Memory access module 1 8, 3 8 Dynamic estimation module 20, 30, 80 Processing circuit 22, 40 frequency Domain conversion / quantization module 2 4 Inverse frequency domain conversion / inverse quantization module 2 6, 3 4, 8 4 External memory 2 8, 5 2, 1 0 2 Internal memory 42A Frequency domain conversion module 4 2 B Quantization Module 4 2 C Quantization Correction Module 46, 92B Data Generator 48A, 98 Judgment Module 48B Inspection Module 5 0, 1 0 0 Temporary Module 5 4, 1 0 4 Translation Control Modules 62A-62E, 66A -66L steps
第37頁Page 37
:涵F 圖式簡单說明 64 箭頭 68 多工器 70 平移控制器 88 動態補償模組 90 轉換模組 92A 反掃描模組 92C 可變長度碼解j 94 轉換檢查模組 96A 常數運算模組 96B 轉換運算模組 STP 旗標 N 位元平面 Cb 控制訊號 A 晝面 B 區塊 Bi j 像素 C、 Q、S、R、Η 資 3 Ci j 、Qij、 Sk、 BmO N 位元平面 Ni j 、NmO-Nm7 位元 R0- R7 行 M 影像資料 Al- A5 晝面 〇j 物體 資料元素: Han F Schematic description 64 Arrow 68 Multiplexer 70 Translation controller 88 Dynamic compensation module 90 Conversion module 92A Anti-scan module 92C Variable length code solution j 94 Conversion check module 96A Constant operation module 96B Conversion operation module STP flag N-bit plane Cb Control signal A Daytime surface B Block Bi j Pixel C, Q, S, R, data 3 Ci j, Qij, Sk, BmO N-bit plane Ni j, NmO -Nm7 bit R0- R7 line M image data Al- A5 day surface 0j object data element
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