1227269 A7 B7 五、發明説明（） 技術領域 (請先閲讀背面之注意事項再填寫本頁) 本發明係有關用於具有銅配線之半導體積體電路之製 造時的平坦化加工過程中之化學機械性硏磨漿料，使用該 漿料硏磨具有銅配線之半導體積體電路的方法，及使用該 漿料作平坦化處理，形成多層配線之具有銅配線的半導體 積體電路。 先行技術 近年來，埋入配線所成之半導體積體電路，因高度積 體化及高性能化，將配線圖型埋入形成在基板上的絕緣層 上之配線構造，以多數層層合成多層配線構造正在普及化 。該多層配線構造之形成過程中，化學機械性硏磨方法（ 以下亦稱c Μ P )已成必要技術。 可使用本發明之具有銅配線之半導體積體電路之形成 方法，係於經形成任意凹凸形狀之基體表面，以濺鍍、鍍 金等形成銅膜後，硏磨去除多餘的銅膜，形成基體凹部以 銅埋入之配線而形成積體電路之所謂大馬士革法。 經濟部智慧財產局員工消費合作社印製 如此平坦化之積體電路，藉多層化可達積體電路之高 容量化。具體而言，一般即係於上述有銅配線之積體電路 上，再形成基體層，於該層以大馬士革法再施以銅配線之 方法。 此時，埋入銅而形成之配線的積體電路各層表面，若 非充分平坦化，則於基體上作電路之多層化時配線產生應 變，難得設計中之配線。 本紙張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） -4- 1227269 A7 ^_B7___ 五、發明説明（^ (請先閲讀背面之注意事項再填寫本頁) 因此，因以於多層化之積體電路形成銅配線之大馬士 革法中，以表面硏磨平坦化乃左右積體電路性能之重要因 素。此時係以c Μ P，使旋轉中之硏磨墊接觸該銅膜之凹 凸，將積體電路表面平坦化。 該以CMP之平坦化處理中，早已成爲課題者係，硏 磨過程中比基板軟之配線部份的銅過度硏磨之所謂碟化或 凹陷現象。起碟化、凹陷之狀態下，因配線厚度變薄配線 電阻加大.，不得設計性能。又因成爲次一層合面之凹凸、 應變之原因，逐步於半導體積體電路作多層化之際，有礙 於積體電路之平坦層合。 碟化之對策，雖有對用於C Μ Ρ漿料的磨粒粒徑、形 狀之加以限定，但除碟化問題以外，經硏磨的表面損傷之 發生，成本合算的硏磨速度（大約2 0 0奈米/分鐘以上 )之問題，仍未能充分解決。 另有對半導體積體電路之被硏磨面（凹凸面）形成保 護膜，硏磨時以機械性物理性接觸去除凸部之保護膜，將 硏磨面平坦化之嘗試探討，亦尙不得滿意結果。 經濟部智慧財產局員工消費合作社印製 而市場有半導體積體電路的高速化之需求，爲此，對 於取代向來廣泛使用之鋁，改用電阻更低的銅作爲配線材 料已受囑目，但因無法如鋁之可簡便以乾式蝕刻形成配線 ’必須作更微細之加工，以大馬士革法形成配線已是一般 手法。因此，C Μ Ρ於銅配線形成已係必要技術，而相較 於以往可藉C Μ Ρ平坦化之材料，銅可請易於發生碟化現 象。 本紙張尺度適用中國國家標準（CNS ) Α4規格（21〇Χ297公釐) -5- 1227269 A7 B7 五、發明説明（2 習知CMP漿料中，爲半導體積體電路表面平坦化之 目的，有於漿料添加氨茴酸、喹哪啶酸者，這些在有銅配 線之半導體積體電路晶圓之硏磨過程中，會與基板上之銅 膜反應形成氨茴酸、喹哪啶酸之強固銅螯合物層，而阻礙 硏磨，難得充分之硏磨速率。並且，該銅螯合物層因與硏 磨墊等磨擦剝落，此應即硏磨進行之機理，而形成強固層 之銅螯合物非以硏磨墊之摩擦力去除不可，就會有銅螯合 物牢固附著於硏磨墊之造成其污染。又，隨條件之不同預 期會與硏磨中削除之銅反應，形成游離之銅錯合物，此時 不得銅螯合物濃度之安定化，無法穩定進行硏磨。 再加上，半導體積體電路的高密度化之結果，設於電 路基板上的配線線寬之大小，配線密度疏密差異變大，要 於具有銅配線之半導體積體電路將其表面一致平坦化，已 係曰益困難。 本發明之目的在針對市場所企盼，高密度配線之具銅 配線的半導體積體電路，解決早已造成困擾的半導體積體 電路之C Μ P平坦化加工時之碟化問題。 發明之揭示 本發明人等發現，於CMP漿料添加特定量之氨茴酸 銅螯合物及/或喹哪啶酸銅螯合物，即可克服先行技術之 問題，而完成本發明。亦即，本發明具以下特徵 (1 )其特徵爲：含（a )水，（b )硏磨磨粒〇 · 〇 1 至30質量％， （c)氨茴酸銅螯合物及/或喹哪啶酸銅 本紙張尺度適用中.國國家標準（CNS ) Α4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 -6- 1227269 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明説明（4 螯合物，其氨茴酸及/或喹哪啶酸換算後爲0 . 0 5至 1 0質量％之具有銅配線的半導體積體電路之硏磨用化學 機械性硏磨漿料。 (2 )上述（1 )之化學機械性硏磨漿料，其上述磨粒係 平均粒徑在0·05至0·5微米之α-氧化鋁。 (3 )上述（1 )或（2 )之化學機械性硏磨漿料，其更 含界面活性劑0 · 0 0 1至3 0質量％。 (4 )上述（1 )至（3 )中任一之化學機械性硏磨漿料 ，其所含界面活性劑使漿料之P h成2至1 0。 (5 )其特徵爲：使用含（a )水，（b )硏磨磨粒 0.01至30質量％， （c)氨茴酸銅螯合物及/或喹 哪啶酸銅螯合物，其氨茴酸及/或喹哪啶酸換算後爲 0 · 0 5至1 0質量％之水性溶劑漿料的具有銅配線之半 導體積體電路硏磨方法。 (6 )上述（5 )之半導體積體電路硏磨方法，其半導體 積體電路之配線密度在1 0至9 0 %。 (7 )上述（5 )之半導體積體電路硏磨方法，其配線線 寬爲〇.03至100微米。 (8)利用上述（5)至（7)中任一之半導體積體電路 硏磨方法作平坦化處理’形成多層配線的具有銅配線之半 導體積體電路。 發明之最佳實施形態 以下更詳細說明本發明。 本紙張尺度適用中國國家標準（CNS ) A4規格（210 X 297公釐） ' — -7 - (請先閲讀背面之注意事項再填'寫本耳j 1227269 A7 B7 五、發明説明（g (請先閱讀背面之注意事項再填寫本頁) 本發明之CMP漿料，其特徵爲：含（a)水，（b )硏磨磨粒，（c )氨茴酸銅螯合物及/或喹哪啶酸銅螯 合物之水性溶劑漿料所成，用於具有銅配線之半導體積體 電路。 本發明之C Μ P漿料之水性溶劑，基於工作環境及硏 磨後之易於淸洗，係以水爲主溶劑，必要時亦可適當混合 甲醇、乙醇、正丙醇、異丙醇、丙酮、丁酮、醋酸乙酯及 乙二醇等之有機溶劑。 水與有機溶劑混合使用時，混合溶劑中水含量以5 0 質量％以上爲佳，8 0質量％以上更佳，9 5質量％以上 特佳。 用於本發明之C Μ Ρ漿料的硏磨磨粒無特殊限制，爲 更有效作半導體積體電路之平坦化，從硏磨速率之觀點， 以平均粒徑0 · 05至0 · 5微米之氧化鋁、5 —氧 化鋁爲佳，α -氧化鋁尤佳。此外，Θ -氧化鋁、r —氧 化鋁等過渡氧化鋁，煙霧氧化矽、膠體氧化矽、氧化鈽等 磨粒亦可使用。這些可一種單獨或二種以上組合使用。 經濟部智慧財產局員工消費合作社印製 本發明CMP漿料中磨粒含量在0·01至3〇質量 %，以0 .1至10質量％爲佳，0 · 5至5質量％爲更 佳。 本發明CMP漿料含氨茴酸銅螯合物及/或 銅螯合物。 氨箇酸銅螯合物及/或喹哪啶酸銅螯合物，gm胃 酸及/或喹哪啶酸與作爲銅供給源之化合物，混合$ 7jc $容 本紙張尺度適用中.國國家標準（CNS ) A4規格（210X297公釐) '^ -- -8 - 1227269 A 7 _____B7____ 五、發明説明（4 液而成。 (請先閲讀背面之注意事項再填寫本頁) 作爲銅供給源之化合物，有硫.酸銅、硝酸銅、醋酸銅 、氯化銅或這些之水合物等，可釋出銅離子之化合物，氫 氧化銅’氨銅錯合物等配位力弱於氨茴酸或喹哪啶酸之銅 化合物，銅金屬本身等。這些可一種單獨或二種以上組合 使用。 爲提升硏磨速率等目的，於漿料中配合任意成分甘氨 醯替甘氨酸、酒石酸、琥珀酸、抗壞血酸、己二酸、衣康 酸、甲酸、乳酸、丙二酸、乙醇酸、馬來酸、檸檬酸、蘋 果酸、草酸、水楊酸等其它螯合劑時，漿料中形成氨茴酸 及/或嗤哪啶酸之銅螯合物時，若配合之銅成分比率過高 ，則銅成分與甘氨醯替甘氨酸等其它螯合劑反應，失去這 些任意成分之效果，不得所欲之硏磨速率。因此，銅成分 之添加量，以調整到與氨茴酸及/或喹哪啶酸反應剩餘之 銅成分，少於與其它螯合劑形成銅螯合物之量爲佳。 經濟部智慧財產局員工消費合作社印製 另一方面，若氨箇酸及/或喹哪啶酸之比率過高，則 直接與晶圓上之銅反應，於晶圓上形成氨茴酸銅或喹哪啶 酸銅膜，結果硏磨速率下降。因此，氨茴酸及/或喹哪陡 酸之合計量，與作爲銅供給源之化合物的混合比，以於上 述範圍，於硏磨前形成銅螯合物配合於漿料中爲較佳。 本發明之CMP漿料中，氨茴酸銅螯合物、鸣哪陡酸 銅螯合物可一種單獨或二種組合使用。 本發明C Μ P漿料中，氨茴酸銅螯合物及/或喹哪B定 酸銅螯合物之含量，以氨茴酸及/或喹哪啶酸換算後在 本紙張尺度適用中.國國家標準（CNS ) Α4規格（210Χ297公釐） ' -- -9 - 1227269 經濟部智慧財產局8工消費合作社印製 A7 ____B7__五、發明説明（) 0 · 05至10質量％，〇 . 1至8質量％爲較佳， 0·5至5質量％爲更佳。 氨茴酸銅螯合物、喹哪啶酸銅螯合物含量過少時難得 平坦化之效果，反之，過多時粘度過高，妨礙硏磨墊與半 導體晶圓之摩擦，不得充分之硏磨速率，碟化亦或因而加 大。 爲使氨茴酸銅螯合物及/或喹哪啶酸銅螯合物，於 C Μ P漿料中以安定形態存在，不宜添加對銅離子之吸引 性強於氨茴酸及/或喹哪啶酸之物質。不得已添加銅離子 吸引性強之物質時，宜適當設定C Μ Ρ漿料之ρ Η及種種 硏磨環境，以供給氨茴酸及/或喹哪啶酸可充分形成螯合 物之銅離子。 本發明之C Μ Ρ漿料，必要時亦可含ρ Η調整劑。 Ρ Η調整劑無特殊限制，一般因半導體硏磨時金屬離子等 之存在係不佳，可用例如下述之ρ Η調整劑。 調整到碱側之ρ Η調整劑有，氨、參羥基甲胺基甲烷 ，氫氧化四甲銨等之四級銨鹽，哌嗪，其它有機胺，含胺 基之有機物等。 調整到酸性側之ρ Η調整劑有，硝酸、硫酸、鹽酸等 無機酸、醋酸、丙酸、乳酸、檸檬酸、草酸、琥珀酸等有 機酸。 這些Ρ Η調整劑中，以與銅反應性低之參羥基甲胺基 甲烷，氫氧化四甲銨等四級銨鹽、硝酸等爲較佳。 Ρ Η調整劑之含量隨種類而異，而本發明之CMP漿 本紙張尺度適用中國國家標率（CNS ) Α4規格（210X297公釐）~" (請先閲讀背面之注意事項再填寫本頁) •10- 1227269 A7 __ 一 B7 _ 五、發明説明（g 料的p Η以最終調成2至1 〇爲佳，調整爲3至9更佳。 在該範圍時，對配線材料銅之侵蝕、表面氧化少，故尤可 發揮平坦化之效能。 又，本發明之C Μ Ρ漿料，必要時可含界面活性劑。 含界面活性劑時CMP漿料分散性提升，同時可獲消泡效 果。 界面活性劑無特殊限制，係適當選自陰離子界面活性 劑、陽離.子界面活性劑、非離子界面活性劑或兩性界面活 性劑。 陰離子界面活性劑有，月桂基硫酸銨、聚丙烯酸、烷 基硫酸酯鹽、烷基苯磺酸鹽等。 非離子界面活性劑有，聚氧化乙烯衍生物、聚氧化乙 烯山梨糖醇酐脂肪酸酯、甘油脂肪酸酯等。 陽離子界面活性劑有，烷基胺鹽、四級銨鹽等。兩性 界面活性劑有烷基甜菜碱、胺氧化物等。 本發明C Μ Ρ漿料中界面活性劑之含量以〇 . 〇 〇 1 至30質量％爲佳，0 . 005至10質量％爲更佳， 0 · 0 1至5質量％爲特佳。 又，本發明之CMP漿料，在無損於本發明效果之範 圍，可添加或採用以往C Μ Ρ漿料所用物質或阻成物及條 件。 例如，可添加苯并***或其衍生物，甘氨醯替甘氨酸 、過氧化氫、聚丙烯酸等，其添加量各以苯并***或其衍 生物爲0.001至1.0質量％，甘氨醯替甘氨酸 本紙張尺度適用中國國家標準（CNS ) Α4規格（210 X 297公釐） (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 -11 - 1227269 A7 B7 五、發明説明（4 0 · 1至10 · 0質量％，過氧化氫0 · 01至15質量 %，聚丙烯酸0.01至5·0質量％爲佳。 本發明之C Μ P漿料，係於必要時將p Η調整劑、界 面活性劑、其它成分於水性溶劑混合而調製。 氨茴酸銅螯合物及/或喹哪啶酸銅螯合物，係先形成 銅螯合物，再添加於水性溶劑爲較佳，亦可將氨茴酸及/ 或喹哪啶酸，作爲銅供給源之化合物個別添加於水性溶劑 ，於水性溶劑中形成螯合物。爲形成螯合物而混合時，以 於形成螯合物之際添加Ρ Η調整劑爲較佳。 本發明之CMP漿料經用於半導體積體電路之CMP ，可實現半導體積體電路表面之優良平坦化效果。 本發明之CMP漿料可實現半導體積體電路表面之優 良平坦化性能之理由雖無定論，但應係含氨茴酸銅螯合物 及/或喹哪啶酸銅螯合物，使C Μ Ρ漿料成爲具特殊粘性 之流體，因而在半導體積體電路表面之CMP加工過程中 ，進入圖型凹部之CMP漿料不移動，力難以傳導至凹部 底部，故僅凸部受到硏削，而錯層消除性優之故。又，凹 部漿料移動不易之想法係基於，不只粘性，並且含銅之螯 合物粒子因與銅具親和性，故力所不及之處難以移動之思 考。 又，以本發明之CMP漿料可得較優硏磨速率之理由 ，推測係氨茴酸及/或喹哪啶酸開始時即以銅螯合物配合 於CM Ρ漿料，於半導體積體電路之銅膜表面，以銅螯合 物之形態強固附著，與硏磨墊抵接，藉機械性物理性作用 本紙張尺度適用中·國國家標準（CNS ) A4規格（210X297公釐） (請先閱讀背面之注意事項再填寫本頁) 衣· 訂 經濟部智慧財產局員工消費合作社印製 -12- 1227269 A7 ____·__B7_ ___ 五、發明説明（：)〇 ，銅螯合物處於可予輕易去除的狀態之故。 (請先閲讀背面之注意事項再填寫本頁) 上述「特殊粘性」係假定爲硏磨條件下具如降伏値般 之性質，施以某剪切應力時應力只能傳抵極短距離。 又，「特殊粘性」亦可係施以剪切應力時，隨時間有 增粘之觸變性，此時，漿料替換快速之凸部粘度仍低，進 入相對替換較少之凹部的漿料增粘，因此效果凹部漿料之 移動更受抑制，故變成漿料主要係僅於凸部流動而硏磨。 因此，能選擇性作凸部之硏磨，而可得平坦化能力優良之 C Μ P漿料。 如此，欲以本發明之C Μ Ρ漿料作半導體積體電路的 平坦化之硏磨時，維持高硏磨速率下，因硏磨之機械性物 理性應力而遭碟化之配線部位，可抑制更甚之碟化。 並且，遭碟化之部位以外，具體而言，半導體積體電 路表面成爲凸部之部位，因硏磨墊之機械性物理性作用而 容易去除，有配線之半導體積體電路之表面，即可優予平 坦化。 經濟部智慧財產局員工消費合作社印製 而硏磨時硏磨墊所受之機械性物理性作用壓力可予換 算，大致以0 · 69 x 103至3 · 45x 104帕左右爲 佳。 又，有銅配線之半導體積體電路，基材及配線材料銅 以外之金屬成分，或難予淸洗之成分不宜含於CMP漿料 中，由此觀點，氨茴酸銅螯合物及/或喹哪啶酸銅螯合物 係爲較佳，可免有擴散於基板、絕緣膜中之虞的銅以外金 屬成分等之污染，適用作形成具有銅配線之半導體積體電 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） ' -13- 1227269 A7 B71227269 A7 B7 V. Description of the invention (Technical field (please read the precautions on the back before filling out this page) The present invention relates to chemical machinery used in the planarization process during the manufacture of semiconductor integrated circuits with copper wiring Honing slurry, a method for honing a semiconductor integrated circuit with copper wiring using the slurry, and flattening the slurry using the slurry to form a multilayer semiconductor integrated circuit with copper wiring. Advanced technology In recent years, semiconductor integrated circuits formed by buried wiring have been highly integrated and high-performance, and have a wiring pattern embedded in a wiring structure formed on an insulating layer formed on a substrate. Wiring structures are spreading. In the process of forming the multilayer wiring structure, a chemical mechanical honing method (hereinafter also referred to as cMP) has become a necessary technology. The method for forming a semiconductor integrated circuit with copper wiring according to the present invention can be used to form a copper film by sputtering, gold plating, etc. on the surface of a substrate having an arbitrary concave-convex shape, and then remove the excess copper film by honing to form a substrate recess. The so-called Damascus method in which integrated circuits are formed with copper-embedded wiring. The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs has printed such a flat integrated circuit, which can achieve high capacity of the integrated circuit by multi-layering. Specifically, it is generally based on the above-mentioned integrated circuit with copper wiring, and then a substrate layer is formed, and copper wiring is applied to the layer by Damascus method. At this time, if the surface of each layer of the integrated circuit of the wiring formed by burying copper is not sufficiently flattened, the wiring will be deformed when the circuit is multilayered on the substrate, and the wiring in the design will be rare. This paper size applies Chinese National Standard (CNS) A4 specification (210X297 mm) -4- 1227269 A7 ^ _B7 ___ V. Description of the invention (^ (Please read the notes on the back before filling this page) Therefore, due to the multi-layered In the Damascus method where the integrated circuit forms copper wiring, surface honing and flattening is an important factor affecting the performance of the integrated circuit. At this time, c MP is used to make the honing pad in contact with the unevenness of the copper film. The surface of the integrated circuit is flattened. In the flattening treatment by CMP, it has long been the subject of the problem. The so-called dishing or pitting phenomenon that the copper in the wiring part softer than the substrate during honing is excessively honing. In the state of depression, the wiring resistance is increased due to the thinner wiring thickness, and the performance must not be designed. Due to the unevenness and strain of the next layer, the semiconductor integrated circuit is gradually multilayered, which is a hindrance. Flat lamination of integrated circuits. Although the countermeasures for dishing limit the size and shape of the abrasive grains used in CMP slurry, in addition to the problem of dishing, the surface damage after honing occurs, Cost sum The honing speed (above 200 nanometers / minute or more) has not been fully solved. In addition, a protective film is formed on the honing surface (concave and convex surface) of the semiconductor integrated circuit. The physical contact removes the protective film of the convex part and attempts to flatten the honing surface, but the results are not satisfactory. It is printed by the consumer cooperative of employees of the Intellectual Property Bureau of the Ministry of Economic Affairs and there is a demand for high-speed semiconductor integrated circuits in the market. Therefore, instead of the widely used aluminum, the use of copper with lower resistance as the wiring material has been ordered, but because it cannot be easily formed by dry etching as aluminum, it must be processed more finely and formed by Damascus method. Wiring is already a common technique. Therefore, the formation of copper wiring on copper is necessary technology. Compared with materials that can be flattened by copper on copper in the past, copper can be easily prone to dishing. This paper standard is applicable to China. Standard (CNS) A4 specification (21 × 297 mm) -5- 1227269 A7 B7 V. Description of the invention (2 In the conventional CMP slurry, for the purpose of planarizing the surface of semiconductor integrated circuits, there are Those who add anthranilic acid and quinolinic acid to the slurry will react with the copper film on the substrate during the honing process of semiconductor integrated circuit wafers with copper wiring to form the strong The copper chelate layer hinders honing, and it is difficult to obtain a sufficient honing rate. Moreover, the copper chelate layer is peeled off by friction with a honing pad, etc. This should be the mechanism of honing to form a strong layer of copper. The chelate cannot be removed by the friction of the honing pad, and the copper chelate will be firmly attached to the honing pad, causing its contamination. Also, depending on the conditions, it is expected to react with the copper removed in the honing to form Free copper complexes must not stabilize the concentration of copper chelate at this time, and can not be honing stably. In addition, as a result of higher density of semiconductor integrated circuits, the width of the wiring lines provided on the circuit board The size and the difference in the density of wiring become large. It is difficult to uniformly planarize the surface of a semiconductor integrated circuit with copper wiring. The purpose of the present invention is to address the market expectation of semiconductor integrated circuits with copper wiring with high-density wiring, and to solve the problem of dishing during the CMP flattening of semiconductor integrated circuits that has caused troubles. Disclosure of the Invention The present inventors discovered that adding a specific amount of copper anthranilate chelate and / or copper quinalate chelate to the CMP slurry can overcome the problems of the prior art and complete the present invention. That is, the present invention has the following features (1), which are characterized by: (a) water, (b) honing abrasive grains 0.001 to 30% by mass, (c) copper anthranilate chelate and / or Copper quinodionate This paper is in standard. National National Standard (CNS) Α4 size (210X297 mm) (Please read the precautions on the back before filling this page) Order printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives-6 -1227269 A7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the Invention (4 Chelate, its anthranilic acid and / or quinalacic acid converted into 0.5 to 10% by mass of copper Chemical-mechanical honing slurry for honing of semiconductor integrated circuits for wiring. (2) The chemical-mechanical honing slurry of (1) above, wherein the average particle size of the abrasive particles is in the range of 0.05 to 0.5 Α-alumina in micrometers. (3) The chemical mechanical honing slurry of (1) or (2) above, further containing a surfactant 0. 0 0 1 to 30% by mass. (4) The above (1) The chemical mechanical honing slurry according to any one of (3) to (3), which contains a surfactant to make the pH of the slurry 2 to 10. (5) It is characterized by using (a) water (B) Honed abrasive grains 0.01 to 30% by mass, (c) Copper anthranilate chelate and / or copper quinalate chelate, whose anthranilate and / or quinalidate are 0 · A method for honing a semiconductor integrated circuit with copper wiring in an aqueous solvent slurry of 0.5 to 10% by mass. (6) The method for honing a semiconductor integrated circuit of the above (5), the wiring density of the semiconductor integrated circuit 10 to 90%. (7) The semiconductor integrated circuit honing method of the above (5), the wiring line width of which is 0.03 to 100 microns. (8) Use any of the above (5) to (7) The first method for honing a semiconductor integrated circuit is to flatten the semiconductor integrated circuit with copper wiring forming a multilayer wiring. BEST MODE FOR CARRYING OUT THE INVENTION The present invention will be described in more detail below. This paper standard applies to the Chinese National Standard (CNS) A4 specifications (210 X 297 mm) '— -7-(Please read the notes on the back before filling in' Writing this ear j 1227269 A7 B7 V. Description of the invention (g (Please read the notes on the back before filling out this page) The CMP slurry of the present invention is characterized by: (a) water, (b) honing abrasive particles, (c) anthranilic acid Chelate and / or copper quinalate chelate aqueous solvent slurry for semiconductor integrated circuits with copper wiring. The aqueous solvent of the CMP slurry of the present invention is based on the working environment and After grinding, it is easy to wash, and it is based on water. If necessary, organic solvents such as methanol, ethanol, n-propanol, isopropanol, acetone, methyl ethyl ketone, ethyl acetate, and ethylene glycol can be appropriately mixed. When mixed with an organic solvent, the water content in the mixed solvent is preferably 50% by mass or more, more preferably 80% by mass or more, and particularly preferably 95% by mass or more. The honing abrasive particles used in the CMP slurry of the present invention are not particularly limited. In order to more effectively planarize a semiconductor integrated circuit, from the standpoint of the honing rate, an average particle diameter of 0. 05 to 0. 5 microns is used. Alumina and 5-alumina are preferred, and α-alumina is particularly preferred. In addition, abrasive grains such as Θ-alumina and r-alumina can be used, as well as abrasive particles such as fumed silica, colloidal silica, and hafnium oxide. These can be used alone or in combination of two or more. The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the abrasive content in the CMP slurry of the present invention in the range of 0.01 to 30% by mass, preferably 0.1 to 10% by mass, and more preferably 0.5 to 5% by mass. . The CMP slurry of the present invention contains copper anthranilate chelate and / or copper chelate. Copper glutamate chelate and / or copper quinalate chelate, gm gastric acid and / or quinalic acid and a compound as a copper supply source, mixed $ 7jc $ This paper is applicable in the national standard. National standards (CNS) A4 specification (210X297 mm) '^--8-1227269 A 7 _____B7____ 5. Description of the invention (4 fluids. (Please read the precautions on the back before filling out this page) Compounds as a copper supply source There are sulfur. Copper acid, copper nitrate, copper acetate, copper chloride or these hydrates, etc. Compounds that can release copper ions, copper hydroxide 'ammonia copper complexes have weaker coordination forces than anthranilic acid or Copper compounds of quinaldic acid, copper metal itself, etc. These can be used singly or in combination of two or more. For the purpose of improving the honing rate, etc., any ingredients such as glycine, tartaric acid, succinic acid, When ascorbic acid, adipic acid, itaconic acid, formic acid, lactic acid, malonic acid, glycolic acid, maleic acid, citric acid, malic acid, oxalic acid, salicylic acid and other chelating agents, anthranilic acid and / Or copper chelate of linalic acid If the ratio is too high, the copper component reacts with other chelating agents such as glycine and glycine, and the effect of these arbitrary components is lost, and the rate of honing is undesired. Therefore, the amount of copper component is adjusted to match with anthranilic acid and / Or the remaining copper component of the quinacid acid reaction is less than the amount of copper chelates formed with other chelating agents. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs On the other hand, if amino acid and / or quinine If the ratio of nalidixic acid is too high, it will directly react with the copper on the wafer to form a copper anthranilate or copper quinalidate film on the wafer. As a result, the honing rate decreases. Therefore, anthranilic acid and / or quinine The total amount of which steep acid is mixed with the compound as a copper supply source is within the above range, and it is preferable to form a copper chelate compound before the honing and mix it in the slurry. In the CMP slurry of the present invention, ammonia The copper anthracene chelate and copper naphthoate chelate can be used singly or in combination. In the CMP slurry of the present invention, the copper anthracene chelate and / or the quinal B copper chelate The content of the compound is calculated on the basis of this paper in terms of anthranilic acid and / or quinalac acid. Used in China National Standard (CNS) A4 specification (210 × 297 mm) '--9-1227269 Printed by A8 Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 ____B7__ V. Description of Invention () 0 · 05 to 10% 0.1 to 8% by mass is more preferred, and 0.5 to 5% by mass is even more preferred. Copper anthranilate chelate and copper quinalate chelate content are too small to obtain a flattening effect, and vice versa, When too much, the viscosity is too high, which prevents the friction between the honing pad and the semiconductor wafer, and the honing rate must not be sufficient, and the dishing may also increase. In order to make copper anthranilate chelate and / or copper quinalate chelate The compound exists in a stable form in the CMP slurry, and it is not suitable to add a substance having a stronger attraction to copper ions than anthranilic acid and / or quinalidic acid. When copper ions have to be added, it is advisable to appropriately set the pH of the CMP slurry and various honing environments, so as to supply the copper ion of anthranilic acid and / or quinalic acid, which can sufficiently form a chelate. The CMP slurry of the present invention may also contain a pH adjusting agent when necessary. There is no particular limitation on the P Η regulator, and generally, the presence of metal ions or the like during semiconductor honing is not good. For example, the following ρ Η regulator can be used. The pH adjusting agents adjusted to the alkali side include quaternary ammonium salts such as ammonia, paramethylaminomethane, tetramethylammonium hydroxide, piperazine, other organic amines, and organic substances containing amine groups. The pH adjusting agents adjusted to the acidic side include inorganic acids such as nitric acid, sulfuric acid, and hydrochloric acid, organic acids such as acetic acid, propionic acid, lactic acid, citric acid, oxalic acid, and succinic acid. Among these P Η regulators, quaternary ammonium salts such as hydroxymethylaminomethane, tetramethylammonium hydroxide, and nitric acid, which have low reactivity with copper, are preferred. The content of the P Η adjuster varies with the type, and the paper size of the CMP pulp of the present invention is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm) ~ " (Please read the precautions on the back before filling this page ) • 10- 1227269 A7 __ 一 B7 _ 5. Explanation of the invention (p Η of g material is preferably adjusted to 2 to 10, and more preferably adjusted to 3 to 9. In this range, the erosion of the wiring material copper The surface oxidation is small, so it can exert the effect of flattening. In addition, the CMP slurry of the present invention may contain a surfactant when necessary. When the surfactant is contained, the dispersibility of the CMP slurry is improved, and defoaming can be obtained at the same time. Effect. The surfactant is not particularly limited, and is appropriately selected from anionic surfactants, cations, sub-surfactants, non-ionic surfactants, or amphoteric surfactants. Anionic surfactants include ammonium lauryl sulfate, polyacrylic acid , Alkyl sulfate salts, alkylbenzene sulfonates, etc. Non-ionic surfactants include polyoxyethylene derivatives, polyoxyethylene sorbitan fatty acid esters, glycerin fatty acid esters, etc. Cationic surfactants include ,alkyl Ammonium salts, quaternary ammonium salts, etc. Amphoteric surfactants include alkyl betaines, amine oxides, etc. The content of the surfactant in the CMP slurry of the present invention is preferably from 0.0001 to 30% by mass, 005 to 10% by mass is more preferred, and 0. 0 1 to 5% by mass is particularly preferred. In addition, the CMP slurry of the present invention can be added or used in the past as long as the effect of the present invention is not impaired. For example, benzotriazole or its derivative, glycine, glycine, hydrogen peroxide, polyacrylic acid, etc. can be added, and the amount of each addition is benzotriazole or its derivative. For 0.001 to 1.0% by mass, Glycine and Glycine are applicable to the Chinese National Standard (CNS) A4 size (210 X 297 mm) (Please read the notes on the back before filling this page) Order the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the employee consumer cooperative -11-1227269 A7 B7 V. Description of the invention (40 · 1 to 10 · 0% by mass, hydrogen peroxide 0 · 01 to 15% by mass, and polyacrylic acid 0.01 to 5.0% by mass are preferred. The CM P slurry of the present invention is a p Η modifier, interfacial activity The agent and other ingredients are mixed and prepared in an aqueous solvent. Copper anthranilate chelate and / or copper quinalate chelate are preferably formed into a copper chelate and then added to an aqueous solvent. Anthranilic acid and / or quinaldic acid are individually added as a copper supply compound to an aqueous solvent to form a chelate in the aqueous solvent. When mixed to form a chelate, it is added at the time of chelate formation. The P Η adjusting agent is preferred. The CMP slurry of the present invention can be used for CMP of a semiconductor integrated circuit to achieve an excellent planarization effect on the surface of the semiconductor integrated circuit. Although the reason why the CMP slurry of the present invention can achieve the excellent planarization performance of the semiconductor integrated circuit surface is inconclusive, it should be copper anthranilate chelate and / or copper quinalate chelate, so that C M The P slurry becomes a fluid with special viscosity. Therefore, during the CMP processing of the surface of the semiconductor integrated circuit, the CMP slurry entering the pattern recess does not move, and it is difficult for the force to be transmitted to the bottom of the recess. Therefore, only the projection is subject to chamfering. The reason why split-level elimination is excellent. In addition, the idea that the slurry in the concave portion is difficult to move is based on the idea that it is not only viscous, but also that copper-containing chelate particles have an affinity with copper, so it is difficult to move beyond their capabilities. In addition, for the reason that the CMP slurry of the present invention can obtain a better honing rate, it is presumed that at the beginning of anthranilic acid and / or quinaldic acid, a copper chelate compound was added to the CM slurry, and the semiconductor compact was The surface of the copper film of the circuit is strongly adhered in the form of a copper chelate, and abuts the honing pad. By the mechanical and physical effect, this paper is applicable to the Chinese national standard (CNS) A4 specification (210X297 mm) (please Read the precautions on the back before filling in this page) Clothing · Order Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -12-12269269 A7 ____ · __B7_ ___ V. Description of the Invention (:) 〇 The copper chelate is easily accessible Reason for removal. (Please read the precautions on the back before filling in this page) The above-mentioned "special viscosity" is assumed to be like a drop under the condition of honing. The stress can only be transmitted to a very short distance when a certain shear stress is applied. In addition, the "special viscosity" can also be a thixotropic property that increases with time when shear stress is applied. At this time, the viscosity of the convex part of the rapid replacement of the slurry is still low, and the slurry entering the relatively less concave part increases. It is sticky, so the effect is that the movement of the slurry in the concave part is more suppressed, so the slurry becomes honing mainly because it flows only in the convex part. Therefore, it is possible to selectively perform honing of the convex portions, and obtain a CMP slurry having excellent planarization ability. Thus, when the CMP slurry of the present invention is to be used for honing the planarization of a semiconductor integrated circuit, maintaining a high honing rate, wiring portions that are dished out due to the mechanical physical stress of the honing can be used. Suppression is even worse. In addition, other than the portion being dished, specifically, the surface of the semiconductor integrated circuit that becomes a convex portion can be easily removed due to the mechanical and physical action of the honing pad. The surface of the semiconductor integrated circuit with wiring can be Excellent to flatten. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. The mechanical and physical pressure applied to the honing pad during honing can be converted, which is preferably about 0 · 69 x 103 to 3 · 45 x 104 Pa. In addition, semiconductor integrated circuits with copper wiring, substrates and wiring materials other than copper, or components that are difficult to be cleaned should not be contained in the CMP slurry. From this viewpoint, copper anthranilate chelate and / Or copper quinalate chelates are more suitable, which can avoid contamination of metal components other than copper, which may spread in the substrate and insulating film. It is suitable for forming semiconductor integrated circuits with copper wiring. China National Standard (CNS) A4 specification (210X297 mm) -13- 1227269 A7 B7
五、發明説明（L 路之C Μ P漿料。 (請先閲讀背面之注意事項再填寫本頁) 其次說明以本發明之C Μ Ρ漿料作硏磨的，有銅配線 之半導體積體電路之平坦化處理方法。 本發明之CMP漿料可廣泛應用於有銅配線之半導體 積體電路，可發揮其高速硏磨（高硏磨速率）效果，碟化 抑制能力，對其中配線密度1 〇至9 0 %配線線寬 0 . 03至100微米，日益緻密化、複雜化之近年來的 有銅配線之半導體積體電路配線圖型，可得良好之硏磨速 率，發揮優良的碟化抑制效果。 而，可使用本發明之半導體積體電路若有銅配線即可 發揮本發明之優良效果，本發明亦適用於構成半導體積體 電路之其它要素，如於基板形成有機或無機層間絕緣膜者 ，設有金屬栓（鎢介層等）之半導體積體電路等，半導體 積體電路技術中一般廣爲所知之要素所構成者。 經濟部智慧財產局員工消費合作社印製 這些半導體積體電路之配線，係以本發明之CMP漿 料作平坦化處理。本發明之半導體積體電路之平坦化處理 方法無特殊限制，可採用硏磨墊所受壓力低，硏磨墊轉速 高之低壓硏磨程序，或用於習知半導體積體電路之CMP 過程之方法、條件。 又，含於本發明CMP漿料之氨茴酸銅螯合物及/或 喹哪啶酸銅螯合物，其金屬成分與積體電路之配線同樣是 銅，並係經螯合化之故，淸洗過程中無須使用特殊淸洗方 法。 經本發明之C ΜΡ漿料作平坦化處理之半導體積體電 本I氏張尺度適用中國國家標準（CNS ) Α4規格（210X297公釐） "~ -14- 1227269 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明説明（h 路，因係經優予平坦化，於其多層化之積體電路中亦經良 好層合，可形成容量大，適用於高速化之多層配線構造之 有銅配線的半導體積體電路。 經如此平坦化之形成多層配線，具銅配線之半導體積 體電路，其層合過程中各層間之平坦化可依設計施行，可 抑制多層化中配線之應變於實用上的容許範圍內，可得設 計時所期盼之性能。 實施例 以下揭示實施本發明之組成作說明，惟本發明不限於 此等實施例，在不脫離本發明要旨之範圍內，可廣泛適用 。以下「％」表質量％。 〈基本組成物〉α -氧化鋁（平均粒徑0 · 1 6微米）甘 氨醯替甘氨酸5%，苯並***0.005%，聚丙烯酸 0 . 2 %，過氧化氫1 . 0 %，餘爲水，以上係漿料之基 本組成物，利用經如下例所配成的組成物作半導體積體電 路之硏磨。 〔實施例1〕 使對上述基本組成之漿料，成氨茴酸1 · 0%，硝酸 銅三水合物0.88%，參羥基甲胺基甲烷〇·73%之 量以水溶液混合，添加已生成之氨茴酸銅螯合物於上述基 本組成物。 本紙張尺度適用中.國國家標準（CNS ) Α4規格（210Χ297公釐） (請先閱讀背面之注意事項再填寫本頁)V. Description of the invention (CM Road paste for L road. (Please read the precautions on the back before filling out this page) Secondly, it will explain the semiconductor integrated circuit with copper wiring which is honed by the CM course slurry of the present invention. A method for planarizing a circuit. The CMP slurry of the present invention can be widely used in semiconductor integrated circuits with copper wiring, and can exert its high-speed honing (high honing rate) effect, dishing suppression ability, and the wiring density thereof. 〇 to 90% Wiring line width 0.03 to 100 microns, which has become increasingly dense and complicated. In recent years, semiconductor integrated circuit wiring patterns with copper wiring have good honing rates and excellent dishing. Suppressing effect. Moreover, the semiconductor integrated circuit of the present invention can be used if copper wiring can be used to achieve the excellent effect of the present invention. The present invention is also applicable to other elements constituting a semiconductor integrated circuit, such as forming an organic or inorganic interlayer insulation on a substrate. Films are composed of semiconductor integrated circuits with metal plugs (tungsten interlayers, etc.), which are generally known in semiconductor integrated circuit technology. Consumption by employees of the Intellectual Property Bureau of the Ministry of Economic Affairs The printed wiring of these semiconductor integrated circuits is flattened by using the CMP slurry of the present invention. There is no special limitation on the method of flattening the semiconductor integrated circuits of the present invention, and the honing pad can be used with low pressure. , A low-pressure honing program with a high honing pad rotation speed, or methods and conditions used to learn the CMP process of a semiconductor integrated circuit. Also, the copper anthranilate chelate and / or quinine contained in the CMP slurry of the present invention The metal composition of copper nalidate is the same as that of the integrated circuit wiring and is chelated. Therefore, no special cleaning method is required during the cleaning process. The CMP slurry of the present invention is used for flattening. The processed semiconductor integrated electric book I-scale is applicable to the Chinese National Standard (CNS) Α4 specification (210X297 mm) " ~ -14- 1227269 printed by the Intellectual Property Bureau employee consumer cooperative of the Ministry of Economic Affairs Α7 Β7 V. Description of the invention ( Road h, because it is well-planned, is well laminated in its multilayered integrated circuit, which can form a semiconductor integrated circuit with copper wiring that has a large capacity and is suitable for high-speed multilayer wiring structure. in this way Flattened multilayer wiring, semiconductor integrated circuits with copper wiring, during the lamination process, the planarization between the layers can be implemented according to the design, and the strain of the wiring during the multilayering can be suppressed to a practically acceptable range, and the design can be obtained. Expected performance at the time. Examples The following discloses the composition of the present invention for illustration, but the present invention is not limited to these examples, and can be widely applied without departing from the spirit of the present invention. The following "%" refers to mass%. 〈Basic composition〉 α-alumina (average particle size: 0.16 micron) 5% glycine, glycine, benzotriazole 0.005%, polyacrylic acid 0.2%, hydrogen peroxide 1.0%, The remainder is water. The basic composition of the above series of pastes is the honing of semiconductor integrated circuits using the composition prepared by the following example. [Example 1] The slurry having the above basic composition was mixed with anthranilic acid 1.0%, copper nitrate trihydrate 0.88%, and hydroxymethylaminomethane 0.73% in an aqueous solution, and the resulting mixture was added. The copper anthranilate chelate is in the above basic composition. The size of this paper is applicable. National Standard (CNS) Α4 specification (210 × 297 mm) (Please read the precautions on the back before filling this page)
-15- 1227269 Α7 Β7 五、發明説明（ 〔實施例2〕 (請先閲讀背面之注意事項再填寫本頁) 使對上述基本組成之漿料，成喹哪啶酸1 · 2 6 %， 硝酸銅二水合物0 · 8 8 %之量以水溶液混合，添加已生 成之喹哪啶酸銅螯合物於上述基本組成物。 〔比較例1〕 上述基本組成之漿料不添加其它成分。 〔比較例2〕 使對上述基本組成之漿料，成氨茴酸〇 · 〇 1 %，硝 酸銅三水合物0 · 0 8 8%，參羥基甲胺基甲烷 0 · 0 7 3 %的量以水溶液混合，添加已生成之氨茴酸銅 螯合物於上述基本組成物。 〔比較例3〕 經濟部智慧財產局員工消費合作社印製 使對上述基本組成之漿料，成氨茴酸1 1%，硝酸銅 三水合物9·68%，參羥基甲胺基甲烷8·03%之量 以水溶液混合，添加已生成之氨茴酸銅螯合物於上述基本 組成物。 實施例1、2，比較例1至3之組成物，用下述條件 以CMP硏磨926CMP038晶圓時，50微米線碟 化値及硏磨速率列於表1。而實施例1組成物，用下述條 件以C Μ P硏磨8 3 1 C Μ P 0 0 0晶圓時，各配線寬、 密度及碟化値列於表2。 本紙張尺度適用中.國國家標準（CNS ) Α4規格（210Χ297公釐） -16- 1227269 A7 五、發明説明（ 〈表1〉 5. 〇 發碟化値 硏磨速率（研磨率） 實施例1 5 〇奈米 4 5 〇奈米/分鐘 實施例2 7 〇奈米 5 0 0奈米/分鐘 比較例1 1 2 〇奈米 5 0 0奈米/分鐘 比較例2 1 2 〇奈米 5 0 0奈米/分鐘 比較例3 1 5 〇奈米 3 0 0奈米/分鐘 - (請先閱讀背面之注意事項再填寫本頁) 1_表 2〉 配線寬（微米）（50%密度） 2.5 5 25 50 100 碟化之大小（奈米） 20 25 45 55 70 配線密度（％)(5微米間距） 10 30 50 70 90 碟化之大小（奈米） 18 20 20 30 40 本紙張尺度適用中國國家標準（CNS ) A4規格（210X 297公釐） 經濟部智慧財產局員工消費合作社印製 -17- 1227269 A7 _______B7 五、發明説明（& 〈硏磨條件〉 硏磨機 Mirra Applied Materials 公司製 硏磨壓力 2 . 76x 1 04 帕 轉速 頭97定盤103rpm 漿料流量 200毫升/分鐘 硏磨墊 IC-1000 K-槽 晶圓 SEMATECH 926CMP038 SEMATECH 831CMP000 錯層測定裝置KLA-tencorHRP-100 (請先閱讀背面之注意事項再填寫本頁) 產業上之利用可能性 使用本發明之CMP漿料，可於成本上合算之硏磨速 度下，抑制碟化之發生於最低限，將具銅配線之半導體積 體電路平坦化。並且，因漿料成分不易附著於半導體積體 電路，平坦化處理後不須使用特殊的情洗方法。 使用本發明之CMP漿料作平坦化處理的半導體積體 電路，因優予平坦化，形成多層配線亦可極其良好地作動 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210X297公釐） -18--15- 1227269 Α7 Β7 V. Description of the invention ([Example 2] (Please read the precautions on the back before filling this page) Make the above basic composition slurry into quinalidic acid 1.26%, nitric acid Copper dihydrate was mixed in an aqueous solution in an amount of 0.88%, and the formed copper quinalate chelate was added to the above-mentioned basic composition. [Comparative Example 1] No slurry was added to the above-mentioned basic composition slurry. Comparative Example 2] A slurry of the above-mentioned basic composition was made into anthranilic acid 0.001%, copper nitrate trihydrate 0. 0 8%, and hydroxymethylaminomethane 0. 07 3%. The aqueous solution was mixed, and the generated copper anthranilate chelate was added to the above basic composition. [Comparative Example 3] The employee's cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed a paste of the above basic composition to form anthranilic acid 1 1 %, Copper nitrate trihydrate 9.68%, and hydroxymethylaminomethane 8.03% were mixed in an aqueous solution, and the formed copper anthranilate chelate was added to the above basic composition. Examples 1, 2 When the compositions of Comparative Examples 1 to 3 were honed 926CMP038 wafer by CMP under the following conditions, The 50 micron wire dishing and honing rates are shown in Table 1. When the composition of Example 1 was honed under the conditions of C MP 8 8 1 1 C MP P 0 0 0 wafer, each wiring width and density The specifications of the paper are listed in Table 2. The paper size is applicable. National Standard (CNS) A4 specification (210 × 297 mm) -16-1227269 A7 V. Description of the invention (<Table 1> 5. Grinding rate (grinding rate) Example 1 5 0 nm 4 5 0 nm / min Example 2 7 0 nm 5 0 0 nm / min Comparative Example 1 1 2 0 nm 5 0 0 nm / min Example 2 1 2 0 nm 500 0 nm / min Comparative Example 3 1 5 0 nm 3 0 0 nm / min-(Please read the precautions on the back before filling this page) 1_Table 2> Wiring width (Micron) (50% density) 2.5 5 25 50 100 dish size (nano) 20 25 45 55 70 wiring density (%) (5 micron pitch) 10 30 50 70 90 dish size (nano) 18 20 20 30 40 This paper size is in accordance with China National Standard (CNS) A4 (210X 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs -17- 1227269 A7 _______B7 Description of the invention (& <Honing conditions> Honing pressure 2.76x 1 04 Pa manufactured by Mirra Applied Materials Co., Ltd. Honing machine 97 Fixed plate 103rpm Slurry flow 200ml / min Honing pad IC-1000 K-tank Wafer SEMATECH 926CMP038 SEMATECH 831CMP000 split-layer measuring device KLA-tencorHRP-100 (Please read the precautions on the back before filling out this page) Industrial application possibilities The CMP slurry of the present invention can be cost-effectively honed. At the speed, the occurrence of dishing is suppressed to the minimum, and the semiconductor integrated circuit with copper wiring is flattened. In addition, since the paste components do not easily adhere to the semiconductor integrated circuit, a special method of washing is not required after the planarization treatment. The semiconductor integrated circuit using the CMP slurry of the present invention as a flattening treatment has excellent planarization, and the formation of multi-layer wiring can also extremely well act as an employee consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. CNS) A4 size (210X297 mm) -18-