TWI226755B - Fast frequency synthesizing and modulating apparatus and method - Google Patents
Fast frequency synthesizing and modulating apparatus and method Download PDFInfo
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1226755 五、發明說明(1) 發明所屬之技術領 特別 先前 本發明 是有關 技術 隨著全 越加受到重 便利性可以 援助。而在 訊。因為想 互傳遞資訊 式。近年來 形式來處理 無線通訊中 就傳統 内容,會轉 射器將此信 所發射出的 可允許的誤 頻類比信號 端將會把接 行處理。 傳統用 中包括:相 除了接收一 是有關 於一種 世界國 視。若 快速地 通訊技 要在有 ,除了 ,更由 資料的 ,大部 的無線 換成一 號傳遞 射頻類 差範圍 。當然 收到的 於頻率 位檢知 個參考 於無 快速 際4匕 是某 將此 術中 點距 無線 於半 方式 分都 數位 種用 出去 比信 内, ,在 射頻 合成 器、 頻率 線通訊系統中的跳頻處理技術 頻率合成及調制技術。 且 的同 一國 訊息 ,現 離但 通訊 導體 也越 選擇 通訊 來傳 〇此 號的 便可 接收 類比 時, 不幸 傳送 在最 卻沒 之外 技術 來越 採用 而言 送用 時接 頻率 以接 到此 信號 通訊 發生 到世 吸引 有線 ,沒 的快 普遍 數位 ,位 的射 收器 一樣 收由 射頻 轉換 技術 大事 界各 人注 路連 有其 速發 。因 的形 於傳 頻類 若是 時或 發射 類比 成數 的重 故, 國, 意的 接的 他更 展, 此, 式來 送端 比信 調整 者是 器所 信號 位的 要性 藉由 得到 就屬 兩地 有效 使用 現今 處理 的數 號, 到與 保持 發射 之後 形式 也越來 通訊的 各國的 無線通 之間相 率的方 數位的 使用的 資料。 位貢料 藉由發 發射器 在一個 出的射 ,接收 之後再 及調制所使用的基本鎖相迴路組成 除頻器、壓控振盪器。相位檢知器 信號的輸入外,電性連接至壓控振1226755 V. Description of the invention (1) The technical domain to which the invention belongs Specially, the previous invention is related to technology As the whole gets more and more important, convenience can be assisted. And in the news. Because I want to communicate information. In recent years, the traditional content in wireless communication has been processed, and the transmitter will process the allowable error analog signal end transmitted by this signal. Traditional uses include: In addition to receiving one, it is related to a world view. If there is a fast communication technology, in addition to the data, most of the wireless will be replaced by the No. 1 RF range. Of course, the reference received in the frequency bit is a reference to the no-speed interface. This is a method of using the point distance wirelessly and half way to digitize the digital signal in the radio frequency synthesizer and frequency line communication system. Frequency hopping processing technology Frequency synthesis and modulation technology. And the message of the same country is now away, but the communication conductor also chooses to communicate. The number can receive the analogy. Unfortunately, the transmission technology is the most used, but the frequency is used to receive it. The signal communication happened to attract the wired, and the digital is almost universal, and the radio transmitter is received by the radio frequency conversion technology. If the frequency-transmitting class is time-critical or the analogy of the transmission is significant, the country and the destination will be more successful. Therefore, the sender is more important than the signal adjuster because of the signal bit. The two places effectively use the numbers processed today, and use the data of the square digits of the phase rate with the wireless communication of each country that keeps the communication form after transmission. The source material consists of a frequency divider and a voltage-controlled oscillator by transmitting the transmitter at one output, receiving it, and then using the basic phase-locked loop used for modulation. Phase detector The signal input is electrically connected to the voltage-controlled oscillator.
III II 圓 III 11210twf.ptd 第5頁 1226755 五、發明說明(2) 盪器及除頻器。壓控振盪器係負責輸出振盪信號。相位檢 知器用於比較輸入的參考頻率信號及除頻器所輸出的信號 的相位。除頻器在此將壓控振盪器所輸出的振盪信號進行 除頻後,傳送到相位檢知器。壓控振盪器則是接收相位檢 知器所輸出的信號,經過振盪後提供一個輸出信號之外, 並將此輸出信號送至除頻器。 眾所皆知,石英晶體由於具極穩定的共振特性與非常 高的選擇性(即Q值),使用在振盪器上,可使振盪器的 輸出保持非常精確且穩定的頻率,即高穩定度。但是習知 之鎖相迴路中使用壓控振盪器,其並不是具有高穩定性的 晶體振盪器,故需要有穩定的參考頻率,並進行回授鎖頻 動作。但是傳統鎖相迴路會在鎖頻速度較快時,發生資料 遺失的情形。另外,傳統的鎖相迴路中,由於頻段的調制 量的大小需要一個迴路週期的時間後才能取得調制量的資 料。無法控制精確的調制量之外,鎖頻速度也隨之掌握困 難。再加上,除頻器又是以一固定的值來做除頻的動作, 引起高頻段、低頻段之間跳頻速度難以掌控的問題。 綜合以上所述,可以知道使用習知的單一鎖相迴路來 進行頻率合成及調制時,會有以下等缺點: (1 )傳統的單一鎖相迴路遇到鎖頻速度較快時,會 造成低頻調制響應差,因而無法正常地傳送數據、資料, 甚至會有資料遺失的情況發生; (2 )傳統的單一鎖相迴路由於高、低頻段間的調制 量很難控制,鎖頻速度非常難以掌握;III II Circle III 11210twf.ptd Page 5 1226755 V. Description of the invention (2) Oscillator and frequency divider. The voltage controlled oscillator is responsible for outputting the oscillation signal. The phase detector is used to compare the phase of the input reference frequency signal and the signal output by the divider. The frequency divider divides the oscillating signal output by the voltage controlled oscillator and sends it to the phase detector. The voltage-controlled oscillator receives the signal output by the phase detector, provides an output signal after oscillation, and sends the output signal to the frequency divider. It is well known that quartz crystals have extremely stable resonance characteristics and very high selectivity (ie, Q value). When used on an oscillator, the output of the oscillator can maintain a very accurate and stable frequency, that is, high stability. . However, the voltage-controlled oscillator used in the conventional phase-locked loop is not a crystal oscillator with high stability, so it needs to have a stable reference frequency and perform feedback frequency-locked operation. However, traditional phase-locked loops will lose data when the frequency is locked fast. In addition, in the traditional phase-locked loop, the modulation amount of the frequency band needs a loop cycle time to obtain the modulation amount data. In addition to the inability to control the precise amount of modulation, the frequency-locking speed also becomes difficult to grasp. In addition, the frequency divider uses a fixed value to perform the frequency division operation, which causes a problem that the frequency hopping speed between the high frequency band and the low frequency band is difficult to control. Based on the above, it can be known that when using a conventional single phase-locked loop for frequency synthesis and modulation, there will be the following disadvantages: (1) When the traditional single phase-locked loop encounters a fast frequency-locking speed, it will cause low frequency. The modulation response is poor, so data and data cannot be transmitted normally, and even data loss may occur; (2) The traditional single phase-locked loop is difficult to control due to the modulation between the high and low frequency bands, and it is very difficult to master the frequency-locking speed ;
112101 w f. p t d 第6頁 1226755 五、發明說明(3) (3 )傳統的單一鎖相迴路因相隔波道密集時,高頻 段、低頻段之間跳頻速度過慢,無法符合現今通訊時代之 需求。 發明内容 有鑑於此’本發明就是為改善先前技術的缺點:1 .低 頻調制響應差時資料流失之問題;2 .調制量控制困難,鎖 頻速度難以掌握之問題;3 .跳頻速度不夠快速之問題。此 發明的功效其一為,提供高穩定度及調制平坦的信號,解 決了資料流失的問題;功效其二為,頻率的調制量可進行 微調且容易控制;功效其三為,提供預置電壓加速跳頻速 度。 本發明提供一種快速頻率合成及調制裝置,此裝置包 括:第一鎖相迴路以及第二鎖相迴路。其中的第一鎖相迴 路係根據輸入資料信號與一個精準參考頻率信號,以調變 並振盪出一個中間已載資料的調變信號,而輸出至第二鎖 相迴路。其中的第二鎖相迴路係接於前述的第一鎖相迴路 之後,其根據前述的中間已載資料的調變信號與一個跳頻 參考頻率信號,來振盪出一個輸出調變信號。其中,這個 第二鎖相迴路包括一個輸出壓控振盪器,這個第二鎖相迴 路依據一項預調偏壓資料,供給先置偏壓給該輸出壓控振 盪器,以便於快速振盪出該輸出調變信號。 在本發明的一個較佳實施例中,第一鎖相迴路包括: 第一相位檢知器、第一壓控振盪器、第一除頻器及第二除 頻器。其中,第一壓控振盪器電性連接至第一相位檢知112101 w f. Ptd Page 6 1226755 V. Explanation of the invention (3) (3) When the traditional single phase locked loop is dense, the frequency hopping speed between the high frequency band and the low frequency band is too slow to meet the current communication era Demand. SUMMARY OF THE INVENTION In view of this, the present invention is to improve the shortcomings of the prior art: 1. The problem of data loss when the low-frequency modulation responds poorly; 2. The modulation amount is difficult to control and the frequency lock speed is difficult to grasp; 3. The frequency hopping speed is not fast enough Problem. One of the effects of this invention is to provide a signal with high stability and flat modulation, which solves the problem of data loss; the second is to adjust the amount of modulation of the frequency and is easy to control; the third is to provide a preset voltage Speed up frequency hopping. The invention provides a fast frequency synthesizing and modulating device. The device includes a first phase locked loop and a second phase locked loop. The first phase-locked loop is based on the input data signal and a precise reference frequency signal to modulate and oscillate a modulation signal with the data loaded in the middle, and then output to the second phase-locked loop. The second phase-locked loop is connected after the aforementioned first phase-locked loop, and it oscillates an output modulation signal according to the modulation signal of the previously loaded data and a frequency-hopping reference frequency signal. The second phase-locked loop includes an output voltage-controlled oscillator, and the second phase-locked loop supplies a pre-biased voltage to the output voltage-controlled oscillator according to a pre-adjusted bias voltage data, so as to quickly oscillate the output voltage-controlled oscillator. Output modulation signal. In a preferred embodiment of the present invention, the first phase-locked loop includes: a first phase detector, a first voltage-controlled oscillator, a first frequency divider, and a second frequency divider. The first voltage-controlled oscillator is electrically connected to the first phase detection.
11210rwf.ptd 第7頁 1226755 五、發明說明(4) 器;第一除頻器則是連接至第一相位檢知器以及第一壓控 振盪器。 第一相位檢知器用來比較第一參考頻率信號以及第一 除頻信號後,輸出第一壓控信號。其中前述的第一參考頻 率信號是依據精準參考頻率信號經第二除頻器除頻後所得 到的信號。第一壓控振盪器則是依據前述的第一壓控振盪 信號以及輸入資料信號,經振盪且調變出上述中間已載資 料的調變信號。第一除頻器將前面所述的中間已載資料的 調變信號除頻,得到第一除頻信號; 又,在本發明的一個較佳實施例中,第二鎖相迴路除 了輸出壓控振盪器之外,還包括第二相位檢知器、迴路濾 波器、第一混波器、第一低通濾波器、第三除頻器、第二 混波器及第二低通濾波器。其中,迴路濾波器電性連接至 第二相位檢知器以及前面提到的輸出壓控振盪器;第一混 波器電性連接至輸出壓控振盪器;第一低通濾波器電性連 接至第一混波器;第三除頻器電性連接至第二相位檢知 器;第二低通濾波器電性連接至第二混波器。 第二相位檢知器用來比較一個已載資料中頻調變信號 以及第二除頻信號,輸出一個誤差信號。其中,前面所述 之已載資料中頻調變信號是由中間已載資料的調變信號處 理過後所獲得的信號。迴路濾波器則是將誤差信號經濾波 後,得到第二壓控信號。第一混波器將輸出調變信號與跳 頻參考信號混頻後,得到第一混頻信號。第一低通濾波器 將前面所說的第一混頻信號濾波後,得到一個輸出中頻資11210rwf.ptd Page 7 1226755 V. Description of the Invention (4) The first frequency divider is connected to the first phase detector and the first voltage controlled oscillator. The first phase detector is used to compare a first reference frequency signal and a first frequency-divided signal, and then output a first voltage control signal. The aforementioned first reference frequency signal is a signal obtained by dividing the frequency of the accurate reference frequency signal by the second frequency divider. The first voltage-controlled oscillator is based on the aforementioned first voltage-controlled oscillation signal and the input data signal, and oscillates and modulates the modulation signal of the above-mentioned intermediate data. The first frequency divider divides the modulation signal of the previously loaded data described above to obtain a first frequency division signal. In addition, in a preferred embodiment of the present invention, the second phase-locked loop is in addition to output voltage control. In addition to the oscillator, it also includes a second phase detector, a loop filter, a first mixer, a first low-pass filter, a third frequency divider, a second mixer, and a second low-pass filter. The loop filter is electrically connected to the second phase detector and the aforementioned output voltage-controlled oscillator; the first mixer is electrically connected to the output voltage-controlled oscillator; the first low-pass filter is electrically connected To the first mixer; the third frequency divider is electrically connected to the second phase detector; the second low-pass filter is electrically connected to the second mixer. The second phase detector is used to compare an intermediate frequency modulation signal and a second frequency division signal of the loaded data, and output an error signal. Among them, the intermediate frequency modulation signal of the previously loaded data is a signal obtained by processing the modulation signal of the middle loaded data. The loop filter obtains the second voltage-controlled signal after filtering the error signal. The first mixer obtains a first mixed signal after mixing the output modulation signal with a frequency hopping reference signal. First low-pass filter After filtering the aforementioned first mixed frequency signal, an output intermediate frequency data is obtained
11210twf.ptd 第8頁 1226755 五、發明說明(5) 料信號。第三除頻器則是把前面得到的輸出中頻資料信號 除頻後,得到第二除頻信號。第二混波器則是將第一鎖相 迴路所輸出的中間已載資料調變信號和第二參考頻率信號 混頻,得到第二混頻信號。第二低通濾波器則將前面所提 到的第二混頻信號濾波後,得到已載資料中頻調變信號。 本發明另推出一種快速頻率合成及調制之方法,包括 下列步驟:首先提供一個高穩定度的精準參考頻率信號; 再根據一個輸入資料信號以及前面提到的精準參考頻率信 號,調變並振盪出一個中間已載資料調變信號;然後提供 一個跳頻參考頻率信號以及一項預調偏壓資料;並根據前 面所提之預調偏壓資料,提供一個先置偏壓;最後根據中 間已載資料調變信號以及跳頻參考頻率信號,振盪出一個 輸出調變信號,其中,依照預調偏壓資料,快速振盪出前 面提到的輸出調變信號。 為讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 實施方式 : 本發明提出一種快速頻率合成及調制之裝置及方法。 第1圖繪示依照本發明一較佳實施例的一種快速頻率合成 及調制之裝置的方塊示意圖,其中包括有第一鎖相迴路 1200以及第二鎖相迴路1300。第2圖繪示第一鎖相迴路的 一較佳實施例之電路方塊示意圖。第3圖繪示第二鎖相迴 路的一較佳實施例之電路方塊示意圖。11210twf.ptd Page 8 1226755 V. Description of the invention (5) Material signal. The third frequency divider divides the output intermediate frequency data signal obtained previously to obtain a second frequency division signal. The second mixer mixes the intermediate loaded data modulation signal output from the first phase-locked loop and the second reference frequency signal to obtain a second mixed signal. The second low-pass filter filters the second frequency mixing signal mentioned above to obtain the intermediate frequency modulation signal of the loaded data. The invention also introduces a method for fast frequency synthesis and modulation, which includes the following steps: firstly providing a high-stability accurate reference frequency signal; and then modulating and oscillating according to an input data signal and the aforementioned precise reference frequency signal An intermediate loaded data modulation signal; then provide a frequency hopping reference frequency signal and a pre-adjusted bias data; and provide a pre-set bias based on the pre-adjusted bias data mentioned above; and finally according to the intermediate loaded data The data modulation signal and the frequency-hopping reference frequency signal oscillate an output modulation signal. Among them, according to the pre-adjusted bias data, the aforementioned output modulation signal is quickly oscillated. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is described below in detail with the accompanying drawings as follows: Embodiments: The present invention proposes a fast frequency Synthesis and modulation device and method. FIG. 1 is a block diagram of a fast frequency synthesizing and modulating device according to a preferred embodiment of the present invention, which includes a first phase-locked loop 1200 and a second phase-locked loop 1300. FIG. 2 is a schematic block diagram of a circuit of a preferred embodiment of the first phase locked loop. FIG. 3 is a schematic circuit block diagram of a preferred embodiment of the second phase locked loop.
112101 w f. p t d 第9頁 1226755 五、梦明說明(6) 請同時參照第1圖與第2圖,其中,第一鎖相迴路包 括:第一相位檢知器1 2 1 〇、第一壓控振盪器丨2 2 〇、第一除 頻為1 2 2 5及第二除頻器1 2 0 5。其連接情形為第一壓控振盪 器1 2 2 0電性連接至第一相位檢知器1 2 1 〇 ;第一除頻器1 2 2 5 則是連接至第一相位檢知器1 2 1 0以及第一壓控振盈器 1 2 2 0。其工作為根據輸入資料信號與一個精準參考頻率信 號’調變並振盪出一個中間已載資料調變信號。達到輸出 信號為高穩定度及平坦的數據調制信號的其一目的。 請同時參照第1圖與第3圖,第二鎖相迴路則是包括多 頻段壓控振蓋器1 3 2 0與鎖頻迴路。前面提到的鎖頻迴路包 括:第二相位檢知器1 3 3 0、迴路濾、波器1 3 1 5、第一混波器麵| 1345、第一低通濾波器1340、第三除頻器1325、第二低通 濾波器1 3 1 0、第二混波器1 3 0 5、數位/類比轉換先置偏壓 電路1335及多頻段壓控振盪器1320。其連接情形為迴路濾 波器1 3 1 5電性連接至第二相位檢知器1 3 3 0與多頻段壓控振 盪器1 3 2 0 ;第一混波器1 3 4 5電性連接至多頻段壓控振盪器 1 3 2 0 ;第一低通濾波器1 3 4 0電性連接至第一混波器1 3 4 5 ; 第三除頻器1 3 2 5電性連接至第二相位檢知器1 3 3 0 ;第二低 通濾波器1 3 1 0電性連接至第二混波器1 3 0 5。其工作為根據 一個中間已載資料調變信號與一個跳頻參考頻率信號,振 盪出一個輸出調變信號。其另一工作為根據一項預調偏壓 資料,提供一個先置偏壓給多頻段壓控振盪器1 3 2 0。由 〇 於,第二鎖相迴路與微電腦結合達到加速跳頻速度之其一 目的外,還有頻率的調制量可進行微調且容易控制以及抑112101 w f. Ptd Page 9 1226755 V. Mengming description (6) Please refer to Figure 1 and Figure 2 at the same time, where the first phase-locked loop includes: first phase detector 1 2 1 〇, first The voltage controlled oscillator 2 2 0, the first frequency division is 1 2 2 5 and the second frequency divider 1 2 0 5. The connection situation is that the first voltage-controlled oscillator 1 2 2 0 is electrically connected to the first phase detector 1 2 1 〇; the first frequency divider 1 2 2 5 is connected to the first phase detector 1 2 10 and the first voltage-controlled vibrator 1 2 2 0. Its work is to modulate and oscillate an intermediate loaded data modulation signal according to the input data signal and an accurate reference frequency signal. One purpose of the output signal is a highly stable and flat data modulation signal. Please refer to Figure 1 and Figure 3 at the same time. The second phase-locked loop includes a multi-band voltage-controlled vibrator 1 320 and a frequency-locked loop. The aforementioned frequency-locked loop includes: second phase detector 1 3 3 0, loop filter, wave filter 1 3 1 5, first mixer surface | 1345, first low-pass filter 1340, third division A frequency converter 1325, a second low-pass filter 1310, a second mixer 1305, a digital / analog conversion pre-bias circuit 1335, and a multi-band voltage controlled oscillator 1320. The connection situation is that the loop filter 1 3 1 5 is electrically connected to the second phase detector 1 3 3 0 and the multi-band voltage controlled oscillator 1 3 2 0; the first mixer 1 3 4 5 is electrically connected to at most Band voltage controlled oscillator 1 3 2 0; first low-pass filter 1 3 4 0 electrically connected to the first mixer 1 3 4 5; third frequency divider 1 3 2 5 electrically connected to the second phase The detector 1 3 3 0; the second low-pass filter 1 3 1 0 is electrically connected to the second mixer 1 3 0 5. Its job is to oscillate an output modulation signal based on a middle loaded data modulation signal and a frequency hopping reference frequency signal. Another work is to provide a pre-bias voltage to the multi-band voltage controlled oscillator 1 3 2 0 based on a pre-biased bias data. Because of the combination of the second phase-locked loop and the microcomputer to achieve one of the purposes of accelerating the frequency hopping speed, the modulation amount of the frequency can be fine-tuned and easily controlled and suppressed.
11210twf.ptd 第10頁 1226755 五、發明說明(7) 制雜波的好處。 在此,首先 第一鎖相迴路的 率是由 與回授 明所需 位檢知 一除頻 的第一 1 1 3 0 所 由於具 可以使 振頻率 之溫度 的,此 C 〇 m p e η 溫度係 通訊技 體振盪 射頻類 一方面 頻時的 振 提供給 回授迴路 迴路的相 要的穩定 器 1 2 1 0。 信號1 2 3 5 參考頻率 輸出之信 有極穩定 振盪器輸 範圍通常 係數可高 溫度補償 sated C r 數的振盪 術裡,無 器。溫度 比信號的 ,接收器 時脈產生 盪器最基 電子裝置 討論第一鎖相迴路,請參照第2圖所繪示 一較佳實施例之電路方塊示意圖。振盪頻 的相位特性所決定,且振盪頻率的穩定度 位隨頻率的改變情形有關。為了達到本發 度要求,在第一鎖相迴路中使用了第一相 其作用為比較第一參考頻率信號1 2 3 0及第 的相位後,輸出第一壓控信號1 2 4 0。前述 信號1 2 3 0是由一個溫度補償晶體振盪器 號經第二除頻器1 2 0 5除頻而成。石英晶體 的共振特性與非常高的選擇性(Q值),< 出非常精確且穩定的頻率。可用的晶體共 來說在數kHz至數百MHz之間,且共振頻率 達1或2 p p m / °C。為求達到高穩定度之目 晶體振盪器1130(Temperature ystal Oscillator ,TCXO),建議使用低 器以實現高穩定度之其一目的。事實上在 論是發射器或接收器均會裝設溫度補償晶 補償晶體振盪器除了讓發射器所發射出的 頻率可以維持在可允許的範圍之内外;另 亦可利用溫度補償晶體振盪器用來作為解 依據。 本的作用是,輸出各種形式的信號波形, 使用。第一壓控振盪器1 2 2 0接受第一相位11210twf.ptd Page 10 1226755 V. Description of the invention (7) Benefits of clutter control. Here, the rate of the first phase-locked loop is firstly determined by the required bit with the feedback signal. The first 1 1 3 0 has a temperature that can make the vibration frequency. This C 0mpe η temperature system The communication technology oscillates the radio frequency type on the one hand and the time-frequency vibration provides the relevant stabilizer 1 2 1 0 of the feedback loop. Signal 1 2 3 5 Reference frequency output The signal has extremely stable oscillator output range. Generally the coefficient can be high. Temperature compensated sated C r number oscillation. There is no instrument. The temperature is lower than that of the signal, and the clock of the receiver is the most basic electronic device. To discuss the first phase-locked loop, please refer to Figure 2 for a schematic block diagram of a preferred embodiment. The phase characteristics of the oscillation frequency are determined, and the stability of the oscillation frequency is related to the change of frequency. In order to achieve the requirements of the present invention, the first phase is used in the first phase-locked loop, and its function is to compare the first reference frequency signal 1 2 3 0 and the first phase, and then output the first voltage control signal 1 2 4 0. The aforementioned signal 1 2 3 0 is obtained by dividing a temperature-compensated crystal oscillator number by a second frequency divider 1 2 0 5. The resonance characteristics and very high selectivity (Q value) of quartz crystals < produce very accurate and stable frequencies. Available crystals range from several kHz to hundreds of MHz and have resonance frequencies of 1 or 2 p p m / ° C. In order to achieve the high stability of the crystal oscillator 1130 (Temperature ystal Oscillator, TCXO), it is recommended to use a low-frequency device to achieve one of the purposes of high stability. In fact, the transmitter or receiver will be equipped with a temperature-compensated crystal-compensated crystal oscillator. In addition to allowing the frequency emitted by the transmitter to be maintained within the allowable range; temperature-compensated crystal oscillators can also be used. As the basis for the solution. The function of this book is to output and use various signal waveforms. The first voltage controlled oscillator 1 2 2 0 accepts the first phase
1 12101 w f. p t d 第11頁 1226755 五、發明說明(8) 檢知器1 2 1 0所輸出之第一壓控信號1 2 4 0與輸入資料信號進 行振盪並調變出一中間以載資料之調變信號輸出至第二鎖 相迴路。第一除頻器1 2 2 5則是負責將中間以載資料之調變 信號除頻後,輸出第一除頻信號1 2 3 5至第一相位檢知器 1 2 1 0。第二除頻器1 2 0 5則是接受一個除頻資料所控制,將 溫度補償晶體振盪器1 1 3 0所輸出的精準參考頻率信號除 頻,得到第一參考頻率信號1 2 3 0。由於第一鎖相迴路使用 了精準度極高之參考頻率信號來進行調變動作,可決定由 第一鎖相迴路所輸出之調變信號上所傳送之資料的正確 度。 接下來,討論第二鎖相迴路,請參照第3圖所繪示第1 二鎖相迴路的一較佳實施例之電路方塊示意圖。其中,第 二相位檢知器1 3 3 0 ,用來比較由第二低通濾波器1 3 1 0所輸 出之已載資料的中頻調變信號與由第三除頻器1 3 2 5所輸出 之第二除頻信號1 3 6 5後,輸出一個誤差信號到迴路濾波器 1315。濾波器具有頻率選擇(frequency selection)的 功能,也就是說能讓特定頻率範圍内的信號通過,並阻絕 掉超出頻率範圍外的信號。這樣的濾波器理想上具有兩個 頻帶。其中,一個頻帶的傳輸增益為一,也就是濾波器的 通帶(pass-band);另一個頻帶的傳輸增益為零,也就 是渡波器的阻絕帶(s t 〇 p - b a n d )。當然,渡波器選擇性 (Q值)越高正弦波輸出的諧波成分越小,所濾出的波形 越精準。在第二鎖相迴路中我們使用的迴路濾波器,由於 需要很高的機動性,因此採用了可變頻寬式迴路濾波器,1 12101 w f. Ptd Page 11 1226755 V. Description of the invention (8) The first voltage control signal 1 2 4 0 output by the detector 1 2 1 0 oscillates with the input data signal and modulates an intermediate load. The modulation signal of the data is output to the second phase locked loop. The first frequency divider 1 2 2 5 is responsible for dividing the frequency-modulated signal carrying data in the middle and outputting the first frequency division signal 1 2 3 5 to the first phase detector 1 2 1 0. The second frequency divider 1 2 0 5 is controlled by a frequency division data, and divides the accurate reference frequency signal output by the temperature compensated crystal oscillator 1 1 3 0 to obtain the first reference frequency signal 1 2 3 0. Because the first phase-locked loop uses a highly accurate reference frequency signal for modulation, the accuracy of the data transmitted on the modulation signal output by the first phase-locked loop can be determined. Next, the second phase locked loop is discussed. Please refer to FIG. 3 for a schematic block diagram of a circuit of a first embodiment of the first phase locked loop. The second phase detector 1 3 3 0 is used to compare the IF modulated signal of the loaded data output by the second low-pass filter 1 3 1 0 with the third frequency divider 1 3 2 5 After the second divided signal 1 3 6 5 is output, an error signal is output to the loop filter 1315. The filter has the function of frequency selection, that is to say, it can pass signals in a specific frequency range and block signals outside the frequency range. Such a filter ideally has two frequency bands. Among them, the transmission gain of one frequency band is one, that is, the pass-band of the filter; the transmission gain of the other frequency band is zero, that is, the stop band (s t 0 p-b a n d) of the wavelet. Of course, the higher the wave filter selectivity (Q value), the smaller the harmonic component of the sine wave output, and the more accurate the filtered waveform. The loop filter we use in the second phase-locked loop uses a variable frequency wide loop filter because it requires high mobility.
11210twf.ptd 第12頁 1226755 五、發明說明(9) 用來因應各種頻率信號 接著,迴路濾波器1 3 1 5將第二相位檢知器1 3 3 0所輸出 之誤差信號經濾波後,得到第二壓控信號1 3 6 0。第一混波 器1 3 4 5則是把多頻段壓控振盪器1 3 2 0的輸出調變信號與跳 頻參考頻率信號進行混頻,進而得到第一混頻信號1 3 7 0。 其中,前面提到的跳頻參考頻率信號是由一個跳頻綜頻器 接受一個控制頻率資料的控制指令後所輸出的信號。前面 得到的第一混頻信號1 3 7 0輸入第一低通濾波器1 3 4 0 ,經濾 波器濾、波後獲得一輸出中頻信號,此中頻信號在經由第三 除頻器1 3 2 5除頻後,得到前述之第二除頻信號1 3 6 5輸入第 二相位檢知器1 3 3 0。第二混波器1 3 0 5,將第一鎖相迴路所 輸出之中間以載資料調變信號與第二參考頻率信號1 1 3 5混 頻處理,得到一第二混頻信號1 3 5 5。此第二混頻信號1 3 5 5 輸入第二低通濾波器1 3 1 0,經此濾波器濾波後,得到前面 提到的已載資料的中頻調變信號,輸入第二相位檢知器 1 3 3 0,進行比較相位的動作。 另外,第二鎖相迴路中還包括了一個數位/類比轉換 先置偏壓電路1 3 3 5,依照預調偏壓資料,提供一個先置偏 壓給多頻段壓控振盪器1 3 2 0。藉以快速振盪出輸出調變信 號。由於第二鎖相迴路與微電腦結合,可以預先進行整個 工作頻率之控制電壓調整,將所得電壓預先儲存於主控版 中。當跳頻功能啟動時,主控板會依據工作頻率的大小來 提供所需之預置電壓,達到加速鎖頻速度之其一目的。在 這裡,多頻段壓控振盪器1 3 2 0是當做輸出壓控振盪器來使11210twf.ptd Page 12 1226755 V. Description of the invention (9) It is used to respond to various frequency signals. Then, the loop filter 1 3 1 5 filters the error signal output by the second phase detector 1 3 3 0 to obtain The second voltage control signal is 1 3 6 0. The first mixer 1 3 4 5 mixes the output modulation signal of the multi-band voltage controlled oscillator 1 3 2 0 with the frequency hopping reference frequency signal to obtain a first mixed signal 1 3 7 0. Among them, the frequency hopping reference frequency signal mentioned above is a signal output by a frequency hopping synthesizer after receiving a control instruction for controlling frequency data. The first mixed frequency signal 1 3 7 0 obtained earlier is input to the first low-pass filter 1 3 4 0. After filtering and filtering, an output intermediate frequency signal is obtained. This intermediate frequency signal is passed through the third frequency divider 1 After the frequency division by 3 2 5, the aforementioned second frequency division signal 1 3 6 5 is obtained and input to the second phase detector 1 3 3 0. The second mixer 1 3 0 5 mixes the modulated data-carrying signal output from the first phase-locked loop with the second reference frequency signal 1 1 3 5 to obtain a second mixed signal 1 3 5 5. This second frequency mixing signal 1 3 5 5 is input to the second low-pass filter 1 3 1 0. After filtering by this filter, the IF modulation signal with the previously mentioned data is obtained, and the second phase detection is input. The device 1 3 3 0 performs a phase comparison operation. In addition, the second phase-locked loop also includes a digital / analog conversion pre-bias circuit 1 3 3 5. According to the pre-bias data, a pre-bias is provided to the multi-band voltage-controlled oscillator 1 3 2 0. Thereby, the output modulation signal is rapidly oscillated. Due to the combination of the second phase-locked loop and the microcomputer, the control voltage of the entire operating frequency can be adjusted in advance, and the obtained voltage can be stored in the main control board in advance. When the frequency hopping function is activated, the main control board will provide the required preset voltage according to the size of the operating frequency to achieve one of the purposes of accelerating the frequency lock speed. Here, the multi-band voltage controlled oscillator 1 3 2 0 is used as the output voltage controlled oscillator to make
11210iwf.ptd 第13頁 1226755 五、發明說明(10) 用。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本發明,任何熟習此技藝者,在不脫離本發明之精 神和範圍内,當可作些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者為準。11210iwf.ptd Page 13 1226755 V. Description of the invention (10) Use. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make some changes and retouch without departing from the spirit and scope of the present invention. The scope of protection of the invention shall be determined by the scope of the attached patent application.
112101 w f. p t d 第14頁 1226755 圖式簡單說明 第1圖是繪示快速頻率合成及調制裝置之方塊示意 圖, 第2圖是繪示第一鎖相迴路的一較佳實施例之電路方 塊示意圖;以及 第3圖是繪示第二鎖相迴路的一較佳實施例之電路方 塊示意圖。 圖式標記說明: 1110 控 制 信 號 解 碼 器 1120 緩 衝 放 大 器 1125 倍 頻 調 諧 器 1130 溫 度 補 償 晶 體 振 盪器 1135 第 二 參 考 頻 率 信 號 1140 跳 頻 綜 頻 器 1145 發 射 模 組 1200 第 一 鎖 相 迴 路 1205 第 二 除 頻 器 12 10 第 一 相 位 檢 知 器 1220 第 一 壓 控 振 盪 器 1225 第 一 除 頻 器 1230 第 一 參 考 頻 率 信 號 1235 第 一 除 頻 信 號 1240 第 一 壓 控 信 號 1300 第 二 鎖 相 迴 路 1305 第 _____ 混 波 器112101 w f. Ptd Page 14 1226755 Brief description of the diagram The first diagram is a block diagram showing a fast frequency synthesis and modulation device, and the second diagram is a circuit block diagram showing a preferred embodiment of the first phase locked loop And FIG. 3 is a schematic circuit block diagram showing a preferred embodiment of the second phase locked loop. Description of graphical symbols: 1110 control signal decoder 1120 buffer amplifier 1125 frequency multiplier tuner 1130 temperature compensated crystal oscillator 1135 second reference frequency signal 1140 frequency hopping synthesizer 1145 transmitting module 1200 first phase-locked loop 1205 second division Frequency converter 12 10 first phase detector 1220 first voltage controlled oscillator 1225 first frequency divider 1230 first reference frequency signal 1235 first frequency division signal 1240 first voltage control signal 1300 second phase locked loop 1305 ____ Mixer
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11210twf.ptd 第15頁 1226755 圖式簡單說明 1 3 1 0 :第二低通濾波器 1 3 1 5 ··迴路濾波器 1 3 2 0 :多頻段壓控振盪器 1 3 2 5 :第三除頻器 1 3 3 0 :第二相位檢知器 1 3 3 5 :數位/類比轉換先置偏壓電路 1 3 4 0 :第一低通濾波器 1 3 4 5 :第一混波器 1 3 5 5 :第二混頻信號 1 3 6 5 :第二除頻信號 1 3 6 0 ··第二壓控信號 _丨 1 3 7 0 :第一混頻信號11210twf.ptd Page 15 1226755 Brief description of the diagram 1 3 1 0: Second low-pass filter 1 3 1 5 ·· Loop filter 1 3 2 0: Multi-band voltage controlled oscillator 1 3 2 5: Third division Frequency converter 1 3 3 0: Second phase detector 1 3 3 5: Digital / analog conversion pre-bias circuit 1 3 4 0: First low-pass filter 1 3 4 5: First mixer 1 3 5 5: second frequency mixing signal 1 3 6 5: second frequency dividing signal 1 3 6 0 · second voltage control signal _ 1 3 7 0: first frequency mixing signal
ll210twf.ptd 第16頁ll210twf.ptd Page 16
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TW92114886A TWI226755B (en) | 2003-06-02 | 2003-06-02 | Fast frequency synthesizing and modulating apparatus and method |
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Cited By (1)
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CN104345770A (en) * | 2013-07-26 | 2015-02-11 | 联发科技股份有限公司 | Clock generator, clock generating method and electronic device |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN104345770A (en) * | 2013-07-26 | 2015-02-11 | 联发科技股份有限公司 | Clock generator, clock generating method and electronic device |
US10545530B2 (en) | 2013-07-26 | 2020-01-28 | Mediatek Inc. | Apparatus and method for controlling controllable clock source to generate clock signal with frequency transition |
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TW200428785A (en) | 2004-12-16 |
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