TWI222169B

TWI222169B - Method of fabricating copper damascene structure

Info

Publication number: TWI222169B
Application number: TW92115015A
Authority: TW
Inventors: Chi-Wen Liu; Ying-Lang Wang
Original assignee: Taiwan Semiconductor Mfg
Priority date: 2003-06-03
Filing date: 2003-06-03
Publication date: 2004-10-11
Also published as: TW200428583A

Abstract

A method of fabricating copper damascene structure. According to this method, a semiconductor substrate having an interlayer dielectric thereon is provided. An opening is formed in the dielectric layer. A first metal layer is deposited on the interlayer dielectric and filled into the opening. The first metal layer is polished to remove excess copper until the dielectric layer is exposed. A second metal layer is formed on the dielectric and the first metal layer. The second metal layer is polished to expose the dielectric. On the top of the trench opening, the remained second metal layer covered the first metal layer. Utilizing the electrochemical contact displacement process, the remained second metal layer is displaced by the first metal layer. Then, a copper damascene structure with smooth surface is obtained.

Description

1222169 五、發明說明（l) [發明所屬之技術領域] 本發明係有關於一種製造半導體導電元件的方法，特別是有關於一種鑲嵌式金屬化構件及其製作方法。 [先前技術] 隨著積體電路中元件密度的增加，元件的體積越來越小、線的寬度也越來越窄，因此對於良好線路連結的需求也越來越大。同時，隨此積體電路製程的快速發展，後段製程進入深次微米元件領域，後段製程 (back-end-〇f-Hne，BEOL)愈來愈受到重視，它們整合了愈來愈多含接觸孔栓塞之鑲嵌内連線之雙鑲嵌 (dual-damascene)内連線技術，以進行先進的金屬内連線接合作業。 ' 早期1C製程不願採用銅作為金屬連接線是因為銅的擴散係數很高，在與矽或二氧化矽接觸之後，會很快擴散到基材’產生深層能階的問題。此外銅本身易氧化，在低溫下易與其它材料反應，以及銅缺乏有效的乾式蝕刻技術，這些原因限制銅金屬的發展。但是隨著材料與製程技術的進步’各種擴散障礙層不斷被研究，鑲嵌式金屬化製程以及銅化學機械研磨技術的成功，使這些問題得以解決。以化學機械研磨技術同時平坦化多餘之銅金屬層以及周圍之材料，然而較軟的銅金屬的拋光速率較其他周圍材料快’因而在銅金屬層表面容易產生碟狀凹陷 (di shi ng)。尤其是線寬較大的情況，愈容易產生上述問1222169 V. Description of the invention (l) [Technical field to which the invention belongs] The present invention relates to a method for manufacturing a semiconductor conductive element, and particularly to a mosaic metallized member and a method for manufacturing the same. [Previous Technology] As the density of components in integrated circuits increases, the volume of components becomes smaller and smaller, and the width of lines becomes narrower and narrower, so the demand for good line connections is also increasing. At the same time, with the rapid development of this integrated circuit manufacturing process, the back-end process has entered the field of deep sub-micron components, and back-end-of-Hne (BEOL) processes have received more and more attention. Dual-damascene interconnect technology for hole embolization for advanced metal interconnect connection operations. 'Early 1C processes were reluctant to use copper as the metal connection line because the diffusion coefficient of copper is very high, and after contacting with silicon or silicon dioxide, it will quickly diffuse to the substrate ’and cause deep energy level problems. In addition, copper itself is susceptible to oxidation, reacts easily with other materials at low temperatures, and copper lacks effective dry etching techniques, which restrict the development of copper metal. However, with the advancement of materials and process technology, various diffusion barriers have been continuously researched, and the success of the mosaic metallization process and copper chemical mechanical polishing technology have solved these problems. Chemical mechanical polishing technology is used to planarize the excess copper metal layer and surrounding materials at the same time. However, the polishing rate of softer copper metal is faster than that of other surrounding materials', so dish-like depressions are easily generated on the surface of the copper metal layer. In particular, the larger the line width, the easier it is to have the above problem.

1222169 五、發明說明（2) 並且不利於多層内連線的題，此將導致内連線阻值不穩，形成。習知技術之選擇性電化學接觸置換法是利用矽原子或擴散阻P:層金屬，如鈕或鈦，具有相當強之還原能力，足 =將水溶液中溶解之銅離子還原成銅金屬沉積。亦即應用含鋼離子溶液與矽或金屬鈕間氧化還原置換反應進行^擇性銅導線沉積方法，以克服高深寬比溝槽填充及化學機械研磨過研磨時所遭遇的銅導線碟狀凹陷（d i sh i ng )。以下利用第1 A至1 C圖及第2 A至2 C圖，以說明兩種習知技術以選擇性電化學接觸置換法形成銅金屬化構件之製造流程。、首先’，請參照第1A圖，其顯示半導體基底1〇〇表面形成有具有一開口 210之介電層2〇〇，上述開口可為一内連線溝槽或介層窗。在上述介電層2〇〇表面及開口21〇的底部以及側壁形成例如鈕或鈦等擴散阻障層（di f fusi〇n barrier layer) 300 〇1222169 V. Description of the invention (2) And it is not conducive to the problem of multilayer interconnections, which will cause the resistance of the interconnections to be unstable. The selective electrochemical contact displacement method of the conventional technique is to use silicon atoms or diffusion resistance P: layer metals, such as buttons or titanium, which have a relatively strong reducing ability, which is sufficient to reduce the dissolved copper ions in the aqueous solution to copper metal deposits. That is, a selective copper wire deposition method is applied using a redox displacement reaction between a steel ion-containing solution and a silicon or metal button to overcome the copper wire dish-like depressions encountered during high-aspect-ratio trench filling and chemical mechanical polishing after grinding ( di sh i ng). The following uses Figures 1 A to 1 C and Figures 2 A to 2 C to illustrate the manufacturing process of two conventional techniques for forming a copper metallized member by a selective electrochemical contact replacement method. First, please refer to FIG. 1A, which shows that a dielectric layer 200 having an opening 210 is formed on the surface of the semiconductor substrate 100, and the opening may be an interconnecting trench or a dielectric window. On the surface of the dielectric layer 200, the bottom of the opening 21, and the side wall, a diffusion barrier layer 300 such as a button or titanium is formed.

接著’請參照第1 B圖，利用目前發展成熟之CVD法順應性沈積非晶質矽層（未顯示）於鈕擴散阻障層3 〇〇上。之後以化學機械研磨法（chemical mechanical polishing; CMP)以研磨掉開口 2 1 0以外的非晶質矽層，而留下非晶矽内連線4 0 0。然後，請參照第1C圖，以電化學接觸置換法 (electrochemical contact displacement)選擇性將開内非晶質矽4 00置換成金屬銅500。Next, please refer to FIG. 1B, and use the currently developed mature CVD method to conformally deposit an amorphous silicon layer (not shown) on the button diffusion barrier layer 300. Thereafter, chemical mechanical polishing (CMP) is used to polish away the amorphous silicon layer other than the opening 2 10, leaving the amorphous silicon interconnects 4 0 0. Then, referring to FIG. 1C, an electrochemical contact displacement method is used to selectively replace the internal amorphous silicon 400 with metallic copper 500.

0503-9836TWF(Nl) ； TSMC2002-0779;jamngwo.ptd 第 7 頁 12221690503-9836TWF (Nl); TSMC2002-0779; jamngwo.ptd page 7 1222169

習知技術之另一以選擇性電化學接觸置換法形成銅金屬化構件之製造流程。請參照第2A圖，其顯示半導體基底 100表面形成有具有一開口 21〇之介電層2〇〇，上述開口可為一内連線溝槽或介層窗。在上述介電層2〇〇表面及開口 21 0的底部以及側壁形成有例如组或鈦等擴散阻障層 (diffusion barrier layer) 300。之後以化學機械研磨法研磨掉開口 2 1 0以外的擴散阻障層。接著，請參照第2B圖，利用電化學接觸置換法 (electrochemical contact displacement)直接在擴散阻Another conventional technique is a manufacturing process for forming a copper metallized member by a selective electrochemical contact displacement method. Please refer to FIG. 2A, which shows that a dielectric layer 200 having an opening 21 is formed on the surface of the semiconductor substrate 100, and the opening may be an interconnecting trench or a dielectric window. A diffusion barrier layer 300 such as a group or titanium is formed on the surface of the dielectric layer 200, the bottom of the opening 210, and the sidewall. Then, a chemical mechanical polishing method is used to polish away the diffusion barrier layer other than the opening 2 10. Next, please refer to FIG. 2B, using electrochemical contact displacement

障層上選擇性置換沉積銅晶種層5〇〇，。 H 睛參照第2 C圖’以無電鑛沉積填充製程形成銅金屬内連線50 0。美國專利第5 8 9 1 5 1 3及6 2 3 5 6 2 5號揭示利用電化學接觸置換法（electrochemical contact displacement)直接在擴散阻障層上選擇性置換沉積緻密的晶種層，再以無電鍍沉積填充製程形成銅金屬内連線。美國專利第6 1 8 1 0 1 3號亦揭示一種利用電化學接觸置換法（electrochemical contact displacement)在銅金屬内連線表面置換Cu3Ge及Cu5Si保護層。發明内容：有鑑於此，本發明的目的在於提供一種鑲嵌式金屬化構件的製造方法。本發明的另一目的在於提供一種鑲嵌式金屬化構件及The copper seed layer 500 is selectively deposited on the barrier layer. H. Referring to FIG. 2C ′, a copper metal interconnect 50 is formed in the electroless deposit deposition filling process. U.S. Patent Nos. 5 8 9 1 5 1 3 and 6 2 3 5 6 2 5 disclose the use of electrochemical contact displacement to directly replace the densely deposited seed layer on the diffusion barrier layer, and then The electroless deposition filling process forms copper metal interconnects. U.S. Patent No. 6,181,013 also discloses a method for replacing a Cu3Ge and Cu5Si protective layer on the surface of a copper metal interconnect using an electrochemical contact displacement method. SUMMARY OF THE INVENTION In view of this, an object of the present invention is to provide a method for manufacturing a mosaic metallized member. Another object of the present invention is to provide an inlaid metallized member and

〇503-9836TWF(Nl) ； TSMC20Q2-0779;jamngwo.ptd 第8頁 1222169 五、發明說明（4) 其製造大、、t 、 ' ---—~- 學機械研虛，並應用選擇性電化學接觸置換法，m (disi:)磨過研磨時所遭遇的鋼導線碟狀凹 1克服化為達成上述目的，本發 ”作方☆，包括下列步；月式金屬化構件 =體基底1。形成一第一=層;電層於一導雷Μ 十一第一導電層以露出介電層。开彡Α墙一導電層於介電層表面與第—# ^ 形成一第一道φ出"電層位於開口部☆，第二導電声霜签：Ϊ 一導電層上。利用電化學/覆盍在第蓋第-導電，h之签於開口上方，覆导電層上之第一導電層置換成第一導電層。件的ίίίί述：Ϊ，本發明提供另一種鑲嵌式金屬化構於-步驟：*供一具有開口之介電層、、導體基底上。形成一第一導電層於介電層上，並填入上述開口。形成一第二導電層於介電層與第一導電層、 t。平坦化第二導電層以露出該第一導電層及位於開口部分i第二導電層覆蓋第一導電層上。利用電化學接觸置換法將位於開口部分，覆蓋第一導電層上之第二導電層置換成第一導電層。平坦化第一導電層以露出介電層，最後得到一表面平整之鑲嵌式金屬化構件。根據本發明之目的，本發明亦提供一鑲嵌式金屬化構件，包括··提供一具有一開口之介電層於一半導體基底上。一阻障層，順應性地形成於開口内。一第一導電層，形成於該介電層上並填入該開口内。以及一第二導電層，〇503-9836TWF (Nl); TSMC20Q2-0779; jamngwo.ptd Page 8 1222169 V. Description of the invention (4) Its manufacturing technology, t, '--- ----learn mechanical research and apply selective electrification To learn the contact replacement method, m (disi :) overcomes the steel wire dish-shaped recess 1 encountered during grinding. To achieve the above purpose, the present invention "produce ☆, including the following steps; moon-type metalized member = body base 1 A first layer is formed; the electrical layer is on a conductive layer. The first conductive layer is exposed to expose the dielectric layer. A conductive layer on the A wall is formed on the surface of the dielectric layer and the first # φ is formed. The electric layer is located at the opening ☆, the second conductive acoustic frost tag: Ϊ on a conductive layer. Use the electrochemical / coating on the first cover-conductive, h sign above the opening, cover the first layer on the conductive layer A conductive layer is replaced with a first conductive layer. Description: Alas, the present invention provides another inlaid metallization structure in the step: * for a dielectric layer with an opening, and a conductive substrate. Forming a first The conductive layer is on the dielectric layer and fills the opening. A second conductive layer is formed on the dielectric layer and the first conductive layer, t. Flat The second conductive layer is exposed to expose the first conductive layer and the second conductive layer on the opening portion i covers the first conductive layer. The second conductive layer on the first conductive layer will be covered on the first conductive layer by the electrochemical contact replacement method. Replaced by the first conductive layer. The first conductive layer is planarized to expose the dielectric layer, and finally a mosaic metallized member having a flat surface is obtained. According to the purpose of the present invention, the present invention also provides a mosaic metallized member, including: Providing a dielectric layer having an opening on a semiconductor substrate; a barrier layer compliantly formed in the opening; a first conductive layer formed on the dielectric layer and filling the opening; and A second conductive layer,

0503-9836TWF(Nl) » TSMC2002-0779;jamngwo.ptd 第9頁五、發明說明（5) 開口内。以更詳細地說明本發形成於該第一導電層上方，並填滿該以下配合圓式以及較佳實施例，實施方式：實施例一種鑲嵌式金屬化以下利用第3至7圖來說明本發明之構件的製作方法的第一種實施方式。上可3Λ’提供—半導體基底1GG，如石夕基底，其0503-9836TWF (Nl) »TSMC2002-0779; jamngwo.ptd Page 9 5. Description of the invention (5) Inside the opening. To explain in more detail the present invention is formed over the first conductive layer, and is filled with the following mating circular type and preferred embodiments, Embodiment: Example A mosaic metallization The following uses Figures 3 to 7 to illustrate this A first embodiment of a method for producing a member of the invention.上可 3Λ’provided—Semiconductor substrate 1GG, such as Shixi substrate, which

-元件，此處為簡化起見，千整的+導體基底100表示。然後在其上形成一介 2〇〇:其中介電層2 00可由一層或多層的介電材料，例二矽玻璃（borophosphate sil〇con glass ;BpSG)、氟摻雜玻璃（fluorosilicate ;FSG )或四乙氧基矽酸鹽（ tetra-ortho-silicate ;TE0S )所製成。此介電層可以化學氣相沈積（CVD)、PECVD或是以旋塗（spin c〇ating)g 方式沈積在基底上，然後經過熟化（curing)形成。換言之’即作為鑲嵌式金屬化製程之内層介電層（ILD)。The component, here for simplicity, is represented by the full + conductor substrate 100. Then a dielectric 200 is formed thereon: the dielectric layer 2000 may be made of one or more dielectric materials, such as borophosphate silcon glass (BpSG), fluorine doped glass (FSG), or Made of ethoxy silicate (tetra-ortho-silicate; TE0S). The dielectric layer may be deposited on the substrate by chemical vapor deposition (CVD), PECVD, or spin coating, and then formed by curing. In other words, 'is the inner dielectric layer (ILD) as a damascene metallization process.

其-人’以微影製私及非等向性（a n i s 01 r 〇 p丨c)餘刻製程，如反應性離子蝕刻（RIE )製程或電漿蝕刻製程，蝕刻介電層200，直至露出半導體基底1〇〇表面，以形成一開口，該開口可為一内連線溝槽或介層窗。之後進行全面性的沈積，在該開口的底部與側壁形成一金屬阻障層3 〇〇。此阻障層300可幫助後續金屬的附著並防止其擴散進入介Its-man's lithography and anisotropic (anis 01 r 〇p 丨 c) post-etching processes, such as reactive ion etching (RIE) process or plasma etching process, etch the dielectric layer 200 until exposed The semiconductor substrate 100 has a surface to form an opening, and the opening may be an interconnecting trench or a via window. After that, a comprehensive deposition is performed, and a metal barrier layer 300 is formed at the bottom and the sidewall of the opening. This barrier layer 300 can help subsequent metal adhesion and prevent its diffusion into the dielectric

1222169 五、發明說明（6) 電層200 ,對銅金屬而言，適合的擴散阻障層材料包括：钽（Ta) ’氮化纽（TaN)，氮化鎢（WN)，或是習知製程中常用的氮化欽（T i N )等。接著，以化學氣相沈積法（[v D )、物理氣相沈積法（PVD),或電鍍沈積法（electr〇plating)在阻障層300上沈積第一導電層5〇〇，較佳者為銅，厚度 7 0 0 0〜8 0 0 0埃（A )，並使其填滿該開口。根據本發明之一較佳實施方式，可利用離子化金屬電漿（IMP)先在基底上沈積一層厚約3〇〇〜15〇〇埃（a )的晶種層，然後再以電鍍法完成銅導電層的沈積。通常阻障Μ層與晶種層的沈積程序可在多腔反應室（cluster 不同腔體中依序完成而不破真空，藉以提高製程的可靠度與產能。又請參閱第4圖，完成阻障層3 00與第一導電層5〇〇的沈積後，以化學機械研磨法進行平坦化，將該開口以外的/第一導電層500與阻障層30 0去除。研磨的過程包括：銅金屬層500的研磨、阻障層30 0的研磨、以及最後一道氧化物抛光（oxide buff ing)的手續，其中各階段係使用不同的研磨漿液。較軟的銅金屬5 00的研磨速率較阻障層3〇〇材料的研磨速率快，因而在銅金屬層表面產生碟狀凹陷 (dishing) ° 請參閱第5圖，在介電層200、阻障層3〇〇與第一導電層500的表面上順應性形成一第二導電層6〇〇。較佳者為非晶質石夕、组或鈥。其中非晶質矽係以CVD法形成，而纽及欽金屬層則是以濺渡法或物理氣相沈積法（PVD)形成，厚1222169 V. Description of the invention (6) Electrical layer 200. For copper metal, suitable materials for the diffusion barrier layer include: tantalum (Ta) 'nitride nitride (TaN), tungsten nitride (WN), or conventional Nitrogen (T i N) and other commonly used in the process. Next, a first conductive layer 500 is deposited on the barrier layer 300 by a chemical vapor deposition method ([v D), a physical vapor deposition method (PVD), or an electroplating method (electrplating), which is better It is copper, with a thickness of 7 0 to 8 0 angstroms (A), and it fills the opening. According to a preferred embodiment of the present invention, an ionized metal plasma (IMP) can be used to deposit a seed layer with a thickness of about 300 to 1 500 Angstroms (a) on the substrate, and then complete the plating process. Deposition of a copper conductive layer. In general, the deposition process of the barrier M layer and the seed layer can be completed sequentially in different chambers of the multi-chamber reaction chamber without breaking the vacuum, thereby improving the reliability and productivity of the process. Please also refer to FIG. 4 to complete the barrier After the layers 300 and the first conductive layer 500 are deposited, they are planarized by a chemical mechanical polishing method, and the first conductive layer 500 and the barrier layer 300 other than the opening are removed. The polishing process includes: copper metal The polishing of the layer 500, the polishing of the barrier layer 300, and the final oxide buffing process, wherein each stage uses a different polishing slurry. The softer copper metal 5000 has a higher polishing rate than the barrier The polishing rate of the layer 300 material is fast, so a dish-like dishing occurs on the surface of the copper metal layer. Referring to FIG. 5, on the surfaces of the dielectric layer 200, the barrier layer 300 and the first conductive layer 500 A second conductive layer 600 is formed on the upper compliance. The amorphous silicon layer is preferably formed by CVD, and the amorphous silicon layer is formed by the CVD method, and the Nylon and Chin metal layers are formed by the sputtering method. Or physical vapor deposition (PVD), thick

1222169 五、發明說明（7) 度1 000 埃（A )。 «月參閱第6圖’化學機械研磨法進行平坦化，將第二導電層600去除，直至露出介電層20Q及阻障層3〇〇。此時，位於開口上方部分的第二導電層6〇〇a會留在第一導電層500上。研磨的過程係以介電層2〇〇為停止層。再請參閱第7圖，利用電化學接觸置換法將位於開口上方α卩为的第一導電層600a，置換成該第一導電層5〇〇a。其中電化學接觸置換法是將整個基板丨〇〇浸置於電化學接觸置換溶液中。根據本發明之一較佳實施方式，電化學接觸置換溶液❼ 係以去離子水為主要成份，包含硫酸銅、氫氟酸以及界面活性劑。較佳者為Cu2+離子〇·〇(Π〜2 mol/liter及F_離子〇·〇(Π 〜5 raol/liter 以及界面活性劑〇·〇ι 〜1〇 gm/liter。在電化學接觸置換溶液中，另可包含氟化氨（Nh4F)，作為調節氟離子濃度用。接觸置換法是利用矽（鈕或鈦）原子與Cu2+銅離子於含F— 敗離子水溶液中進行電化學氧化還原反應，如反應式丨一3 所示：1222169 V. Description of the invention (7) Degree 1000 Angstroms (A). «Refer to Fig. 6」 The chemical mechanical polishing method is used for planarization, and the second conductive layer 600 is removed until the dielectric layer 20Q and the barrier layer 300 are exposed. At this time, the second conductive layer 600a located on the portion above the opening will remain on the first conductive layer 500. The grinding process uses the dielectric layer 200 as a stop layer. Referring to FIG. 7 again, the first conductive layer 600a is replaced by the first conductive layer 500a by using the electrochemical contact replacement method. The electrochemical contact replacement method is to immerse the entire substrate in an electrochemical contact replacement solution. According to a preferred embodiment of the present invention, the electrochemical contact displacement solution 以 is mainly composed of deionized water, and includes copper sulfate, hydrofluoric acid, and a surfactant. Preferred are Cu2 + ions 〇～〇 (Π ~ 2 mol / liter and F ions 〇 · 〇 (Π ～ 5 raol / liter and surfactant 〇 · 〇ι ～ 10 gm / liter. In electrochemical contact displacement The solution may also contain ammonia fluoride (Nh4F) for the purpose of adjusting the fluoride ion concentration. The contact replacement method uses silicon (button or titanium) atoms and Cu2 + copper ions to perform electrochemical redox reactions in an aqueous solution containing F-decanion. , As shown in the reaction formula 丨 a 3:

⑴ (2) (3)⑴ (2) (3)

Si + 6F'^2Cu+ ——>2Cu+SiF62' 2Ta + \2F' +5Cu2+ ——>5Cu + 2TaF^ 27Ϊ +1W + 5C«2+ ——>5Cu + 2TiF^ 由此電化學接觸置換反應所產生的銅體積較原金屬矽Si + 6F '^ 2Cu + —— > 2Cu + SiF62' 2Ta + \ 2F '+ 5Cu2 + —— > 5Cu + 2TaF ^ 27Ϊ + 1W + 5C «2+ —— > 5Cu + 2TiF ^ Replacement reaction produces more copper than the original metal silicon

1222169 GL、發明說明（8) 的體積大，因此可補償因化學機械研磨法進行平土一化所產生碟狀凹陷（dishing)。仆制f上ί本發明之較佳實施方式可矣口，-種鑲嵌式金屬 a Μ 。產生碟狀凹陷（dishing)的鋼金屬層表面，電化:接觸置換法將位於開口上方，覆蓋第一導電層5〇〇上之第一導電層60 0a置換成該第一導電層5〇〇a，以得到一表面平整之鑲嵌式金屬化構件。如第7圖所不，根據本發明之一較佳實施方式，提供一鑲嵌式金屬化構件，包括：提供一具有一開口之介電層 200於一半導體基底1〇〇上。一阻障層3〇〇，順應性地形成於上述開口内。一第一導電層5〇〇，例如銅金屬，形成於該介電層200上並填入該開口内。以及一第二導電層 500a，形成於該第一導電層上方，並填滿該開口内。其中該第二導電層係由電化學接觸置換法置換所形成之銅。實施例二以下利用第8至11圖來說明本發明之一種鑲被式金屬化構件的製作方法的第二種實施例。1222169 GL, the description of invention (8) is large, so it can compensate dishing caused by chemical mechanical polishing method for flat soil. The preferred embodiment of the present invention is mouth-watering, a type of mosaic metal aM. The surface of the steel metal layer generating dishing (dishing) is electrified: the contact replacement method replaces the first conductive layer 60 0a over the first conductive layer 500 with the first conductive layer 500 a. To obtain a mosaic metallized member with a flat surface. As shown in FIG. 7, according to a preferred embodiment of the present invention, a mosaic metallization member is provided, including: providing a dielectric layer 200 having an opening on a semiconductor substrate 100. A barrier layer 300 is compliantly formed in the opening. A first conductive layer 500, such as copper metal, is formed on the dielectric layer 200 and fills the opening. A second conductive layer 500a is formed over the first conductive layer and fills the opening. The second conductive layer is copper formed by replacement by an electrochemical contact replacement method. Embodiment 2 The second embodiment of the method for manufacturing an inlay type metallized member according to the present invention is described below with reference to FIGS. 8 to 11.

請參閱第8圖，提供一半導體基底1〇〇，如一矽基底，其上可形成任何所需之半導體元件，此處為簡化起見，僅以平整的半導體基底100表示。然後在其上形成一介電層200。其中介電層200可由一層或多層的介電材料，如 Si 02、爛磷石夕玻璃（b〇r〇ph〇sphate silocon glass ;Referring to FIG. 8, a semiconductor substrate 100 is provided, such as a silicon substrate, on which any desired semiconductor element can be formed. Here, for simplicity, only a flat semiconductor substrate 100 is shown. A dielectric layer 200 is then formed thereon. The dielectric layer 200 may be made of one or more layers of dielectric materials, such as Si 02, rotten phosphorite glass (b〇r〇ph〇sphate silocon glass;

BpSG)、氟摻雜玻璃（ fluorosilicate ; FSG )或四乙氧基BpSG), fluorine-doped glass (FSG) or tetraethoxy

1222169 五、發明說明（9) 一矽（tetra-ortho-silicate ; TE〇s )所製成。此介電層可以化學氣相沈積（CVD)、PECVD或是以旋塗（spin coating)的方式沈積在基底上，然後經過熟化（curing)形成。換s之’即作為鑲嵌式金屬化製程之内層介電層 (ILD) 〇其人以微衫製程及非等向性（a n i s 〇 t r 〇 p i c)餘刻製程’如反應性離子蝕刻（RIE)製程或電漿蝕刻製程，蝕刻介電層200，直至露出半導體基底1〇〇表面，以形成一開口’違開口可為一内連線溝槽或一介層窗。之後進行全面性的沈積，在該開口的底部與側壁形成一金屬阻障層 300。此阻障層3 00可幫助後續金屬的附著並防止其擴散，對銅而s ’適當的擴散阻障層材料包括：组（Ta)，氮化组 (TaN) ’氣化鎢（WN)，或是習知製程中常用的氮化鈦（TiN) 等。接著’以化學氣相沈積法（C VD)、物理氣相沈積法 (PVD) ’或電鍍沈積法（eiectropiating)在阻障層3〇〇上沈積第一導電層50 0，較佳者為銅，厚度7〇〇〇〜8〇〇〇埃（a )，並使其填滿前述之開口。1222169 V. Description of the invention (9)-made of tetra-ortho-silicate (TEOs). The dielectric layer may be deposited on a substrate by chemical vapor deposition (CVD), PECVD, or spin coating, and then formed by curing. In other words, it is the inner dielectric layer (ILD) used as a damascene metallization process. It uses a micro-shirt process and an anisotropic (anis 〇tr 〇pic) remaining process such as reactive ion etching (RIE). In a manufacturing process or a plasma etching process, the dielectric layer 200 is etched until the surface of the semiconductor substrate 100 is exposed to form an opening. The opening may be an interconnecting trench or a dielectric window. Then, a comprehensive deposition is performed, and a metal barrier layer 300 is formed on the bottom and the sidewall of the opening. This barrier layer 300 can help the subsequent metal adhesion and prevent its diffusion. For copper, the appropriate diffusion barrier layer materials include: group (Ta), nitride group (TaN) 'tungsten gas (WN), Or titanium nitride (TiN) and other commonly used processes. Next, a first conductive layer 50 is deposited on the barrier layer 300 by 'chemical vapor deposition (C VD), physical vapor deposition (PVD)' or electroplating (eiectropiating), preferably copper. The thickness is 7000 to 8000 angstroms (a), and the opening is filled up.

根據本發明之一較佳實施方式，可利用離子化金屬電漿（IMP)先在基底上沈積一層厚約3〇〇〜15〇〇埃（a)的晶種層，然後再以電鍍法完成銅導電層的沈積。通常阻障層與晶種層的沈積程序可在多腔反應室（cluster chamber)的不同腔體中依序完成而不破真空，藉以提高製程的可靠度與產能。在阻障層30 0上沈積第一導電層500時，會在該開口上According to a preferred embodiment of the present invention, an ionized metal plasma (IMP) can be used to deposit a seed layer having a thickness of about 300 to 1 500 Angstroms (a) on a substrate, and then complete the plating process. Deposition of a copper conductive layer. Generally, the deposition process of the barrier layer and the seed layer can be completed sequentially in different chambers of the multi-chamber reaction chamber without breaking the vacuum, thereby improving the reliability and productivity of the process. When the first conductive layer 500 is deposited on the barrier layer 300, it will be on the opening.

0503-9836TWF(Nl) '» TSMC2002-0779;jamngwo.ptd 第14頁 1222169 五、發明說明（10) ------二^ 方形成一凹進。 ΐ ^，在第一導電層5〇〇的表面上順應性形成一第二後？乂佳者為非阳質矽、鈕或鈦。其中非晶質矽 '、以、法形成’而鈕及鈦金屬層則是以濺渡法或物理氣相沈積法形成，厚度1000埃（Α)。，參閱第9圖’利用化學機械研磨法進行平坦化，將 ^、，層6 00去除，直至露出第一導電層5〇{^研磨的過八糸以一導電層5 0 0為停止層。此時，位於開口上方部为的2二導電層6〇〇b會留在第一導電層5〇〇上。明，閱第1 0圖，利用電化學接觸置換法將位於開口上钃^ 二覆蓋第一導電層5〇〇上之第二導電層6〇〇1)置換成該第 $導電層500b。#中電化學接觸置換法是將整個基板1〇〇 /X置於電化學接觸置換溶液中。根據本發明之一較佳實施方式，電化學接觸置換溶液係以去離子水為主要成份，包含硫酸銅、氫氟酸以及界面 /舌性劑。較佳者為Cu2+離子〇〇〇1〜2 m〇1/liter及广離子〇·〇〇卜5 mol/iiter以及界面活性劑〇〇卜1〇㈣/Hter。在電化學接觸置換溶液中’另可包含敗化氨（NH4F)，作為調節氟離子濃度用。接觸置換法是利用矽（鈕或鈦）原子與Cu2+銅離子於含Γ⑩ 氟離子水溶液中進行電化學氧化還原反應，如反應式丨一3 所示：0503-9836TWF (Nl) '»TSMC2002-0779; jamngwo.ptd page 14 1222169 V. Description of the invention (10) ------ The two squares form a recess. ΐ ^, after forming a second on the surface of the first conductive layer 500 in compliance? The best ones are non-yang silicon, buttons or titanium. Among them, amorphous silicon is formed by the method, and the button and the titanium metal layer are formed by the sputtering method or the physical vapor deposition method with a thickness of 1000 angstroms (A). Referring to FIG. 9 ′, the chemical mechanical polishing method is used for planarization, and the ^, and layer 600 are removed until the first conductive layer 50 is exposed, and a conductive layer 500 is used as a stop layer. At this time, the second conductive layer 600b located above the opening will remain on the first conductive layer 5000. That is, referring to FIG. 10, the second conductive layer (6001) overlying the first conductive layer (500) on the opening is replaced with the second conductive layer (500b) by an electrochemical contact replacement method. # 中 electrochemical contact displacement method is to place the entire substrate 100 / X in an electrochemical contact displacement solution. According to a preferred embodiment of the present invention, the electrochemical contact displacement solution is mainly composed of deionized water, including copper sulfate, hydrofluoric acid, and an interfacial / tongue agent. Preferred are Cu2 + ion 0.0001 to 2 m1 / liter and wide ion 0.005 mol / iiter and surfactant 〇〇〇〇〇㈣ / Hter. The electrochemical contact displacement solution may further include degraded ammonia (NH4F) for adjusting the fluoride ion concentration. The contact replacement method uses an electrochemical redox reaction of silicon (button or titanium) atoms and Cu2 + copper ions in an aqueous solution containing Γ⑩ fluoride ion, as shown in reaction formula 丨 3:

1222169 五、發明說明（11) ⑴ (2) ⑶1222169 V. Description of the invention (11) ⑴ (2) ⑶

Si + 6F^+2Cu^ ——>2Cu+SiFt 27¾ + 12厂 + 5C«2+ ——>5Cu + 2TaF^ 27z+12^~+5Cw2+ ——>5Cu+2TiF^ 由此電化學接觸置換反應所產生的銅體積較原金屬石夕 (鈕或鈦）的體積大，因此可補償第一導電層5〇〇的表面凹進。請參閱第11圖，化學機械研磨法進行平坦化，將兮開口以外的第一導電層500b、第一導電層500與阻障層3〇^: 除。研磨的過程包括：銅金屬層500的研磨、阻障^3〇〇的研磨、以及最後一道氧化物拋光（〇xide buffing)二手續’其中各階段係使用不同的研磨漿液。、由上述本發明之較佳實施方式可知，一種鑲嵌式金化製程。利用電化學接觸置換法將位於開口上方，一導電層500上之第二導電層6〇〇1)置換成該第一導 5〇〇b ,再利用化學機械研磨法進行平坦曰整之鑲嵌式金屬化構件。乂侍到表面平 [本案特徵及效果] 本發明之特徵與效果在於··提供一件的Μ造方沐，廿處m ’、種鏢1甘入式金屬化構千的h方法，並應用選擇性電偁化學機械研磨過研磨時所、#、黑从加推，嗎置換法U克服 (dishing)。時所&遇的銅導線碟狀凹陷本發明的另-特徵與效果在於提供—種鑲嵌式金屬化第16頁〇503-9836TW(Nl)，· TSMC2002-0779;jamn^7 1222169 五、發明說明（12) 製程’在產生碟狀凹陷銅金屬層表面，電化學接觸置換法將位於開口上方，覆蓋第一導電層上之第二導電層置換成該第一導電層，以得到表面平整之鑲嵌式金屬化構件。雖然本發明已以較佳實施例揭露如上，然其並非用以 :定j發明，任何熟習此項技藝者’ &不脫離本發神和範圍内，當可作更動與潤飾，當視後附之申請專利範圍所界定者為準$明之保護範圍 0503-9836TW(Nl) ； TSMC2002-0779;jamngwo.ptd 第17頁 1222169Si + 6F ^ + 2Cu ^ ---- > 2Cu + SiFt 27¾ + 12 plant + 5C «2+ ----> 5Cu + 2TaF ^ 27z + 12 ^ ~ + 5Cw2 + ---- > 5Cu + 2TiF ^ thus electrochemical The volume of copper produced by the contact displacement reaction is larger than that of the original metal stone (button or titanium), so the surface recess of the first conductive layer 500 can be compensated. Referring to FIG. 11, the chemical mechanical polishing method is used for planarization, and the first conductive layer 500b, the first conductive layer 500, and the barrier layer 3 except the opening are removed. The grinding process includes the grinding of the copper metal layer 500, the grinding of the barrier metal, and the last used oxide buffing (continued). Each of these stages uses a different grinding slurry. According to the above-mentioned preferred embodiment of the present invention, it is known that an inlay gold metallization process. Electrochemical contact displacement method is used to replace the second conductive layer (6001) on the conductive layer 500 with the first conductive layer 500b, and then use the chemical mechanical polishing method to perform a flat mosaic. Metallized components.乂服到表面平 [Features and effects of the case] The feature and effect of the present invention is to provide a method of making M, a method of m ', a type of dart, and a metallization structure. Selective electro-chemical chemical mechanical polishing is used to improve the polishing process, and the replacement method is used to overcome (dishing). The copper wire dish-like depression encountered in the present invention Another feature and effect of the present invention is to provide a kind of mosaic metallization. Page 16 503-9836TW (Nl), · TSMC2002-0779; jamn ^ 7 1222169 V. Invention Explanation (12) Process' On the surface of the dish-shaped recessed copper metal layer, the electrochemical contact replacement method replaces the second conductive layer over the opening and covers the first conductive layer with the first conductive layer to obtain a flat surface. Inlaid metallized components. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to: determine the invention, any person skilled in the art 'will not deviate from the scope and spirit of the present invention, and can make changes and retouches. The scope of the attached patent application is subject to the definition of the scope of protection 0503-9836TW (Nl); TSMC2002-0779; jamngwo.ptd Page 17 1222169

為使本發明之上述目接下來配合附圖式，特舉的、特徵及優點能更明顯易懂較佳實施例詳細說明如下。第1A至1C圖係顯示習知製作方法的佈置剖面圖:金屬化構件的第成銅金屬化構件之製造流程。製作方法的2佈c=:習屬電化構件的 :換法直接在擴散阻障層上選擇性置換沉積緻密觸第3至7圖係顯示本發明第一實學接觸置換法’形成鑲嵌式金屬化 ^制用選擇性電化剖面圖。仵的製作方法的佈置第8至11圖係顯示本發明第二實施方化學接觸置換法，形成鑲嵌式金屬/利用選擇性電置剖面圖。件的製作方法的佈 [符號說明] 100〜半導體基底； 200〜介電層； 3 0 0〜阻障層； 4〇〇〜非晶矽層； 50 0〜第一導電層； 5〇〇’ 、5 0 0a及500b〜置換後的鋼金屬居In order to make the above purpose of the present invention in conjunction with the accompanying drawings, the specific features, advantages and advantages can be more clearly understood. The preferred embodiments are described in detail below. Figures 1A to 1C are sectional views showing the layout of the conventional manufacturing method: the manufacturing process of the first copper metallized member of the metallized member. Fabrication method 2 cloth c =: customary electrochemical component: replacement method directly replaces the deposited dense contact on the diffusion barrier layer. Figures 3 to 7 show the first practical contact displacement method of the present invention to form a mosaic metallization. ^ Selective electrification profile. Arrangement of the production method of osmium Figures 8 to 11 show cross-sectional views of a chemical contact replacement method for forming a mosaic metal / selective electric device according to a second embodiment of the present invention. Fabrication method of the method [Description of symbols] 100 to semiconductor substrate; 200 to dielectric layer; 300 to barrier layer; 400 to amorphous silicon layer; 50 to first conductive layer; 500 ' , 500a and 500b ~ steel metal housing after replacement

1222169 圖式簡單說明 60 0、60 0a及6 00b〜第二導電層 0503-9836TWF(Nl) ； TSMC2002-0779;jamngwo.ptd 第19頁1222169 Brief description of drawings 60 0, 60 0a, and 6 00b to the second conductive layer 0503-9836TWF (Nl); TSMC2002-0779; jamngwo.ptd page 19

Claims

12221691222169

利用電化學接觸置換法將位於該開口上方，覆蓋該第一導電層上之該第二導電層置換成該第一導電層。 2 ·如申請專利範圍第1項所述之鑲嵌式金屬化構件之製作方法，其中該開口為一内連線溝槽成一介層窗。 3 ·如申請專利範圍第1碩所述之鑲嵌式金屬化構件之製作方法，其中該介電層是由包括：硼磷矽玻璃（bpSG)、氟摻雜玻璃（FSG)及四乙氧基矽酸鹽（TE0S)其中任一單層或多層材料所製成。 4 ·如申請專利範圍第1項所述之鑲嵌式金屬化構件之製作方法，更包括：形成一阻障層在該介電層上，並與該開口共形。 5 ·如申請專利範圍第4項所述之鑲嵌式金屬化構件之製作方法，其中該阻障層之材料為组、鈦、氮化輕、氮化欽或其組合。 6 ·如申請專利範圍第1項所述之鑲嵌式金屬化構件之The first conductive layer is replaced with the second conductive layer which is located above the opening and covers the first conductive layer by an electrochemical contact displacement method. 2 · The method for manufacturing a mosaic metallized component as described in item 1 of the scope of the patent application, wherein the opening is an interconnecting trench to form an interlayer window. 3. The method for making a mosaic metallized component as described in the first patent application, wherein the dielectric layer is composed of: borophosphosilicate glass (bpSG), fluorine-doped glass (FSG), and tetraethoxy Made of silicate (TE0S) any single or multiple layers. 4. The method for making a mosaic metallized component as described in item 1 of the scope of the patent application, further comprising: forming a barrier layer on the dielectric layer and conforming to the opening. 5. The manufacturing method of the inlaid metallized member as described in item 4 of the scope of the patent application, wherein the material of the barrier layer is group, titanium, light nitride, nitride, or a combination thereof. 6 · As for the inlaid metallized components described in item 1 of the scope of patent application

〇503-9836TW(Nl) ; TSMC2002-0779;jamngwo.ptd 第 20 頁 1222169 六、申請專利範圍製作方法，其中該第一導電層為銅製作7方ί申請專利範圍第6項所述之€嵌式金屬化構件之沉積法（PVD)、化學氣相沉積法（CVD)或無電鍵製=理虱相製作8方t申?專利範圍第1項所述之镶嵌式金屬化構件之取卜万法，其中該平坦化製程係化學機械研磨製程。 9.如申請專利範圍第丨項所述之鑲嵌式金屬化構件之氧作方法，其中該第二導電層是由矽、鈕及鈦所構成。如申請專利範圍第1項所述之鑲嵌式金屬化構件之泉作方法，其中該電化學接觸置換法係將整個一電化學接觸置換溶液進行。极叹置於 11. 如申請專利範圍第10項所述之鑲嵌式金屬化構件之，作方法，其中該電化學接觸置換溶液係含C u2+ w 液。 F 丁洛 12. 如申請專利範圍第n項所述之鑲嵌式金屬化構之I作方法，其中該含CU2+離子溶液係硫酸銅溶液。 13. 如申請專利範圍第1〇項所述之鑲嵌式金屬化構之製作方法，其中該電化學接觸置換溶液係含F_離 • 14·如申請專利範圍第13項所述之鑲嵌式金屬化之製作方法，其中該F-離子溶液係稀釋之氟化氫、化餘刻式（BOE)、氟化氨或其組合。、衝氧 15·如申請專利範圍第10項所述之鑲嵌式金屬化之製作方法，其中該電化學接觸置換溶液包含··去離子〇503-9836TW (Nl); TSMC2002-0779; jamngwo.ptd Page 20 1222169 VI. Application method of patent scope, where the first conductive layer is made of copper 7th party as described in item 6 of patent scope Deposition method (PVD), chemical vapor deposition (CVD), or non-electrically bonded = metallurgical facsimile production of 8 squares? Application of mosaic metalized components described in item 1 of the patent scope Method, wherein the planarization process is a chemical mechanical polishing process. 9. The oxygen operation method for a mosaic metallized member according to item 丨 of the patent application scope, wherein the second conductive layer is composed of silicon, a button, and titanium. The method of spring application of a mosaic metallized component as described in item 1 of the scope of the patent application, wherein the electrochemical contact displacement method is to perform an entire electrochemical contact displacement solution. Sorry to put it in 11. The method of inlaying metallized members as described in item 10 of the scope of patent application, wherein the electrochemical contact displacement solution is a Cu2 + w solution. F Dingluo 12. The method of operating the mosaic metallization structure described in item n of the scope of the patent application, wherein the CU2 + ion-containing solution is a copper sulfate solution. 13. The method of making a mosaic metallization structure as described in item 10 of the scope of the patent application, wherein the electrochemical contact replacement solution contains F_Ion • 14 · The mosaic metal as described in item 13 of the scope of the patent application The manufacturing method of chemical conversion, wherein the F-ion solution is diluted hydrogen fluoride, chemical conversion formula (BOE), ammonia fluoride or a combination thereof. Oxygen flushing 15. The method for making mosaic metallization as described in item 10 of the scope of patent application, wherein the electrochemical contact displacement solution includes deionization

1222169 申請專利範圍水' 硫酸鋼、氫氟酸以及界面活性劑。 16· —種鑲嵌式金屬化構件之製作方法，包括下驟：少提供一具有一開口之介電層於一半導體基底上；形成一第一導電層於該介電層上，且填入該開口；形成一第二導電層於該介電層與該第一導電層上；平坦化該第二導電層以露出該第一導電層及位於該開口上方’該第二導電層覆蓋該第一導電層上；1222169 Scope of patent application Water 'sulfate steel, hydrofluoric acid and surfactant. 16. · A method of manufacturing a mosaic metallized member, including the following steps: providing a dielectric layer with an opening on a semiconductor substrate; forming a first conductive layer on the dielectric layer, and filling the dielectric layer An opening; forming a second conductive layer on the dielectric layer and the first conductive layer; planarizing the second conductive layer to expose the first conductive layer and located above the opening; the second conductive layer covers the first On the conductive layer;

一利用電化學接觸置換法將位於該開口上方，覆蓋該第一導電層上之該第二導電層置換成該第一導電層；以及平坦化該第一導電層以露出該介電層。 / 7·如申請專利範圍第1 6項所述之鑲嵌式金屬化構件之製作方法，其中該開口為一内連線溝槽或一介層窗。 /8·如申請專利範圍第16項所述之鑲嵌式金屬化構件之製作方法，其中該介電層是由包括··硼磷矽玻璃 (BPSG)、氟摻雜玻璃（FSG)及四乙氧基矽酸鹽（TE〇s)其任一單層或多層材料所製成。 /、 1 9 ·如申之製作方法，該開口共形。請專利範圍第1 6項所述之鑲嵌式金屬化構件更包括：形成一阻障層在該介電層上，並與An electrochemical contact replacement method is used to replace the second conductive layer over the opening with the first conductive layer over the first conductive layer; and planarizing the first conductive layer to expose the dielectric layer. / 7 · The method for manufacturing an inlaid metallized member as described in item 16 of the scope of patent application, wherein the opening is an interconnecting trench or a via window. / 8 · The method for manufacturing a mosaic metallized member as described in item 16 of the scope of the patent application, wherein the dielectric layer is composed of: borophosphosilicate glass (BPSG), fluorine-doped glass (FSG), and Oxosilicate (TEOs) is made of any one or more layers. / 、 1 9 · Rushen's production method, the opening is conformal. The inlaid metallized component described in item 16 of the patent scope further includes: forming a barrier layer on the dielectric layer, and

如申請專利範圍第1 9項所述之鑲嵌式金屬化製作方法，其中該阻障層之材料為纽、鈦、氮化麵構件鈦或其組合。氮 21 ·如申請專利範圍第1 6項所述之鑲嵌式金屬化構件The manufacturing method of inlaid metallization as described in item 19 of the scope of patent application, wherein the material of the barrier layer is button, titanium, nitrided surface member titanium or a combination thereof. Nitrogen 21Mosaic metallized components as described in item 16 of the scope of patent application

1222169 申請專利範圍方法，其中該第一導電層為銅。製·如申睛專利範圍第2 1項所述之鑲嵌式金屬化構件沉藉方去其中形成上述銅的方法為化學電鑛、物理氣 2法（PVD)、化學氣相沉積法（CVD)或無電鍍製程。製^ ·如申清專利範圍第1 6項所述之鑲彼式金屬化構件 2方法’其♦該第二導電層是由矽、钽或鈦所構成。製4 ·如申晴專利範圍第1 6項所述之鑲嵌式金屬化構件作方法’其中該平坦化製程為化學機械研磨製程。 25 ·如申請專利範圍第丨6項所述之鑲嵌式金屬化構件 •作方法’其中該電化學接觸置換法係將整個基板浸置電化學接觸置換溶液進行。 2 6 ·如申睛專利範圍第2 $項所述之鑲嵌式金屬化構件 •作方法’其中該電化學接觸置換溶液係含C u2+離子溶 u 27 ·如申請專利範圍第2 6項所述之鑲嵌式金屬化構件製作方法’其中該含C u2+離子溶液係硫酸銅溶液。 ^ 28 ·如申請專利範圍第2 5項所述之鑲嵌式金屬化構件製作方法，其中該電化學接觸置換溶液係含F-離子溶〇 • 29·如申請專利範圍第28項所述之鑲嵌式金屬化構件之製作方法，其中該含F-離子溶浪係稀釋之氟化氫、緩氧化蝕刻式、氟化氨或其組合。，30 ·如申請專利範圍第2 5項所述之鑲嵌式金屬化構件之製作方法，其中該電化學接觸置換溶液包含：去離子1222169 Patent application method, wherein the first conductive layer is copper. The method of depositing the inlaid metallized member as described in item 21 of Shenyan's patent scope to form the above-mentioned copper is chemical electricity ore, physical gas 2 (PVD), chemical vapor deposition (CVD) Or electroless process. Making method ^ The method of inserting metalized members 2 as described in item 16 of the scope of the patent application, wherein the second conductive layer is made of silicon, tantalum or titanium. Process 4-The method of inserting metallized members as described in item 16 of Shen Qing's patent scope, wherein the planarization process is a chemical mechanical polishing process. 25. The inlaid metallized member as described in item 6 of the scope of the applied patent. • Method of operation 'wherein the electrochemical contact replacement method is performed by immersing the entire substrate in an electrochemical contact replacement solution. 2 6 · Mosaic-type metallized member as described in item 2 of the patent application scope • Method of operation 'wherein the electrochemical contact replacement solution contains Cu 2 + ion solution u 27 · As described in item 26 of the scope of patent application The method for manufacturing a mosaic metallized member, wherein the Cu2 + ion-containing solution is a copper sulfate solution. ^ 28. The method of making a mosaic metallized component as described in item 25 of the scope of patent application, wherein the electrochemical contact replacement solution contains F-ion solution. 29. The mosaic as described in item 28 of the scope of patent application A method for manufacturing a metallized member of the general type, wherein the F-ion-soluble wave is a diluted hydrogen fluoride, a slow oxidation etching type, an ammonia fluoride, or a combination thereof. 30 · The method for making a mosaic metallized member as described in item 25 of the scope of the patent application, wherein the electrochemical contact displacement solution includes: deionization

0503-9836TW(Nl) ； TSMa〇〇2.〇779;jamngwo.ptd 第23頁 1222169 六、申請專利範圍水、硫酸銅、氫氟酸以及界面活性劑。 31· —鑲嵌式金屬化構件，包栝：提供一具有一開口之介電層於/半導體基底上；一阻障層，順應性地形成於該開口内；一第一導電層，形成於該介電層上並填入該開口内；以及一第二導電層，形成於該第/導電層上方，並填滿該開口内。 3 2 ·如申請專利範圍第3 1項所述之鑲嵌式金屬化構件，其中該構件為一插塞或一内連線結構。 3 3 ·如申請專利範圍第3 1項所述之鑲嵌式金屬化構件’其中該介電層是由包括：硼磷矽玻璃（BPSG)、氟摻雜玻璃（FSG)及四乙氧基石夕酸鹽（TEOS)其中任一單層或多層材料所製成。 34 ·如申請專利範圍第3丨項所述之鑲嵌式金屬化構件，其中該阻障層之材料為钽、鈦、氮化鈕、氮化鈦或其組合其中之一。八 35 ·如申請專利範圍第3丨項所述之鑲嵌式金屬化構件，其中該第一導電層係由化學電鍍、物理氣相沉積法 (PVD)、化學氣相沉積法（CVD)或無電鍍法所形成之鋼金屬。 36 ·如申請專利範圍第3丨項所述之鑲嵌式金件，其中該第二導電層係由電化學接觸置換法籌之銅金屬。 ^心成0503-9836TW (Nl); TSMa〇02.〇779; jamngwo.ptd page 23 1222169 6. Scope of patent application Water, copper sulfate, hydrofluoric acid and surfactant. 31 · —Mounted metallized member, including: providing a dielectric layer with an opening on a semiconductor substrate; a barrier layer compliantly formed in the opening; a first conductive layer formed on the A dielectric layer is filled into the opening; and a second conductive layer is formed over the first / conductive layer and fills the opening. 3 2 · The inlaid metallized component according to item 31 of the scope of patent application, wherein the component is a plug or an interconnect structure. 3 3 · The inlaid metallized member described in item 31 of the scope of patent application, wherein the dielectric layer is composed of: borophosphosilicate glass (BPSG), fluorine-doped glass (FSG), and tetraethoxylite Acid salt (TEOS) made of any single or multiple layers. 34. The inlaid metallized structure according to item 3 丨 in the scope of the patent application, wherein the material of the barrier layer is one of tantalum, titanium, nitride button, titanium nitride, or a combination thereof. 8.35. The mosaic metallized component according to item 3 丨 in the scope of the patent application, wherein the first conductive layer is formed by chemical plating, physical vapor deposition (PVD), chemical vapor deposition (CVD), or Steel formed by electroplating. 36. The inlaid metal as described in item 3 of the patent application scope, wherein the second conductive layer is a copper metal prepared by an electrochemical contact displacement method. ^ Heart Cheng