594986 玖、發明說明 (發明說明應敘明：發明所屬之技術領域、先前技術、內容、實施方式及圖式簡單說明) 【發明領域】 本發明係一種具有連續性導電帶結構之雙異質接面雙 極性電晶體，此電晶體具備高速、低導通電壓、低飽和電壓； 良好電流增益、高輸出電壓擺幅與大工作電壓區域之良好電 晶體特性。 【發明背景】 近年來’無論是在軍事、商業或是民生應用領域中之通 訊系統、數位邏輯系統與類比線性放大系統，高性能之電子 元件均朝向低操作電壓、高崩潰電壓、單一供應電壓、低散 逸功率、高線性度與高操作頻率之發展。 因此’磷化鎵銦/砷化鎵雙異質接面雙極性電晶體 (double heterojunction bipolar transistor, DHBT )，由於射極 與集極材料同爲大能隙材料所組成，其結構具有對稱性，故 其補償電壓較磷化鎵銦/砷化鎵單異質接面雙極性電晶體 (single heterojunction bipolar transistor，SHBT )爲小。同時由 於集極爲大能隙材料，因此相較於傳統之單異質接面雙極性 電晶體而η ’其具有較大之朋潰電壓（breakdown voltage )， 因此適合應用於高功率方面；然而，存在於基-集極接面之位 尖峰嚴重影響電子的傳輸效率，降低集極聚集(c〇llect)電子 的能力，減少其電流增益。另一方面由於該磷化鎵銦/砷化鎵 3續次頁（發明說明頁不敷使用時，請註記並使用續頁） 11 594986 雙異質接面雙極性電晶體之射極與集極材料皆屬大能隙材 _ 料，至其元件特性具備較低之補償電壓與較大之崩潰電壓等~ _ 特性。雖然存在於基-射與基-集接面之磷化鎵銦/砷化鎵異質 介面之導電帶不連續値僅爲120mV(200〜30mV)，但此一導電 帶不連續値所造成之位障尖峰仍會嚴重衰減元件之電流-電 壓特性，衍生出較大之導通電壓、較大之飽和電壓、較小之 電流增益、較小之輸出電壓擺福與較小之工作電壓區域等缺 點；且此位障尖峰亦造成阻擋效應（blocking effect )，增加集 -射極飽和電壓（collector-emitter saturation voltage, Vsat )，使鲁鲁 其正常工作電壓之有效範圍減小。另一方面，基-射極介面亦 存在一位障尖峰，此一位障尖峰影響電晶體之特性甚劇，特 別是於小工作電流區域時，造成射極注入效率之衰減、降低 集極電流、增加複合電流、增加基極電流與電流增益之衰減 等多項缺失，同時更增加基-射極的導通電壓。綜上所述，習 知技藝所提之雙異質接面雙極性電晶體由於位障尖峰分別 存在於射-基與基-集接面，衍生諸多缺點。這些缺點，大大 限制了此類元件於高功率、高操作電壓、低功率損耗之微波 放大及數位電路上之應用能力；是故，發展出一^種具有高射 極注入效率、低導通電壓、低補償電壓、低工作電壓、高崩 潰電壓之高頻主動元件實乃克不容緩。 爰是，本發明之主要目的在於，可使電晶體消除存在於 異質接面之導電帶不連續値。 本發明之另一目的在於，可使電晶體消除存在於異質接 續次頁（發明說明頁不敷使用時，請註記並使用續頁） 12 594986 面之位障尖峰。 ' 本發明之再一目的在於，可使電晶體提供一低補償電_ ★ 壓。 . 本發明之另一目的在於，可使電晶體提供一低導通雩 壓。 本發明之又一目的在於，可使電晶體提供一低飽和電 壓。 本發明之更一目的在於，可使電晶體提供一高崩潰電 壓。 ·· 爲達到上述目的，本發明係一種具有連續性導電帶結構 之雙異質接面雙極性電晶體，該電晶體至少包含：一半導體 基板；一形成於前述半導體基板上之緩衝層；一形成於前述 緩衝層上之集極層（InGaP); —形成於前述集極層（InGaP) 上之第一過渡層；一形成於前述第一過渡層上之基極層 (GaAs); —形成於前述基極層（GaAs)上之第二過渡層； 一形成於前述第二過渡層上之射極層（InGaP); —形成於前 述射極層（InGaP)上之第三過渡層及一形成於前述第三過胃^ 渡層上之帽層（GaAs)所組成，並於上述之射極層（InGaP) 與帽層（GaAs)、射極層（InGaP)與基極層（GaAs)、集極 層（InGaP)與基極層（GaAs)之間分別導入一漸變性鋁莫 爾分率之砷化鎵鋁層（ALGa^As，χ:〇δ〇·11);藉此，可使本 發明之電晶體達到高速、低導通電壓、低飽和電壓、良好電 流增益、高輸出電壓擺幅與大工作電壓區域之特性。 2續次頁（發明說明頁不敷使用時，請註記並使用續頁） 13 594986 【較佳實施例之詳細說明】 - 有關本發明之詳細說明及技術內容，現就配合圖式說明~ ~ 如下： · 請參閱「第1〜5圖所示」，係本發明電晶體之剖面示 意圖、相對應能帶圖、集極電流密度和基極電流密度對基_ 射極電壓之關係、共射極輸出電流-電壓特性圖、增益截止頻 率和最大振盪頻率對集極電流密度之關係。如圖所示：本發 明係一種具有連續性導電帶結構之雙異質接面雙極性電晶 體，該電晶體1至少包含··一半導體基板1 1、一緩衝層1參鲁 2、一集極層（InGaP) 1 3、一第一過渡層1 4、一基極 層（GaAs) 15、一第二過渡層16、一射極層（inGap ) 1 7、一第二過渡層1 8及一帽層（GaAs) 1 9所構成，並 於上述之射極層（InGaP) 1 7與帽層（GaAs) 1 9、射極 層（InGaP) 1 7 與基極層（GaAs) 1 5、集極層（InGap) 1 3與基極層（ GaAs) 1 5之間分別導入一漸變性莫爾分 率之砷化鎵錦層（ALGa^As，χ:ΟδΟ·11)，藉此，可使本^明 之電晶體1達到高速、低導通電壓、低飽和電壓、良 增益、高輸出電壓擺幅與大工作電壓區域之特性。 m 上述所提之半導體基板1 1係由η型摻雜之半,絕，緣 砷化鎵所組成； $ 該緩衝層1 2係形成於上述之半導體基板1 1± 衝層1 2之厚度爲10nm-lOOOnm之碑化餘:嘉晶層，並目有打 型摻雜，且摻雜濃度爲lxl〇16-5xl019cm3，且該緩衝層上 續次頁（發明說明頁不敷使用時，請註記並使用續頁） 14 594986 之金屬電極係選自Au、Ni、Au-Ge、Au-Ge-Ni其中之一的金 屬以做爲集極電極121; _ · 該集極層（InGaP) 1 3係形成於上述之緩衝層1 2上， 該集極層1 3之厚度爲50nm-1000nm之砷化鎵磊晶層，並具 有η型摻雜，且摻雜濃度爲5xl〇15-lxl018cm_3 ; 該第一過渡層1 4係形成於上述之集極層1 3上，該第 一過渡層1 4之厚度爲Inm-lOOnm之砷化鎵鋁磊晶層，並具 有η型摻雜，且摻雜濃度爲lxi〇16_9xl〇18cm 3，且該第一過渡 層1 4之特徵更包含：第一過渡層1 4於接近集極層1 3處#_ 之鋁莫爾分率爲0.11，而且第一過渡層1 4於接近基極層1 5處之鋁莫爾分率爲0，而該第一過渡層1 4之特徵更包 含：其鋁莫爾分率由0.11漸變至〇，其與垂直方向距離之函 數關係爲一次線性關係或爲二次拋物曲線關係； 該基極層（GaAs) 1 5係形成於上述之第一過渡層1 4 上’該基極層1 5之厚度爲10nm-300nm之碑化鎵嘉晶層， 並具有P型摻雜，且摻雜濃度爲lxl〇18-9xl019cm_3，且該基極 — 層1 5上之金屬電極係由Ti/Pt/Au三層金屬所形成以做爲該 基極層1 5之基極電極1 5 1 ; 該第二過渡層1 6係形成於上述之基極層1 5上，該第 二過渡層1 6之厚度爲lnm-100nm之砷化鎵鋁磊晶層，並具 有η型摻雜，且摻雜濃度爲ixi〇16_9Xi〇18cm·3，且該第二過渡 層1 6之特徵更包含：第二過渡層1 6於接近射極層1 7處 之鋁莫爾分率爲0.11，而且第二過渡層1 6於接近基極層1 3續次頁（發明說明頁不敷使用時，請註記並使用續頁） 15 594986 5處之鋁莫爾分率爲Ο，而該第二過渡層1 6之特徵更包‘· 含：其鋁莫爾分率由0.11漸變至〇，其與垂直方向距離之函_ · 數關係爲一次線性關係或爲二次拋物曲線關係； 該射極層（InGaP) 17係形成於上述之第二過渡層1. 6上，該射極層1 7之厚度爲i〇nm-i〇〇〇nm之磷化鎵銦磊晶 層，並具有η型摻雜，且摻雜濃度爲2xl〇16-9xl018cm3 ; 該第三過渡層1 8係形成於上述之射極層1 7上，該第 三過渡層1 8之厚度爲lnm-100nm之砷化鎵鋁磊晶層，並具 有η型摻雜，且摻雜濃度爲Ixl016-9xl018cm-3，且該第三過渡#春 層18之特徵更包含：第三過渡層18於接近射極層17處 之鋁莫爾分率爲〇·11，而且第三過渡層1 8於接近帽層1 9 處之鋁莫爾分率爲〇 ’而該第三過渡層1 8之特徵更包含·· 其鋁莫爾分率由0.11漸變至〇，其與垂直方向距離之函數關 係爲一次線性關係或爲二次拋物曲線關係； 該帽層（GaAs) 1 9係形成於_h述之第Η過渡層1 8 上，該帽層1 9之厚度爲l〇nm-1000nm之砷化鎵磊晶層，並__ 具有η型摻雜，且摻雜濃度爲lxl〇17_9xl〇19cm 3，且該帽層1 9上之金屬電極係選自Au、见、Au-Ge、Au-Ge-Ni其中之一 的金屬以做爲射極電極191; 再由第2圖中，可淸楚看出存在於異質接面之導電帶不 連續値，無論於熱平衡抑或不同大小偏壓條件下’皆完全不 存在。其中，導電帶呈現連續平坦曲線特性’且習知常見之 位障尖峰確實被有效抑制’故良好之電晶體導通現象可獲 □I續次頁（發明說明頁不敷使麵，請註記並使用顧） 16 594986 得；而價電帶則如同一般雙異質接面雙極性電晶體，所以本 發明兀件具有良好之電洞侷限能力，可維持一良好之射極注 入效率，可獲得良好之電晶體放大特性。値得注意的是，此 一絕佳之能帶特性，主要係因本案所提之結構分別於，並於594986 发明 Description of the invention (the description of the invention should state: the technical field, prior art, content, embodiments, and drawings of the invention are briefly explained) [Field of the invention] The present invention is a double heterojunction with a continuous conductive belt structure Bipolar transistor, this transistor has high-speed, low on-voltage, low saturation voltage; good current gain, high output voltage swing and good transistor characteristics in a large operating voltage region. [Background of the Invention] In recent years, no matter in communication systems, digital logic systems, and analog linear amplification systems in military, commercial, or civilian applications, high-performance electronic components are oriented towards low operating voltages, high breakdown voltages, and single supply voltages. The development of low dissipation power, high linearity and high operating frequency. Therefore, the double heterojunction bipolar transistor (DHBT) of gallium indium phosphide / gallium arsenide has a symmetrical structure because the emitter and collector materials are both composed of high energy gap materials. Its compensation voltage is smaller than that of a single heterojunction bipolar transistor (SHBT). At the same time, because of the extremely large energy gap material, compared with the traditional single heterojunction bipolar transistor, η 'has a larger breakdown voltage, so it is suitable for high power applications; however, there are Spikes at the base-collector interface severely affect the electron transfer efficiency, reduce the ability of the collector to collect electrons, and reduce its current gain. On the other hand, due to the indium gallium phosphide / gallium arsenide 3 continuation page (if the invention description page is insufficient, please note and use the continuation page) 11 594986 Double heterojunction bipolar transistor emitter and collector materials All are high-energy gap materials, and their component characteristics have lower compensation voltage and larger breakdown voltage, etc. ~ _ characteristics. Although the conduction band discontinuity of the gallium indium phosphide / gallium arsenide heterogeneous interface existing on the base-radiation and base-collection interface is only 120mV (200 ~ 30mV), the position caused by this discontinuity Barrier spikes will still severely attenuate the current-voltage characteristics of the components, resulting in shortcomings such as a larger on-voltage, a larger saturation voltage, a smaller current gain, a smaller output voltage and a smaller operating voltage region; Moreover, this barrier spike also causes a blocking effect, increasing the collector-emitter saturation voltage (Vsat), which reduces the effective range of Lulu's normal operating voltage. On the other hand, there is also a barrier spike at the base-emitter interface. This barrier spike affects the characteristics of the transistor, especially in the small operating current region, which causes the attenuation of the emitter injection efficiency and reduces the collector current. , Increasing the composite current, increasing the base current and the attenuation of the current gain, and so on, and increasing the base-emitter on-voltage. In summary, the bi-heterojunction bipolar transistor mentioned in the conventional art has many disadvantages due to the barrier peaks that exist on the emitter-based and base-collective interfaces, respectively. These shortcomings greatly limit the application ability of such components in microwave amplifiers and digital circuits with high power, high operating voltage, and low power loss. Therefore, a kind of high-emitter injection efficiency, low on-voltage, low High-frequency active components with compensation voltage, low operating voltage, and high breakdown voltage cannot be ignored. That is, the main object of the present invention is to make the transistor eliminate the discontinuity in the conductive tape existing at the heterojunction. Another object of the present invention is to enable the transistor to be eliminated from the heterogeneous continuation page (when the description page of the invention is insufficient, please note and use the continuation page) 12 594986 surface barrier peaks. 'Another object of the present invention is to enable the transistor to provide a low compensation voltage. Another object of the present invention is to enable the transistor to provide a low turn-on voltage. Another object of the present invention is to enable the transistor to provide a low saturation voltage. A further object of the present invention is to enable the transistor to provide a high breakdown voltage. In order to achieve the above object, the present invention is a bi-heterojunction bipolar transistor with a continuous conductive belt structure, the transistor includes at least: a semiconductor substrate; a buffer layer formed on the semiconductor substrate; A collector layer (InGaP) on the aforementioned buffer layer;-a first transition layer formed on the aforementioned collector layer (InGaP); a base layer (GaAs) formed on the aforementioned first transition layer;-formed on A second transition layer on the aforementioned base layer (GaAs); an emitter layer (InGaP) formed on the aforementioned second transition layer;-a third transition layer formed on the aforementioned emitter layer (InGaP) and a formation It is composed of the cap layer (GaAs) on the third transit layer, and is formed on the emitter layer (InGaP) and cap layer (GaAs), the emitter layer (InGaP) and the base layer (GaAs), A gradient AlMoAs layer (ALGa ^ As, χ: 0δ〇 · 11) is introduced between the collector layer (InGaP) and the base layer (GaAs), respectively; The transistor of the present invention achieves high speed, low on-voltage, low saturation voltage, good current gain, and high output voltage swing. Operating voltage characteristics of large area. 2 Continued pages (please note and use continuation pages when the invention description page is insufficient) 13 594986 [Detailed description of the preferred embodiment]-For detailed description and technical content of the present invention, we will now explain it with drawings. As follows: Please refer to "shown in Figures 1 to 5", which is a schematic cross-sectional view of the transistor of the present invention, the corresponding energy band diagram, the relationship between the collector current density and the base current density to the base_emitter voltage, and the common emission Output current-voltage characteristics, gain cut-off frequency and maximum oscillation frequency vs. collector current density. As shown in the figure, the present invention is a bi-heterojunction bipolar transistor with a continuous conductive belt structure. The transistor 1 includes at least a semiconductor substrate 1, a buffer layer 1 and a collector. InGaP 1 3, a first transition layer 1 4, a base layer (GaAs) 15, a second transition layer 16, an emitter layer (inGap) 1 7, a second transition layer 18, and The cap layer (GaAs) 1 9 is composed of the above-mentioned emitter layer (InGaP) 1 7 and the cap layer (GaAs) 1 9, the emitter layer (InGaP) 1 7 and the base layer (GaAs) 1 5. A gradient molybdenum gallium arsenide layer (ALGa ^ As, χ: ΟδΟ · 11) is introduced between the electrode layer (InGap) 1 3 and the base layer (GaAs) 1 5 respectively, thereby making it possible to make The transistor 1 of the present invention achieves the characteristics of high speed, low on-voltage, low saturation voltage, good gain, high output voltage swing, and large operating voltage region. m The semiconductor substrate 1 1 mentioned above is composed of n-type doped half, absolute, edge gallium arsenide; $ The buffer layer 12 is formed on the semiconductor substrate 1 1 ± the thickness of the punching layer 12 is 10nm-lOOOnm epitaxial remnant: Jiajing layer, with pattern doping, and the doping concentration is lx1016-5xl019cm3, and the next page on the buffer layer (if the invention description page is insufficient, please note And use continuation sheet) 14 594986 The metal electrode is a metal selected from one of Au, Ni, Au-Ge, Au-Ge-Ni as the collector electrode 121; _ · The collector layer (InGaP) 1 3 It is formed on the buffer layer 12 described above, the collector layer 13 has a gallium arsenide epitaxial layer with a thickness of 50nm-1000nm, and has n-type doping, and the doping concentration is 5x1015-lxl018cm_3; The first transition layer 14 is formed on the collector layer 13 described above. The thickness of the first transition layer 14 is a gallium aluminum arsenide epitaxial layer of Inm-100 nm, and has n-type doping. The concentration is lxi〇16_9xl018cm3, and the characteristics of the first transition layer 14 further include: the first transition layer 14 is near the collector layer 13 at an aluminum moire fraction of 0.11, and the first transition The Al Moore fraction of the layer 14 near the base layer 15 is 0, and the characteristics of the first transition layer 14 further include: its Al Moore fraction changes from 0.11 to 0, and its distance from the vertical direction The functional relationship is a first-order linear relationship or a quadratic parabolic curve relationship. The base layer (GaAs) 15 is formed on the first transition layer 1 4 described above. The thickness of the base layer 15 is between 10 nm and 300 nm. The epitaxial gallium layer has a P-type doping and a doping concentration of lxl018-9xl019cm_3, and the metal electrode on the base-layer 15 is formed of three layers of Ti / Pt / Au metal to As the base electrode 15 of the base layer 15; the second transition layer 16 is formed on the base layer 15 described above, and the thickness of the second transition layer 16 is 1 to 100 nm of arsenic The gallium aluminum epitaxial layer has n-type doping and the doping concentration is ixi〇16_9Xi〇18cm · 3, and the characteristics of the second transition layer 16 further include: the second transition layer 16 is close to the emitter The Al Moore fraction of layer 17 is 0.11, and the second transition layer 16 is close to the base layer 13 Continued pages (If the description page of the invention is insufficient, please note and use the continuation page) 15 594986 5 places The Al Moore fraction is 0, and the characteristics of the second transition layer 16 are more inclusive. It includes: its Al Moore fraction changes from 0.11 to 0, and the function of the distance from the vertical direction is a one-time relationship. A linear relationship or a quadratic parabolic curve relationship; the emitter layer (InGaP) 17 is formed on the second transition layer 1.6 described above, and the thickness of the emitter layer 17 is between 100 and 100 nm. A gallium indium epitaxial layer with n-type doping and a doping concentration of 2x1016-9xl018cm3; the third transition layer 18 is formed on the above emitter layer 17 and the third transition The layer 18 is a gallium aluminum arsenide epitaxial layer with a thickness of 1 nm-100 nm, and has n-type doping, and the doping concentration is Ixl016-9xl018cm-3, and the characteristics of the third transition # 春 层 18 further include: The Al Moore fraction of the third transition layer 18 near the emitter layer 17 is 0.11, and the Al Moore fraction of the third transition layer 18 near the cap layer 19 is 0 ′, and the third The characteristics of the transition layer 18 further include: its Al Moore fraction is changed from 0.11 to 0, and its function relationship with the vertical distance is a linear relationship or a quadratic parabolic curve relationship; the cap layer (GaAs) 19 is formed on the third transition layer 18 described in _h, the cap layer 19 has a gallium arsenide epitaxial layer with a thickness of 10 nm to 1000 nm, and has n-type doping, And the doping concentration is 1 × 10-17_9 × 1019 cm 3, and the metal electrode on the cap layer 19 is a metal selected from one of Au, Jian, Au-Ge, and Au-Ge-Ni as the emitter electrode 191 From Figure 2, it can be clearly seen that the conductive strips present at the heterojunction are discontinuous. They are completely absent, regardless of thermal equilibrium or different magnitude bias conditions. Among them, the conductive strip exhibits a continuous flat curve characteristic, and the common common barrier barrier peaks are effectively suppressed. Therefore, a good transistor conduction phenomenon can be obtained □ Continued page (invention description page is not enough, please note and use Gu) 16 594986 is obtained; and the valence band is like a general bi-heterojunction bipolar transistor, so the element of the present invention has a good hole-limiting ability, can maintain a good emitter injection efficiency, and can obtain good electricity. Crystal amplification characteristics. It should be noted that this excellent band characteristic is mainly due to the structure mentioned in this case.
上述之射極層（InGaP) 1 7與帽層（GaAs) 1 9、射極層 (InGaP) 1 7 與基極層（GaAs) 1 5、集極層（InGaP) 1 3與基極層（GaAs) 1 5之間分別導入一漸變性錦莫爾分率 之砷化鎵鋁層（ALcGa^As，χ:ΟδΟ·11)，故具連續性導電帶結 構確可由本案所提之元件所得。The above-mentioned emitter layer (InGaP) 1 7 and cap layer (GaAs) 1 9, emitter layer (InGaP) 1 7 and base layer (GaAs) 1 5, collector layer (InGaP) 1 3 and base layer ( GaAs) 15 are respectively introduced with a gradual Jin Moore fraction of a gallium aluminum arsenide layer (ALcGa ^ As, χ: 0δ0 · 11), so a continuous conductive belt structure can indeed be obtained from the components mentioned in this case.
而第3 A、3Β、3C圖係本發明之集極電流密度和基極 電流密度對基-射極電壓之關係，圖中之集-基極偏壓條件分 別爲0伏、3伏、5伏。首先，於圖第3 A、3Β、3C圖中 可觀察出，集極電流密度、基極電流密度與基-射極電壓之變 化曲線於圖中呈現非常類似之函數關係，換言之，改變集-基極偏壓條件並不影響本案所提元件集極電流密度、基極電 流密度與基-射極電壓之關係，此一特性確與傳統雙異質接面 雙極性電晶體大不相同。分析其原因，乃因位障尖峰存在於 傳統雙異質接面雙極性電晶體之集-基界面，故於較大之集-基極偏壓條件，可調變（減少）位障尖峰，使其具有較大之 集極電流密度與較小之基極電流密度。經由此點，亦可證 實，本案所提之元件，因於InGaP集極層13與GaAs基極層 15之間導入一漸變性鋁莫爾分率之砷化鋁鎵層（ALGawAs， χ:Οδ〇·11)，成功消除了存在於基-集極接面之位障尖峰，同時 13]續次頁（發明說明頁不敷使用時，請註記並使用續頁) 17 594986 習知因位障尖峰嚴重影響電子的傳輸效率亦可獲得大幅改·· 善◦另一方面，本實施例之導通電壓（定義爲集極電流密度_ _ 達到1安培/平方公分時之基-射極電壓）僅爲1J5伏，此一 較小之導通電壓，意味著較小之輸入基-射極電壓即可使電晶 體進入工作區’以提供一額定之穩態輸出電流，使工作點之 直流消耗功率將可下降。此點，將有利於本實施例之應用層 面，特別是在於行動通訊系統方面。 再由第4圖觀之，其中，基極輸入電流爲1微安（相對 應之電流密度爲1安培/平方公分），且其曲線族增加量爲1癱麵 微安。由於本發明之一較佳實施例，呈現一良好且連續平坦 特性之導電帶，故習知傳統電晶體因導電帶不連續値造成位 障尖峰衍生之不良特性（例如：過大之補償電壓、過大之飽 和電壓、小工作電流區域較差之電晶體放大特性等等），於 本實施例中皆可大幅改善。於特性圖如圖第4圖中，顯示本 發明之一較佳實施例具有一極小之補償電壓約20毫伏與一The 3A, 3B, and 3C diagrams are the relationship between the collector current density and the base current density versus the base-emitter voltage of the present invention. The collector-base bias conditions in the figure are 0 volts, 3 volts, and 5 volts, respectively. Volt. First, it can be observed in Figures 3A, 3B, and 3C that the change curves of collector current density, base current density, and base-emitter voltage show very similar functional relationships in the figure. In other words, change the set- The base bias condition does not affect the relationship between the collector current density, the base current density, and the base-emitter voltage of the device mentioned in this case. This characteristic is quite different from the traditional dual heterojunction bipolar transistor. The reason for this analysis is that the barrier peaks exist at the set-base interface of the traditional bi-heterojunction bipolar transistor. Therefore, under larger set-base bias conditions, the barrier peaks can be adjusted (reduced) to reduce It has a larger collector current density and a smaller base current density. From this point, it can also be confirmed that the element mentioned in this case is due to the introduction of a graded aluminum molybdenum aluminum gallium arsenide layer (ALGawAs, χ: 0δ) between the InGaP collector layer 13 and the GaAs base layer 15. 〇11), successfully eliminated the peaks of the barriers existing at the base-collector interface, and at the same time 13] the next page (if the description page of the invention is insufficient, please note and use the continuation page) 17 594986 Spikes seriously affect the transmission efficiency of electrons and can also be greatly improved. On the other hand, the on-voltage of this embodiment (defined as the collector current density _ _ base-emitter voltage when it reaches 1 amp / cm 2) is only It is 1J5 volts. This smaller on-state voltage means that a smaller input base-emitter voltage will allow the transistor to enter the working area to provide a rated steady-state output current, so that the DC power consumption at the operating point will be May drop. This will be beneficial to the application layer of this embodiment, especially in terms of mobile communication systems. From Figure 4, it can be seen that the base input current is 1 microampere (the corresponding current density is 1 ampere per square centimeter), and the increase of the curve family is 1 parasitic surface microampere. Since a preferred embodiment of the present invention exhibits a conductive strip with good and continuous flat characteristics, it is known that the traditional transistor has poor characteristics derived from the barrier peak caused by the discontinuous conductive strip (eg, excessive compensation voltage, excessive voltage). Saturation voltage, poor transistor amplification characteristics in a small operating current region, etc.) can be greatly improved in this embodiment. The characteristic diagram is shown in Fig. 4, which shows that a preferred embodiment of the present invention has a very small compensation voltage of about 20 mV and a
極小之飽和電壓約0.25伏，同時具有良好之放大特性。此一 極低之補償電壓，將有助於本發明元件應用於低功率耗損之 場合，且亦能大幅縮減電路設計之複雜度，確有利本發明於 產業之應用。同時一較小之飽和電壓特性，亦非常有助於元 件應用於類比電路，因爲較小之飽和電壓可提供一較大之輸 出電流（訊號）之擺幅。再者，此一極小之飽和電壓與補償 電壓，於數位電路之設計將十分有利，例如元件操作於ON 時，其靜態之消耗功率可以巨幅縮減，進而增加其電路之集 3續次頁（發明說明頁不敷使用時，請註記並使用續頁） 18 594986 積度與降低其熱散耗。 另本發明具有連續性導電帶結構之雙異質接面雙極性胃 電晶體之高頻特性如增益截止頻率（fT)和最大振盪頻率 (fMAX)對集極電流密度之關係如第5圖所示，其中集-射極 偏壓固定於3伏。同時增益截止頻率（fT)係指電流增益 (current gain, |力i7|)於0 dB時之頻率，而最大振盪頻率（fMAX) 則爲瑪森單向增益（Mason unilateral gain，/7)於OdB時之頻 率。由第5圖中可看出，本發明實施例中之一種具有連續性 導電帶結構之磷化鎵銦/砷化鎵鋁/砷化鎵雙異質接面雙極性_ β 電晶體具良好之高頻特性，當集極電流密度逐漸增加時’增 益截止頻率（f〇與最大振盪頻率（fMAX)亦隨之逐漸增加’ 當集極電流密度達到約1.5安培/平方公分左右時，可獲得一 最大之增益截止頻率（fr)約6.3兆赫兹與一最大振擾頻率 (fMA〇約28.3兆赫茲。達到最大値後，受柯爾效應（Κπ± effect)與串聯電阻效應之影響下，增益截止頻率（fr)與最 大振盪頻率（fMAx)則隨集極電流密度之逐漸增加而逐漸降 φ 低。 綜言之，本發明之具有連續性導電帶結構之雙異質接面 雙極性電晶體，具有以下之優點： (1)由於本發明具有連續性導電帶結構之雙異質接面 雙極性電晶體具良好之連續性導電帶結構，可完全消除習知 技術中因導電帶不連續値所形成之位障尖峰，故本發明所提 之元件呈現一幾乎可忽略之補償電壓◦此一極低之補償電 3續次頁（發明說明頁不敷使用時，請註記並使用續頁） 19 594986 壓’將有助於本發明元件應用於低功率耗損之場合，且亦能> \ 大幅縮減電路設計之複雜度。 -· (2) 本發明雙異質接面雙極性電晶體具有良好之連續 性導電帶結構，故本發明所提之元件呈現一較小之導通電 壓。此一較小之導通電壓，意味著較小之輸入電壓即可提供 一額定之穩態輸出電流，故工作點之直流消耗功率將可下 降’此點，將十分有利於本實施例之應用層面，特別是在於 行動通訊系統方面，例如個人行動電話之電池耐久性考量。 (3) 本發明具有良好之連續性導電帶結構，故本發明__ 所提之元件呈現一較小之飽和電壓。此一較小之飽和電壓特 性非常有助於本發明元件應用於放大器設計（類比）與開關 (數位），因爲較小之飽和電壓始可允許一較大之輸出電流 (訊號）之擺幅。同時於數位應用上，靜態之消耗功率可以 巨幅縮減，進而增加其電路之集積度與降低其熱散耗。 (4) 本發明之雙異質接面雙極性電晶體具有良好之連 糸賈性導電帶結構，故本發明所提之兀件呈現具一良好之電晶 g 體高讎纟雜。 · (5) 本發明之具有連續性導電帶結構之雙異質接面雙 極性電晶體，集極層材料爲大能隙半導體材料，故本發明所 提之元件具有一良好之電壓崩潰特性。 綜上所述，本發明具備原創性、新穎性及進步性，任何 熟習此技術者，在不脫離本發明之精神和範圍內，當可作爲 些許之更動與潤飾，因此本發明之保護範圍當視後附之申請 13]續次頁（發明說明頁不敷使用時，請註記並使用續頁） 20 594986 專利範圍所界定爲準。 惟以上所述者，僅爲本發明之較佳實施例而已，當不能 以之限定本發明實施之範圍，即大凡依本發明申請專利範圍 所作之均等變化與修飾，皆應仍屬本發明專利涵蓋之範圍 內。 【圖式之簡單說明】 第1圖，係本發明電晶體之剖面示意圖。 第2圖，係本發明之相對應能帶圖。 第3A、3B、3C圖，係本發明之集極電流密度和基極電流 密度對基-射極電壓之關係。 第4圖，係本發明之共射極輸出電流-電壓特性圖。 第5圖，係本發明之增益截止頻率和最大振盪頻率對集極電 流密度之關係。 【元件標號說明】 電晶體· · · 半導體基板· 緩衝層..................12 集極電極................121 MSM..................i 3 第一過渡層................14 0續次頁（發明說明頁不敷使用時，請註記並使用續頁）The minimum saturation voltage is about 0.25 volts, and it has good amplification characteristics. This extremely low compensation voltage will help the device of the present invention to be applied to the occasion of low power loss, and can also greatly reduce the complexity of circuit design, which is indeed beneficial to the industrial application of the present invention. At the same time, a smaller saturation voltage characteristic is also very helpful for the application of the analog circuit, because a smaller saturation voltage can provide a larger swing of the output current (signal). In addition, this extremely small saturation voltage and compensation voltage will be very advantageous in the design of digital circuits. For example, when the component is turned on, its static power consumption can be greatly reduced, thereby increasing its circuit set. When the page of the invention is insufficient, please note and use the continuation page) 18 594986 and reduce its heat dissipation. In addition, the high-frequency characteristics of the bi-heterojunction bipolar gastroelectric crystal with a continuous conductive band structure according to the present invention, such as the relationship between the gain cutoff frequency (fT) and the maximum oscillation frequency (fMAX) versus the collector current density, are shown in Figure 5. Where the collector-emitter bias is fixed at 3 volts. Simultaneous gain cut-off frequency (fT) refers to the frequency at which the current gain (current gain | | force i7 |) is at 0 dB, and the maximum oscillation frequency (fMAX) is the Mason unilateral gain (/ 7) at Frequency at OdB. It can be seen from FIG. 5 that a gallium indium phosphide / gallium aluminum arsenide / gallium arsenide dual heterojunction bipolar _ β transistor with a continuous conductive band structure in the embodiments of the present invention has a good height. Frequency characteristics, when the collector current density gradually increases, 'the gain cut-off frequency (f0 and the maximum oscillation frequency (fMAX) also gradually increase accordingly') When the collector current density reaches about 1.5 amps / cm2, a maximum The gain cut-off frequency (fr) is about 6.3 MHz and a maximum perturbation frequency (fMA0 is about 28.3 MHz). After reaching the maximum threshold, the gain cut-off frequency is affected by the Kol effect and the series resistance effect. (Fr) and the maximum oscillation frequency (fMAx) gradually decrease as the collector current density gradually increases. In summary, the dual heterojunction bipolar transistor with a continuous conductive band structure of the present invention has the following Advantages: (1) Since the bipolar junction bipolar transistor with a continuous conductive belt structure of the present invention has a good continuous conductive belt structure, it can completely eliminate the formation of conductive belt discontinuities in the conventional technology. Barrier spikes, so the component mentioned in this invention presents an almost negligible compensation voltage. ◦ This extremely low compensation voltage is continued on the next page. (When the description page of the invention is insufficient, please note and use the continuation page.) 19 594986 It will help the device of the present invention to be applied to the occasion of low power loss, and can also greatly reduce the complexity of the circuit design.-· (2) The bipolar junction bipolar transistor of the present invention has good continuous conductivity With the structure, the component mentioned in the present invention presents a smaller on-voltage. This smaller on-voltage means that a smaller input voltage can provide a rated steady-state output current, so the DC consumption at the operating point The power will be reduced. This point will be very beneficial to the application level of this embodiment, especially in terms of battery durability considerations in mobile communication systems, such as personal mobile phones. (3) The present invention has a good continuous conductive belt structure Therefore, the component of the present invention __ presents a smaller saturation voltage. This smaller saturation voltage characteristic is very helpful for the application of the component of the present invention in the design of the amplifier (analog) and Switch (digital), because a smaller saturation voltage can allow a larger output current (signal) swing. At the same time, in digital applications, the static power consumption can be greatly reduced, thereby increasing the integration of the circuit and (4) The bi-heterojunction bipolar transistor of the present invention has a good structure of conductive strips, so the element mentioned in the present invention has a good height of the crystal g. (5) The bi-heterojunction bipolar transistor with a continuous conductive band structure of the present invention, and the collector layer material is a semiconductor material with a large energy gap, so the device provided by the present invention has a good voltage breakdown. In summary, the present invention has originality, novelty, and advancement. Anyone skilled in this technology can be regarded as a little modification and retouching without departing from the spirit and scope of the present invention, so the protection of the present invention The scope is subject to the attached application 13] continuation page (if the invention description page is insufficient, please note and use the continuation page) 20 594986 The scope of the patent shall prevail. However, the above are only the preferred embodiments of the present invention. When the scope of implementation of the present invention cannot be limited, that is, all equal changes and modifications made in accordance with the scope of the patent application of the present invention shall still belong to the patent of the present invention. Covered. [Brief description of the drawings] FIG. 1 is a schematic cross-sectional view of a transistor of the present invention. Fig. 2 is a corresponding band diagram of the present invention. Figures 3A, 3B, and 3C show the relationship between the collector current density and the base current density versus the base-emitter voltage of the present invention. FIG. 4 is a graph showing a common emitter output current-voltage characteristic of the present invention. Fig. 5 shows the relationship between the gain cutoff frequency and the maximum oscillation frequency of the present invention versus the collector current density. [Element number description] Transistor · · · Semiconductor substrate · Buffer layer ........ 12 Collector electrode ............. ... 121 MSM ..... i 3 First Transition Layer ... 14 0 Continued (When the invention description page is insufficient, please note and use the continuation page)
·· 基極層..................15 21 594986 基極電極................15 1 第二過渡層................16 射極層..................17 第三過渡層................18 帽層...................19 射極電極................191Base layer ... 15 21 594986 Base electrode ... 15 1 Second transition Layer ... 16 Emitter layer ... 17 Third transition layer ... .... 18 Cap layer ... 19 Emitter electrode ......... ..191
22twenty two