TW578084B - Multi-computer switcher - Google Patents

Multi-computer switcher Download PDF

Info

Publication number
TW578084B
TW578084B TW91137911A TW91137911A TW578084B TW 578084 B TW578084 B TW 578084B TW 91137911 A TW91137911 A TW 91137911A TW 91137911 A TW91137911 A TW 91137911A TW 578084 B TW578084 B TW 578084B
Authority
TW
Taiwan
Prior art keywords
microprocessor
computer
switch
bus
patent application
Prior art date
Application number
TW91137911A
Other languages
Chinese (zh)
Other versions
TW200411520A (en
Inventor
Chun-Liang Lee
Chih-Cheng Wei
Original Assignee
Inventec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Inventec Corp filed Critical Inventec Corp
Priority to TW91137911A priority Critical patent/TW578084B/en
Application granted granted Critical
Publication of TW578084B publication Critical patent/TW578084B/en
Publication of TW200411520A publication Critical patent/TW200411520A/en

Links

Landscapes

  • Studio Circuits (AREA)
  • Input From Keyboards Or The Like (AREA)

Abstract

A multi-computer switcher, which uses one set of mouse and keyboard to control more than one set of computers and makes computer controlled by the mouse and keyboard display through a screen in connection with the multi-computer switcher, which comprises a first microprocessor and a second microprocessor used to transmit mouse data and keyboard data to a third microprocessor, allowing the third microprocessor to transmit mouse command and keyboard command to the presently controlled computer via the first microprocessor and the second microprocessor respectively, an image signal decoding circuit used to decode an image signal of the presently controlled computer and then display on a screen and a switching display used to output a switching signal to switch to channel for image output and transmit the switching signal to the third microprocessor so that the third microprocessor can transmit the mouse command and keyboard command to corresponding computer.

Description

578084 五、發明說明(1) 【發明所屬之技術領域】 本發明係關於一種切換器,特別是一種以一組鍵盤、 滑鼠及螢幕操控所有電腦之多電腦切換器。 k先前技術】 所謂的多電腦切換器,又稱做KVM切換器,K指的是鍵 盤(keyboard) ,V指的是影像(video) ,Μ指的是滑鼠 (mouse),是一種可管理多台電腦的有效工具,只要一 組鍵盤、滑鼠及螢幕,即可輕易操控所有電腦。 在早期生產電腦主機者,必須測試至少48小時,為了 測試須大量的螢幕與鍵盤,於是一種簡單型電腦切換器就 產生了 ,可以在生產測試時省去多餘的螢幕、鍵盤,由於 其作業系統大部份為DOS環境,再加上當時的網路尚未普 遍,所以並不講究太多的功能。 目前的多電腦切換器通常應用於一或多位管理員管理 多台電腦的環境,或是一位使用者必須操作兩台或多台電 腦的環境,包括網路操作中心、資料中心、伺服器機房、 軟體開發、測試實驗室、服務中心、部門區域網路及桌面 上同時安裝多台電腦。 多電腦切換器的具有非常多的優點,例如利用空間及 整齊地重整桌面上或機架上兩台、三台或更多電腦的設備 。亦可以節省伺服器機房及資料中心中不常使用的鍵盤、 螢幕及滑鼠等設備成本,更可以中央控制管理多台電腦, 而不需麻煩的由一台使用者工作站換到另一台使用者工作 站〇578084 V. Description of the invention (1) [Technical field to which the invention belongs] The present invention relates to a switch, particularly a multi-computer switch that controls all computers with a set of keyboard, mouse, and screen. k previous technology] The so-called multi-computer switch, also known as KVM switch, K refers to the keyboard (keyboard), V refers to the video (video), M refers to the mouse (mouse), is a kind of manageable An effective tool for multiple computers, all with a single keyboard, mouse, and screen. In the early days, those who produced computer hosts must test for at least 48 hours. In order to test a large number of screens and keyboards, a simple computer switcher was created, which can save extra screens and keyboards during production testing. Because of its operating system, Most of them are DOS environment, and the network was not universal at the time, so they didn't pay too much attention to functions. The current multi-computer switch is usually used in an environment where one or more administrators manage multiple computers, or an environment where one user must operate two or more computers, including network operation centers, data centers, servers Install multiple computers at the same time in the computer room, software development, test laboratory, service center, departmental LAN and desktop. Multi-computer switches have many advantages, such as using space and neatly reorganizing two, three, or more computers on a desktop or rack. It can also save the cost of keyboards, screens and mice that are not commonly used in server rooms and data centers. It can also centrally manage and manage multiple computers without the need to switch from one user workstation to another. Workstation

第5頁 578084Page 5 578084

此,_ 種多 因 幕,即 器管理 【發明 鑒 電腦切 因 器,使 目前該 器連接 可操作所有 中心而言, 内容】 於以上的問 換器,藉以 此,為達上 得一台以上 滑鼠與該鍵 之螢幕顯示 電腦切換器,以一 έ 、晋❻ 的電腦,Xm 、、且α以、鍵盤及螢 實Λ —插# ν 座厥商、或是祠服 耳马種相當必要的設備。 題,本發明的 達到控制多部 述目的,本發 之電腦可由一 盤所控制之電 主要目 電腦的 明所揭 組滑鼠 腦透過 匯流排連接至一匯流排切換器 一個以上之PS/2連接埠;一第 包括有一第一微處 流排連接至一匯流 個以上之PS/2連接 排切換器,該 埠;一第三微 該匯流 微處理 匯流排 處理器 的在於提供一種多 目的。 露之多電腦切換 與鍵盤控制,並將 一與該多電腦切換 理裔’經由一 ps/2 排切換器係連接至 器,經由一 PS/2匯 切換器係連接至一 ,經由一 I 2 C匯流 排連接至該第一微處理器與該第二微處理器,以及經由一 PS/2匯流排連接至一第一連接埠與一第二連接埠,用以處 理滑鼠訊號與鍵盤訊號,並將滑鼠命令與鍵盤命令分別經 由該第一微處理器與該第二微處理器傳送至目前所控制之 電腦;以及一影像訊號解碼電路,係連接至一影像切換 器,該影像切換器係連接至一個以上之影像連接槔,用以 將目前所控制之電腦之一影像訊號經由該影像解碼電路解 碼後,再經由一與該影像解碼電路連接之一第三連接埠連 接之該螢幕顯示。此外更包括有一切換顯示器,係透過一 解碼電路連接至該影像訊號解碼電路,用以輸出一切換訊Therefore, _ a variety of factors, that is, device management [invented the computer-based device, so that the device is currently connected to operate all centers, content] in the above question converter, in order to achieve more than one The screen of the mouse and the key displays the computer switcher. It is necessary to use a hand-held computer, Xm, and α, a keyboard, and a flashing Λ —plug # ν seat Jushang, or a temple-type horse. device of. Problem, the present invention achieves the control of multiple stated purposes, the computer of the present invention can be controlled by a disc-controlled computer of the main computer, and the mouse brain is connected to a bus switch by PS / 2 or more. A port; a first includes a first micro bus connected to more than one PS / 2 connection bus switch, the port; a third micro, the bus micro processing bus processor is to provide a multi-purpose. Lu Zhiduo computer switching and keyboard control, and one and the multi-computer switching controller 'connected to the device via a ps / 2 row switch system, connected to one via a PS / 2 sink switch system, and via an I 2 The C bus is connected to the first microprocessor and the second microprocessor, and is connected to a first port and a second port through a PS / 2 bus for processing mouse signals and keyboard signals. And transmit mouse commands and keyboard commands to the currently controlled computer through the first microprocessor and the second microprocessor, respectively; and an image signal decoding circuit connected to an image switcher, the image switch The device is connected to more than one video connection, for decoding an image signal of a computer currently controlled by the image decoding circuit, and then connecting the screen through a third port connected to the image decoding circuit. display. It also includes a switching display connected to the image signal decoding circuit through a decoding circuit for outputting a switching signal.

578084 五、發明說明(3) 切換影像輸出之通道,並將該切換訊 理器,使得該第三微處理器可將 至該第三 々傳送至相對應之電腦。 %叩令與鍵盤命 茲配合圖示作最佳實施例 為I應用本發日月之系統架構 有關本發明的特徵與實作 詳細說明如下。 【實施方式】 首先,請參考『第1圖』,v _…一 q :。如圖所示,本發明所揭露之多'Y腦+切工之上統J J ^少一台以上之電腦20 0。電腦2 0 0並未連 ’ °、 ,荨週邊設備以及螢幕等顯示設備,wH!幕拖:: ^00,使得鍵盤300、滑氣40 0可以操控多台ϋ細切換益 J電腦切換器Π)0’將目前所操控的電腦顯示:螢Jf: 、此處指的電腦2 0 0並非僅連接至一台電腦,而是代裊 連接f多,電腦,《以一台電腦代表係為便於說明,以下 說明中所指電月嵩,若未特別說明,同樣為代 多電腦切換器100中的内部組成請參考『第2圖』。U 第一匯流排切換器101以及一第二匯流排切換器丨〇 2,其 第一匯流排切換器1 0 1係用以連接至電腦2 〇 〇的鍵盤連接 ,例如PS/2連接埠或AT連接埠,可以使用多個具有個連接 埠的切換器串接而成,例如四對一解多工器,即可達成操 控多台電細的目的。而第二匯流排切換器丨〇 2,係用以連 接至電腦2 0 0的滑鼠連接埠,例如,ps/2連接埠,同樣可 以使用多個具有個連接埠的切換器串接而成,例如四對一 578084578084 V. Description of the invention (3) Switch the image output channel, and switch the processor so that the third microprocessor can transmit the third frame to the corresponding computer. The% command and the keyboard command are shown as the preferred embodiment to apply the system architecture of the present day and month. The features and implementation of the present invention are described in detail below. [Embodiment] First, please refer to "Figure 1", v _...-q:. As shown in the figure, the present invention discloses a large number of 'Y brain + cutting system J J ^ one or more computers 200. The computer 2 0 0 is not connected to display devices such as' °,, net peripherals, and screens, wH! Screen drag :: ^ 00, so that the keyboard 300, sliding air 40 0 can control multiple units. ) 0 'shows the computer currently being controlled: Firefly Jf: The computer 2 0 here is not only connected to a computer, but connected to more than f, computer, "It is convenient to use a computer to represent the system Note, if not mentioned in the following description, Dian Yuesong is also the internal composition of the multi-computer switch 100, please refer to "Figure 2". U The first bus switch 101 and a second bus switch 丨 〇2, the first bus switch 101 is a keyboard connection for connecting to a computer 2000, such as a PS / 2 port or The AT port can be connected in series by using multiple switches with a port. For example, a four-to-one demultiplexer can achieve the purpose of controlling multiple electrical devices. The second bus switch 丨 〇2 is a mouse port used to connect to the computer 2000. For example, the PS / 2 port can also be formed by using multiple switches with a port. , For example four to one 578084

解多工器。 另外尚有與周邊控制設備相連接之連接埠,包括有第 · 一連接埠111係連接至一鍵盤,第二連接埠i丨2係連接至一 滑鼠。第一連接埠111並不一定要連接鍵盤,亦可連接滑 m*,僅於連接時,第一匯流排切換器所連接的連接埠必須 與肖b與第一連接埠連接的周邊能溝通訊號即可。以下說、 明’將以第一代表連接鍵盤,第二代表連接滑鼠。 第一匯流排切換器1 〇 1係與一第一微處理器1 2 1透過 P S 2匯流排1 5 1相接,同樣地,第二匯流排切換器1 〇 2係與 一第二微處理器122透過PS2匯流排152相接,第一微處^ 器1 2 1係用接收電腦2 0 0所輸出的鍵盤訊號,並輸出至第三 _ 微處理器1 2 3 ;第二微處理器〇 〇 〇係用接收電腦2 〇 〇所輸出 的滑鼠訊號,並輸出至第三微處理器1 2 3。第三微處理器 1 2 3係用以處理電腦2 0 0之滑鼠訊號、鍵盤訊號,以及鍵盤 命令以及滑鼠命令。第一微處理器1 2 1、第二微處理器丨2 2 , 以及第三微處理器1 23間係以I 2C匯流排作為訊號傳遞之介 · 面’ I 2 C匯流排係為"一種與周邊輸出入零組件間之溝通介 面。此處運用三個微處理器主要的考量係減輕第三微處理 器1 2 3的運算量,使得監控電腦2 0 0之訊號可以更完整,而 不會有訊號遺失之狀況發生。 第一微處理器121、第二微處理器12 2與第三微處理器 _ 1 2 3係採用一種優先中斷控制微處理器(P r i 〇 r i t y Interrupt Controller ( PIC) Micro Processor) ) 〇 而連接至電腦2 0 〇影像輸出入埠的係為一影像切換器1 〇 3,Demultiplexer. In addition, there are ports for connection with peripheral control devices. The first port 111 is connected to a keyboard, and the second port i2 is connected to a mouse. The first port 111 does not necessarily need to be connected to a keyboard, but can also be connected to the keyboard. Only when connected, the port to which the first bus switch is connected must be connected to the peripheral energy channel signal connected to the first port. Just fine. In the following description, the first representative will be connected to the keyboard and the second representative will be connected to the mouse. The first bus switcher 〇01 is connected to a first microprocessor 1 2 1 through the PS 2 bus bar 151. Similarly, the second bus switcher 012 is connected to a second microprocessor. The device 122 is connected through the PS2 bus 152, and the first micro processor 1 2 1 is used to receive the keyboard signal output from the computer 2 0 and output to the third _ microprocessor 1 2 3; the second microprocessor 〇〇〇 is used to receive the mouse signal output from the computer 2000, and output to the third microprocessor 123. The third microprocessor 1 2 3 is used for processing mouse signals, keyboard signals, keyboard commands and mouse commands of the computer 2000. The first microprocessor 1 2 1, the second microprocessor 丨 2 2, and the third microprocessor 1 23 use an I 2C bus as an interface for signal transmission. The “I 2 C bus system is " A communication interface with peripheral input / output components. The main consideration of using the three microprocessors here is to reduce the computational load of the third microprocessor 1 2 3 so that the signal from the monitoring computer 2000 can be more complete without any signal loss. The first microprocessor 121, the second microprocessor 12 2 and the third microprocessor _ 1 2 3 are connected using a priority interrupt control microprocessor (PIC Interrupt Controller (PIC) Micro Processor)). The video input / output port to the computer 200 is an image switcher 103.

第8頁 578084 五、發明說明(5) 係透過影像匯流排(VGA Bus)連接。第一匯流排切換器 101與第二匯流排切換器102皆為雙向數位式之切換器,影 像切換器1 0 3為單向類比式之切換器。影像切換器丨〇 3僅用 以輸出影像訊號至榮幕顯示’因此採用單向之切換器即可 。^過第三連接埠113連接到一螢幕,而將目前所y控之 電知的訊息顯示出來。影像切換器1 〇 3與第三連接埠1 1 3間 連接有一解碼器1 4 1與一解多工器1 4 2所組成之影像訊號解 碼電路140,解碼器141係為一具有解碼功能之積體電路晶 片(I C),解多工器1 4 2係為二對一之解多工器,用以將 影像切換器1 0 3所輸出之影像訊號解碼後顯示於與第三連 接埠連接1 1 3之螢幕上。 、/' 一 除了上述元件外,更包括有一切換顯示器1 4 3,係用 以切換所要控制之電腦’並可以LED顯示燈顯示目前所切 換之電腦,透過一解碼電路1 4 4連接至解碼器1 4 1,係用以 將所選擇的輸出通道解碼以供切換:顯示器1 4 3顯示。切換 顯示器1 4 3僅選擇影像應輸出之通道,並未對第一匯流排 1 0 1與第二匯流排1 〇 2作切換之操作。第三微處理器1 2 3係 根據切換顯示器1 4 3所輸出之切換訊號,將滑鼠命令與鍵 盤命令傳送至相對應之電腦。第三微處理器1 2 3與切換顯 示器1 4 3間更包括有一保護電路145’係為一史密特( Schmitt)電路,用以防止於切換時,所產生的不穩定信 號而影響第三微處理器1 2 3的運作。 另有一狀態讀入器1 4 6,係為一平行輸入串列輸出 (parallel in / serial out)之積體電路晶片,係用以Page 8 578084 V. Description of the invention (5) It is connected through a video bus (VGA Bus). The first bus switch 101 and the second bus switch 102 are both bidirectional digital switches, and the video switch 103 is a unidirectional analog switch. The video switcher 丨 〇 3 is only used to output the video signal to the glory screen ’so a unidirectional switcher can be used. ^ Connect to a screen via the third port 113, and display the currently-controlled electronic message. An image signal decoding circuit 140 composed of a decoder 1 41 and a demultiplexer 1 42 is connected between the image switcher 103 and the third port 1 13. The decoder 141 is a decoder with a decoding function. Integrated circuit chip (IC), the demultiplexer 1 4 2 is a two-to-one demultiplexer, which is used to decode the image signal output by the image switcher 103 and display it on the third port. 1 1 3 on the screen. // In addition to the above components, it also includes a switching display 1 4 3, which is used to switch the computer to be controlled, and can display the currently switched computer with an LED indicator, and is connected to the decoder through a decoding circuit 1 4 4 1 4 1 is used to decode the selected output channel for switching: Display 1 4 3 shows. Switching Display 1 4 3 only selects the channel to which the image should be output. It does not switch between the first bus 1 10 and the second bus 1 102. The third microprocessor 1 2 3 transmits the mouse command and the keyboard command to the corresponding computer according to the switching signal output from the switching display 1 4 3. The third microprocessor 1 2 3 and the switching display 1 4 3 further include a protection circuit 145 'which is a Schmitt circuit to prevent an unstable signal generated during the switching from affecting the third The operation of the microprocessor 1 2 3. Another state reader 1 4 6 is a integrated circuit chip of parallel in / serial out, which is used to

第9頁 578084 五、發明說明(6) 將電源的狀態讀入第三微處理器123中。而連接至解多工 器142與第三微處理器ι23的擴充介面147用以與另一組多 電腦切換器以堆疊方式相接,以控制更多台的電腦。第三 微處理器1 3 2更連接有一邏輯閘1 4 9,邏輯閘1 4 9係為一具 有致能腳位的邏輯閘,用以偵測使用者是否有在使用滑鼠 或鍵盤,亦即用以接收是否有滑鼠命令或鍵盤命令。 以下以流程圖說明第一微處理器、第二微處理器、以 及第三微處理器内部運作的過程。第〆微處理器與第二微 處理裔主要用以監控是否有資料要傳遞給第二微處理器, 第三微處理器為多電腦切換器的核心,用以處理來自電腦 2 0 0的滑鼠資料與鍵盤資料,並將滑鼠命令與鍵盤命令傳 送給電腦2 0 0。 首先說明第三微處理器的主流程。請參考『第3圖』 ,為第三微處理器的主流程圖。第三微處理器主要用以透 過第一連接埠第二連接埠連接滑鼠、鍵盤並處理滑鼠命令 與鍵盤命令。當開機後,第三微處理器將偵測鍵盤與滑1 (步驟6 1 0),並建立初始顯示之初始化資料(步驟6丨 ),亦即自切換單元獲取目前所設定之顯示通道 (display channel)。接著持續監控I2C匯流排是否有次 料(步驟61 2,如果有的話,則執行I 2(:中斷程序(步驟貝 613)。這裡指的I2C中斷係指中斷係由I2C引擎所觸♦ 中斷。 第三微處理器係為一種内建有可支援I 2(:匯流排之 處理器,當I 2C匯流排有資料要輸入至第三微處理器時= 578084 五、發明說明(7) 内建的I2C引擎將自動中斷目前所執行的程序。當I2C匯流 排有資料的時候,第三微處理器將接收並處理來自第一微 處理器與第二微處理器的滑鼠資料以及鍵盤資料。 第三微處理器除了執行上述的流程外,尚包括三個中 斷程序。首先請參考『第4圖』,為第三微處理器之PS/2 中斷流程圖,當有滑鼠命令或鍵盤命令要傳送到電腦2 0 0 時,第三微處理器會執行一 PS/2中斷程序(步驟6 2 0), 以中斷目前第三微處理器所執行的程式。接著,第三微處 理器將滑鼠命令或鍵盤命令傳送至I 2 C匯流排後(步驟6 2 1 ,程式將回到中斷起始點(步驟6 2 2)。 第三微處理器的另一個中斷程序為切換中斷,切換中 斷指的是中斷係由切換通道所觸發之中斷。當切換顯示器 切換顯示通道時,表示目前所將變換目前所操控的電腦, 此切換訊號係由切換顯示器所發出而觸發第三微處理器。 請參考『第5圖』,為第三微處理器之切換中斷之流程圖 當使用者以切換單元切換所操控的電腦的時候,第三微 處理器將接收一切換中斷訊號,即執行切換中斷程序(步 驟6 30),將影像傳輸通道切換到切換單元所設定的之影 像傳輸通道(步驟6 3 1)之後,再重新回到程式的中斷點 (步驟63 2)。此時,第三微處理器將根據切換訊號,將 滑鼠命令與鍵盤命令經由第一匯流排切換器與第二匯流排 切換器傳送至相對應的電腦。 最後一個中斷程序為内部計時中斷,内部計時中斷係 由第三微處理器内部之計時器所觸發,係用以更新目前的Page 9 578084 V. Description of the invention (6) Read the state of the power supply into the third microprocessor 123. An expansion interface 147 connected to the demultiplexer 142 and the third microprocessor ι23 is used to stack with another multi-computer switcher to control more computers. The third microprocessor 1 3 2 is further connected with a logic gate 1 4 9. The logic gate 1 4 9 is a logic gate with an enabled pin for detecting whether a user is using a mouse or a keyboard. It is used to receive whether there is a mouse command or a keyboard command. The following describes the internal operations of the first microprocessor, the second microprocessor, and the third microprocessor with a flowchart. The first microprocessor and the second microprocessor are mainly used to monitor whether there is data to be transferred to the second microprocessor. The third microprocessor is the core of the multi-computer switcher and is used to process the slip from the computer 200. Mouse data and keyboard data, and send mouse commands and keyboard commands to the computer 2000. First, the main flow of the third microprocessor will be described. Please refer to "Figure 3" for the main flowchart of the third microprocessor. The third microprocessor is mainly used to connect the mouse and keyboard through the first port and the second port and to process mouse commands and keyboard commands. After powering on, the third microprocessor will detect the keyboard and slide 1 (step 6 1 0), and establish the initial display initialization data (step 6 丨), that is, obtain the currently set display channel (display channel). Then continue to monitor the I2C bus for any inferior materials (step 61 2. If there is, execute I 2 (: interrupt routine (step 613). I2C interrupt refers to the interrupt that is touched by the I2C engine. ♦ Interrupt The third microprocessor is a processor with built-in support for I 2 (: bus, when the I 2C bus has data to be input to the third microprocessor = 578084 5. Inventory (7) The built I2C engine will automatically interrupt the currently executing program. When the I2C bus has data, the third microprocessor will receive and process the mouse data and keyboard data from the first and second microprocessors. In addition to the above-mentioned flow, the third microprocessor also includes three interrupt routines. Please refer to "Figure 4" for the PS / 2 interrupt flowchart of the third microprocessor. When there is a mouse command or keyboard When the command is to be transmitted to the computer 2000, the third microprocessor will execute a PS / 2 interrupt program (step 620) to interrupt the program currently executed by the third microprocessor. Then, the third microprocessor Send mouse or keyboard commands to I 2 C After the flow (step 6 2 1, the program will return to the interrupt starting point (step 6 2 2). Another interrupt program of the third microprocessor is the switch interrupt. The switch interrupt refers to the interrupt triggered by the switch channel. Interruption of the display. When the display is switched to switch the display channel, it means that the computer currently being controlled will be changed. This switching signal is triggered by the switch of the display to trigger the third microprocessor. Please refer to "Figure 5" for the third Flow chart of the interruption of the microprocessor. When the user switches the computer to be controlled by the switching unit, the third microprocessor will receive a switching interruption signal, that is, execute the switching interruption procedure (step 6 30), and transfer the image transmission channel. After switching to the image transmission channel set by the switching unit (step 6 3 1), return to the interruption point of the program (step 63 2). At this time, the third microprocessor will command the mouse according to the switching signal The keyboard command is transmitted to the corresponding computer through the first bus switch and the second bus switch. The last interrupt program is the internal timer interrupt. The internal timer interrupt system is The third internal microprocessor timer is triggered, the Department to update the current

第11頁 578084 五、發明說明(8) 電源狀態表,使得第一匯流排切換器與第二匯流排切換器 可以根據更新後的電源狀態表監控電腦,而不用將每一的 匯流排切換器中的每一個連接埠都監控,以降低整體之效 月& 。 請參 流程圖, 第三微 前的電源 ^ 641) 後再回到 接著 第一微處 明將 請參 流程 電腦 開機 710) 鼠與 微處 行監 傳輸 二微 處理 下說 的主 監控 換器 步驟 的滑 第一 的進 料要 與第 三微 考『第6圖』為第三微處理器之内部計時中斷之 當内部計時器觸發内部計時中斷(步驟640)時 處理器將從狀態讀入器所輸出之序列資料讀入目 狀態,並更新第三微處理器中的電源狀態表(步 並改變顯示通道與切換顯示器上的顯示燈,最 程式中斷點(步驟642)。 說明第一微處理器與第二微處理器之運作流程, 理器與第二微處理器的運作方式相同,因此,以 同時適用於第一微處理器與第二微處理器。 考『第7圖』,為第一微處理器與第二微處理器 圖,第一微處理器與第二微處理器係用以不斷的 2 0 0中是否有滑鼠資料與鍵盤資料,當多電腦切 時,内部的匯流排切換器會進行初始化的程序( ,以便同時監控所有已連接的至多電腦切換器 鍵盤是否有資料要進行傳輸。初始化之後,便由 理器與第二微處理器持續的進行監控,亦即不斷 控是PS/2否有資料要傳輸(步驟711),當有資 時,則將資料由PS/2匯流排傳送至第一微處理器 處理器,再送出至I2C匯流排(步驟712),由第 器接收。最後程式再回到步驟7 1 1。Page 11 578084 V. Description of the invention (8) Power status table, so that the first bus switch and the second bus switch can monitor the computer according to the updated power status table without having to switch each bus switch Each of these ports is monitored to reduce overall effectiveness. Please refer to the flowchart, the power before the third micro processor ^ 641), and then return to the next micro processor. The computer will turn on the computer. 710) The mouse and micro processor will transfer the main monitoring switch under the micro processor. The first feed of the slipper and the third micro-test. "Figure 6" is the internal timing interrupt of the third microprocessor. When the internal timer triggers the internal timing interrupt (step 640), the processor will read from the status reader. The output sequence data is read into the target state, and the power state table in the third microprocessor is updated (step and change the display channel and switch the display lamp on the display, the most program break point (step 642). Describe the first micro processing The operation flow of the processor and the second microprocessor is the same as that of the processor and the second microprocessor. Therefore, it is applicable to both the first microprocessor and the second microprocessor. The first microprocessor and the second microprocessor map, the first microprocessor and the second microprocessor are used to continuously have the mouse data and keyboard data in 2000, when multiple computers cut, the internal The bus switcher will enter Initialization procedure (, in order to monitor all connected computer switch keyboards for data transmission at the same time. After initialization, the controller and the second microprocessor continuously monitor, that is, continuously control whether it is PS / 2 or not There is data to be transmitted (step 711), when it is available, the data is transmitted from the PS / 2 bus to the first microprocessor processor, and then sent to the I2C bus (step 712) and received by the first device. Finally The program returns to step 7 1 1 again.

578084 五、發明說明(9) 第一微處理器與第二微處理器中有一中斷程序,係為 I 2 C中斷,指的是當第三微處理器有滑鼠命令與鍵盤命令 要傳送至電腦2 0 0時,I2C的引擎會進行一内部中斷( internal interrupt)程序(步驟),亦即這個中斷程序 在第三微處理器要傳送命令時會進行,使得第一微處理5| 與第二微處理為可以接收滑鼠命令與鍵盤命令,並傳送至 PS/ 2匯流排以對電腦3 0 0進行控制。 請參考『第8圖』,為第一微處理器與第一佩屣狂裔 之I 2 C中斷流程圖。當第三微處理器要傳送命令時第一微 處理器與第二微處理器内部會執行I 2 C中斷(步驟7 2 0), 第一微處理器與第二微處理器會自I 2C匯流排接收滑鼠命 令或鍵盤命令(步驟721),並將命令經由匯流排切換器 傳,至PS/2匯流排再進入電腦中。傳送完畢後,第一微處 玉f 5内°卩的監控程式將回到中斷點(步驟步驟7 2 2),再 Μ續,$監控電腦的是否資料傳輸。 &市妒^ 揭露的多電腦切換器,採電子式設計,非一 ;機:鍵ί /V先式產品’因此在切換過程中不會電腦 即用,不須加举=法工作的狀況,同時安裝容易,隨插 狀熊中,鲊性ί 何介面卡或安裝任何程式。在電腦開機 機^,益須將1裝亦不會造成電腦當機,非常適用於電腦 此外,更呈右司服器主機關機,照樣可以放心安心操作。 !5 i下列優點: 1烏構上容易。 2 ·具模組彳卜 、兄 、化,韌體容易開發。 五 多的電腦 更換微處理器以及pg、古 輕易使堆疊數増i匯流排的型態 •連接之電腦可隨時聞 你。 竭關機,不影響其他電腦之操 用 之 之 者 578084 、發明說明(ίο) ----— -- 3·透過I2C匯流排,可、土 多的電腦。 J u達成切換器的堆疊以操控更 l m ^ nt xm _ (Bus Type)即可 6 ·可隨電腦任意時間 能。 歲自動連接其鍵盤、滑鼠功 7 ·具電腦開關機發光二 _ 關,方便變換操作=體(LED)顯示及選擇開 :然本發明以前述之較 :限定本發明,任何露如上,然其並非 :神和範圍内,當可;,在不脫離本發明 為準。 月書所附之申請專利範圍所界定578084 V. Description of the invention (9) There is an interrupt program in the first microprocessor and the second microprocessor, which is an I 2 C interrupt, which means that when the third microprocessor has a mouse command and a keyboard command to be transmitted to When the computer is 2000, the I2C engine will perform an internal interrupt procedure (step), that is, this interrupt procedure will be executed when the third microprocessor is to send a command, so that the first microprocessor 5 | and the first The second micro processor can receive mouse commands and keyboard commands and send them to the PS / 2 bus to control the computer 300. Please refer to "Fig. 8" for the I 2 C interrupt flow chart of the first microprocessor and the first Persian man. When the third microprocessor is to transmit a command, the first microprocessor and the second microprocessor will execute an I 2 C interrupt (step 7 2 0), and the first microprocessor and the second microprocessor will execute an I 2C interrupt. The bus receives a mouse command or a keyboard command (step 721), and transmits the command through the bus switcher to the PS / 2 bus and then enters the computer. After the transmission is completed, the monitoring program within the first micro-level F 5 will return to the interruption point (step 7 2 2), and then continue to monitor the computer for data transmission. & city jealousy ^ The multi-computer switcher disclosed is electronically designed, non-one; machine: key ί / V first-style product 'so it will not work with the computer during the switchover process, and does not need to be enumerated = law working conditions, At the same time easy to install, plug-in bear, any interface card or install any program. When the computer is turned on, it is necessary to install 1 without causing the computer to crash, which is very suitable for computers. In addition, the server of the right server is turned off, so you can operate with peace of mind. ! 5 i The following advantages: 1 Easy structure. 2 · With module modules, firmware and firmware, the firmware is easy to develop. Five or more computers Replace the microprocessor and PG and CU easily make the stacking data bus type • The connected computer can smell you at any time. Those who do not shut down and do not affect the operation of other computers 578084, invention description (ίο) ---- --- 3. through the I2C bus, can be more computers. Ju can achieve the stacking of switches to control more l m ^ nt xm _ (Bus Type) 6 · Can be used at any time with the computer. Automatically connect its keyboard and mouse function at the age of 7 · It has a computer switch to turn on and off. It is easy to change the operation = body (LED) display and selection on: However, the present invention is based on the foregoing comparison: the invention is limited, any exposure is as above, then It is not: God and scope, when it can be; without departing from the present invention. Defined by the scope of the patent application attached to the monthly book

第14頁 578084 圖式簡單說明 第1圖,係為應用本發明之多電腦切換器之系統架構圖; 第2圖,係為本發明之多電腦切換器之電路方塊圖; 第3圖,係為本發明之多電腦切換器之第三微處理器的主 流程圖; 第4圖,係為本發明之多電腦切換器之第三微處理器之 P S / 2中斷流程圖; 第5圖,係為本發明之多電腦切換器之第三微處理器之切 換中斷之流程圖; 第6圖,係為本發明之多電腦切換器之第三微處理器之内 部計時中斷之流程圖; 第7圖,係為本發明之多電腦切換器之第一微處理器與第 二微處理器的主流程圖;以及 第8圖,係為本發明之多電腦切換器之第一微處理器與第 二微處理器之I 2 C中斷流程圖。 【圖示符號說明】 100 多 電 腦 切 換 器 200 電 腦 300 鍵 盤 400 滑 鼠 500 螢 幕 101 第 一 匯 流 排 切 換 器 102 第 二 匯 流 排 切 換 器 103 影 像 切 換 器 111 第 一 連 接 埠578084 on page 14 is a simple illustration of the first diagram, which is a system architecture diagram of the multi-computer switcher applying the present invention; FIG. 2 is a circuit block diagram of the multi-computer switcher of the present invention; FIG. 4 is a main flowchart of the third microprocessor of the multi-computer switch of the present invention; FIG. 4 is a PS / 2 interrupt flowchart of the third microprocessor of the multi-computer switch of the present invention; FIG. FIG. 6 is a flowchart of the switching interrupt of the third microprocessor of the multi-computer switch of the present invention; FIG. 6 is a flowchart of the internal timing interrupt of the third microprocessor of the multi-computer switch of the present invention; FIG. 7 is a main flowchart of a first microprocessor and a second microprocessor of the multi-computer switch of the present invention; and FIG. 8 is a first microprocessor and a multi-computer switch of the present invention. I 2 C interrupt flowchart of the second microprocessor. [Illustration of Symbols] More than 100 computer switches 200 computers 300 keypads 400 mice 500 screens 101 first bus switch 102 second bus switch 103 video switch 111 first connection port

第15頁 578084 圖式簡單說明 112 第二 連接埠 113 第三 連接埠 121 第一 微處理 器 122 第二 微處理 器 123 第三 微處理 器 140 影像訊號解碼電路 141 解碼 器 142 解多 工器 143 切換 顯示器 144 解碼 電路 145 保護 電路 146 狀態 讀入器 147 擴充 介面 149 邏輯閘 151 PS/2 匯流排 152 PS/2 匯流排 153 I 2 C匯流排 步 驟6 1 0 接 收 滑 鼠與鍵盤資料 步 驟6 1 1 建 立 顯 示之初始化資料 步 驟6 1 2 I 2 C匯流排是否有資料 步 驟6 1 3 接 收 資 料 步 驟6 2 0 PS /2 中 斷 步 驟6 2 1 將 資 料 傳送到I 2 C匯流排 步 驟6 2 2 回 到 程 式中斷點Page 15 578084 Brief description of the diagram 112 Second port 113 Third port 121 First microprocessor 122 Second microprocessor 123 Third microprocessor 140 Image signal decoding circuit 141 Decoder 142 Demultiplexer 143 Switch display 144 Decoding circuit 145 Protection circuit 146 Status reader 147 Expansion interface 149 Logic gate 151 PS / 2 bus 152 PS / 2 bus 153 I 2 C bus Step 6 1 0 Receive mouse and keyboard data Step 6 1 1 Create the displayed initialization data Step 6 1 2 Whether the I 2 C bus has data Step 6 1 3 Receive the data Step 6 2 0 PS / 2 Interrupt Step 6 2 1 Send the data to the I 2 C bus Step 6 2 2 back To program breakpoint

第16頁 578084 圖式簡單說明 步驟6 3 0 切換中斷 步驟6 3 1 變換影像傳輸通道 步驟6 3 2 回到程式 中斷點 步驟6 4 0 内部計時 中斷 步驟6 4 1 更新電源 狀態表 步驟6 4 2 回到程式 中斷點 步驟7 1 0 初始化匯 流排切換 器 步驟7 1 1 PS/2匯流 排是否有 資料傳送 步驟7 1 2 接收資料 步驟7 2 0 I 2C中斷 步驟7 2 1 接收資料 並傳送至 匯流排 步驟7 2 2 回到程式 中斷點Page 16 578084 Brief description of the diagram Step 6 3 0 Switch interrupt step 6 3 1 Change the image transmission channel step 6 3 2 Return to the program interrupt point step 6 4 0 Internal timing interrupt step 6 4 1 Update the power status table step 6 4 2 Return to the program interruption point Step 7 1 0 Initialize the bus switcher Step 7 1 1 Whether the PS / 2 bus has data transmission Step 7 1 2 Receive data Step 7 2 0 I 2C Interrupt step 7 2 1 Receive data and send to the bus Step 7 2 2 Return to the program break point

第17頁Page 17

Claims (1)

578084 六、申請專利範圍 1. 一種多電腦切換器,使得一台以上之電腦可由一組滑 ^ 鼠與鍵盤控制,並將目前該滑鼠與該鍵盤所控制之電 腦透過一與該多電腦切換器連接之螢幕顯示,包括 ·- 有: 一第一微處理器,經由一PS/2匯流排連接至一匯 · 流排切換器,該匯流排切換器係連接至一個以上 之PS/2連接槔; 一第二微處理器,經由一PS/2匯流排連接至一匯 流排切換器,該匯流排切換器係連接至一個以上 之PS/2連接埠; 一第三微處理器,經由一 I 2 C匯流排連接至該第一 籲 微處理器與該第二微處理器,以及經由一 P S / 2匯 流排連接至一第一連接埠與一第二連接璋,用以 處理滑鼠訊號與鍵盤訊號,並將滑鼠命令與鍵盤 命令分別經由該第一微處理器與該第二微處理器 * 傳送至目前所控制之電腦;以及 一影像訊號解碼電路,係連接至一影像切換器, 該影像切換器係連接至一個以上之影像連接埠, 用以將目前所控制之電腦之一影像訊號經由該影 像解碼電路解碼後,再經由一與該影像解碼電路 連接之一第三連接埠連接之該螢幕顯示。 2 .如申請專利範圍第1項所述之多電腦切換器,更包括有 β 一切換顯示器,係透過一解碼電路連接至該影像訊號 解碼電路,用以輸出一切換訊號以切換影像輸出之通578084 6. Scope of patent application 1. A multi-computer switcher, which enables more than one computer to be controlled by a group of mouse and keyboard, and switches the mouse and the computer controlled by the keyboard through one and the multi-computer The screen display of the connection includes:-A first microprocessor connected to a bus via a PS / 2 bus · A bus switch, which is connected to more than one PS / 2 connection槔; a second microprocessor connected to a bus switch via a PS / 2 bus, the bus switch is connected to more than one PS / 2 port; a third microprocessor via a The I 2 C bus is connected to the first microprocessor and the second microprocessor, and is connected to a first port and a second connection via a PS / 2 bus to process the mouse signal. And keyboard signals, and transmit mouse commands and keyboard commands to the currently controlled computer via the first microprocessor and the second microprocessor *, respectively; and an image signal decoding circuit connected to an image switcher , The image switcher is connected to more than one image port, and is used to decode an image signal of a computer currently controlled by the image decoding circuit, and then connect it through a third port connected to the image decoding circuit. The screen appears. 2. The multi-computer switch as described in item 1 of the scope of patent application, further comprising a β-switch display, which is connected to the image signal decoding circuit through a decoding circuit for outputting a switching signal to switch the channel of image output. 第18頁 578084 六、申請專利範圍 道,並將該切換訊號傳送至該第三微處理器,使得該 第三微處理器可將該滑鼠命令與鍵盤命令傳送至相對 應之電腦。 3. 如申請專利範圍第2項所述之多電腦切換器,其中該切 換顯示器與該第三微處理器間更連接有一保護電路, 用以避免切換影像輸出通道所產生之不穩定訊號。 4. 如申請專利範圍第1項所述之多電腦切換器,其中該第 一微處理器係為一優先中斷微處理器(P I C Microprocessor ) ° 5 .如申請專利範圍第1項所述之多電腦切換器,其中該第 二微處理器係為一優先中斷微處理器(P I C Microprocessor) 〇 6 .如申請專利範圍第1項所述之多電腦切換器,其中該第 三微處理器係為一優先中斷微處理器(P I C Microprocessor) ° 7 .如申請專利範圍第1項所述之多電腦切換器,其中該第 一匯流排切換器係為一雙向傳遞數位訊號之切換器。 8.如申請專利範圍第7項所述之多電腦切換器,其中該第 一匯流排切換器係由一個以上多對一解多工器串接而 成。 9 .如申請專利範圍第1項所述之多電腦切換器,其中該第 二匯流排切換器係為一雙向傳遞數位訊號之切換器。 1 0 .如申請專利範圍第9項所述之多電腦切換器,其中該 第二匯流排切換器係由一個以上多對一解多工器串接Page 18 578084 VI. Patent application channel and transmitting the switching signal to the third microprocessor, so that the third microprocessor can transmit the mouse command and keyboard command to the corresponding computer. 3. The multi-computer switch as described in item 2 of the scope of patent application, wherein a protection circuit is connected between the switching display and the third microprocessor to avoid unstable signals generated by switching the image output channel. 4. The computer switch as described in item 1 of the scope of patent application, wherein the first microprocessor is a priority interrupt microprocessor (PIC Microprocessor) ° 5. As much as described in item 1 of the scope of patent application A computer switch, wherein the second microprocessor is a priority interrupt microprocessor (PIC Microprocessor). The computer switch as described in item 1 of the patent application scope, wherein the third microprocessor is A Priority Interrupt Microprocessor (PIC Microprocessor) ° 7. The multi-computer switch as described in item 1 of the patent application scope, wherein the first bus switch is a switch that transmits a digital signal in both directions. 8. The multi-computer switch as described in item 7 of the scope of patent application, wherein the first bus switch is formed by cascading more than one many-to-one demultiplexer. 9. The multi-computer switch according to item 1 of the scope of patent application, wherein the second bus switch is a switch that transmits digital signals in both directions. 10. The multi-computer switch as described in item 9 of the scope of patent application, wherein the second bus switch is connected by more than one many-to-one demultiplexer. 第19頁 578084 六、申請專利範圍 而成。 1 1.如申請專利範圍第1項所述之多電腦切換器,其中該 影像解碼電路更包括有一解碼器與解多工器。 1 2.如申請專利範圍第1項所述之多電腦切換器,更包括 有一狀態讀入器,用以讀取該一台以上之電腦之電源 狀態並輸出至該第三微處理器。 1 3.如申請專利範圍第1 1項所述之多電腦切換器,其中該 狀態讀入器係為一平行輸入序列輸出之積體電路晶 片。 1 4.如申請專利範圍第1 1項所述之多電腦切換器,其中該 狀態讀入器係連接至該至少一個以上之P S / 2連接埠。 1 5 .如申請專利範圍第1項所述之多電腦切換器,更包括 有一擴充介面,係連接至該解多工器與該三微處理 器,用以將該多電腦切換器與另一多電腦切換器堆疊 連接。Page 19 578084 6. Scope of patent application. 1 1. The multi-computer switch as described in item 1 of the patent application scope, wherein the image decoding circuit further includes a decoder and a demultiplexer. 1 2. The multi-computer switch as described in item 1 of the scope of patent application, further comprising a status reader for reading the power status of more than one computer and outputting it to the third microprocessor. 1 3. The multi-computer switch as described in item 11 of the scope of patent application, wherein the status reader is a integrated circuit chip with parallel input sequence output. 1 4. The computer switch as described in item 11 of the scope of patent application, wherein the status reader is connected to the at least one PS / 2 port. 15. The multi-computer switch as described in item 1 of the scope of patent application, further comprising an expansion interface connected to the demultiplexer and the three microprocessors for connecting the multi-computer switch to another Multiple computer switches are stacked and connected. 第20頁Page 20
TW91137911A 2002-12-30 2002-12-30 Multi-computer switcher TW578084B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW91137911A TW578084B (en) 2002-12-30 2002-12-30 Multi-computer switcher

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW91137911A TW578084B (en) 2002-12-30 2002-12-30 Multi-computer switcher

Publications (2)

Publication Number Publication Date
TW578084B true TW578084B (en) 2004-03-01
TW200411520A TW200411520A (en) 2004-07-01

Family

ID=32847468

Family Applications (1)

Application Number Title Priority Date Filing Date
TW91137911A TW578084B (en) 2002-12-30 2002-12-30 Multi-computer switcher

Country Status (1)

Country Link
TW (1) TW578084B (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7584306B2 (en) 2005-05-19 2009-09-01 Aten International Co., Ltd. KVM switch with on-screen-display and a computer switching method thereof
US7613854B2 (en) 2004-04-15 2009-11-03 Aten International Co., Ltd Keyboard video mouse (KVM) switch wherein peripherals having source communication protocol are routed via KVM switch and converted to destination communication protocol
WO2013091136A1 (en) * 2011-12-21 2013-06-27 Intel Corporation Mechanism for facilitating a tablet block of a number of tablet computing devices
US8682249B2 (en) 2010-08-11 2014-03-25 International Business Machines Corporation Input device with switchable frequency channel for switchable use between computer systems

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7613854B2 (en) 2004-04-15 2009-11-03 Aten International Co., Ltd Keyboard video mouse (KVM) switch wherein peripherals having source communication protocol are routed via KVM switch and converted to destination communication protocol
US7584306B2 (en) 2005-05-19 2009-09-01 Aten International Co., Ltd. KVM switch with on-screen-display and a computer switching method thereof
US8682249B2 (en) 2010-08-11 2014-03-25 International Business Machines Corporation Input device with switchable frequency channel for switchable use between computer systems
US9042830B2 (en) 2010-08-11 2015-05-26 International Business Machines Corporation Input device switching an operating channel of a radio tranceiver between first and second computer systems
US9258017B2 (en) 2010-08-11 2016-02-09 International Business Machines Corporation Input device switching an operating channel of a radio transceiver between first and second computer systems
US9544009B2 (en) 2010-08-11 2017-01-10 International Business Machines Corporation Input device switching an operating channel of a radio transceiver between first and second computer systems
WO2013091136A1 (en) * 2011-12-21 2013-06-27 Intel Corporation Mechanism for facilitating a tablet block of a number of tablet computing devices

Also Published As

Publication number Publication date
TW200411520A (en) 2004-07-01

Similar Documents

Publication Publication Date Title
US7139861B2 (en) Input/output unit access switching system and method
TWI293468B (en)
US6813650B1 (en) Multimode non-standard universal serial bus computer input device
CN102749985B (en) Method and device for dynamically adjusting bus clock
US8589141B2 (en) Resource sharing apparatus which disconnects an input device when detecting a standby indication of a switching command
TW200813725A (en) Multi-host usb device controller
JP3091500U (en) Switching device that can share keyboard, display and mouse
CN102446154B (en) Server system and method for sharing baseboard management controller
TW200817973A (en) Method for automatically switching USB peripherals between USB hosts
TWM344515U (en) Multi-computer switching device with data transmission function among computers
US20190278350A1 (en) Peripheral device expansion card system
JP2000242377A (en) Display device
CN109799933B (en) Multi-point touch and display system supporting multiple hosts
CN103019368A (en) Method for intelligently switching local IO (input/output) node and KVM (K virtual machine) module
CN102457392B (en) Baseboard management controller sharing method
TW578084B (en) Multi-computer switcher
TWI432972B (en) Server system and mehtod for using shared baseboard management controller
US20140344534A1 (en) Information Processing System
EP3779635A1 (en) Interactive smart tablet and data processing method and device thereof
TW201216080A (en) Server system and method for using shared baseboard management controller
CN110162287A (en) The method and device shown for realizing the VGA of PCIE Box
CN100447714C (en) Online switching interfaces of peripheral devices in multitask mode computer
TW201117004A (en) Method for controlling a plurality of personal computer hosts by utilizing a personal computer host, and associated controller and personal computer
JP2002032326A (en) Extended slot hot plug controller
CN105335312B (en) The connecting interface switching device of multicomputer device

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees