559916 951pif.doc/〇〇8 Λ7 B7 五 經濟部智慧財產局員工消費合作社印製 發明說明（丨) 本發明是有關於一種在積體電路中形成介電質堆疊結 構的方法與設備，更特別的是有關於在一層高介電常數材 料下形成薄的氧化物內界面層。 在製造積體電路中，薄的介電層常被用來覆蓋在半導 體的表面上，一般的閘極介電層是用高品質的二氧化矽形 成，一般稱爲”閘極氧化層”，這樣的結構層通常是自一個 單晶矽晶圓或磊晶矽層長成，閘極氧化層會在一般電晶體 內介於源極與汲極區之間的閘極電極到通道區域產生電容 耦合。 當積體電路變的比較小時，就會希望降低閘極氧化層 的厚度，但是太薄的閘極氧化層（小於5nm)可能會呈現高 的缺陷密度，包括小孔、有電荷陷入的狀態、以及對熱載 子入射現象變得較爲敏感，這樣的高缺陷密度會導致漏電 流經過閘極介電層，而使元件迅速的損壞，所以元件設計 中閘極間隔不得小於〇·25μηι，也就是四分之一微米技術。 在實驗室中有許多硏究致力於控制缺陷密度，這些控 制方法在商業量產的條件下很難達到，此外即使氧化層的 完整狀態得以維持，量子力學也會對閘極氧化層的縮小有 一些基本限制，在高電場時，直接的隧穿會主導Fowler-Nordheim隧穿，且大致決定氧化層的縮小限制，這些縮小 限制在邏輯電路上約爲2nm，在動態隨機存取記憶體 (DRAM)電路內對漏電敏感的記憶陣列上約爲3nm，如Hu 等人在 Semiconductor International (July 1998)第 215-222 頁中提到的”Thin Gate Oxides Promise High Reliability”。 本紙張尺度適用中國國家標準（CNS)A:1規烙（210x297公釐） 請 先 閱 讀 背 意 事 項 再 填 寫 本 頁 559916 Λ7 B7 經濟部智慧財產局員工消費合作社印製 9951pif.doc/〇〇0 五、發明說明（> ) 理論上來說，將電容係數比二氧化矽還高的材料應用 ^閘極介2層中有希望進—步的縮小元件，因爲其具有較 问的力電吊數，這樣的材料會與一個厚度較爲薄的二氧化 矽層呈現出相同的電容量，這樣相當於用較薄的氧化層厚 度而不會有隧穿的限制出現；某些這種介電材料的另一個 優點在於其具有阻擋硼穿透的擴散阻擋效應以及其高的熱 導性。 當使用像是ai2〇3與Zr〇2這類具有高電容係數的氧化 物時’將其拿來作爲閘極介電質便爲最近硏究的目標，用 高介電常數材料來進行薄膜的沈積可以利用很多方式來進 行’包括化學氣相沈積⑴乂!)）、反應性濺鍍、分子束磊晶 (MBE)、與原子層沈積(ALD)等，其中ALD是比較適當的 方法’因爲這方法可以將薄膜的厚度以及組成控制在原子 #級’ 3s成均勻且闻共形度的沈積。 ALD法是一種自我限制的製程，藉著交替的添加反應 前驅物使其佈滿基底表面，並在每次添加中不留下超過一 個單層的材料，沈積條件與前驅物係選擇可以確保自我飽 和反應者，像是在一次添加中的一層吸附層會留下表面末 端，此表面末端對同次添加中的多餘的氣相反應物是不會 有反應的，接下來不同反應物的加入會與先前的末端反應 而得以繼繪沈積過程，因此每一*個交替添加的循環不會留 下超過一個分子層的材料，ALD製程的原理是由T. Suntola 證實，比如在Elsevier Science B. V. 1994的晶體成長3指 導手冊，薄膜與磊晶，B部的成長機制與動力學第I4章 5 ^紙張尺度適用中國國家標準（CNS)A:1規恪（2i〇x 297公楚）559916 951pif.doc / 〇〇8 Λ7 B7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economy (丨) This invention relates to a method and equipment for forming a dielectric stack structure in an integrated circuit, more specifically What is relevant is the formation of a thin oxide interfacial layer under a layer of high dielectric constant material. In manufacturing integrated circuits, a thin dielectric layer is often used to cover the surface of a semiconductor. The general gate dielectric layer is formed of high-quality silicon dioxide, which is commonly referred to as a "gate oxide layer". Such a structure layer is usually grown from a single crystal silicon wafer or an epitaxial silicon layer. The gate oxide layer will generate capacitance between the gate electrode and the channel region between the source and drain regions in a general transistor. coupling. When the integrated circuit becomes relatively small, it is desirable to reduce the thickness of the gate oxide layer, but a too thin gate oxide layer (less than 5nm) may show a high defect density, including small holes, a state of charge trapping, And become more sensitive to the phenomenon of hot carrier incidence. Such a high defect density will cause leakage current to pass through the gate dielectric layer and cause rapid damage to the element. Therefore, the gate interval in the element design must not be less than 0.25 μηι. It's a quarter-micron technology. There are many studies in the laboratory dedicated to controlling defect density. These control methods are difficult to achieve under conditions of commercial mass production. In addition, even if the complete state of the oxide layer is maintained, quantum mechanics will reduce the reduction of the gate oxide layer. Some basic restrictions. At high electric fields, direct tunneling will dominate Fowler-Nordheim tunneling and roughly determine the reduction limits of the oxide layer. These reduction limits are about 2nm on logic circuits and on dynamic random access memory (DRAM ) The leakage-sensitive memory array in the circuit is about 3nm, such as "Thin Gate Oxides Promise High Reliability" mentioned by Hu et al. In Semiconductor International (July 1998), 215-222. This paper size is in accordance with Chinese National Standard (CNS) A: 1 (210x297 mm) Please read the intent and then fill out this page 559916 Λ7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 9951pif.doc / 〇〇0 V. Explanation of the invention (>) In theory, the application of materials with a higher capacitance than silicon dioxide ^ the gate dielectric layer 2 is a promising step-down component, because it has a relatively small number of force , Such a material will exhibit the same capacitance as a thinner silicon dioxide layer, which is equivalent to using a thinner oxide layer without the limitation of tunneling; some of this dielectric material Another advantage is that it has a diffusion barrier effect that blocks the penetration of boron and its high thermal conductivity. When using oxides with high capacitance such as ai203 and Zr02, 'taking them as the gate dielectric is the most recently studied goal, and using high dielectric constant materials for thin film Deposition can be performed in many ways 'including chemical vapor deposition⑴ 乂!)), Reactive sputtering, molecular beam epitaxy (MBE), and atomic layer deposition (ALD), etc., of which ALD is a more appropriate method' because This method can control the thickness and composition of the thin film at the atomic level to 3's to form a uniform and smell conformal deposition. The ALD method is a self-limiting process. By alternately adding reaction precursors to cover the surface of the substrate, and not leaving more than a single layer of material in each addition, the choice of deposition conditions and precursor system can ensure self Saturated reactants, such as an adsorption layer in a single addition, will leave surface ends. This surface end will not react to the excess gas-phase reactants in the same addition. The next addition of different reactants will It reacts with the previous end to continue the deposition process, so each * alternately added cycle will not leave more than one molecular layer of material. The principle of the ALD process is confirmed by T. Suntola, such as in Elsevier Science BV 1994 Crystal Growth 3 Instruction Manual, Thin Films and Epicrystals, Part B's Growth Mechanism and Dynamics Chapter I4 5 ^ Paper size applies Chinese National Standard (CNS) A: 1 (2i0x 297)
559916 Λ7 9951pif . doc/008 [^7 五、發明說明（> ) 原子層晶晶’第601-663頁中提到的內容便會在此發明中 引用作爲參考。 在一個沈積金屬氧化物的典型ALD製程中，一個沈積 循環包括將基底暴露在一種金屬前驅物之中，自反應室中 移除未反應的第一反應物以及反應副產物，然後將基底暴 露在一種含氧的前驅物中，然後進行一道第二移除步驟。 在砂上進行高介電常數金屬氧化物的ALD製程時遇到的 主要問題就是當暴露在氧源下時，在製程的一開始矽的面 僅會覆蓋一單層金屬，因此在一般情形下會有一層8丨02層 形成，而利用每一個接續循環會使此結構層繼續成長，因 而限制到可達成的電容量，有一系列的方法被開發用來解 決這個嚴重的問題，舉例來說，硏究發現可以用金屬羥氧 化物在矽基底上沈積氧化鋁而不會產生一層內界面矽的氧 化層，在與另外一種金屬化合物反應時，金屬羥氧化物可 以用來作爲金屬與氧兩種供應源（如Rirala et al. Science 288:319-321(2000)) ° 此外，此方法也可以用於非常薄的氧化矽內界面層上， 即使是用於閘極介電材料上，這方法也可以提供較佳的矽 /氧化物內界面特性，舉例來說，Yang et al.(Humantech Thesis Prize，Samsung Electronics (1999))證明在氧化銘與 矽基底之間薄氧化矽層的存在可以製造一個比單獨使用氧 化鋁具有更好效果的閘極介電質；同樣的硏究也發現，當 降低閘極介電質整體的氧化層厚度時，在薄氧化層上形成 氮化矽可以減少缺陷密度，比如Kim et al·，“Ultra Thin 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公坌） 請 先 閱 讀 背 意 事 項 再 填 寫 本 頁 經濟部智慧財產局員工消費合作社印製 五 經濟部智慧財產局員工消費合作社印製 559916 Λ7 9951pif.doc/008 發明說明（k ) (<3nm) High Quality Nitride/Oxide Stack Gate Dielectrics Fabricated by In-Situ Rapid Thermal Processing”， IEDM97(1997)，pp· 463_466中所提到在基底與高介電常數 材料之間沈積薄的內界面氧化層的方法，比如在美國專利 第6，144,060號與1999年十二月23日申請的美國申請號 第09/471，761號中均有揭露。 在熱成長氧化矽之前，通常會先淸洗矽的表面，以避 免污染並產生較好的介電特性，另一方面淸洗動作會用來 去除自然形成的氧化物，也是所謂的”原生氧化層”，對熟 習此技藝者而言，即使矽表面放置在室溫下的潔淨室環境 中，原生氧化層還是會自然的形成在矽表面上。一般來說， 原生氧化層包括幾埃的氧化矽，會是後續介電薄膜的一部 份，當熱氧化層成長透過原生氧化層而完成預定的介電層 時，在矽表面上的原生氧化層的品質與厚度會不規則；此 外因爲長時間的轉換以及/或存在，原生氧化層通常會被 雜質污染。 因此，通常會將表面泡在稀釋的氟化氫（HF)或用HF 蒸氣蝕刻來移除原生氧化層，將晶圓浸泡在稀釋的氟化氫 中以淸洗矽表面上的原生氧化物，並在表面留下氫的末 端，HF蒸氣蝕刻同樣可以淸洗矽表面並結束不連結的矽 鍵，但是其表面末端是一個可置換的氟。 氫的末端並不非常穩定，特別是在升高的溫度下，這 些氫原子會迅速的分解而留下不連結的矽鍵，而使其容易 捕捉氣相的污染物。即使在有氫或氟的末端存在，氣相的 本紙張尺度適用中國國家標準（CNS)Al規烙（21〇χ 297公堃） 請 先 閱 讀 背 意 事 項 S·丄 ί裝 頁I 一 I I 雇 I I I 訂 559916 A7 B7 9951pif.doc/008 五、發明說明（ί) 氧化劑仍舊可以在HF處理以及後續的步驟之間擴散經過 末端層，因此HF處理會淸洗晶圓表面·，但是還是無法對 表面在淸潔與進一步步驟這段期間提供保護。 有一個可以將淸潔的矽表面維持一段長時間的方法就 是在淸潔矽表面以後快速的成長一層薄的氧化矽層，如上 所述，一層極薄氧化矽層可以在矽結構與高介電係數（高 介電常數介電質）材料之間提供內界面特性。比如在室溫 下暴露在一般氧化劑如空氣或水之中，而自然再生長的氧 化物會反應的很慢，這將不利於商業生產。 眾所週知，在氧化期間加熱晶圓可以加快氧化的速度， 不幸的是在溫度大於攝氏500度以上的熱氧化，會使HF 處_時留下的氫末端提前在溫度狀態到達犧牲氧化層產生 之前就被釋出，在這過渡期間矽表面會變的沒有保護；此 外’相較於後續步驟氧化劑擴散已形成的過氧化矽層，在 一開始裸露的矽基底上的熱氧化會很快的進行，而其機制 目前並不是很了解。因此，當欲提供夠厚的氧化物以使高 介電:常數材料下方具有改善的內界面性質，氧化反應並不 容易控制1 ’而且很容易就超過預定厚度；另外即使可以有 效率的形成一層極薄的氧化層作爲內界面層，在一般的成 長條件下當進行高介電常數材料沈積時，下層的氧化層還 會進一步的成長，而因此使氧化矽界面太厚而使整體的介 電常數變低。 在基底與高介電常數材料之間具有一層極薄的二氧化 砂內界面層是有好處的，二氧化矽內界面的厚度將會決定 8 本紙張尺度適用中_家標準（CNS)A1規格⑽x 297公梦〉 (請先閱讀背面之注意事項再Λ寫本頁) --------訂---------線一 il寫丄 經濟部智慧財產局員工消費合作社印製 559916 Λ7 9951pif.doc/008 五、發明說明（έ ) 濟 部 智 慧 財 員 X 消 費 合 閘極氧化層的最小厚度，爲了達到維持極薄的二氧化矽內 界面而產生了這樣一種需求，希望可以將這些方法應用於 單晶圓製程系統以及四分之一微米的技術中，藉以較習知 的方法產生較高的量率與產能。 有鑑於此，本發明提供一種在半導體基底上形成閘極 介電層的方法，透過在基底上形成一層內界面介電氧化 層，並在內界面介電質上沈積一層高介電常數層，此高介 電常數層沈積時內界面介電層厚度並不會隨之增加。 本發明提供另一種在矽基底上形成介電層的方法，最 好包括在基底上成長一層厚度小於15埃的氧化矽內界面 層，然後在內界面層上方沈積一層高介電常數材料。較適 當的是沈積動作包括將基底維持在低於攝氏300度的溫度 下，並供應水蒸氣作爲一種氧化劑；沈積高介電常數材料 最好能夠使內界面層的成長少於15埃，更適當的是小於1〇 埃，而最適當的是可以小於5埃。 在一個實施例中沈積包括ALD法，此ALD法可以輪 流包括複數個循環，每一個循環最好包括：使基底與第— 反應物接觸；自反應室中移除未反應的第一反應劑以及反 應副產物；將基底與水蒸氣接觸；以及自反應室移除未反 應的水蒸氣以及可能的反應副產物。 下文特舉一較佳實施例，並配合所附圖式，作詳細說 明如下： 圖式之簡單說明： 第1圖繪示一種在基底與閘極介電質中的高介電常數559916 Λ7 9951pif. Doc / 008 [^ 7 V. Description of the invention (>) Atomic layer crystals' The contents mentioned on pages 601-663 are incorporated herein by reference. In a typical ALD process for depositing metal oxides, a deposition cycle includes exposing the substrate to a metal precursor, removing unreacted first reactants and reaction byproducts from the reaction chamber, and then exposing the substrate to An oxygen-containing precursor is then subjected to a second removal step. The main problem encountered when performing ALD processes with high dielectric constant metal oxides on sand is that when exposed to an oxygen source, the silicon surface will only be covered with a single layer of metal at the beginning of the process, so in general cases A layer of 8 丨 02 is formed, and each successive cycle will make this structural layer continue to grow, thus limiting the achievable capacitance. A series of methods have been developed to solve this serious problem. For example, 硏It was found that a metal oxyoxide can be used to deposit alumina on a silicon substrate without generating an internal interface silicon oxide layer. When reacting with another metal compound, the metal oxyoxide can be used as a metal and oxygen supply Source (eg Rirala et al. Science 288: 319-321 (2000)) ° In addition, this method can also be used on very thin silicon oxide internal interface layers, even on gate dielectric materials. Can provide better silicon / oxide internal interface characteristics. For example, Yang et al. (Humantech Thesis Prize, Samsung Electronics (1999)) proved that thin silicon oxide is between the oxide oxide and the silicon substrate. The presence of can make a gate dielectric with better effect than using alumina alone; the same research also found that when the thickness of the entire gate dielectric oxide layer is reduced, nitriding is formed on the thin oxide layer Silicon can reduce defect density, such as Kim et al., "Ultra Thin This paper is sized for the Chinese National Standard (CNS) A4 (210 X 297 cm). Please read the note before filling out this page. Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by a consumer cooperative. Printed by a consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 559916 Λ7 9951pif.doc / 008 Description of the invention (k) (< 3nm) High Quality Nitride / Oxide Stack Gate Dielectrics Fabricated by In-Situ Rapid Thermal Processing. IEDM97 (1997), pp. 463_466, a method for depositing a thin internal interface oxide layer between a substrate and a high dielectric constant material, for example, in U.S. Patent No. 6,144,060 and December 23, 1999 U.S. Application No. 09 / 471,761 are disclosed. Before thermally growing silicon oxide, the surface of the silicon is usually washed to avoid contamination and produce good dielectric properties. On the other hand, the washing action is used to remove naturally occurring oxides, which is also called "primary oxidation" Layer ", for those skilled in the art, even if the silicon surface is placed in a clean room environment at room temperature, a native oxide layer will naturally form on the silicon surface. Generally, the primary oxide layer includes a few angstroms of silicon oxide, which will be part of the subsequent dielectric film. When the thermal oxide layer grows through the primary oxide layer to complete the predetermined dielectric layer, the primary oxide on the silicon surface The quality and thickness of the layer may be irregular; furthermore, the primary oxide layer is often contaminated by impurities due to long-term conversion and / or existence. Therefore, the surface is usually soaked in diluted hydrogen fluoride (HF) or etched with HF vapor to remove the native oxide layer. The wafer is immersed in the diluted hydrogen fluoride to wash the native oxide on the silicon surface and leave it on the surface. At the end of the hydrogen, HF vapor etching can also clean the silicon surface and end the unconnected silicon bonds, but the surface end is a replaceable fluorine. The end of hydrogen is not very stable, especially at elevated temperatures, these hydrogen atoms will quickly decompose and leave unconnected silicon bonds, making it easy to capture pollutants in the gas phase. Even in the presence of hydrogen or fluorine at the end, the paper size of the gas phase is subject to the Chinese National Standard (CNS) Al gauge (21〇χ 297 cm) Please read the note S · 丄III Order 559916 A7 B7 9951pif.doc / 008 5. Description of the Invention (ί) The oxidant can still diffuse through the terminal layer between the HF treatment and the subsequent steps, so the HF treatment will clean the surface of the wafer. Provide protection during cleansing and further steps. One way to maintain the clean silicon surface for a long time is to quickly grow a thin layer of silicon oxide after the clean silicon surface. As mentioned above, a very thin silicon oxide layer can be used in silicon structures and high dielectrics. Coefficient (high dielectric constant dielectric) materials provide internal interface characteristics between materials. For example, when exposed to ordinary oxidants such as air or water at room temperature, the naturally regenerated oxides will react slowly, which is not conducive to commercial production. As we all know, heating the wafer during the oxidation can accelerate the oxidation rate. Unfortunately, thermal oxidation at a temperature greater than 500 degrees Celsius will cause the hydrogen ends left at HF to reach the temperature state before the sacrificial oxide layer is generated. It was released that the silicon surface would become unprotected during this transition; in addition, compared to the subsequent step of the oxidant diffusion that has formed the silicon oxide layer, the thermal oxidation on the initially exposed silicon substrate will proceed quickly, And its mechanism is not well understood. Therefore, when it is desired to provide a thick enough oxide to make a high dielectric: improved internal interface properties under a constant material, the oxidation reaction is not easy to control 1 'and easily exceeds a predetermined thickness; in addition, even if a layer can be formed efficiently An extremely thin oxide layer is used as the internal interface layer. When a high dielectric constant material is deposited under normal growth conditions, the underlying oxide layer will further grow, so the silicon oxide interface is too thick and the overall dielectric The constant becomes low. It is beneficial to have a very thin internal interface layer of sand dioxide between the substrate and the high dielectric constant material. The thickness of the internal interface of silicon dioxide will determine 8 The paper size is applicable in China_CNS A1 specification ⑽ x 297 public dream> (Please read the precautions on the back before Λ writing this page) -------- Order --------- line one il write 丄 Employment Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs Printed 559916 Λ7 9951pif.doc / 008 V. Description of the Invention (Ministry of Finance, Ministry of Economic Affairs, X) Consumption of the minimum thickness of the gate oxide layer, in order to maintain a very thin silicon dioxide internal interface, such a demand arises, It is hoped that these methods can be applied to single-wafer process systems and quarter-micron technologies, thereby generating higher yields and throughputs than conventional methods. In view of this, the present invention provides a method for forming a gate dielectric layer on a semiconductor substrate, by forming an internal interface dielectric oxide layer on the substrate, and depositing a high dielectric constant layer on the internal interface dielectric, The thickness of the internal interface dielectric layer does not increase when the high dielectric constant layer is deposited. The present invention provides another method for forming a dielectric layer on a silicon substrate. Preferably, the method includes growing a silicon oxide internal interface layer having a thickness of less than 15 angstroms on the substrate, and then depositing a high dielectric constant material over the internal interface layer. It is more appropriate that the deposition action includes maintaining the substrate at a temperature lower than 300 degrees Celsius and supplying water vapor as an oxidant; it is better to deposit a high dielectric constant material so that the growth of the internal interface layer is less than 15 angstroms, which is more appropriate It is less than 10 Angstroms, and most suitably it can be less than 5 Angstroms. In one embodiment, the deposition method includes an ALD method. The ALD method may alternately include a plurality of cycles. Each cycle preferably includes: contacting the substrate with the first reactant; removing unreacted first reactant from the reaction chamber; and Reaction byproducts; contacting the substrate with water vapor; and removing unreacted water vapor and possible reaction byproducts from the reaction chamber. In the following, a preferred embodiment is given and described in detail in conjunction with the accompanying drawings: The brief description of the drawings: Figure 1 shows a high dielectric constant in the substrate and the gate dielectric
本紙張尺度適用中國國家標準（CNS)A:丨規烙（210x 297公釐） 請 先 閱 讀 背 意 寫 本 頁 I I I I I 訂This paper size applies to Chinese National Standard (CNS) A: 丨 Specifications (210x 297 mm) Please read this page first. I I I I I Order
I 559916 9951pif.doc/008 五、發明說明（ 介電材料之間沈積-層極薄的內界面 流程。 何枓的一般製作 圖示標記說明： 製作步驟流程順序 10, 20, 30, 40, 50 實施例 如上所述，當用高電容係數或高介電常數 閑極介電質中的二氧化砂時，在基底與高介電常數 間^層極薄的氧化內界面層會有幫助，因而可 層高介電常數材料而不增加先前已形成的極薄氧化層的厚 度^會很有幫助。因此，本發明揭露一種方法可以在基二 與高介電常=材料之間形成—層極薄的氧化物內界面層: 其中在沈積高介電常數介電材料時，內界面層的厚度會維 持原來的狀態。 經濟部智慧財產局員工消費合作社印製 在較佳貫施例中，使用金屬氧化物來作爲高介電常數 材料時，在沈積高介電常數材料期間可以避免氧化矽內界 面層的成長，氧化反應僅會在沈積步驟中氧源有活化到的 地方產生作用’藉著控制氧源的活性，二氧化砂層進一步 成長的狀況就可以受到控制，此特點可以用於以ALD沈 積的筒介電常數材料上。在一個實施例中，最好是把溫度 維持在攝氏300度以下，水蒸氣則是被用來作爲根基交換 劑’如此可以避免在局介電常數沈積期間受到氧源的氧化 作用。在另一個實施例中，金屬化合物，像是金屬有機化 合物，會被用來作爲ALD製程中的氧源材料，避免內界 面層進一步的成長。在另一個實施例中，則採用相較於二 本紙張尺度適用中國國家標準（CNS)A4規烙（210 X 297公餐） 經濟部智慧財產局員工消費合作社印製 559916 Λ7 9951pif.doc/008 B7 五、發明說明（& ) 氧化矽具有更穩定的熱動力學的一種利用MOCVD沈積的 金屬氧化物，因此可以省略氧源全面的使用。 第1圖繪示係根據本發明提供的一種製程步驟流程 圖。在步驟1〇中最好將基底淸潔以移除原生氧化層與污 染物，接著在步驟20中選擇性的將表面改變，使其適合 用於在後續步驟30中的極薄內界面介電質的形成上·，在 步驟30形成極薄內界面介電質以後，步驟40會將表面選 擇性改變以使其適合用於步驟50的高介電常數層50沈積 步驟中。 根據在此提到矽基底的內容時，熟習此技藝者可以輕 易的根據本發明的揭露，將控制薄膜成長的原理應用於其 他方面。在此提到的”基底”表示會在其上沈積一結構層的 任何表面，比如薄的氧化物層與高介電常數層可以形成在 金屬表面上，較佳的基底是一個半導體結構，像是磊晶矽 層或是單一砂晶圓的頂端表面；根據此揭露的內容，熟習 此技藝者很容易可以了解半導體基底是半導體材料的最低 層，積體電路的元件就是從這裡開始形成。 如本發明所揭露的，基底會在步驟10中被淸洗以移除 在半導體結構上的污染物以及自然產生或是原生氧化層， 基底的淸潔可以用熟習此技藝者所知道的任何方法進行。 通常，在閘極氧化層成長之前的晶圓淸洗會在將晶圓放置 在製程室內之前另外進行，比如晶圓可以在一個HC1/HF 濕蝕刻槽中淸洗，另外淸洗也可以臨場（in-situ)進行，比 如將結合HF與醋酸蒸氣的淸洗動作導入到一串連工具內 本紙張尺度適用中國國家標準（CNS)Al規烙（210x1297公餐） (請先閱讀背面之注意事項再填寫本頁) —— — ———II ·11111111 559916 Λ7 B7 9951pif.doc/008 五、發明說明（q ) 的一個模組中，以減少傳遞的時間以及再污染或再氧化的 機會。在另一個可能性裡，可以在反應室中進行一道氫氣 烘烤步驟以昇華原生氧化層，在此步驟中可以加入少量的 HC1蒸氣以在氫氣烘烤期間協助淸除金屬污染物或其他類 似的污染物。在再另一個設計中，電漿產物可以協助或同 時加入淸潔，像是利用氫氣中的氫離子來取代，其優點在 於活性的或激發片段的使用可以擴大淸潔製程的溫度裕度 (window) 〇 在一個較佳實施例中，會對基底進行一道APM(氫氧 化氨/過氧化氫的混合物）淸潔，此步驟之後會進行HF浸 泡，其有助於移除在APM淸潔中產生的氧化物，並會在 基底表面上留下一個氫基末端。 經濟部智慧財產局員工消費合作社印製 在步驟10的淸洗以及步驟20的選擇性表面處理以後， 在步驟30中會有一層內界面介電層形成於基底上，內界 面介電層最好是極薄，包括一或二個單層，此內界面介電 層適當的厚度小於15埃，更適當的厚度小於1〇埃，而最 適當的厚度要小於5埃，形成極薄的介電氧化內界面層的 步驟30可以用習知的任何方法來進行，因此可以用氧化 反應自基底上成長，或是利用像是ALD或CVD的方法在 基底上沈積而成，此內界面介電質較佳是由基底長成。 假如內界面氧化物層的形成步驟30是利用氧化反應而 成，選擇性處理基底表面的步驟20可以緩和後續在基底 上進行的氧化反應與內界面介電氧化層的成長，就像在 2001年二月22日申請號爲09/791,167號申請案中提到的 本纸張尺度適用中國國家標準（CNS)A4規恪（210 X 297公釐） 9951pif.doc/008 B7 五、發明說明（1° ) 內容一樣，在此將其中揭露的技術引用作爲參考。在淸潔 以後隨附在矽表面的鍵有很強的傾向會與周圍環境中的單 位或離子基產生鍵結，在HF處理以後，矽的隨附鍵會全 部與原子的氣或氣鍵結’氨是現存最小的原子，而氟是最 小的鹵素原子，這些將不會對氧化劑擴散到矽表面有任何 明顯的阻擋，但是氫或氟的末端可能會被較大的單元取 代，進而部分阻擋住表面，而使氧化劑擴散到表面的過程 變慢，特別在成長的起始階段以往都會進行的比較快，而 上述這種影響會實質上減緩氧化速度。 透過選擇離子根的大小，可以調整擴散阻障的滲透係 數，進控制氧化反應的速度，進而調整最終氧化物的厚度。 此外，氧化物厚度的增加會對整體擴散阻障有貢獻，而氧 化反應的過程對氧化物的厚度有自我限制的傾向。 經濟部智慧財產局員工消費合作社印製 在一實施例中，將矽表面暴露在水蒸氣下會使末端鍵 結的氫被OH末端取代，此〇H根會比Η原子大，且因此 對氧化反應的速度具有強度適中的影響，另外表面終端與 離子根提供的擴散阻障、其他像是鍵結強度等影響、極性 等也會影響到氧化速度，因此根基的隨附鍵單純的塡補將 可以影響氧化速度，所以根據一實施例，暴露在η2ο下形 成的根基爲0Η單位。 較適合的是根基較大且氧化反應會比0Η單位溫和的 成分，舉例來說，在另一個實施例中，根基包括將HF淸 潔以後的表面暴露在烷氧化合物或是醇類像是甲醇、乙醇 與丙醇之下形成的烷氧基。在再另一實施例中，根基包括 13 本纸張尺度適用中國國家標準（CNS)A4規烙（210x 297公餐） 559916 Λ7 9951pif.doc/〇〇8 β7 五 經濟部智慧財產局員工消費合作社印製 發明說明（（）） 暴露在像是甲酸與乙酸等羧酸形成的羧基。在這些較佳實 施例中，是選擇在將表面上的原生氧化層(最好是HF處理) 淸除以後，與進行表面的氧化之前會將根基加入，另外也 可以選擇在氧化步驟期間加入根基。 在一實施例中，不管有或沒有上述選擇的溫和根基’ 內界面介電質就是一種氧化砂層，係由暴露在會與淸潔後 的基底反應的成分下形成’比如是在淸潔的基底上進行熱 氧化法。氧化劑供應源可以包括任何已知的氧化劑，特別 是活潑的氧化劑像是〇2、H20、HCOOH以及HC104，另 外氧化反應的速度可以透過提供比氧氣更有反應活性的氧 化劑，以及/或提高氧化反應的溫度來加以改善，較適當 的溫度約在攝氏50-400度之間，更適當的溫度約在攝氏 300-400度之間；理想上在氧化期間製程溫度要維持在攝 氏400度以下，舉例來說，在暴露於攝氏400度的〇3氣 體下1〇〇秒就可以在淸潔的基底上成長約5埃厚的二氧化 石夕層。 在一實施例中，使用一種氧化力比氧氣或水蒸氣強的 氧化劑，使用這樣的氧化劑可以在較低的溫度下進行氧化 反應，至少可以低於攝氏300度，更恰當的是可以降低到 攝氏200以下，在本發明實施例中使用強氧化劑的一個例 子爲含臭氧的氣體。在另一個實施例中，含臭氧的氣體會 與水蒸氣、氧氣或一種像是不活潑的氣體或是氮氣等鈍氣 混合在一起，另一個強氧化劑的例子包括一種含過氧化氫 的氣體，含氧氣的氣體源也可以用於遙控電漿產生器上以 本紙張尺度適用中國國家標準（CNS〉A1規烙（21〇 X 297公釐） 559916 9951pif. doc/008 Λ7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（no 提供氧化反應所需的激發成分。 在另一個實施例中，氧化劑是水蒸氣，在室溫的水$ 氣下的氧化反應速度很慢，可以將溫度提高到約攝氏3()() 度，此外在此情況下，根基可以被提供到矽表面藉以增進 氧化反應速度，或是將水蒸氣與其他可以增加氧化反應速 度的氣體，像是氧氣或是含鹵素氣體如HC1的氣體混合。 假如有需要，也可以在氧化反應期間使用像是臭氧或是過 氧化氫等更強的氧化劑，以及/或是將溫度提高到約爲攝 氏400度。 內界面介電質的成長也可以包括氮氣的加入（例如透過 NO或N20的氧化反應或是NH3的氮化反應）來形成比如氮 氧化物的內界面介電質。在一實施例中，於淸潔以後使用 純的NO氧化劑氣體，藉由導入1.5slm的NO氣體來成長 內界面介電質，此時持續維持通入15slm的N2。對熟習此 技藝者來說，可以瞭解流速可以視使用的氧化劑（比如〇2、 H20、N20、HCOOH、HC104、像是 CH3N02 之類的硝基烷 類、烷基硝酸鹽類像是（ch3)2chono2、混合物或是稀釋 的氧化劑）來加以調整，將壓力與溫度各維持在約爲攝氏 780度與50ΤΟΙΓ，並維持N2的流速，在約20秒內在基底 上會有一層厚度約爲0.5nm的氮氧化矽形成；氮氣以及/ 或氧氣的離子基也可以用來形成氧化物、氮化物或氮氧化 物。在一個較佳實施例中，氧化矽的最外面一層會被氮化 成氮化層，藉以阻擋進一步的氧化物形成，因此內界面介 電層可以是SiOx、SiNy、或SiOxNy。 本紙張尺度適用中國國家標準（CNS)Al規烙（210x297公餐） (請先閱讀背面之注意事項寫本頁) ϋ I · I ·ϋ ϋ n ϋ ϋ ·ϋ^OJβ I ϋ ·ϋ mm§ βϋ 1_1 ϋ I · 經濟部智慧財產局員工消費合作社印製 559916 995lpif.doc/008 I、發明說明（ο ) 在完成氧化反應以後，供應到表面的氧化劑（以及根 基，假如在氧化反應期間有供應的話）會被停止，然後將 基底用氮氣加以淸潔，因爲內界面介電層是由基底長成， 所以可以與基底相容，並可以避免有會捕捉內界面電荷的 區域存在。 接著在形成內界面介電層以後，將在步驟20中進行選 擇性的表面處理來產生表面末端加以移除，在一實施例中 有機根基會被用來取代-OH的末端。 內界面氧化層也可以用任何習知的方法來形成，舉例 來說可以利用控制沈積反應來代替基底的氧化反應；在一 實施例中，二氧化矽的內界面介電層可以用原子層沈積法 (ALD)來形成，在另一個實施例中，二氧化矽的內界面介 電層可以透過對基底進行化學氧化反應來形成。 在控制內界面介電層像是二氧化矽層的形成的厚度與 選擇的-OH末端之後，進行一層第二薄的介電層沈積，沈 積時會使下層的內界面介電層進一步的成長，在進行第二 介電層的沈積期間，較適當的是使下層的內界面介電層的 成長厚度平均小於10埃，更適當的是使厚度平均小於5 埃，而最好的情況是在沈積第二介電層期間根本就不會有 進一步的成長。理想上在內界面介電層上沈積的材料層爲 一種高介電常數材料，此高介電常數材料的介電常數比二 氧化矽高，較適當的介電常數要高於5，更適當的是介_ 常數高於10，在內界面介電層上沈積的此高介電常數衬料 可以是任何一種在沈積過程中不會造成內界面介電層成胃 (請先閲讀背面之注意事項再填寫本頁) P-裝--------訂---------線 本纸張尺度適用中國國家標準（CNS)A4規烙（21〇x 297公餐） 559916 Λ7 H7 9951pif.doc/00: 五、發明說明（w) 的高介電常數材料，較適當的高介電常數材料是金屬氧化 物，在本發明中採用的幾種高介電常數材料的例子包括I 559916 9951pif.doc / 008 V. Description of the invention (deposition of the internal interface between dielectric materials-very thin internal interface flow. He Jiu's general production of pictograms description: Production process sequence 10, 20, 30, 40, 50 The embodiments are described above. When using sand dioxide in a high-capacitance or high-dielectric constant dielectric, a very thin oxidized internal interface layer between the substrate and the high-dielectric constant will help, and therefore It can be helpful to layer a high dielectric constant material without increasing the thickness of the extremely thin oxide layer that has been previously formed. Therefore, the present invention discloses a method that can form a layer between a substrate and a high dielectric constant = material. Thin oxide internal interface layer: Among them, the thickness of the internal interface layer will maintain the original state when the high-k dielectric material is deposited. The Intellectual Property Bureau employee consumer cooperative of the Ministry of Economic Affairs prints it in a better embodiment, using When a metal oxide is used as a high-dielectric constant material, the growth of the interfacial layer of the silicon oxide can be avoided during the deposition of the high-dielectric constant material, and the oxidation reaction will only work where the oxygen source is activated during the deposition step ' By controlling the activity of the oxygen source, the further growth of the sand dioxide layer can be controlled. This feature can be applied to the barrel dielectric constant material deposited by ALD. In one embodiment, it is best to maintain the temperature at 300 ° C Below the temperature, water vapor is used as a root exchanger 'so as to avoid oxidation by the oxygen source during the deposition of the local dielectric constant. In another embodiment, metal compounds, such as metal organic compounds, are It is used as the oxygen source material in the ALD process to avoid further growth of the internal interface layer. In another embodiment, it uses the Chinese National Standard (CNS) A4 rule (210 X 297 mm) compared to the two paper sizes. Meal) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 559916 Λ7 9951pif.doc / 008 B7 V. Description of the Invention (&) Silicon oxide has a more stable thermodynamic metal oxide deposited by MOCVD, so it can be omitted Comprehensive use of oxygen source. Figure 1 shows a flowchart of a process step provided according to the present invention. In step 10, it is best to clean the substrate to Remove the native oxide layer and pollutants, and then selectively change the surface in step 20, making it suitable for the formation of the ultra-thin internal interface dielectric in the subsequent step 30. In step 30, the ultra-thin inner layer is formed. After interfacial dielectric, step 40 will selectively change the surface to make it suitable for the high dielectric constant layer 50 deposition step of step 50. According to the content of the silicon substrate mentioned here, those skilled in the art can easily According to the disclosure of the present invention, the principle of controlling the growth of a thin film is applied to other aspects. The "substrate" mentioned herein means any surface on which a structural layer is deposited, such as a thin oxide layer and a high dielectric constant The layer can be formed on a metal surface. The preferred substrate is a semiconductor structure, such as an epitaxial silicon layer or the top surface of a single sand wafer; according to the contents disclosed here, those skilled in the art can easily understand that the semiconductor substrate is The lowest layers of semiconductor materials, components of integrated circuits are formed from here. As disclosed in the present invention, the substrate is rinsed in step 10 to remove contaminants and naturally occurring or native oxide layers on the semiconductor structure. The substrate can be cleaned by any method known to those skilled in the art. get on. Generally, wafer cleaning before gate oxide growth is performed separately before placing the wafer in the process chamber. For example, the wafer can be cleaned in a HC1 / HF wet etching tank, and cleaning can also be performed on site ( in-situ), such as importing the washing action combining HF and acetic acid vapor into a series of tools. The paper size is applicable to the Chinese National Standard (CNS) Al gauge (210x1297 meal) (Please read the precautions on the back first) (Fill in this page again) —— — ——— II · 11111111 559916 Λ7 B7 9951pif.doc / 008 5. In a module of the description of the invention (q), to reduce the transmission time and the chance of recontamination or reoxidation. In another possibility, a hydrogen baking step can be performed in the reaction chamber to sublimate the native oxide layer. In this step, a small amount of HC1 vapor can be added to assist in removing metal contaminants or other similar materials during the hydrogen baking. Pollutants. In yet another design, the plasma product can be used to assist or simultaneously add to the cleaning, such as using hydrogen ions in hydrogen to replace, the advantage is that the use of active or excited fragments can expand the temperature margin of the cleaning process (window ) 〇 In a preferred embodiment, the substrate is subjected to an APM (ammonia hydroxide / hydrogen peroxide mixture) cleaning. After this step, an HF immersion is performed, which helps to remove the APM cleaning. And will leave a hydrogen-based end on the substrate surface. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs After the cleaning in step 10 and the selective surface treatment in step 20, an internal interface dielectric layer is formed on the substrate in step 30, and the internal interface dielectric layer is best It is extremely thin, including one or two single layers. The proper thickness of the internal interface dielectric layer is less than 15 angstroms, more suitable thickness is less than 10 angstroms, and the most suitable thickness is less than 5 angstroms, forming an extremely thin dielectric. The step 30 of oxidizing the internal interface layer can be performed by any conventional method, so it can be grown from the substrate by an oxidation reaction or deposited on the substrate by a method such as ALD or CVD. The internal interface dielectric It is preferably grown from a substrate. If the inner interface oxide layer forming step 30 is formed by an oxidation reaction, the step 20 of selectively treating the surface of the substrate can mitigate the subsequent oxidation reaction on the substrate and the growth of the inner interface dielectric oxide layer, as in 2001 The paper size mentioned in the application No. 09 / 791,167 on February 22 applies to the Chinese National Standard (CNS) A4 (210 X 297 mm) 9951pif.doc / 008 B7 V. Description of the invention (1 °) The content is the same, and the technical references disclosed therein are used as references. After cleaning, the bonds attached to the surface of silicon have a strong tendency to bond with units or ionic groups in the surrounding environment. After HF treatment, all the bonds attached to silicon will be bonded to the atomic gas or gas bonds. 'Ammonia is the smallest existing atom, and fluorine is the smallest halogen atom. These will not have any obvious barrier to the diffusion of the oxidant to the silicon surface, but the end of hydrogen or fluorine may be replaced by larger units, and then partially blocked. The process of holding the surface and slowing the diffusion of the oxidant to the surface is slower, especially in the initial stage of growth, which has previously been relatively fast, and the above-mentioned effect will substantially slow down the oxidation rate. By selecting the size of the ion root, the penetration coefficient of the diffusion barrier can be adjusted, the speed of the oxidation reaction can be controlled, and the thickness of the final oxide can be adjusted. In addition, the increase in oxide thickness contributes to the overall diffusion barrier, and the oxidation reaction process has a tendency to self-limit the oxide thickness. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In one embodiment, exposing the silicon surface to water vapor will cause the terminally bonded hydrogen to be replaced by the OH terminal. The speed of the reaction has a moderate intensity effect. In addition, the diffusion barrier provided by the surface terminal and the ion root, other influences such as bond strength, polarity, etc. also affect the oxidation rate. Therefore, the simple bond of the attached bond of the root will It can affect the rate of oxidation, so according to an embodiment, the root formed by exposure to η2ο is 0Η units. More suitable are ingredients with larger bases and oxidation reactions that are milder than 0 Η units. For example, in another embodiment, the bases include exposing the surface after HF cleaning to alkoxy compounds or alcohols such as methanol , Alkoxy groups formed under ethanol and propanol. In still another embodiment, the basis includes 13 paper standards that are applicable to the Chinese National Standard (CNS) A4 regulations (210x 297 meals) 559916 Λ7 9951pif.doc / 〇〇8 β7 Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Description of printed invention (()) Exposure to carboxyl groups formed by carboxylic acids such as formic acid and acetic acid. In these preferred embodiments, the base is selected after the native oxide layer (preferably HF treatment) on the surface is removed, and the base is added before the surface oxidation. Alternatively, the base may be added during the oxidation step. . In one embodiment, with or without the mild foundation selected above, the 'inner interface dielectric' is an oxidized sand layer formed by exposure to components that will react with the cleaned substrate, such as on a clean substrate Thermal oxidation is performed on the substrate. The oxidant supply source can include any known oxidant, especially active oxidants such as 02, H20, HCOOH, and HC104. In addition, the speed of the oxidation reaction can be provided by providing an oxidant that is more reactive than oxygen, and / or enhance the oxidation reaction. The temperature should be improved. The more appropriate temperature is about 50-400 degrees Celsius, and the more suitable temperature is about 300-400 degrees Celsius. Ideally, the process temperature should be maintained below 400 degrees Celsius during the oxidation, for example. In other words, a layer of about 5 angstroms of dioxide on a clean substrate can be grown on a clean substrate for 100 seconds after being exposed to 400 degrees Celsius gas. In one embodiment, an oxidizing agent having a stronger oxidizing power than oxygen or water vapor is used. Using such an oxidizing agent can carry out the oxidation reaction at a lower temperature, at least lower than 300 degrees Celsius, and more suitably, it can be reduced to Celsius. Below 200, one example of a strong oxidant used in the embodiment of the present invention is a gas containing ozone. In another embodiment, the ozone-containing gas is mixed with water vapor, oxygen, or an inert gas such as an inert gas or nitrogen. Another example of a strong oxidant includes a hydrogen peroxide-containing gas. Oxygen-containing gas sources can also be used on remote-controlled plasma generators. Applicable to Chinese national standards (CNS> A1 (21 × 297 mm)) at this paper scale. 559916 9951pif.doc / 008 Λ7 B7 Intellectual Property Bureau, Ministry of Economic Affairs Printed by the Employee Cooperative Cooperative. 5. Description of the invention (no provides the exciting components required for the oxidation reaction. In another embodiment, the oxidant is water vapor, and the oxidation reaction speed is very slow under room temperature water and gas. Raise to about 3 () () degrees. In addition, in this case, the base can be provided on the surface of the silicon to increase the oxidation reaction speed, or water vapor and other gases that can increase the oxidation reaction speed, such as oxygen or Mixing of halogen-containing gas such as HC1. If necessary, stronger oxidants such as ozone or hydrogen peroxide can also be used during the oxidation reaction, and / or The temperature is increased to about 400 degrees Celsius. The growth of the dielectric at the internal interface can also include the addition of nitrogen (such as through the oxidation reaction of NO or N20 or the nitration reaction of NH3) to form an internal interface dielectric such as nitrogen oxides. In one embodiment, pure NO oxidant gas is used after the cleaning, and the internal interface dielectric is grown by introducing 1.5 slm NO gas. At this time, 15 slm N2 is continuously maintained. For those skilled in this art For example, you can understand that the flow rate can depend on the oxidant used (such as 02, H20, N20, HCOOH, HC104, nitroalkanes such as CH3N02, alkyl nitrates such as (ch3) 2chono2, mixtures, or Diluted oxidant) to adjust the pressure and temperature to about 780 degrees Celsius and 50 TOI, and maintain a flow rate of N2, within about 20 seconds, a layer of silicon oxynitride with a thickness of about 0.5 nm will be formed on the substrate; Nitrogen and / or oxygen ion groups can also be used to form oxides, nitrides, or oxynitrides. In a preferred embodiment, the outermost layer of silicon oxide is nitrided to form a nitrided layer, thereby blocking access. Step oxide formation, so the internal interface dielectric layer can be SiOx, SiNy, or SiOxNy. This paper size applies Chinese National Standard (CNS) Al gauge (210x297 meal) (Please read the precautions on the back first to write this page) ) ϋ I · I · ϋ ϋ n ϋ ϋ · ϋ ^ OJβ I ϋ · ϋ mm§ βϋ 1_1 ϋ I After the oxidation reaction is completed, the oxidant (and the base, if supplied during the oxidation reaction) to the surface will be stopped, and then the substrate will be cleaned with nitrogen, because the internal interface dielectric layer is grown from the substrate, so you can Compatible with the substrate and avoids the presence of regions that will capture internal interface charges. Next, after the internal interface dielectric layer is formed, a selective surface treatment is performed in step 20 to generate a surface end to be removed. In one embodiment, an organic radical is used to replace the -OH end. The internal interface oxide layer can also be formed by any conventional method. For example, a controlled deposition reaction can be used instead of the oxidation reaction of the substrate. In one embodiment, the internal interface dielectric layer of silicon dioxide can be deposited using an atomic layer. ALD, in another embodiment, the inner interface dielectric layer of silicon dioxide can be formed by performing a chemical oxidation reaction on the substrate. After controlling the thickness of the inner interface dielectric layer, such as the formation of a silicon dioxide layer, and the selected -OH end, a second thin dielectric layer is deposited. During the deposition, the lower inner interface dielectric layer will grow further. During the deposition of the second dielectric layer, it is more appropriate to make the growth thickness of the inner interface dielectric layer of the lower layer less than 10 angstroms on average, more suitable to make the thickness less than 5 angstroms on average, and the best case is There is no further growth at all during the deposition of the second dielectric layer. Ideally, the material layer deposited on the inner interface dielectric layer is a high dielectric constant material. The dielectric constant of this high dielectric constant material is higher than that of silicon dioxide, and the appropriate dielectric constant is higher than 5, which is more appropriate. The dielectric constant is higher than 10. The high dielectric constant lining deposited on the inner interface dielectric layer can be any kind that does not cause the inner interface dielectric layer to become stomach during the deposition process (please read the note on the back first) Please fill in this page again for items) P-pack -------- order --------- thread paper size applicable to China National Standard (CNS) A4 (21〇x 297 meals) 559916 Λ7 H7 9951pif.doc / 00: V. The high dielectric constant material of the invention description (w). A more suitable high dielectric constant material is a metal oxide. Examples include
Zr02、Hf02、Al2〇3、Ta205、Ti02、BST、ST、SBT、Nb2〇5 與 La203，也可以是 Sc、Y、Ce、Pr、Nd、Sm、Eu、Gd、 Tb、Dy、Ho、Er、Tm、Yb或Lu等氧化物、金屬氧化物 的固態溶液以及金屬氧化物的薄片。 因爲整體厚度會限制可達到的電容量，且厚度變化會 隨著組成的介電質之整體均勻度有明顯的影響，將下層的 內界面介電層的厚度控制在一層的等級上，以達到幾個單 層厚度的目標是這些高介電常數應用的特點，因爲必須使 用可以避免漏電的最小厚度，這樣不均勻的氧化物在其他 地方就會過厚，不均勻的結果會導致氧化物的厚度超過實 際需要的量，此外閘極介電層過度的變化最後會造成良率 降低。 因此’任何可以不造成內界面氧化層進一步成長的沈 積方法都可以用來形成高介電常數介電層，比如ALD、 CVD、PVD、MOCVD、MBE或其他已知的方式都可以被 用來沈積高介電常數材料，只要條件可以保持在不會使下 層有進一步的氧化反應發生即可，這些方法最好是在低於 攝氏400度下進行，更適當的是在低於攝氏3〇〇度下進行， 最適當的則是低於攝氏200度下進行。 根據使用的化學品，可以選擇性的在沈積高介電常數 材料之前進一步進行表面處理，舉例來說激發成分處理可 以用來修改內界面層表面的末端，並促進接下來的沈積反 本紙張尺度適用中關^^(CNS)Ai規格（210 X 297公餐） (請先閱讀背面之注意事項寫本頁) ϋ aBHi i·.· «ϋ 1 ϋ ϋ ϋ ·1 ϋ ϋ I ^ 經濟部智慧財產局員工消費合作社印製 559916 Λ7 B7 9951pif.doc/008 五、發明說明（β ) 應。 在較佳實施例中，高介電常數材料的沈積是以ALD型 的沈積方法來進行，其中交替加入的反應劑會使表面飽 和，而每一個循環留下不會超過一單層的介電層材料。更 淸楚的來說，會在基底上交替的進行化學品的表面反應， 每一個循環至少包括兩個個別的狀態，其中每一個狀態都 是會有自我限制效果的飽和反應，因此選用的反應劑像 是，在較佳的情況下，可以鍵結到表面上的反應劑使用量 是視可以利用的位置數量以及化學吸附成分（包括根基）的 物理尺寸來決定，一次添加留下來的層會自因爲吸附以後 的表面對添加而剩餘的化學劑並不會有反應性而自我限 制，在自我限制反應完成以後，將未反應的化學劑移出反 應空間，並將基底暴露在下一個反應劑中。 當在每一次添加中供應的化學分子被吸附的部分不高 過一單層時，基底表面可以達到最大的覆蓋率，每一個接 下來的添加則會與以相似的自我限制或自我終止模式形成 的表面反應，添加的動作會重複直到得到預期厚度的介電 層爲止。 經濟部智慧財產局員工消費合作社印製 最好是使用水蒸氣作爲氧的供應來取代先前添加動作 中的根基末端，因爲在低於攝氏300度下水蒸氣幾乎不會 使薄的內介電氧化層有進一步的成長，氧化物的再成長在 高介電常數沈積的開始階段是一個很重要的關鍵，因爲氧 化劑可能會擴散經過幾個單層的高介電常數材料與薄的內 界面氧化物。在下列的例子中，含鋁或含銷的氣體的添加 18 本紙張尺度適用中國國家標準（CNS)A:1規格（210 X 297公爱)~" 559916 Λ7 Π7 9951pif.doc/〇〇8 五、發明說明（（u (請先閱讀背面之注意事項再填寫本頁) 會與水蒸氣的添加交替，在其間會進行淸潔動作，在較佳 實施例中第二介電層包括由三甲基鋁（TMA)與水反應沈積 而成的Al2〇3。 高介S常數材料沈積的溫度最好維持在低到足以使內 介電介電層的厚度不會增加的狀態下，因此高介電常數材 料的沈積最好是在低於攝氏400度的溫度下進行，更恰當 的是可以在攝氏70-300度之間進行，最恰當的是可以在 攝氏200-300度之間進行。在一個實施例中，在高介電常 數介電質沈積期間的溫度要低於內界面介電層成長期間進 行熱氧化反應的溫度攝氏300度，在製程進行期間的壓力 最好是維持在1 T〇rr_80 Torr之間，更適當的是約爲10 Torr 〇 經濟部智慧財產局員工消費合作社印製 在一實施例中，砂晶圓會被放置在PulsarTM 2000反應 器的反應空間中（係購自ASM America，USA)，此反應器是 被設計用於不管是在內界面氧化物成長之前或之後進行的 ALD製程。反應空間會被一個機械的真空幫浦抽真空，在 將抽氣以後利用通入純度爲99.9999%的氮氣將反應空間 內的壓力調整到5-10 mbar(絕對的），然後將反應空間穩定 在低於攝氏300度的溫度下，交替的將由外部供應源汽化 的氣相三甲基鋁與水加入到反應空間內，使其與基底表面 接觸，每一個化學品加入的步驟會用通入氮氣來加以分隔 開。 每一個添加循環由四個基本步驟組成： * 加入(ch3)3ai 本紙張尺度適用中國國家標準（CNS)A4規烙（210 X 297公釐） 559916 Λ7 B7 ^_ 經濟部智慧財產局員工消費合作社印製 9951pif.d〇c/008 發明說明（D) *用n2淸潔 •加入H2o 春用n2淸潔 在表I中整理出一個沈積氧化鋁的循環範例。 表 I ·· A1203 狀態 反應物 溫度（°c) 壓力（mbar) 時間（sec) 添加1 ΤΜΑ 300 5-10 0.2 淸潔1 — 300 5-10 1.1 添加2 η2ο 300 5-10 1.5 淸潔2 -- 300 5-10 3.0 循環的次數可以決定結構層的厚度，在攝氏300度下’ 由三甲基鋁與水形成的αι203的成長速度正常的話接近 O.lnm/每循環或是1埃/每循環，或是約3-4循環/一單層 (A1203具有一個約爲3埃的大晶格參數）。每一次的TMA 的添加自我限制吸附中會留下甲基的末端，因此減少可化 學吸附的位置，這些位置的數量會小於每次添加形成的整 的單層，這些添加循環會被重複直到產生預定的厚度爲 止，氧化鋁可以作爲閘極介電質內唯一的高介電常數材 料，或是在形成一或多個其他介電層時的一層薄的阻障 層。 在另一種設計中，Zr02的沈積是用ALD型的製程來 形成，ZrCl4蒸氣會被導入到反應室中，與晶圓表面接觸1.5 秒，這就是下表II中的添加A ;然後用氮氣將反應室淸潔 3·〇秒，這就是淸潔A ;接著將水蒸氣導入到反應室中與 20 ------------φ裝--------訂---------線 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規烙（21〇 χ 297公釐） 559916 Λ7 B7 ，951pif.doc/008 五、發明說明（（S ) (請先閱讀背面之注意事項再填寫本頁) 晶圓表面接觸3.0秒，這就是添加B ;淸潔反應室4.0秒 以將剩餘的水與反應副產物移出，這就是淸潔B。在每一 個反應的狀態中，會供應足夠量的反應物還有提供其他的 條件使表面達到飽和狀態。 在表II中整理出一個高介電常數沈積循環的一個範 例0 表 II ·· Zr02 狀態 反應物 溫度（°c) 壓力（mbar) 時間（sec) 添加A ZrCl4 300 5-10 1.5 淸潔A •两 300 5-10 3.0 添加B h2o 300 5-10 3.0 淸潔B —— 300 5-10 4.0 在攝氏300度下平均沈積速度約爲〇·59埃/每循環’ 在表II中由添加A、淸潔A、添加B、淸潔B組成的循環 可以視需要重複許多次，直到達到預定厚度爲止。 經濟部智慧財產局員工消費合作社印製 另外，製程進行期間的溫度最好是介於攝氏200-300 度之間，對形成非晶系的ZK)2來說，溫度最好是介於攝 氏200-250度之間，而較適當的是在約爲攝氏225度下進 行；對於結晶態的薄膜來說，溫度最好是在介於約攝氏 250-300度之間這個範圍內的最高處，較適當的是約爲攝 氏300度。熟習此技藝者應可以知道在兩個成份的交界處 會形成非晶系與結晶態混合的組成，上面提到的這個方式 會形成大部分爲結晶態的Zr02薄膜。 在上述的例子中，每次ZrCl4添加形成的金屬單層會 本紙張尺度適用中國國家標準（CNS)A4規恪（210x 297公堃） Λ7 B7 經濟部智慧財產局員工消費合作社印製 559916 9951pif.doc/008 五、發明說明（叫） 被氯自我終止，而不會在適當的條件下與過多的ZrCl4反 應，適當的氧源氣體會在氧氣供應階段與有氯末端的表面 反應或是吸附於其上，而進行一個受先前吸附的氯化锆化 合物限制的一種根基交換反應。氧化反應會留下一個氫氧 基與氧橋接的末端，此末端並不會與在飽和狀態下過多的 氧化劑作進一的反應。 較適當的是，進行足夠的循環次數使氧化锆的厚度可 以成長到20-60埃，更適當的是進行足夠的循環次數使厚 度可以成長到20-40埃，最適當的厚度是30埃，此結構 層的介電常數約在18-24之間。 在高介電常數介電質沈積以後，選擇性的將沈積的介 電層回火以改善此結構層的品質，舉例來說，沈積的介電 層可以進行一道高溫氧回火，使此結構層結晶化並將任何 氧空隙塡滿，這些空隙可能會留下金屬性漏電的通道，回 火的步驟可以同樣的在反應器中進行，藉以將***或是其 他與剩餘反應物產生不樂見反應的可能性降到最低，回火 最好會在可以避免內介面氧化層進一成長的條件下進 行。 也可以用ALD方法來沈積高介電層，其中ALD方法 會使用到兩種金屬化合物，一種爲氧源材料會與另一種金 屬化合物有好的反應，但是又不會氧化基底，這樣的方法 在2000年10月13號申請的美國專利第〇9/687,355號申 請案中有揭露，其中揭露的內容在此引用以作爲參考。在 此方法中，基底的表面會輪流與一種金屬源材料以及一種 22 本紙張尺度適用中國國家標準（CNS)A4規烙（210x 297公餐） (請先閱讀背面之注意事項再填寫本頁)Zr02, Hf02, Al203, Ta205, Ti02, BST, ST, SBT, Nb205, and La203, or Sc, Y, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er , Tm, Yb or Lu oxides, solid solutions of metal oxides, and flakes of metal oxides. Because the overall thickness will limit the achievable capacitance, and the change in thickness will have a significant effect on the overall uniformity of the composition of the dielectric, the thickness of the underlying inner interface dielectric layer will be controlled to one level to achieve The goal of several single layer thicknesses is the characteristic of these high dielectric constant applications, because the minimum thickness to avoid leakage must be used, so that uneven oxides will be too thick elsewhere, and uneven results will cause oxides. The thickness exceeds the actual required amount, and in addition, excessive changes in the gate dielectric layer will eventually cause the yield to decrease. Therefore, 'any deposition method that does not cause further growth of the internal interface oxide layer can be used to form a high dielectric constant dielectric layer, such as ALD, CVD, PVD, MOCVD, MBE or other known methods can be used to deposit High dielectric constant materials, as long as the conditions can be maintained so that no further oxidation reaction will occur in the underlying layer. These methods are preferably performed at less than 400 degrees Celsius, and more suitably at 300 degrees Celsius. It is carried out below, and the most suitable is below 200 degrees Celsius. Depending on the chemicals used, surface treatment can be optionally performed before depositing high-k materials. For example, the excitation component treatment can be used to modify the end of the surface of the interfacial layer and promote subsequent deposition on the paper scale. Applicable to Zhongguan ^^ (CNS) Ai specification (210 X 297 meals) (Please read the notes on the back to write this page) ϋ aBHi i ·. · «Ϋ 1 ϋ ϋ 1 · 1 ϋ ϋ I ^ Ministry of Economy Wisdom Printed by the Employees' Cooperative of the Property Bureau 559916 Λ7 B7 9951pif.doc / 008 5. Description of Invention (β). In a preferred embodiment, the deposition of the high dielectric constant material is performed by an ALD-type deposition method, in which alternately added reactants will saturate the surface, and each cycle will leave no more than a single layer of dielectric.层 材料。 Layer material. More to the point, surface reactions of chemicals are alternately performed on the substrate. Each cycle includes at least two individual states, each of which is a saturated reaction that has a self-limiting effect. Therefore, the selected reaction is The agent is, in the best case, the amount of reactant that can be bonded to the surface is determined by the number of available positions and the physical size of the chemically adsorbed component (including the base). Since the remaining chemical agent has no reactivity and is self-limiting because the surface is added after adsorption, after the self-limiting reaction is completed, the unreacted chemical agent is removed from the reaction space and the substrate is exposed to the next reagent. When the adsorbed part of the chemical molecules supplied in each addition is not higher than a single layer, the substrate surface can reach the maximum coverage, and each subsequent addition will be formed in a similar self-limiting or self-terminating mode The surface reaction will be repeated until the desired thickness of the dielectric layer is obtained. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, it is best to use water vapor as a supply of oxygen to replace the root end in the previous addition action, because water vapor will hardly make a thin internal dielectric oxide layer below 300 degrees Celsius With further growth, the re-growth of oxides is an important key at the beginning of high dielectric constant deposition, because the oxidant may diffuse through several single layers of high dielectric constant materials and thin internal interface oxides. In the following examples, the addition of aluminum or doped gas contains 18 paper sizes that are applicable to the Chinese National Standard (CNS) A: 1 specification (210 X 297 public love) ~ " 559916 Λ7 Π7 9951pif.doc / 〇〇8 V. Description of the invention ((u (please read the precautions on the back before filling this page) will alternate with the addition of water vapor, during which the cleaning action will be performed. In a preferred embodiment, the second dielectric layer includes Al2O3 deposited by the reaction of methyl aluminum (TMA) with water. The deposition temperature of the high-dielectric S-constant material is preferably kept low enough to prevent the thickness of the internal dielectric layer from increasing, so The deposition of the dielectric constant material is preferably performed at a temperature lower than 400 ° C, more suitably it can be performed between 70-300 ° C, and most suitably it can be performed between 200-300 ° C. In one embodiment, the temperature during the deposition of the high dielectric constant dielectric is lower than the temperature at which the thermal oxidation reaction proceeds during the growth of the inner interface dielectric layer is 300 degrees Celsius, and the pressure during the process is preferably maintained at 1 ° C. T〇rr_80 Torr, more suitably about 10 T orr 〇 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. In one example, sand wafers will be placed in the reaction space of a PulsarTM 2000 reactor (purchased from ASM America, USA). This reactor is designed for The ALD process is performed before or after the internal interface oxide grows. The reaction space will be evacuated by a mechanical vacuum pump. After evacuation, the pressure in the reaction space will be purged with nitrogen with a purity of 99.9999%. Adjust to 5-10 mbar (absolute), then stabilize the reaction space at a temperature below 300 degrees Celsius, and alternately add gaseous phase trimethylaluminum and water vaporized from an external supply source to the reaction space to make it In contact with the surface of the substrate, each step of adding chemicals will be separated by passing in nitrogen. Each adding cycle consists of four basic steps: * Adding (ch3) 3ai This paper size applies Chinese National Standards (CNS) A4 gauge (210 X 297 mm) 559916 Λ7 B7 ^ _ Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 9951pif.d〇c / 008 Description of the invention (D) * Use n2 to clean • Join H2o Spring An example of a cycle for depositing alumina is shown in Table I. Table I · A1203 State Reactant Temperature (° c) Pressure (mbar) Time (sec) Add 1 TMA 300 5-10 0.2 淸 洁 1 — 300 5-10 1.1 Add 2 η2ο 300 5-10 1.5 Clean 2-300 5-10 3.0 The number of cycles can determine the thickness of the structural layer, at 300 ° C 'α203 formed by trimethylaluminum and water If the growth rate is normal, it is close to 0.1 nm / cycle or 1 angstrom / cycle, or about 3-4 cycles / a single layer (A1203 has a large lattice parameter of about 3 angstroms). Each time TMA is added, the methyl end is left in the self-limiting adsorption, so the number of positions that can be chemisorbed is reduced. The number of these positions will be less than the entire monolayer formed by each addition. These addition cycles will be repeated until it is generated. Up to a predetermined thickness, alumina can be used as the only high dielectric constant material in the gate dielectric, or a thin barrier layer when forming one or more other dielectric layers. In another design, the deposition of Zr02 is formed by an ALD process. ZrCl4 vapor is introduced into the reaction chamber and contacts the wafer surface for 1.5 seconds. This is the addition of A in Table II below; The reaction chamber was cleaned for 3.0 seconds. This is the clean room A. Then, water vapor was introduced into the reaction chamber and 20 ------------ φpack -------- order- -------- Line (Please read the precautions on the back before filling in this page) This paper size applies the Chinese National Standard (CNS) A4 gauge (21〇χ 297 mm) 559916 Λ7 B7, 951pif.doc / 008 5. Description of the invention ((S) (Please read the precautions on the back before filling this page) The wafer surface contacts for 3.0 seconds, which is the addition of B; clean the reaction chamber for 4.0 seconds to separate the remaining water with the reaction byproducts Remove, this is Bianjie B. In each reaction state, a sufficient amount of reactants will be supplied and other conditions are provided to make the surface saturated. Table II summarizes one of the high dielectric constant deposition cycles. Example 0 Table II ·· Zr02 state reactant temperature (° c) pressure (mbar) time (sec) Add A ZrCl4 300 5-10 1.5 Jie A • Two 300 5-10 3.0 with B h2o 300 5-10 3.0 Jie B —— 300 5-10 4.0 The average deposition rate at 300 degrees Celsius is about 0.59 Angstroms per cycle. The cycle consisting of adding A, 淸 Jie A, B, and 淸 Jie B can be repeated as many times as necessary until it reaches the predetermined thickness. Between 200-300 degrees Celsius, for ZK) 2 forming an amorphous system, the temperature is preferably between 200-250 degrees Celsius, and more suitably at about 225 degrees Celsius; for For a crystalline film, the temperature is preferably the highest in the range of about 250-300 degrees Celsius, and more suitably about 300 degrees Celsius. Those skilled in this art should know that at the junction of the two components, a mixture of amorphous and crystalline forms will form. This method mentioned above will form a mostly crystalline Zr02 film. In the above example, each time the metal monolayer formed by ZrCl4 is added, the paper size applies the Chinese National Standard (CNS) A4 (210x 297 cm) Λ7 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 559916 9951pif. doc / 008 V. Description of the invention (called) Self-terminated by chlorine without reacting with too much ZrCl4 under appropriate conditions. The proper oxygen source gas will react with or adsorb on the surface with chlorine at the oxygen supply stage. Thereupon, a radical exchange reaction limited by the previously adsorbed zirconium chloride compound is performed. The oxidation reaction will leave a hydroxyl-oxygen bridged end, and this end will not react further with too much oxidant in the saturated state. It is more appropriate to perform a sufficient number of cycles so that the thickness of the zirconia can grow to 20-60 angstroms, and more appropriate to perform a sufficient number of cycles to increase the thickness to 20-40 angstroms. The most appropriate thickness is 30 angstroms. The dielectric constant of this structure layer is between about 18-24. After the high dielectric constant dielectric is deposited, the deposited dielectric layer is selectively tempered to improve the quality of the structure layer. For example, the deposited dielectric layer can be subjected to a high temperature oxygen tempering to make the structure The layer crystallizes and fills any oxygen voids. These voids may leave a channel for metallic leakage. The tempering step can also be performed in the reactor, so as to explode or other uncomfortable with the remaining reactants. The possibility of the reaction is minimized, and the tempering is preferably performed under conditions that can prevent the internal interface oxide layer from growing. ALD method can also be used to deposit a high dielectric layer. The ALD method will use two metal compounds. One is an oxygen source material that will have a good reaction with the other metal compound, but it will not oxidize the substrate. There is disclosure in US Patent Application No. 09 / 687,355, filed on October 13, 2000, the disclosure of which is incorporated herein by reference. In this method, the surface of the substrate will alternate with a metal source material and a 22 paper size that applies to Chinese National Standard (CNS) A4 (210x 297 meals) (Please read the precautions on the back before filling this page)
559916 Λ7 9951pif.doc/008 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明（）ό) 氧源材料反應，其中氧源材料最好是一種金屬羥化物，一 種至少有一有機根基的金屬化合物，且其中的氧最少至少 與一個硼、矽、或金屬原子鍵結在一起，當金屬羥化物與 一個第二金屬化合物像是金屬鹵化物或經基金屬反應時， 可以作爲氧與金屬的來源，在此製程中可以沈積一種高介 電常數金屬氧化物而不會進一步的氧化到下層的基底，因 此內介面氧化層不會進一步的成長。 也可以在缺少氧氣的情況下直接沈積金屬前驅物來形 成高介電常數材料，這些金屬前驅物最好包括金屬與氧兩 種元素，因此不需要額外的氧就可以形成金屬氧化物。在 這個情況中，不使用氧化劑可以避免內介面氧化層進一步 的成長，較佳的金屬前驅物是有機金屬化合物，但是也可 以是易揮發的無水金屬氮化鹽類。 此外，高介電常數材料可以用金屬有機化學氣相沈積 法(MOCVD)來沈積，在這樣的MOCVD製程中，使用的氧 化劑在製程進行的那個溫度下並不會使內介面氧化層有進 一步的成長。 介電質沈積以後接著會在介電質堆疊結構上形成一層 電晶體閘極電極，其優點在於電極也可以臨場（in-situ)形 成，因此不僅介電質堆疊結構可以臨場形成，連在此較佳 實施例中形成電晶體閘極堆疊結構用到的反應器與方法都 可以臨場進行，因此內介面介電質的成長與第二高介電常 數介電質的沈積也可以臨場進行。理想上，不管晶圓淸潔、 介電層沈積、回火與形成電極的所有或任一步驟都可以臨 23 本紙張尺度適用中國國家標準（CNS)Al規烙（210x297公餐) {請先閱讀背面之注意事項再 -I · I I 本頁) II 訂·！ II !·線 0 559916 A7 9951pif.doc/008 H7 五、發明說明（>1 ) 場進行，也就是說可以在同一個反應室或是一連串的工具 中進行，而在各步驟之間不會暴露在空氣中。 雖然本發明已以一較佳實施例揭露如上，然其並非用 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，比如雖然實施例 提到的例子是鎖定在積體電路中形成閘極介電質，但熟習 此技藝者可以依照同樣的原則應用於其他方面，像是在電 容器的矽底下電極上形成一層高介電常數介電質，因此可 以是需要作出其他的組合、省略、替換與修改，因此本發 明之保護範圍當視後附之申請專利範圍所界定者爲準。 -------------裝--------訂---------線· (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS)A4規恪（210x 297公堃）559916 Λ7 9951pif.doc / 008 B7 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs. 5. Description of the invention ()) The reaction of oxygen source materials, where the oxygen source material is preferably a metal hydroxide, a metal with at least an organic radical Compounds, and at least the oxygen in them is bonded with at least one boron, silicon, or metal atom. When a metal hydroxyl compound reacts with a second metal compound such as a metal halide or via a base metal, it can be used as oxygen and metal. Source, a high dielectric constant metal oxide can be deposited in this process without further oxidation to the underlying substrate, so the internal interface oxide layer will not grow further. It is also possible to directly deposit metal precursors to form high dielectric constant materials in the absence of oxygen. These metal precursors preferably include two elements, metal and oxygen, so metal oxides can be formed without the need for additional oxygen. In this case, without the use of an oxidant, the further growth of the internal interface oxide layer can be avoided. The preferred metal precursor is an organometallic compound, but it can also be a volatile anhydrous metal nitride. In addition, high dielectric constant materials can be deposited using metal organic chemical vapor deposition (MOCVD). In such MOCVD processes, the oxidant used does not cause further oxidation of the internal interface layer at the temperature at which the process is performed. growing up. After the dielectric deposition, a layer of transistor gate electrode will be formed on the dielectric stack structure. The advantage is that the electrode can also be formed in-situ, so not only the dielectric stack structure can be formed in-situ, but also connected here. Both the reactor and the method used to form the transistor gate stack structure in the preferred embodiment can be performed in situ, so the growth of the internal interface dielectric and the deposition of the second high dielectric constant dielectric can also be performed in situ. Ideally, all or any of the steps of wafer cleaning, dielectric layer deposition, tempering, and electrode formation can be performed. 23 This paper size applies the Chinese National Standard (CNS) Al Regulation (210x297). {Please first Read the notes on the back again-I · II page) II Order! II! · Line 0 559916 A7 9951pif.doc / 008 H7 V. Description of the invention (> 1) Field operation, that is, it can be performed in the same reaction chamber or a series of tools, and will not be performed between steps. Exposed to the air. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and decorations without departing from the spirit and scope of the present invention. For example, although The example mentioned in the embodiment is to lock the gate dielectric in the integrated circuit to form the gate dielectric, but those skilled in the art can apply it to other aspects according to the same principle, such as forming a layer of high dielectric constant on the electrode under the silicon of the capacitor. Dielectrics, therefore, may require other combinations, omissions, replacements, and modifications. Therefore, the scope of protection of the present invention shall be determined by the scope of the appended patent application. ------------- Installation -------- Order --------- Line · (Please read the precautions on the back before filling this page) Ministry of Economy Wisdom The paper size printed by the Property Cooperative's Consumer Cooperative is subject to the Chinese National Standard (CNS) A4 (210x 297 cm)