TW536820B - A method of manufacturing an SOI (silicon on insulator) wafer - Google Patents

Abstract

This invention is to manufacturing of SOI (silicon on insulator) wafer; with the respect to manufacturing of SOI wafer, preparation process of silicon wafer with desired thickness (100), deposition of alumina (Al2O3) as insulator by an ALE (atomic layer epitaxial) method such as ALCVD, ALD, ASCVD, etc...(110), bonding of this wafer with another silicon wafer by various bonding methods (120), cutting of this bonded wafer by various methods of cutting (130), polishing the surface of the cut wafer (140). For the insulator material, titanium oxide (TiO2) or tantalum oxide (Al2O3) and such bonding process can be done by unibonding method and cutting method can be done by smart cut process.

Description

536820536820

發明背景 本發明係建議-種製造則(絕緣器切）晶圓的不同 方法’更特別地改良S0I晶圓之化學、機械及電氣特性以 多樣化該晶圓的結構及組合，並改良該等晶圓製造製程。BACKGROUND OF THE INVENTION The present invention proposes a different method of manufacturing wafers (insulator cuts) to more specifically improve the chemical, mechanical, and electrical characteristics of a SOI wafer to diversify the structure and combination of the wafer and Wafer manufacturing process.

曰日曰圓之絕緣器切的類型係廣泛用於晶圓製造製程 中。此製程係在該半導體晶圓之頂部上形成絕緣體， 在半導體裝置製造前形成一單晶矽層。 SOI晶圓已知提供積體元件的側向及垂直的分離，並 且提供該裝置較好的電氣特性。 上述的SOI晶圓，習用廣泛採用兩種不同的製程。其 中之-稱之為BE(銲接及餘刻）法，其係銲接二晶圓且向後 I虫刻兩者其一钱刻以製造一薄層。另一稱之為sm〇x(氧植 刀離）法其係將氧/未植入該石夕晶圓並藉由後植入熱處理 形成一埋入的氧化物及一薄層。 自動切割（Smart Cut)製程係藉由控制氫離子的能量 (深度）以控制膜厚度來植入氫離子（經絕緣體）至經氧化的 晶圓A中。此晶圓a接著銲接至另一個矽晶圓B。在隨後的 退火期間’經銲接的晶圓在經植入氫離子停止的部位分The type of insulator cutting is widely used in wafer manufacturing processes. In this process, an insulator is formed on the top of the semiconductor wafer, and a single crystal silicon layer is formed before the semiconductor device is manufactured. SOI wafers are known to provide lateral and vertical separation of integrated components and to provide better electrical characteristics of the device. The above-mentioned SOI wafers are widely used in two different processes. Among them-it is called BE (welding and rest) method, which is to weld two wafers and etch back one at the same time to make a thin layer. The other method is called smox (oxygen-knife-off) method, which involves implanting oxygen / non-implantation into the Shixi wafer and forming a buried oxide and a thin layer by post-implantation heat treatment. The Smart Cut process involves implanting hydrogen ions (via an insulator) into the oxidized wafer A by controlling the energy (depth) of the hydrogen ions to control the film thickness. This wafer a is then soldered to another silicon wafer B. During the subsequent annealing, the soldered wafers were separated at the sites where the hydrogen ion implantation stopped.

離。此分離導致一薄Si膜藉由一經埋入的氧化物從該晶圓B 分隔。最後’此法相對較其他如SIM0X法簡單，因此近來 被廣泛利用。 在如上述的自動切割技術中，述於美國專利第 5882987號中（絕緣膜上之薄膜半導體材料的自動切割製程） 的自動切割製程係請求利用CMP製程以解決有關於自動 本紙張尺度適用中國國家標準（CNS)人4規格（21〇χ297公楚） —Ιί 五、發明説明（2 ) 切割製程之不均句表面的問題及薄骐形成的問題。 (請先閲讀背面之注意事項再填寫本頁) 使〇2作為絕緣膜，該埋入絕緣體的厚度及品質 係以習用的技術（氧化）來控制。由於在乾氧環境下（見表4) 超的加熱所引起之化學特性的改變’此一控制並 不理想。 發明摘要 本發明係產生-排除所有有關已知問題的則晶圓。 本發明的目的在於改良該薄膜的特性以產生均句的表面結 構而不需要高製程溫度，並使該絕緣膜的種類多樣化。观 晶圓製造方法的新發明包括下列步驟： (100) 1備-設計好厚度與直徑㈣晶圓； (110)在該經製備的矽晶圓表面上藉由如ALCVD(原 子層化學汽相沉積）、ALD(原子層沉積）、ASC VD(原子規 模汽相沉積）等原子層蟲晶法形成氧化銘（A1203)絕緣層； (120)財種方法將此晶圓與另-(氧化或未氧化的） 矽晶圓銲接； (130)，以各種方法切割該等經銲接的晶圓之一； (140)拋光該晶圓的切割表面。 囷式簡要說明 本發明的這些及其他特徵、觀點以及優點將參照所附 圖式而變的更為理解，其中·· 續 第1圖係指該晶圓的部分側視圖，表示本發明的連 製造製程； 晶 第2圖係指由本發明之s〇I晶圓製造製程所完成之 本紙張尺度適用中國國家標準（CNS) Α4規格（2】0Χ297公酱） 536820 9沐如/⑼修正 補充 五、發明説明（3 ) 92年3月14日 A7 B7 第90126623號專利申請案說明書修正頁 圓的部分側視圖； 第3圖係解釋本發明之S0I晶圓製造製程的製程济^ 圖；以及 第4圖表示習用的Si02薄膜產生方法。 較佳具體實施例詳述 該系統配置及製造方法的基本概念藉由圖式進一步 詳細說明。 第1圖係指該晶圓的部分側視圖，表示本發明的連續 製造製程； κ 第2圖係指由本發明之S0I晶圓製造製程所完成之晶 圓的部分側視圖； 第3圖係解釋本發明之S0I晶圓製造製程的製程流程 圖；以及 第4圖表示習用的Si〇2薄膜產生方法。 本發明的特徵在於各種的方法係用於銲接及切割晶 圓，致使獲致利用如氧化鋁（Ah〇3)、二氧化鈦（Ti〇2)、氧 化组（Ta2〇5)等介電膜的類S0I結構。這些膜係容易由 ALCVD(原子層化學汽相沉積）所製造，同時較隨後電路積 體製程中的Si〇2膜具有較多的應用。依據本發明，除了習 用的自動切割製程之外，可用其他如BE(銲接及蝕刻）以及 Eltran(利用多孔矽分離）法。本發明利用氧化鋁取代以〇2， 同時利用原子層磊晶法取代習用的CVD製程或氧植入 法。氧化鋁非常容易用於製造薄膜，因為其較易延展且較 si〇2有較大的展性。此外，由於其較Si〇2為優秀的化學 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁)from. This separation results in a thin Si film being separated from the wafer B by a buried oxide. Finally, this method is relatively simpler than other methods such as SIMOX, and is therefore widely used recently. In the automatic cutting technology as described above, the automatic cutting process described in US Patent No. 5882987 (automatic cutting process for thin-film semiconductor materials on insulating films) requires the use of a CMP process to solve the problems related to automatic paper standards applicable to China. Standard (CNS) Person 4 Specification (21〇297297) — I. V. Description of the Invention (2) The problem of the uneven surface of the cutting process and the problem of the formation of thin slugs. (Please read the precautions on the back before filling in this page.) Using 〇2 as the insulating film, the thickness and quality of the buried insulator are controlled by conventional techniques (oxidation). The control of the change in chemical properties due to superheating in a dry oxygen environment (see Table 4) is not ideal. SUMMARY OF THE INVENTION The present invention is to create-exclude all wafers related to known issues. The object of the present invention is to improve the characteristics of the thin film to produce a uniform surface structure without requiring a high process temperature, and to diversify the types of the insulating film. The new invention of the wafer fabrication method includes the following steps: (100) 1-prepare the thickness and diameter of the wafer; (110) on the surface of the prepared silicon wafer by, for example, ALCVD (atomic layer chemical vapor phase) Deposition), ALD (atomic layer deposition), ASC VD (atomic scale vapor deposition) and other atomic layer worm crystal method to form the oxide layer (A1203) insulation layer; (120) financial methods this wafer and another-(oxidized or (Unoxidized) silicon wafer welding; (130) cutting one of the soldered wafers by various methods; (140) polishing the cut surface of the wafer. These and other features, viewpoints, and advantages of the present invention will be briefly explained with reference to the attached drawings, in which ... continued FIG. 1 is a partial side view of the wafer, showing the connection of the present invention. Manufacturing process; Crystal Figure 2 refers to the paper size completed by the soi wafer manufacturing process of the present invention is applicable to the Chinese National Standard (CNS) A4 specification (2) 0 × 297 male sauce 536820 9 3. Description of the invention (3) Partial side view of the revised page circle of A7 B7 Patent Application Specification No. 90126623 dated March 14, 1992; Figure 3 is a process chart explaining the SOI wafer manufacturing process of the present invention; and Fig. 4 shows a conventional method for producing a Si02 thin film. Detailed description of the preferred embodiment The basic concept of the system configuration and manufacturing method is further explained in detail by means of drawings. Figure 1 refers to a partial side view of the wafer, showing the continuous manufacturing process of the present invention; κ Figure 2 refers to a partial side view of the wafer completed by the SOI wafer manufacturing process of the present invention; Figure 3 is an explanation The process flow chart of the SOI wafer manufacturing process of the present invention; and FIG. 4 shows a conventional method for generating a SiO 2 film. The present invention is characterized in that various methods are used for soldering and dicing wafers, so that SOI-like materials using dielectric films such as alumina (Ah03), titanium dioxide (Ti02), and oxide group (Ta205) are obtained. structure. These films are easily manufactured by ALCVD (Atomic Layer Chemical Vapor Deposition) and have more applications than the Si02 films in the subsequent circuit integration process. According to the present invention, in addition to the conventional automatic cutting process, other methods such as BE (welding and etching) and Eltran (using porous silicon separation) can be used. In the present invention, alumina is replaced with O 2, and at the same time, the conventional CVD process or the oxygen implantation method is replaced with an atomic layer epitaxy method. Alumina is very easy to use for making thin films because it is more ductile and more malleable than SiO2. In addition, because it is an excellent chemistry compared to Si〇2, the paper size applies the Chinese National Standard (CNS) A4 specification (210X297 mm) (Please read the precautions on the back before filling this page)

536820 Α7 年修正 r—— B7 補无1 五、發明説明（4) 反應性使得較抗腐蝕。其他關鍵的優點為較佳的熱傳導性 以及更大的介電常數，其熱傳導性及介電常數分別約為二 氧化矽的1/2及12/3。 本發明建議之其他絕緣材料為二氧化鈦（Ti〇2)、氧化 鈕（1^〇5)、氧化铪（Hf〇2)等。它們的特徵已知不是相似就 是較氧化鋁（八丨2〇3)為佳。原子層磊晶（ALE)的一種方法係 原子層利用化學吸收及脫附來堆積以產生膜的製程。ale 法優先使用是因為利用表面飽和反應，藉由連續的沉積來 沉積所欲的材料，致使產生非常薄的膜，因此能獲致薄膜 厚度的精確控制。相較於習用的藍寶石上矽的材料，主要 差異為在藍寶石上的Si生長被取代（其有許多缺點），在本 發明中，氧化鋁在矽上生長。 藉由利用本發明所建議的方法，氧化鋁膜有可能在 700 C以下產生，其明顯低於Si〇2所需的1〇〇(rc，同時較 Si〇2膜少1〇〇〇倍的漏電率。 此外，由於氧化鋁膜的抗腐蝕特性，該膜的壽命增 加’同時也可能由於原子層精確控制變化膜的厚度而改^ 膜的特性。 以下係示範性具體實施例的詳細描述，同時僅為本發 明之-例示。其他概念及目的可自本發明衍生，且此等ς 生係包括於本發明的技術觀點中。 [具體實施例】 製程1 : (1〇〇)製備一設計好厚度與直徑的矽晶圓。 製程2 : 本紙張尺度適用中國國家標準（OJS) Α4規格（210X297公釐·） 先 閲 讀 背 面 之 注 意 事 項 再 填 寫 本 頁 訂 # 536820536820 Revised in Α7 r—— B7 Supplement No. 1 5. Description of the invention (4) Reactivity makes it more resistant to corrosion. Other key advantages are better thermal conductivity and a larger dielectric constant, which are about 1/2 and 12/3 of silicon dioxide, respectively. Other insulating materials proposed in the present invention are titanium dioxide (Ti02), oxide button (1 ^ 05), hafnium oxide (Hf02), and the like. Their characteristics are known to be either similar or better than alumina (BA203). A method of atomic layer epitaxy (ALE) is a process in which the atomic layer is deposited using chemical absorption and desorption to produce a film. The ale method is preferably used because the surface saturation reaction is used to deposit the desired material by continuous deposition, resulting in a very thin film, which can achieve precise control of the film thickness. Compared with the conventional silicon-on-sapphire material, the main difference is that Si growth on sapphire is replaced (which has many disadvantages). In the present invention, alumina is grown on silicon. By using the method proposed by the present invention, it is possible for the alumina film to be produced below 700 C, which is significantly lower than the 100 (rc) required for SiO2, and at the same time 10,000 times less than the SiO2 film. Leakage rate. In addition, due to the corrosion resistance of the aluminum oxide film, the life of the film is increased. At the same time, the characteristics of the film may be changed due to the precise control of the atomic layer to change the thickness of the film. The following is a detailed description of exemplary embodiments. At the same time, it is only an example of the present invention. Other concepts and purposes can be derived from the present invention, and these phytobiotics are included in the technical viewpoint of the present invention. [Specific Example] Process 1: (100) Preparation of a design Silicon wafer with good thickness and diameter. Process 2: The paper size is in accordance with the Chinese National Standard (OJS) Α4 specification (210X297 mm ·) Please read the precautions on the back before filling in this page to order # 536820

發明説明 二：經由如ALCVD(原子層化學汽相沉積）、 ALD(原子層沉積）、ASCVD(原子規模汽相沉積）等从 (請先閲讀背面之注意事項再填寫本頁) ί 晶)製程在該晶圓的上方產生-氧化銘膜(或其他介 製程3 : ⑽）、經由單邊銲接或其他銲接方法將具有氧化銘 絕緣體的晶圓與矽晶圓（氧化或未氧化的）銲接。 製程4 : 鮮接；；=Γ。自動切割法或其他切割方法切割該等經 製程5 : (140)拋光該經銲接晶圓的切割表面使主平 製程6 : (150)將獲得-個能投放到光罩、_ 圓成品。 /曰曰 此了製造SOI晶圓的新方法係利用氧化鋁、二氧化鈦 或其他氧化物取代Si〇2作為絕緣體。該等新的s〇l晶圓可以 少於SK32製程所需之熱的三分之二來製造。藉此可獲得成 本降低以及Si膜與埋入介電材料（高溫導電率及介電常 數、良好品質之Al2〇3介面等等）較佳的特性。 此一新的製造方法中，相較於以02其漏電可降低10⑻ 倍以上，因此在電氣特性及適應性獲得明顯的改進。 此外，在設計應用及較長壽命方面的改進可藉由利用 ALCVD(原子層化學汽相沉積）製程的能力來控制原子位 階以及高破壞電壓。 對於熟習此技術者而言，在本發明中不需背離本發明 的精神或範圍，各種的控制以及變化為顯而易見的。因此 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公复） 536820 A7 B7 五、發明説明（6 ) 本發明嘗試涵蓋本發明所附申請專利範圍及其等效物的範 圍所提供的控制以及變化。 (請先閲讀背面之注意事項再填寫本頁) 元件標號對照 SW 砍晶圓 AL 鋁 SWZ 具絕緣體之矽晶圓 100 製程 110 製程 120 製程 130 製程 140 製程 150 製程 本紙張尺度適用中國國家標準（CNS) A4規格（210X297公釐） 9Description of Invention 2: Through (such as ALCVD (Atomic Layer Chemical Vapor Deposition), ALD (Atomic Layer Deposition), ASCVD (Atomic Scale Vapor Deposition), etc.) (Please read the precautions on the back before filling this page) Crystal) process An oxide film (or other intermediary process 3: ⑽) is generated on the wafer, and the wafer with the oxide insulator is soldered to the silicon wafer (oxidized or unoxidized) through single-sided welding or other welding methods. Process 4: Fresh connection; = Γ. Automatic cutting or other cutting methods cut these processed processes 5: (140) Polish the cut surface of the soldered wafer so that the main flat process 6: (150) will obtain a finished product that can be put into a photomask and a circle. The new method for manufacturing SOI wafers is to use alumina, titania or other oxides instead of SiO2 as an insulator. These new SOI wafers can be manufactured with less than two-thirds of the heat required for the SK32 process. In this way, cost reduction and better characteristics of the Si film and the buried dielectric material (high temperature conductivity and dielectric constant, good quality Al203 interface, etc.) can be obtained. In this new manufacturing method, the leakage current can be reduced by more than 10 times compared with 02, so the electrical characteristics and adaptability are significantly improved. In addition, improvements in design applications and longer life spans can be used to control atomic levels and high breakdown voltages by utilizing the capabilities of the ALCVD (atomic layer chemical vapor deposition) process. For those skilled in the art, various controls and changes are obvious in the present invention without departing from the spirit or scope of the present invention. Therefore, this paper size applies the Chinese National Standard (CNS) A4 specification (210X297 public copy) 536820 A7 B7 V. Description of the invention (6) The present invention attempts to cover the scope of control provided by the scope of the patents attached to the invention and its equivalents. And change. (Please read the precautions on the back before filling this page) Component number comparison SW cut wafer AL aluminum SWZ silicon wafer with insulator 100 process 110 process 120 process 130 process 140 process 150 process This paper size applies Chinese national standards (CNS ) A4 size (210X297 mm) 9

Claims (1)

I 536820 A8 ^ B8 °(\sf / _ C 8 ' ' 一 ------...............'，：V - 六、申請專利範圍 丨· -種製造SOI(絕緣器上石夕）晶圓的方法，包含下列步驟： 製備一設計好厚度與直徑的矽晶圓； 在該經製備的矽晶圓表面上藉由如ALCVD、 ALD、ASCVD等原子層1晶法（ALE)形成氧化|g(A1203) 或其他介電材料的絕緣層； 以各種銲接方法將此晶圓與另一（氧化或未氧化的） 矽晶圓銲接； 以各種方法切割該等經銲接的晶圓； 拋光該晶圓的切割表面。 2·如申明專利範圍第1項之方法，其中該絕緣膜層材料可 以二氧化鈦（Ti〇2)及氧化鈕（1^2〇5)取代氧化鋁 (A1 2〇3) 〇 〇 3·如申請專利範圍第W之方法，其中該銲接製程可為一 單邊銲接法。 4.如申請專利範圍第㈣之方法，其中該切割製程為一自 動切割（Smart Cut)法。I 536820 A8 ^ B8 ° (\ sf / _ C 8 '' A ------............... ',： V-VI. Patent Application Range 丨 ·-- A method for manufacturing an SOI (Ishiki On Insulator) wafer includes the following steps: preparing a silicon wafer having a designed thickness and diameter; and using a surface such as ALCVD, ALD, ASCVD, etc. on the prepared silicon wafer. Atomic layer 1 crystal method (ALE) to form an insulating layer of oxidized | g (A1203) or other dielectric materials; solder this wafer to another (oxidized or unoxidized) silicon wafer by various soldering methods; solder by various methods Cutting the soldered wafers; polishing the cut surface of the wafers 2. The method of claim 1 of the patent scope, wherein the insulating film material can be titanium dioxide (Ti02) and oxide button (1 ^ 2〇 5) Substitute alumina (A1 203) 〇03. If the method of the scope of patent application is W, the welding process may be a one-sided welding method. 4. If the method of the scope of patent application ㈣, the cutting The process is a Smart Cut method. 裝 訂 禮Binding gift 10 536820 第90126623號專利申請案圖式修正頁92年03月14曰 第3圖10 536820 Patent Application No. 90126623 Schematic Correction Page March 14, 1992 Issue 3 ▼▼