TW522304B - Portable multi-channel real-time processing system - Google Patents
Portable multi-channel real-time processing system Download PDFInfo
- Publication number
- TW522304B TW522304B TW88123368A TW88123368A TW522304B TW 522304 B TW522304 B TW 522304B TW 88123368 A TW88123368 A TW 88123368A TW 88123368 A TW88123368 A TW 88123368A TW 522304 B TW522304 B TW 522304B
- Authority
- TW
- Taiwan
- Prior art keywords
- processing system
- portable multi
- digital
- time processing
- scope
- Prior art date
Links
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
Description
"' 會- 妒樣4/ #_^..资\±-0 經濟部智慧財產局員工消費合作社印製 522304 A7 ___B7 __:------ _________ 五、發明說明(/ ) ㈠發明技術領域: 本發明係有關於一可攜型多通道S瞬處理系統,可運用 於水下通訊以及方位估側之技術中。 (二潑明技術背景: 有關於目前一般水中訊號處理裝置之相關技術,通常係 採用聲納系統,然而在聲納系統中,對於應用感測器陣列的 訊號處理一直是很重要的部分。於設計水中通訊系統之接收 器時,都是採用現成微處理器的模組,如德州儀器的EVM board、Starter kit等數位訊號處理器的現成模組。在通訊過程 中,都是以調變後的類比訊號傳送;是以,在接收系統中’ 需將類比訊號轉換成數位訊號,以供微處理器做訊號處理或 演算,所以需要A/D轉換器做前置的訊號轉換,如NI公司 的Labview board或PC+ board或其它A/D轉換器介面卡等等。 然而,以此微處理器的模組和A/D轉換器所製作的系統 將會有下列之缺點: 1. 價格昂貴: 目前市面上所販售的A/D轉換器之介面卡在技術上需同 時處理類比和數位兩號,且因需同時處理多通道的類比訊 號和強大的介面軟體,所以價格昂貴,不符合實際使用。 2. 攜帶不便: 不論是微處理器模組或是A/D轉換器而言,都需和電腦連 線才能工作。然而在實地環境應用時,例如在深水之中, 2 C請先聞讀背面I涑意事頊存填寫本頁) -----------------^ _ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 A7 B7 I發明說明(>) 或是在海洋裡,都是極爲不便。 3·習用系統爲非獨立模組,無法做即時(Realtime)訊號處理: 由於微處理器和A/D轉換器是各別獨立運作,而非裝置在 同一t旲組,所以需先將所接收的訊號經由轉換器的轉 換作用’將轉換後的數位資料儲存至磁片中,再由微處理 器處理此一資料,如此,則無法做訊號的即時處理。 4.習用系統非爲一整合系統,操作過程費時費力: 由於習用系統乃非一整合系統,所以操作過程中需工作在 多種的軟體環境下,不僅費時且費力。 5.規格和功能不儘相符: 訂---------線在 目前市售之A/D轉換器的規格和功能不符合感測器陣列 之需求,並且數位訊號處理器的模組在擴充上較不容易, 無法滿足現今多通道即時處理之需求。 緣此,我們可以得知目前技術乃受限於市面上的數位訊 咸處理益和A/D轉換器的功能和規格,無法做一^有效的整 合,所以不能達到即時資料擷取和處理。如果持續使用現有 的數位訊號處理器和A/D轉換器,則對於水下通訊系統的 設計是無法實現的。惟有開發一套體積小、重量輕、獨立運 作、多通道、高取樣率、即時資料擷取以及處理系統,才能 運用於各種不同的環境下,進而成爲一套真正的可攜性即時 多通道訊號處理系統。" 'Will-Envy 4 / # _ ^ .. 资 \ ± -0 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 522304 A7 ___B7 __: ------ _________ 5. Description of the Invention (/) ㈠ Invention TECHNICAL FIELD: The present invention relates to a portable multi-channel S transient processing system, which can be used in underwater communication and azimuth estimation technology. (Erbomine technology background: Related to the current general underwater signal processing equipment related technology, sonar systems are usually used, however, in sonar systems, the application of sensor array signal processing has always been an important part. When designing the receiver of the underwater communication system, all the modules using off-the-shelf microprocessors, such as Texas Instruments' EVM board, Starter kit and other digital signal processors. Analog signal transmission; therefore, in the receiving system, the analog signal needs to be converted into a digital signal for the microprocessor to perform signal processing or calculation, so an A / D converter is required to perform pre-signal conversion, such as NI Corporation Labview board or PC + board or other A / D converter interface cards, etc. However, the system made with this microprocessor module and A / D converter will have the following disadvantages: 1. Expensive: At present, the interface cards of A / D converters sold on the market need to process analog and digital numbers at the same time, and because they need to process multi-channel analog signals and powerful interface software at the same time, It is expensive and is not suitable for practical use. 2. Inconvenient to carry: Whether it is a microprocessor module or an A / D converter, it must be connected to a computer to work. However, in field applications, such as in deep water Among them, 2 C, please read the back I first (I want to save it and fill in this page) ----------------- ^ _ This paper size applies to China National Standard (CNS) A4 Specifications (210 X 297 mm) 522304 A7 B7 I Description of the invention (>) or in the ocean, it is extremely inconvenient. 3. The conventional system is a non-independent module and cannot be used for real-time signal processing: Since the microprocessor and the A / D converter operate independently, not the devices are in the same group, so the received data must be received first. The converted signal's digital signal is stored in the magnetic disk by the conversion function of the converter, and then this data is processed by the microprocessor. In this way, the signal cannot be processed in real time. 4. The custom system is not an integrated system, and the operation process is time-consuming and labor-intensive: Since the custom system is not an integrated system, it needs to work in a variety of software environments during operation, which is not only time-consuming and labor-intensive. 5. Specifications and functions do not match: Order --------- The specifications and functions of the A / D converter currently on the market do not meet the requirements of the sensor array, and the module of the digital signal processor It is not easy to expand the group, which cannot meet the current multi-channel real-time processing requirements. For this reason, we can know that the current technology is limited by the functions and specifications of digital signal processing and A / D converters on the market, and cannot be effectively integrated, so real-time data acquisition and processing cannot be achieved. If the existing digital signal processor and A / D converter are continuously used, the design of the underwater communication system cannot be realized. Only by developing a small size, light weight, independent operation, multi-channel, high sampling rate, real-time data acquisition and processing system, can it be used in a variety of different environments, and then become a truly portable real-time multi-channel signal Processing system.
本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 A7 五、發明說明(j ) (三)發明之簡要說明: 本發明係有關於一可攜型多通道即時處理系統,主要係 藉由一數位訊號處理器和一 A/D轉換器等二大系統的整合設 計,才能成爲一真正的即時訊號處理系統。關於水中訊號處 理的裝置通常爲聲納系統,在聲納系統中,應用感測器陣列 的訊號處理一直是很重要。其中感測器陣列負責接收來自各 方向的聲波訊號來做訊號處理,所以多通道的A/D轉換器對 於訊號處理的準確度和多訊號源的估測和追蹤是很重要的。 本發明主要是設計、發展一可攜型多通道即時處理系 統,將均勻線性感測器所接收的訊號,傳送至本發明系統中 / A/D 訊號,送至數位訊號處理器進行即時 處理和運算,可運用在訊號源方位估測、追蹤,束波器等通 訊領域。 本系統在硬體設計上,具有下列的功能和特性: i 1·系統爲一即時、獨立運作的系統,不需和個人電腦連 線’輕便,體積小,利於攜帶,應用於實際環境。 2·大容量的RAM,便於演算法的運算和大量資料的儲 存。 3·大容量的ROM,便於程式的儲存。 4·多通道、高解析度、高取樣率的A/D轉換器的設計, 使得資料處理的精確度較高、應用範圍廣。 5·系統可以和個人電腦做一連線。 6·介面裝置顯示的設計,便於使用者掌握資料處理結果 或內部狀態。 4 (請先閱讀背面之注意事項再填寫本頁) 一5J· 11 11 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 522304 A7 V. Description of the invention (j) (3) Brief description of the invention: The invention relates to a portable multi-channel instant processing system It is mainly through the integrated design of two major systems, such as a digital signal processor and an A / D converter, that it can become a real real-time signal processing system. The device for signal processing in water is usually a sonar system. In sonar systems, signal processing using sensor arrays has always been important. The sensor array is responsible for receiving acoustic signals from various directions for signal processing, so the multi-channel A / D converter is very important for the accuracy of signal processing and the estimation and tracking of multiple signal sources. The invention mainly designs and develops a portable multi-channel real-time processing system, which transmits the signal received by the uniform line sensor to the system of the invention / A / D signal, and sends it to the digital signal processor for real-time processing and Computing can be used in communication fields such as signal source azimuth estimation, tracking, beam wave device and so on. The hardware design of this system has the following functions and features: i 1. The system is a real-time, independent system that does not need to be connected to a personal computer. It is lightweight, small in size, easy to carry, and used in practical environments. 2. Large-capacity RAM is convenient for algorithm calculation and storage of a large amount of data. 3. Large-capacity ROM for easy storage of programs. 4. The design of the multi-channel, high-resolution, high-sampling A / D converter makes the data processing accuracy higher and the application range wider. 5. The system can be connected to a personal computer. 6. The design of the interface device display is convenient for users to grasp the data processing results or internal status. 4 (Please read the notes on the back before filling out this page) 5J · 11 11 Printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs This paper applies Chinese National Standard (CNS) A4 specifications (210 X 297 mm) Ministry of Economic Affairs Printed by the Intellectual Property Bureau Staff Consumer Cooperative
發明說明() 爲了達成上述之目的,本發明中藉由結合一數位訊號處 理器與多通道之A/D $專換器相整合,以符合一感測器陣列訊 號處理之要求,使得陣列訊號可以作即時處理。而於實際操 作時則是作爲訊號源方位之估側,並在軟體控制中係採用一 般化膨脹演算法執行估側雜訊子空間。不僅可大量降低其程 式計算量,且具有高收斂性與準確度。在國防運用上,則本 發明可以有效偵測目前最快之核子潛艇之方位者。 (四)圖式之簡要說明: 圖一係爲本發明所提出之可攜型多通道即時處理系統 之主要系統硬體線路方塊圖。 圖二係爲本發明所述之可攜型多通道即時處理系統 中,藉由組合語言所撰寫之配合硬體的系統軟體程 式架構圖。 圖三係爲本發明中所使用之被動式均勻線性感測器陣 列之空間延遲情形示意圖。 圖四係爲本發明所使用之一般化膨脹演算法之架構示 意圖。 圖五係爲本發明所述之可攜型多通道即時處理系統 中,針對圖三所述電路方塊之進一步電路方塊連接 圖。 (請先閱讀背面之注意事項再填寫本頁) 訂---------· 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 A7 B7 織讀委員明示々//手1Γ日所提之 五、發明說明(/ ) 圖號說明: 20數位訊號處理器 22類比/數位轉換器 24通訊串列埠 26隨機存取記憶體 40主程式 43最小均方演算法 45顯不程式 201中央處理單元 203記憶體介面 | 220同步取樣保持電路 224主動濾波器 270外部唯讀記憶體 21解碼器 23顯耶器 25硬體模擬器 27唯讀記憶體 42類比數位轉換程式 44串列纟阜程式 46訊號源方位估側程式 202匯流排介面及第一計時器 204第0計時器及串列埠介面 222放大器 260外部隨機存取記憶體 經濟部智慧財產局黃工消費合作社印製 (五)發明詳細說明·· 本發明係爲一種可攜型多通道即時處理系統,主要係藉 由將數位訊號處理器與A/D轉換器二個大系統之整合設 計,藉以成爲一可即時之處理系統。由於本發明主要係運用 於水中之訊號處理系統,而於水中之訊號處理裝置主要係採 用聲納系統,而在聲納系統中,關於應用感測器陣列之訊號 處理係爲非常重要之技術。緣此,本發明主要是設計、發展 出一可攜型多通道即時處理系統,可將均勻線性感測器所接 收的訊號,傳送至本系統之類比數位(A/D)轉換器轉成數位 6Explanation of the invention () In order to achieve the above-mentioned object, in the present invention, a digital signal processor is integrated with a multi-channel A / D $ special converter to meet the requirements of a sensor array signal processing, so that the array signal Can be processed instantly. In actual operation, it is used as the estimation side of the signal source orientation, and in software control, a generalized expansion algorithm is used to perform the estimation side noise subspace. Not only can it greatly reduce the amount of program calculation, but also it has high convergence and accuracy. In national defense applications, the present invention can effectively detect the position of the fastest nuclear submarine at present. (4) Brief description of the drawings: Figure 1 is a block diagram of the main system hardware of the portable multi-channel real-time processing system proposed by the present invention. FIG. 2 is a system software program structure diagram of a portable multi-channel real-time processing system according to the present invention, which is composed of a combination of hardware and hardware. Figure 3 is a schematic diagram of the spatial delay of the passive uniform linear sensor array used in the present invention. Figure 4 is a schematic diagram of the generalized expansion algorithm used in the present invention. Fig. 5 is a further circuit block connection diagram for the circuit block described in Fig. 3 in the portable multi-channel real-time processing system according to the present invention. (Please read the precautions on the back before filling this page) Order --------- · This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 522304 A7 B7 々 // Hand 1 Γ mentioned on the fifth day, description of the invention (/) Description of drawing number: 20 digital signal processor 22 analog / digital converter 24 communication serial port 26 random access memory 40 main program 43 minimum mean square calculation Method 45 display program 201 central processing unit 203 memory interface | 220 synchronous sample and hold circuit 224 active filter 270 external read-only memory 21 decoder 23 display device 25 hardware simulator 27 read-only memory 42 analog digital conversion Program 44 serial program program 46 signal source orientation estimation program 202 bus interface and first timer 204 0th timer and serial port interface 222 amplifier 260 external random access memory Ministry of Economic Affairs Intellectual Property Bureau Huang Gong consumption Printed by the cooperative (5) Detailed description of the invention ... The present invention is a portable multi-channel real-time processing system, which is mainly designed by integrating the two major systems of digital signal processor and A / D converter to become Immediately The processing system. Since the present invention is mainly applied to a signal processing system in water, and a signal processing device in water mainly uses a sonar system, in the sonar system, a signal processing system using a sensor array is a very important technology. For this reason, the present invention is mainly designed and developed a portable multi-channel real-time processing system, which can transmit the signal received by the uniform line sensor to the analog digital (A / D) converter of this system and convert it into digital 6
本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 烤'47'「.,;-;;:./ ' 珍1!1本有無變更|;-(梦 經濟部智慧財產局員工消費合作社印製 A7 五、發明說明(L) 訊號,送至數位訊號處理器進行即時處理和運算’可運用在 水下訊號源方位估測、追蹤,束波器等通訊領域。 本發明所述之可攜型多通道即時處理系統的硬體線 路,煩請參閱圖一,圖一所示係爲本發明所提出之可攜型多 通道即時處理系統之主要系統硬體線路方塊圖。其中主要係 包括有一數位訊號處理器20,於本發明實施中係採用一最新 型之32位元,浮點式數位訊號處理器,例如可以採用德州 儀器公司最新一代的TMS320C32-50爲設計核心。具有價格 便宜、高執行效率、較大彈性的記憶體設計以及強大的外部 週邊裝置等優點。關於本發明所使用之振盪器(Osdllator)主要 係採用一 40 MHz的振盪器,每一時脈週期爲25 ns,整個系 統的執行效率爲:指令週期爲50ns、每秒可執行20百萬的 指令(20 MPIS)、每秒可執行40百萬的浮點運算(40 MFL0PS) 等。 圖一中亦揭露有一硬體模擬器(Emulator)25,其作用係 使設計者在軟、硬體的除錯、追蹤工作更容易、方便,以縮 .短硏發的時間。所以此一電路的設計需符合德州儀器硬體模 擬器的規格,當連接器和數位訊號處理器的距離過長時,則 需在加上緩衝器(buffer),以避免扇出(fan out)功率的不足。 此外,圖一中包括有一類比數位轉換器(A/D Converter)22, 係將感測器陣列所接收的類比訊號轉換成數位訊號,送至該 數位訊號處理器20做處理,所以電路是可藉由A/D轉換器 與一濾波器以及一取樣保持電路所組成。關於所述之類比數 位轉換器22之主要電路特點如下: 7 1..------------- 丨IT---------線 (請先閱讀背面之注意事項再填寫本頁) 太紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 A7 _B7_- 五、發明說明(7) (1)係爲多通道、高解析度、高取樣率的M)轉換器,其寶 施例中係以八通道爲實施例。 、This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 522304 Grilled '47' ".,;-;;: ./ 'Zhen 1! 1 This book has no changes | ;-( Dream Ministry of Economy Wisdom Printed A7 by the Consumer Cooperative of the Property Bureau V. Invention Description (L) signal is sent to a digital signal processor for real-time processing and calculation. It can be used in the field of underwater signal source azimuth estimation, tracking, beam wave and other communication fields. Please refer to FIG. 1 for the hardware circuit of the portable multi-channel real-time processing system according to the invention. FIG. 1 is a block diagram of the main system hardware circuit of the portable multi-channel real-time processing system according to the present invention. It mainly includes a digital signal processor 20. In the implementation of the present invention, a latest 32-bit, floating-point digital signal processor is used. For example, Texas Instruments' latest generation TMS320C32-50 can be used as the design core. It has the advantages of cheap price, high execution efficiency, relatively flexible memory design, powerful external peripheral devices, etc. As for the oscillator (Osdllator) used in the present invention, a 40 MHz oscillator is mainly used, One clock cycle is 25 ns, and the execution efficiency of the entire system is: the instruction cycle is 50 ns, 20 million instructions per second (20 MPIS) can be executed, 40 million floating point operations per second (40 MFL0PS) can be performed, and so on. Figure 1 also reveals a hardware simulator (Emulator) 25, whose function is to make it easier and more convenient for designers to debug and track software and hardware, so as to shorten the time for short bursts. So this circuit The design must meet the specifications of the Texas Instruments hardware simulator. When the distance between the connector and the digital signal processor is too long, a buffer must be added to avoid the lack of fan out power. In addition, Figure 1 includes an analog-to-digital converter (A / D Converter) 22, which converts the analog signal received by the sensor array into a digital signal and sends it to the digital signal processor 20 for processing, so the circuit can be used. It is composed of an A / D converter, a filter and a sample-and-hold circuit. The main circuit characteristics of the analog-to-digital converter 22 are as follows: 7 1 ..------------ -丨 IT --------- line (please read the precautions on the back before filling this page) The paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 522304 A7 _B7_- V. Description of the invention (7) (1) Multi-channel, high resolution, high sampling rate M) converter The eighth channel is taken as an example in its Bao example.
無:no:
濟 部Ministry of Economic Affairs
產 ⑵八個通道同步取樣保持取樣電路,降低演算法軟體的壤 寫困難度。 N ⑶濾波器的設計可以降低雜訊的干擾,提高演算法的準趣 度。 對於所述之類比數位轉換器而言,於本發明實施例中, 係可以採用Analog Devices公司生產的AD7891,在電路設言十 上則是同時使用二顆AD7891,此部分電路有下列之特性: (1)使用八組類比訊號輸入通道。 ⑵類比訊號輸入電壓範圍爲±10伏特。 (3)逐次比較型M)轉換器,並且爲高轉換率,每一通道的 轉換率爲1〇〇 bps。 ⑷採用12位兀的解析度,且以並列(parallel)模式輸出數位 訊號。 (5)使用5伏特單電源的設計,耗電量較小(85 mW) 〇 另一方面,圖一中亦包括有一顯示器23之週邊裝置, 係爲採用一液晶顯示器(Liquid Crystal Display; LCD)作爲螢 幕顯示。設計上可安裝文字型LCD和圖形式LCD,但目前 所裝置的是16*2文字型LCD,每排16個字,共有2排。所 顯示的爲系統的初始畫面和經由演算後的源號源方位。 於所述之週邊裝置中,亦包括有一通訊串列埠(Serial Port)24,主要係執行遠距離的資料傳送。而遠距離之傳送都 是先將資料轉換成串列資料,以輸送線傳送。在接收端則將Produces eight channels of simultaneous sampling and holding sampling circuits, which reduces the difficulty of writing algorithm software. The design of the ND filter can reduce the noise interference and improve the quasi-interest of the algorithm. For the analog-to-digital converter, in the embodiment of the present invention, the AD7891 produced by Analog Devices can be used, and two AD7891s are used at the same time in circuit design ten. This part of the circuit has the following characteristics: (1) Use eight analog signal input channels. ⑵ Analog signal input voltage range is ± 10 volts. (3) The successive comparison type M) converter has a high conversion rate, and the conversion rate of each channel is 100 bps. ⑷ It adopts 12-bit resolution and outputs digital signals in parallel mode. (5) 5V single power supply design, low power consumption (85 mW). On the other hand, Figure 1 also includes a peripheral device with a display 23, which is a liquid crystal display (Liquid Crystal Display; LCD). As a screen display. Text LCD and graphic LCD can be installed in the design, but currently the device is a 16 * 2 text LCD with 16 characters in each row and a total of 2 rows. What is displayed is the initial screen of the system and the source position of the source number after calculation. The peripheral device also includes a serial port 24, which mainly performs long-distance data transmission. For long-distance transmission, the data is first converted into serial data for transmission on the transmission line. On the receiving side,
%%
本紙張尺度適用中國國家標準(CNS)A4規格(210 χ 297公爱) 522304 A7 B7 五、發明說明(X ) 此一串列資料轉換回並行的資料格式再處理。於設計本系統 之串列埠時,我們以軟體的撰寫修改傳送格式上的差異,則 該數位訊號處理器在傳送資料時,先將要傳送的8位元資料 高低位元加以調整,以符合RS232的資料傳送順序,以軟體 設定該數位訊號處理器的資料長度爲16位元,且在資料傳 送時先加上一低電位的起始位元,所傳送的資料格式就與 RS232之形式相同。本發明實施例中,我們使用一計時器產 生串列傳送時的時脈,可經由參數的設定而將傳輸的鮑率設 爲 4800 、 9600 、 19200 、 38400bps 。 此外,圖一中亦包括有一解碼器(Decoder)21,其主要工 作係作爲正確地驅動不同的感測裝置。於本發明系統中是以 可程式化陣列邏輯(Generic Array Logic; GAL)設計解碼器,該 GAL係爲一可程式之邏輯元件。主要係藉由AND閘或〇R 閘再由可規畫之連接結構所組成者,分別爲22V10和16V8, 以驅動LCD顯示器23和類比數位轉換器22。 針對上述本發明之系統在硬體設計上,乃係具有下列的 功能和特性: 1·系統爲一即時、獨立運作的系統,不需和個人電腦連線, 輕便,體積小,利於攜帶,應用於實際環境。 2·大容量的RAM,便於演算法的運算和大量資料的儲存。 3·大容量的ROM,便於程式的儲存。 4·多通道、高解析度、高取樣率的M)轉換器的設計,使 得資料處理的精確度較高、應用範圍廣。 5.系統可以和個人電腦做一連線。 9 (請先閱讀背面之注意事項再填寫本頁) tl--------- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) #-i':f < " 經濟部智慧財產局員工消費合作社印製 522304 A7 B7 五、發明說明(1) 6·介面裝置顯示的設計,便於使用者掌握資料處理結果或 內部狀態。 另有關於本發明所提出之軟體系統,則驅動程式係用以 控制整個系統的運作和操作的效率,所以程式的撰寫需配合 系統硬體的設計,才能使系統的運作效率和功能達到最佳 化。緣此,本發明所使用之軟體架構主要係藉由如圖二所示 之系統程式架構。 圖一所不顯不其爲一模組化之副程式連結示意圖,圖二 之中包括一主程式40,用以執行本發明所提出之演算法運 算,以及硬體之間的驅動控制。該主程式所相對應連結之副 程式’乃係配合該圖一所示之硬體設備所需求之程式。相關 副程式則進一步分爲類比數位轉換程式42,用以連接該類比 /數位轉換器22與該數位訊號處理器20之控制訊號。另有一 最小均方演算程式43與主程式40相連結,係執行演算法中 之可適性特徵子空間,簡化雜訊之空間計算過程而能夠降低 更多計算量。而前述之本發明所提出之一般化膨脹演算法, ,貝[J係爲一最小均方演算LMS之延伸。 圖二所示中亦包括有一串列埠程式44與主程式40相連 結,用以驅動如圖一所述硬體中的通訊串列埠24。於本發明 實施例中,主要係以RS232之串列通訊形式作爲傳輸媒介。 所以圖一所述之通訊串列埠24係爲RS-232之通用串列埠, 而圖二所示之串列埠程式44,則係用以驅動RS-232串列埠 者。 另有一顯示程式45與主程式40相連結,主要係配合圖 10 --\--------------------------- I <請先閱讀背面之注意事項再填寫本頁) _ 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 奮·" A7 B7 五、發明說明) 一所示之顯示器23而執行之驅動程式者。於本發明實施例 中係使用液晶顯示器(LCD),以作爲該顯示器23裝置。所以 圖二所示之顯示程式45即爲一驅動液顯75器之驅動程式。 此外,另包括有一訊號源方位估側程式46 〇該訊號源方位估 側(Direction〇f Arrival; D0A)之實施方式,主要係爲本發明中 使用一般化膨脹法用以建立雜訊子空間之方式,具有高收斂 性與準確度且能高速運算。 經由以上所述,關於本發明系統之驅動程式的特點則如 下所述: ⑴本發明之軟體程式使用C3X之組合語言(assembly)撰寫, 不僅在程式整體執行運算效率高,且在軟體的除錯也較 容易和方便。 ⑵程式運用副程式(subprogram)和模組(macro)的觀念撰寫,使 每一程式單純化、功能專一化,程式所佔記憶體空間和 執行效率最佳化。 (3)不同功能的驅動程式編寫在不同的檔案中,以方便修改和 除錯。 ⑷記憶體空間編寫在command檔,以便於記憶體位址的定址 和管理。 ⑶篸數編寫在问一^檔案中’以便篸敷的定義、修改、除錯。 (6)虛指令(directive)的運用,只要修改參數便可設定不同的 A/D換轉器的取樣率、取樣通道數和串列璋的傳送鮑率 (baudrate) ° ⑺驅動開機載入程式(Bootloader),將程式從ROM移至 11 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) --------訂--------- 經濟部智慧財產局員工消費合作社印製 522304 A7 B7 五、發明說明(丨丨) RAM,加快程式的執行速度 1 濟 部 智 慧 財 產 費 製 另一方面,針對本發明所提出一般化演算法而言,主要 係針對一訊號源方位之估側。緣此,我們將說明被動式感測 器陣列排列方式及應用於方位估測之數學表示法,以特徵結 構法進行方位估測需先已知訊號源數目,在訊號源數目未知 或不正確時,則方位估測將無法達到理想的效果。本發明在 硏究此問題時,即假設訊號源個數爲己知。 此外,以特徵結構爲基礎的演算法在演算過程中,需計 算陣列訊號的自相關矩陣並做特徵分解,在這兩個計算過程 中,需要龐大的計算量,所以運用最小均方演算法爲基礎的 方位估測,則可以有效的降低計算量。因此,我們也將對一 般化膨脹演算法(Generalized Inflation Method)做一探討。 首先,考慮一個全方向性感測器的被動式均勻線性陣列 (Uniform Linear sensors Array,ULA)當做接收端,接收訊號源 發射出的資料矩陣。假設由Μ個感測器所組成的均勻感測器 陣列,感測器間的距離爲D,介質的傳播速率爲c=f λ,接 收Ν個(Μ>Ν)位於遠場之穩態窄頻訊號源Sk(t),k=l,2,·..,Ν,以 及平均値爲零之可加性白色雜訊(additive white noise),由於訊 號源位於遠場,即入射波前到達感器陣列時可視爲平面波。 此點,煩請參閱圖三,圖三所示係爲一被動式均勻線性感測 器陣列之空間延遲情形示意圖。其中令感測器陣列左邊第1 個感測器爲參考感測器,則第m個感測器所接收之訊號爲: 12 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 閱 背 意 寫 I 訂 522304 A7 B7 d sinThis paper size applies the Chinese National Standard (CNS) A4 specification (210 χ 297 public love) 522304 A7 B7 V. Description of the invention (X) This series of data is converted back to a parallel data format for processing. When designing the serial port of this system, we used software to modify the differences in the transmission format. When the digital signal processor transmits data, it first adjusts the high and low bits of the 8-bit data to be transmitted to comply with RS232. In the data transmission sequence, the data length of the digital signal processor is set to 16 bits by software, and a low-potential start bit is added first during data transmission. The format of the transmitted data is the same as that of RS232. In the embodiment of the present invention, we use a timer to generate the clock for serial transmission. The baud rate of the transmission can be set to 4800, 9600, 19200, 38400bps through the setting of parameters. In addition, a decoder 21 is also included in FIG. 1, and its main function is to properly drive different sensing devices. In the system of the present invention, a decoder is designed with a programmable array logic (GAL), which is a programmable logic element. It is mainly composed of AND gates or OR gates and then a programmable connection structure, which is 22V10 and 16V8, respectively, to drive the LCD display 23 and the analog-to-digital converter 22. In terms of hardware design, the system of the present invention has the following functions and features: 1. The system is a real-time, independent system that does not need to be connected to a personal computer. It is lightweight, small in size, and easy to carry and apply. To the actual environment. 2. Large-capacity RAM is convenient for algorithm calculation and storage of a large amount of data. 3. Large-capacity ROM for easy storage of programs. 4. The design of a multi-channel, high-resolution, high-sampling M) converter makes the data processing more accurate and has a wider application range. 5. The system can be connected to a personal computer. 9 (Please read the precautions on the back before filling this page) tl --------- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper is in accordance with China National Standard (CNS) A4 (210 X 297) (Mm) # -i ': f < " Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 522304 A7 B7 V. Description of the invention (1) 6. The design of the display of the interface device is convenient for users to grasp the results of data processing or internal status. In addition, regarding the software system proposed by the present invention, the driver program is used to control the operation and operation efficiency of the entire system, so the writing of the program must cooperate with the design of the system hardware to achieve the best system operation efficiency and function. Into. For this reason, the software architecture used in the present invention is mainly a system program architecture as shown in FIG. Figure 1 does not show that it is a modular subroutine connection diagram. Figure 2 includes a main program 40 for performing the algorithm operation and the drive control between the hardware. The subroutine corresponding to the main program is a program required to cooperate with the hardware equipment shown in the figure 1. The related subroutines are further divided into analog digital conversion programs 42 for connecting the analog / digital converter 22 and the control signals of the digital signal processor 20. Another minimum mean square calculation program 43 is connected with the main program 40, which executes the adaptive feature subspace in the algorithm, which simplifies the spatial calculation process of noise and can reduce more calculations. In the aforementioned generalized expansion algorithm proposed by the present invention, [J is an extension of the LMS of a minimum mean square algorithm. Figure 2 also includes a serial port program 44 connected to the main program 40 to drive the communication serial port 24 in the hardware shown in Figure 1. In the embodiment of the present invention, the serial communication form of RS232 is mainly used as the transmission medium. Therefore, the serial port 24 described in FIG. 1 is a general-purpose serial port of RS-232, and the serial port program 44 shown in FIG. 2 is used to drive the RS-232 serial port. Another display program 45 is connected with the main program 40, which is mainly matched with Figure 10-\ --------------------------- I < Please read the notes on the back before filling in this page) _ This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) 522304 Fen " A7 B7 V. Description of the invention) The display 23 shown below 23 And the driver who runs it. In the embodiment of the present invention, a liquid crystal display (LCD) is used as the display 23 device. Therefore, the display program 45 shown in FIG. 2 is a driver program for driving the liquid crystal display 75. In addition, it also includes a signal source azimuth estimation side program 46. The implementation of the signal source azimuth estimation side (Direction OA Arrival; DOA) is mainly used in the present invention to use the generalized expansion method to establish the noise subspace Method with high convergence and accuracy and high-speed operation. Through the above, the characteristics of the driver of the system of the present invention are as follows: 软体 The software program of the present invention is written using C3X assembly language, which not only executes the calculation efficiently in the entire program but also debugs the software It is also easier and more convenient. ⑵Programs are written using the concepts of subprograms and macros, so that each program is simplistic and functional, and the program occupies memory space and optimizes execution efficiency. (3) Drivers with different functions are written in different files to facilitate modification and debugging. ⑷Memory space is written in the command file to facilitate the addressing and management of memory addresses. (3) The numbers are written in the question file ^ to facilitate the definition, modification, and error correction. (6) The use of virtual instructions (directive), as long as the parameters are modified, the sampling rate, number of sampling channels and serial transmission rate (baudrate) of different A / D converters can be set. (Bootloader), move the program from ROM to 11 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) -------- Order --------- Ministry of Economy Printed by the Intellectual Property Bureau employee consumer cooperative 522304 A7 B7 V. Description of the invention (丨 丨) RAM to speed up the execution of the program 1 Ministry of Economic Affairs intellectual property fee system On the other hand, for the generalized algorithm proposed by the present invention, the main It is an estimation side for the position of a signal source. For this reason, we will explain the arrangement of passive sensor arrays and the mathematical expressions used in azimuth estimation. The azimuth estimation using the feature structure method requires the number of signal sources to be known. When the number of signal sources is unknown or incorrect, Then the azimuth estimation will not achieve the desired effect. When the present invention investigates this problem, it is assumed that the number of signal sources is known. In addition, the algorithm based on the feature structure needs to calculate the autocorrelation matrix of the array signals and perform feature decomposition during the calculation. In these two calculation processes, a huge amount of calculation is required, so the minimum mean square algorithm is used as Basic azimuth estimation can effectively reduce the amount of calculation. Therefore, we will also discuss the Generalized Inflation Method. First, consider a passive Uniform Linear Sensor Array (ULA) of an omnidirectional sensor as the receiving end, and receive the data matrix emitted by the signal source. Assuming a uniform sensor array composed of M sensors, the distance between the sensors is D, the propagation rate of the medium is c = f λ, and the receiving N (M > N) is located in the steady-state narrow of the far field. Frequency signal source Sk (t), k = 1, 2, ..., N, and additive white noise with an average 値 of zero, because the signal source is located in the far field, that is, the incident wavefront arrives The sensor array can be regarded as a plane wave. At this point, please refer to Figure 3. Figure 3 is a schematic diagram of the spatial delay situation of a passive uniform linear sensor array. Among them, the first sensor on the left of the sensor array is a reference sensor, and the signal received by the m-th sensor is: 12 This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Centimeter) read the freehand I order 522304 A7 B7 d sin
經濟部智慧財產局員工消費合作社印製 五、發明說明(丨>) N jlmrtf ym = Σ^(Φ k—\ 上述公式中,Sk(t)表示爲第k個訊號源,1分必;而nrn(t)則 代表第m個感測器之可加性白雜訊。; 此外,爲了避免免柵瓣(grating lobe)現象,如取樣定理 中的混淆現象(aliasing effect)。因此,必需將感測器間擺設的 距離小於訊號源最大頻率的半波長。一般皆假設等於半波 長,即D= λ/2。如此,可將全部感測器的輸出,以矩陣方式 表不爲· Y(t)=AS(t)+N(t) 其中陣列所接收的資料包含有訊號源的頻率、方位、距離及 延遲因子,將我們接收到陣列的資料,藉由時間麵、相位 延遲,我們能由各種相關演算法的計算,估測出一些參數, 求得訊號源方位,即所謂方位估測。 此夕^,有關於方位估側之演算法,吾人亦以一多通道訊 號分類演算法(Multiple Signal Classification; MUSIC)而言作 說明。假設有N個彼此不同諷incorrelated)的穩態訊號源, 雜訊爲與訊號源獨立之高斯白雜訊。對Μ個線性感測器陣列 輸出Υ取其自相關矩陣R: R=E[YYh]Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs V. Invention Description (丨 >) N jlmrtf ym = Σ ^ (Φ k— \ In the above formula, Sk (t) is represented as the k-th signal source, and 1 point is required; Nrn (t) represents the additive white noise of the m-th sensor. In addition, in order to avoid grazing lobe phenomena, such as aliasing effect in the sampling theorem, it is necessary to The distance between the sensors is less than the half-wavelength of the maximum frequency of the signal source. Generally, it is assumed to be equal to the half-wavelength, that is, D = λ / 2. In this way, the output of all sensors can be expressed in a matrix manner as Y (t) = AS (t) + N (t) where the data received by the array contains the frequency, orientation, distance, and delay factor of the signal source. By receiving the data from the array, by time plane and phase delay, we The calculation of various related algorithms can estimate some parameters and obtain the signal source bearing, which is the so-called bearing estimation. In addition, there are algorithms for bearing estimation, and I also use a multi-channel signal classification algorithm. (Multiple Signal Classification; MUSIC). There are N steady-state signal sources that are different from each other, and the noise is a Gaussian white noise independent of the signal source. Take the autocorrelation matrix R of the M linear sensor array outputs: R = E [YYh]
=ADAh+g2I 其中D表示爲一訊號源自相關矩陣,而σ2表示爲一雜訊變異 數。之後,利用線性代數方式求得R矩陣之特徵値 (eigenvalue),λι ^ 又2^... Am 及 ADAMS特徵値,自相 13 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 Α7 Β7 經濟部智慧財產局員工消費合作社印製 五、發明說明(G) 關矩陣R是一厄米特矩陣(Hermitian matrix),再由厄米特矩 陣的特丨生,可得到R中對應相異特徵値之特徵向量必正交 (orthogonal),又因爲A爲全秩(M rank),即方向向量 ai,a2,...,aN 爲線性獨立(linear independent),使得 ADAH 之 (M-N)個的最小値爲零。由上式可得: Λ* + cr i = \,·…,N 71 i = N + 令VUV2,...,vN爲對應於R之前N較大特徵向量,則對於較小 之(M-N)個特徵値所相對應的特徵向量爲Vi,zWV+l,. 存 在有: Rv/= σ2ν/? ί=Ν+\,Ν+2,··,.,Μ =>(R-g2I) vz =0? /=麗,#+2”.··,Μ =>R-a2I = AD Ah =>(ADAh) V/ =0, i=N+lyN+2„.. .M A爲全秩,且D之元素皆不爲零,所以存在有 • V/=05 i=N+\,N+2,·…,Μ ΑΗν2·= ADAh + g2I where D represents a signal derived from the correlation matrix, and σ2 represents a noise variation. After that, use the linear algebra method to obtain the eigenvalue, λι ^ and 2 ^ ... Am and ADAMS characteristics 値, phase 13 (please read the precautions on the back before filling this page) Applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 522304 Α7 Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (G) The off matrix R is a Hermitian matrix, Based on the characteristics of the Hermitian matrix, it can be obtained that the feature vectors corresponding to the different features 値 in R must be orthogonal, and because A is M rank, that is, the direction vectors ai, a2, .. ., AN is linear independent, so that the minimum 値 of (MN) ADAH is zero. From the above formula: Λ * + cr i = \, · ..., N 71 i = N + Let VUV2, ..., vN be the larger eigenvector corresponding to N before R, then for the smaller (MN) The corresponding feature vector of each feature 为 is Vi, zWV + l,. There are: Rv / = σ2ν /? Ί = N + \, Ν + 2, ··,., M = > (R-g2I) vz = 0? / = 丽 , # + 2 ”. ·· , M = > R-a2I = AD Ah = > (ADAh) V / = 0, i = N + lyN + 2„ .. .MA is Full rank, and the elements of D are not zero, so there are • V / = 05 i = N + \, N + 2, ..., Μ ΑΗν2 ·
aN (請先閱讀背面之注意事項再填寫本頁) ---------IT--------- 即 其中Vn+i,vN+2,···,Vm所生成的空間與方向向量aj,j=l,...,N所 生成之空間係爲垂直,因此將VN+1,VN+2,.··,VM所生成之空間 稱爲雜訊子空間,由vl5v2,...,vN所生成之空間稱爲訊號子空 士祕誤p .安滴用中國國家標準(CNS)A4規格(210 X 297公釐) 經濟部智慧財產局員工消費合作社印製 522304 A7 B7 五、發明說明(ιψ) 間。令aN (Please read the notes on the back before filling this page) --------- IT --------- That is, Vn + i, vN + 2, ..., Vm generated The space generated by the vector and direction vector aj, j = l, ..., N is perpendicular, so the space generated by VN + 1, VN + 2, ..., and VM is called the noise subspace. The space generated by vl5v2, ..., vN is called the signal sub-empty secret p. Printed by Andi using the Chinese National Standard (CNS) A4 specification (210 X 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 522304 A7 B7 5. Description of the invention (ιψ). make
Es=[Vi?V2?...?Vn] Εν = [Vn+i,Vn+2, · · ·,Vm] 則特徵向量所生成之矩陣成爲: E = [Es|En] 並且 ehe = i 方向矩陣A與雜訊子空間En彼此正交,定義MUSIC之估 測頻譜則爲: 1Es = [Vi? V2? ...? Vn] Εν = [Vn + i, Vn + 2, · · ·, Vm] Then the matrix generated by the feature vector becomes: E = [Es | En] and ehe = i The direction matrix A and the noise subspace En are orthogonal to each other. The estimated spectrum defining MUSIC is: 1
PmUSIC (^) ~ """η 丨、~~7~τ α (β)ΕΝΕΝα{θ) 若將訊號源角度代入計算,即則卜氐户1,2,....,,則 PmuSIc( <9)的分母將趨近於零,所以PmuSIC( 0)在視圖上會有 峰値存在,其所對應之角度即爲訊號之方位。 於本發明之軟體程式實施例中,對於前述之最小均方法 LMS而言,其延伸之運算法乃採用一般化膨脹演算法,作爲 本發明之數位訊號處理器之運算模式以估側其訊號源方位 値。主要係在陣列訊號處理的應用上,將陣列接收到訊號的 自相關矩陣做特徵分解,分成訊號子空間跟雜訊子空間,利 用訊號子空間與雜訊子空間彼此正交的特性,求出我們所要 估測的角度。 然而’這些演算法中,必須計算陣列訊號的自相關矩陣 並做特徵分解’在這兩個計算過程中,需要龐大的計算量。 由於可適性膨脹演算法不需要計算陣列輸入向量相關矩 15PmUSIC (^) ~ " " " η 丨, ~~ 7 ~ τ α (β) ΕΝΕΝα (θ) If the signal source angle is substituted into the calculation, then the user 1, 2, ... ,,, Then the denominator of PmuSIc (< 9) will approach zero, so PmuSIC (0) will have a peak in the view, and its corresponding angle is the signal's orientation. In the embodiment of the software program of the present invention, for the aforementioned minimum average method LMS, the extended algorithm is to use a generalized expansion algorithm as the operation mode of the digital signal processor of the present invention to estimate its signal source. Orientation. Mainly in the application of array signal processing, the autocorrelation matrix of the signals received by the array is subjected to feature decomposition, divided into signal subspace and noise subspace, and the characteristics of signal subspace and noise subspace orthogonal to each other are used to obtain What we want to estimate. However, in these algorithms, it is necessary to calculate the autocorrelation matrix of the array signal and perform feature decomposition. In these two calculation processes, a huge amount of calculation is required. Since the adaptive expansion algorithm does not need to calculate the correlation moment of the array input vector 15
本紙張尺度適用中國國家標準(CNS)A4規格(21〇 x 297公釐) 522304 f 經濟部智慧財產局員工消費合作社印製 Α7 Β7 五、發明說明((/) 陣,並且不須使用Gram-Schmit正規化正交程序做特徵分 解,因此可大量降低計算量,且具有簡單平行化的型式。 關於一般化可適性膨脹演算法,係以權重化特徵子空間 的使用假設來適應的調整其權重,使其收斂至雜訊子空間, 並改良子空間之演算法用來追蹤非穩態訊號源。實際上爲可 適性膨脹演算法之延伸,它比可適性膨脹演算法有較好收斂 效果(performance)。由於運算時用到Gram-Schmidt正規化正 交程序(GSO.)需要很大的計算量,因此有人提出以可適性膨 脹法估測雜訊子空間的方式來降低計算量。 煩請參閱圖四,圖四所示係爲本發明所使用之一般化膨 脹法架構圖,其利用了 m個可適性PHR(PiSarenko5S Harmonic Retrieval)處理器。其中第二個線性組合器之資料向量X2(k) 可藉由膨脹起始向量XKk)及權重向量^可由下式來獲得: X2(^)=X1(^) + aWi(^l)yi(^) 其中α爲膨脹因子,其通式爲: X,(A:)=Xm(A:) + a WM(^1) y/-i(A:) z=2,3,. .",m .在第介次疊代,第_線性組合之輸出爲: y^)=W/H (hi )X 狀) 戶1,2,··. 第_線性組合器可適性更新的程序可由下兩式獲得: W/㈧=Wz (bl) - 2"雕)y严⑻ W, (k)=Wi\k) /\Win(k) Wi\k)]m 上兩式之W,·㈧中,利用迭代之方式即可進一步求得y,·㈧函 數之輸出値。其中當α =〇時,演算法變成原始LMS適應性 特徵子空間演算法,其須要正交化GSO·程序作運算。當α 16 (清先閱蟥背面之注意事項再填寫本頁) --------訂---------ΜΛΎ. 本紙張尺度適用中國國家標準(CNS)A4規格(210 χ 297公爱) 522304 五 A7 B7 發明說明(β) =1時,此演算法變爲可適性膨脹法;而一般化可適性膨脹演 算法其α < 1。如此,即爲本發明中軟體控制所使用之演算法。 爲了更淸楚地描述圖一所述之電路方塊,煩請參閱圖五 所述之本發明所述之可攜型多通道即時處理系統中,而爲針 對圖三所述電路方塊之進一步電路方塊連接圖。針對圖一所 述之類比數位轉換器22之相關連接電路而言,其中主要係 包括連接有主動濾波器224,該主動濾波器224於本發明實 施例中係採用八通道(8 Channel)的主動式RC濾波電路所完 成,而輸入端即爲接收一訊號源之類比訊號者;意即於本發 明本系統中有八組的一階主動高通濾波器,運算放大器是選 用OP470之1C,主要是將感測器所接收的信號做一前置非反 相放大。截止頻率則爲1.6kHz,用來抑制水中的低頻雜訊。 之後經由一放大器222將濾波後之訊號放大。於本發明系統 之實際電路則係以八通道(8 Channel)的0P放大器組成者。 放大後之訊號連接至一同步取樣保持電路(Synchronous Sample and Hold)220,以執行取樣及保持。本發明系統在設 計上是採用八通道類比數位(A/D)轉換器,爲了降低演算法撰 寫困難度,所以需做同步取樣和保持,設計時使用了 8顆 LF398,對同一時間所接收的類比訊號同步取樣和保持。1C LF398的最高轉換率爲250 kHz,取樣的速率則是由數位訊號 處理器20中的第0計時器所控制。 另一方面,圖五亦揭示該數位訊號處理器20中主要使 用之電路方塊,係包括有中央處理單元201,用以執行訊號 處理之演算法,以及控制週邊裝置所連接之訊號處理順序。 17 1—----------------^--------- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 522304 B7 五 奐屬&<* c).ci.r : 彳日Μ摄之 11.:*!..#ila 經濟部智慧財產局員工消費合作社印製 發明說明(π ) 所以該中央處理單元201連接控制一匯流排介面及第一計時 器202(Bus Interface and Timer 1),藉以執彳了匯流排連接之訊 號處理與計時功能。其中該第一計時器設計爲串列埠(serial port)的鮑率(baudrate)設定,用以調整串列璋和個人電腦傳送 資料的速率。 另該中央處理單元201連接一第0計時器與串列埠介面 (Timer 0 and Series Port Interface)204,以處理本發明系統中 所使用之RS-232串列埠之通訊連接協定。該第〇計時器之 設計爲取樣計時器使用,用以調整和設定類比訊號的取樣頻 率。 該中央處理單元201另連接控制一記憶體介面203,係 處理外部所連接之記憶體260、270的介面連接訊號。本發 明所使用之數位訊號處理器20(採用TMS320C32)的最大特 點就是有更強功能的外部記憶體介面,其外部資料記憶體的 寬度可爲8、16、32位元寬,而程式執行可從16、32位元寬 的外部記憶體執行。此項功能在設計時,使外部記憶體的設 計有較大的彈性。 所述之外部記憶體可以分爲兩個主要功能:其一爲程式 記憶體(Program Memory)之用,即爲外部唯讀記憶體270。在 設計時是使用AMD公司生產的Am29F010-70快閃記憶體 (flash memory),在設定上資料寬度(data width)爲32位兀’程 式記憶體的寬度則爲8位元,如此設計有下列之優點:1·只使 用一程式記憶體,可以縮小電路板的體積。2·資料寬度設計 爲32位元寬,程式執行時不會降低其準確度。3·只產生一燒 18 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS)A4規格(210 x 297公爱) 、Y〆. 經濟部智慧財產局員工消費合作社印製 522304 A7 B7 五、發明說明) 錄檔,在燒錄過程中較省時。 該外部記憶體之第二功能,係爲儲存資料記憶體(Data Memory)之用,即外部隨機存取記憶體260。設計時是使用 G-LINK 公司生產的 GLT710016 SRAM(static RAM),考慮程式 和資料的精確度,所以以二顆的GLT710016並聯的設計,使 得資料記憶體的規格爲64k*32位元,存取速度則爲20ns,所 以每一筆資料的存取或是程式的執行,都可以在C32的單一 指令週期50ns內執行完畢。 再者,於本發明所述之可攜型多通道即時處理系統中, 在設計上則是於唯讀記憶體ROM所燒入的程式載入該快閃 記憶體Flash RAM,該數位訊號處理器(C32) 20的接腳必須設 定在微電腦開機載入程式(Microcomputerbootloader)模式。在 系統啓動(power on)或重置(reset)時,都會執行一次開機載入 程式(Bootloader)的載入,當載入完畢後,每次存取程式便可 在單指令週期內完成,加快程式的執行速度。 針對該數位訊號處理器20之外部中斷(External Interrupt) 處理而言,本系統在設計上,將4組中斷方式作如下之運用: a.中斷0運用在開機載入程式(Bootloader)。b.中斷1處理類比 數位A/D $專換器1所轉換後的數位資料。c.中斷2處理M) 轉換器2所轉換後的數位資料。d.中斷3則是預留爲個人電 腦的中斷使用。 綜上所述,本發明所提出之一可攜型多通道即時處理系 統,能夠在水下通訊與方位估側之理論與實際運用上,開發 出一獨立運作、多通道 '高取樣率、即時資料擷取之處理系 19 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (清先閱讀背面之孓意事項再填寫本頁) --------訂-------—一 522304 av ____ B7___ 五、發明說明(/1_) - 統’充份顯示出本發明之目的及功效上均深富實施之進步 性,極具產業之利用價値,且爲目前市面上前所未見之新發 明,完全符合發明專利之進步性與新穎性要件,爰依法提出 申請。 唯以上所述者,僅爲本發明之較佳實施例而已,當不能 J 以之限疋本發明所實施之範圍。即大凡依本發明申請專利範 圍所作之均等變化與修飾,皆應仍屬於本發明專利涵蓋之範 ‘:丨 圍內,si請貴審查委員明鑑,並祈惠准,是所至禱。 ----T·---- --------------^---------^ I Λβτ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 20 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)This paper size applies the Chinese National Standard (CNS) A4 specification (21 × 297 mm) 522304 f Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 V. Invention description ((/) array, and Gram- Schmit's normalized orthogonal program does feature decomposition, so it can greatly reduce the amount of calculation, and has a simple parallelization type. Regarding the generalized adaptive expansion algorithm, the weights of the feature subspace are used to adjust and adjust its weights. , To make it converge to the noise subspace, and to improve the algorithm of the subspace to track non-steady signal sources. In fact, it is an extension of the adaptive expansion algorithm, which has a better convergence effect than the adaptive expansion algorithm ( performance). Because the Gram-Schmidt normalized orthogonal program (GSO.) requires a large amount of calculation, some people have proposed the method of adaptive expansion to estimate the noise subspace to reduce the calculation. Please refer to Figure 4 shows the generalized expansion method architecture used in the present invention, which uses m adaptable PHR (PiSarenko5S Harmonic Retrieval) processors. The data vector X2 (k) of the second linear combiner can be obtained by expanding the starting vector XKk) and the weight vector ^ from the following formula: X2 (^) = X1 (^) + aWi (^ l) yi (^ ) Where α is the expansion factor, and its general formula is: X, (A:) = Xm (A :) + a WM (^ 1) y / -i (A :) z = 2,3,.. &Quot;, m. In the first iteration, the output of the _th linear combination is: y ^) = W / H (hi) X)) 1,2, .... The program for the adaptability update of the _th linear combiner can be updated as follows Two forms are obtained: W / ㈧ = Wz (bl)-2 " 雕) y Yan⑻ W, (k) = Wi \ k) / \ Win (k) Wi \ k)] m W, · ㈧ In the iterative method, the output 値 of the y, · ㈧ function can be further obtained. When α = 0, the algorithm becomes the original LMS adaptive feature subspace algorithm, which requires orthogonalized GSO programs to perform operations. When α 16 (Please read the precautions on the back of the book before filling out this page) -------- Order --------- ΜΛΎ. This paper size applies to China National Standard (CNS) A4 specifications ( 210 χ 297 public love) 522304 Five A7 B7 Invention description (β) = 1, this algorithm becomes the adaptive expansion method; and the generalized adaptive expansion algorithm has α < 1. In this way, it is the algorithm used by the software control in the present invention. In order to better describe the circuit block described in FIG. 1, please refer to the portable multi-channel real-time processing system of the present invention described in FIG. Illustration. For the related connection circuit of the analog-to-digital converter 22 described in FIG. 1, it mainly includes an active filter 224, which in the embodiment of the present invention uses an eight-channel (8-channel) active The RC filter circuit is completed, and the input end is to receive an analog signal from a signal source. This means that there are eight sets of first-order active high-pass filters in the system of the present invention. The op amp selects OP470 1C. Pre-amplify the signal received by the sensor. The cut-off frequency is 1.6kHz, which is used to suppress low-frequency noise in water. The filtered signal is then amplified by an amplifier 222. The actual circuit in the system of the present invention is composed of an 8-channel (OP) amplifier. The amplified signal is connected to a synchronous sample and hold circuit (Synchronous Sample and Hold) 220 to perform sample and hold. The system of the present invention is designed with an eight-channel analog-to-digital (A / D) converter. In order to reduce the difficulty of algorithm writing, synchronous sampling and holding are required. Eight LF398 are used in the design. Analog signals are sampled and held simultaneously. The highest conversion rate of 1C LF398 is 250 kHz, and the sampling rate is controlled by the 0th timer in the digital signal processor 20. On the other hand, FIG. 5 also reveals that the main circuit blocks used in the digital signal processor 20 include a central processing unit 201, an algorithm for performing signal processing, and control of a signal processing sequence connected to peripheral devices. 17 1 ------------------ ^ --------- (Please read the notes on the back before filling out this page) Employee Consumer Cooperatives, Bureau of Intellectual Property, Ministry of Economic Affairs The paper size for printing is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 522304 B7 Pentaphyllum & < * c) .ci.r: Photographed by the following day M: 11. *! ... #ila The Ministry of Economics and Intellectual Property Bureau employee consumer cooperative printed the invention description (π). Therefore, the central processing unit 201 is connected to control a bus interface and a first timer 202 (Bus Interface and Timer 1), thereby performing the bus connection. Signal processing and timing functions. The first timer is designed as a baudrate setting of a serial port, which is used to adjust the data transmission rate of the serial port and the personal computer. In addition, the central processing unit 201 is connected to a 0th timer and a serial port interface 204 to process the communication connection protocol of the RS-232 serial port used in the system of the present invention. The 0th timer is designed to be used as a sampling timer to adjust and set the sampling frequency of analog signals. The central processing unit 201 is also connected to control a memory interface 203, which processes interface connection signals of the externally connected memories 260, 270. The biggest feature of the digital signal processor 20 (using TMS320C32) used in the present invention is an external memory interface with stronger functions. The width of the external data memory can be 8, 16, 32-bit wide, and the program execution can be Execute from 16 or 32 bit wide external memory. When designing this function, the design of external memory has greater flexibility. The external memory can be divided into two main functions: one is for the use of Program Memory, which is the external read-only memory 270. In the design, the Am29F010-70 flash memory produced by AMD was used, and the data width was set to 32 bits. The width of the program memory was 8 bits. The design has the following: Advantages: 1. Using only one program memory can reduce the size of the circuit board. 2. The data width is designed to be 32-bit wide, and the accuracy of the program will not be reduced when it is executed. 3. Only one burn 18 (please read the precautions on the back before filling this page) This paper size applies to China National Standard (CNS) A4 specifications (210 x 297 public love), Y〆. Employees ’consumption of the Intellectual Property Bureau of the Ministry of Economic Affairs Cooperatives printed 522304 A7 B7 V. Description of the invention) Recording files, saving time during the burning process. The second function of the external memory is for storing data memory, that is, the external random access memory 260. The design uses GLT710016 SRAM (static RAM) produced by G-LINK company. Considering the accuracy of the program and data, two GLT710016 are designed in parallel to make the data memory specification 64k * 32 bits. The speed is 20ns, so each data access or program execution can be completed within 50ns of a single instruction cycle of C32. Furthermore, in the portable multi-channel real-time processing system according to the present invention, a program written in a read-only memory ROM is loaded into the flash RAM and the digital signal processor. (C32) 20 pins must be set in Microcomputer bootloader mode. When the system is powered on or reset, the bootloader will be loaded once. After the loading is completed, each access to the program can be completed in a single instruction cycle to speed up Program execution speed. For the external interrupt processing of the digital signal processor 20, the system uses four sets of interrupt methods in the design as follows: a. Interrupt 0 is used in the bootloader. b. Interrupt 1 processing analog The digital data converted by digital A / D $ special converter 1. c. Interrupt 2 processing M) Digital data converted by converter 2. d. Interrupt 3 is reserved for interruption of personal computer. In summary, a portable multi-channel real-time processing system proposed by the present invention can develop an independent operation, multi-channel 'high sampling rate, real-time The processing of data extraction is 19 This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (Please read the intentions on the back before filling out this page) -------- Order- ------— One 522304 av ____ B7___ 5. Description of the invention (/ 1_)-The system shows that the purpose and effect of the present invention are both fully implemented and progressive, and have a very high industrial price, and It is a new invention that has never been seen on the market today, which fully meets the requirements for the advancement and novelty of invention patents. The above are only the preferred embodiments of the present invention, and the scope of implementation of the present invention should not be limited to J. That is to say, all equal changes and modifications made in accordance with the scope of the patent application of the present invention should still fall within the scope of the patent of the present invention. Within the scope of ‘: 丨, si ask your reviewing committee to make clear and pray for your approval. ---- T · ---- -------------- ^ --------- ^ I Λβτ (Please read the precautions on the back before filling this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs's Consumer Cooperatives 20 This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)
Claims (1)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW88123368A TW522304B (en) | 1999-12-31 | 1999-12-31 | Portable multi-channel real-time processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
TW88123368A TW522304B (en) | 1999-12-31 | 1999-12-31 | Portable multi-channel real-time processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
TW522304B true TW522304B (en) | 2003-03-01 |
Family
ID=28036808
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
TW88123368A TW522304B (en) | 1999-12-31 | 1999-12-31 | Portable multi-channel real-time processing system |
Country Status (1)
Country | Link |
---|---|
TW (1) | TW522304B (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI398662B (en) * | 2005-10-21 | 2013-06-11 | Raytheon Co | Sonar system and method providing low probability of impact on marine mammals |
-
1999
- 1999-12-31 TW TW88123368A patent/TW522304B/en not_active IP Right Cessation
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TWI398662B (en) * | 2005-10-21 | 2013-06-11 | Raytheon Co | Sonar system and method providing low probability of impact on marine mammals |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
Nagar et al. | Gauge-invariant non-spherical metric perturbations of Schwarzschild black-hole spacetimes | |
Echman et al. | A scalable pipelined complex valued matrix inversion architecture | |
US9111068B2 (en) | Multiple-memory application-specific digital signal processor | |
CN112198423B (en) | Test excitation generation unit in FPGA chip | |
Anzt et al. | An error correction solver for linear systems: Evaluation of mixed precision implementations | |
TW522304B (en) | Portable multi-channel real-time processing system | |
Tzanos et al. | Hardware acceleration of transformer networks using fpgas | |
CN110471041A (en) | A kind of arrival direction estimation method based on Vivado HLS | |
Ma et al. | Accelerating SVD computation on FPGAs for DSP systems | |
CN106556831A (en) | GRADIENT PROJECTION METHODS based on FPGA | |
Dubrov et al. | Generating pipeline integrated circuits using C2HDL converter | |
CN102033733A (en) | Novel micro controller unit (MCU) structure | |
CN102221842B (en) | Thousands-of-unit extensible adaptive optical system wave-front processor | |
Huang et al. | A generic FPGA-based hardware architecture for recursive least mean p-power extreme learning machine | |
Fruitwala et al. | Distributed processor for fpga-based superconducting qubit control | |
Milluzzi et al. | A multi-tiered optimization framework for heterogeneous computing | |
Diamantopoulos et al. | Phryctoria: A messaging system for transprecision opencapi-attached fpga accelerators | |
CN115437603B (en) | Method for generating random numbers and related products | |
Giefers et al. | Extending the power architecture with transprecision co-processors | |
US11886359B2 (en) | AI accelerator apparatus using in-memory compute chiplet devices for transformer workloads | |
He et al. | HLSTransform: Energy-Efficient Llama 2 Inference on FPGAs Via High Level Synthesis | |
US20240037379A1 (en) | Server system with ai accelerator apparatuses using in-memory compute chiplet devices for transformer workloads | |
Ahamed et al. | Energy consumption analysis on graphics processing units | |
US20230168899A1 (en) | Generative ai accelerator apparatus using in-memory compute chiplet devices for transformer workloads | |
Mayannavar et al. | Design of modular processor framework |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
GD4A | Issue of patent certificate for granted invention patent | ||
MK4A | Expiration of patent term of an invention patent |