TW496038B

TW496038B - Electronic circuitry

Info

Publication number: TW496038B
Application number: TW091100136A
Authority: TW
Inventors: John Wood
Original assignee: Multigig Ltd
Priority date: 2000-01-24
Filing date: 2000-06-30
Publication date: 2002-07-21

Abstract

Electronic circuitry having two circuitry parts each having timing signal generating and distribution means using signal path provisions exhibiting endless electromagnetic continuity affording signal phase inversion with associated regenerative active means so as to serve as source of said timing signals, further comprises inter-connection between the signal path provisions of each of the circuitry parts over an electrical length and at positions of the signal path provisions to coordinate mutual frequency and phase coherence of the circuitry parts, and bidirectional data transfer means at each circuitry part further co-ordinated with the coordinated timing signals.

Description

496038496038

發明範疇本發明係關於結合使用（時訊號供資料通訊或傳送之電子電路’纟中該等電子電路係如同審查中的專利中請案號 GB 00/04 8 9 1申請案中便利的、確實較好及普遍的電子電路，而該專利申請案係為本分割案之母案。發明背景 GB 0 0/04 8 9 1申請案包括供有效整合或協同結合重複性脈衝或週期性訊號之分佈與用以製造或維持該等訊號之王動裝置之廣義概念及實現性之方法及裝置。同步產生及配置定時訊號，包括一主時脈，促成一個混合式電磁/半導體結構。一個適合的該訊號路徑顯示環狀電磁連續性便利地以相關路徑再生裝置供給一電磁波形式訊號之訊號相位反轉。在開創性的相關原理中，供重複脈衝或週期性訊號的時間常數係關係於該訊號路徑的電氣長度並有效地藉由該訊號路徑的電氣長度所定義。當一傳送電磁波於該訊號路徑之橫越時間決定該時間常數時，該傳送電磁波最好在該環形電磁連續性訊號路徑中再循環。尤其，這具有用以直接產生天生具有快速上升及下降特徵之似脈衝週期性訊號之能力，也就是說，被產生時已經是方波，而不需要如習知方式，於一基本本質上實質之正弦訊號上作方波化之動作。確實，此種電氣長度/訊號橫越時間常數定義原理，便利地並有益地導致該電氣長度或一該訊號橫越，首先有效地定義一單極半週期訊號偏移， -4 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 裝訂Scope of the invention The present invention relates to electronic circuits that are used in combination (time signals for data communication or transmission). These electronic circuits are as convenient and reliable in the application as the patent under examination, and the case number is GB 00/04 8 9 1 Better and universal electronic circuit, and this patent application is the mother case of this division. BACKGROUND OF THE INVENTION GB 0 0/04 8 9 1 application includes the distribution of repetitive pulses or periodic signals for effective integration or synergy. Methods and devices for the broad concept and implementation of the King Motion device used to manufacture or maintain these signals. Synchronous generation and configuration of timing signals, including a main clock, contribute to a hybrid electromagnetic / semiconductor structure. The signal path shows that the ring-shaped electromagnetic continuity conveniently facilitates the phase reversal of the signal provided by an associated path regeneration device to supply an electromagnetic wave signal. In the groundbreaking correlation principle, the time constant for a repetitive pulse or periodic signal is related to the signal path Is effectively defined by the electrical length of the signal path. When an electromagnetic wave is transmitted across the signal path When determining the time constant, the transmitted electromagnetic wave is preferably recirculated in the ring-shaped electromagnetic continuity signal path. In particular, this has the ability to directly generate a pulse-like periodic signal with a natural rise and fall characteristics, that is, When it is generated, it is already a square wave, and it is not necessary to perform a square wave operation on a fundamentally substantial sinusoidal signal as is known. Indeed, this electrical length / signal crossing time constant definition principle is convenient. And beneficially cause the electrical length or a signal to traverse. First, a unipolar half-cycle signal offset is effectively defined. -4-This paper size applies the Chinese National Standard (CNS) A4 specification (210X 297 mm). Binding

線line

其人（或在下一戎訊號橫越）有效地完成一包括兩個相反半週期偏移之全雙極週斯之定義。對於此等全雙極週期、兩個連續脈衝偏移之每一個，該電氣長度因此對應於 1 8 0 度。、。特別是，具有傳送波本性之訊號使用一該訊號配置路徑’其具有對其適合的傳播本性，典型地為環形傳輸線形式，進一步具有關係於所要訊號之再循環之轉置效果及反相動作。、所奴足重複週期訊號涉及再循環傳送波傳播裝置，其有率也藉由所欲之傳送波而提供旋轉，並利用具可開關及ί大本性之主動再生裝置、便利雙向反相放大器、及供應能量需求設定各個訊號偏移持續時間，並在各個訊號偏移結束處設定相對較小之上升及下降時間。、此處舉例一具有所欲之相對於主動反相裝置之轉置效果 =口適的傳送波傳播裝置，如同藉由該橫越傳送波所示，藉由實際寬度沿著其長度扭曲以連接相反端至反相裝置之輸入及輸出，即如頻帶或帶。傳运波傳播裝置之二維實行可具使用間隔開的路徑跟隨傳導特徵足傳統傳輸線形式，與藉由該等間隔之傳導特徵相互絕緣之父叉所提供之前述M 〇 e b丨u s扭曲效果。一替代方案是使用一相關於該傳送傳輸裝置之另外的傳輸線形式傳輸線反相變壓器。典型的例子使用間隔的傳導特徵作為軌跡组織，該等軌跡組織每個具有實質相等長度，且在至少一與其連接之反 5- 本紙張尺度適財國國家標準(CNi) A4規格(210X297公爱 1His (or in the next signal crossing) effectively completes the definition of a full bipolar cycle that includes two opposite half-period shifts. For each of these full bipolar periods, two consecutive pulse offsets, the electrical length therefore corresponds to 180 degrees. ,. In particular, a signal having a transmission wave nature uses a signal configuration path 'which has a suitable propagation nature for it, typically in the form of a ring transmission line, and further has a transposition effect and an inverse action related to the recirculation of a desired signal. The repetitive cycle signal involves a recirculating transmission wave propagation device, which also provides rotation by the desired transmission wave, and uses an active regeneration device with switchable and large nature, convenient bidirectional inverting amplifiers, And supply energy demand, set the duration of each signal shift, and set relatively small rise and fall times at the end of each signal shift. Here is an example of a device that has the desired transposition effect relative to the active inverting device = a suitable transmission wave propagation device, as shown by the transversal transmission wave, twisted along the actual width to connect The input and output of the opposite end to the inverting device, such as a frequency band or band. The two-dimensional implementation of the transport wave propagation device can use spaced paths to follow. The conductive features are sufficient for traditional transmission line forms, and the aforementioned M 0 e b 丨 us distortion effect provided by the father fork which is insulated from each other by these spaced conductive features. An alternative is to use a transmission line inverting transformer in the form of another transmission line related to the transmission transmission device. Typical examples use spaced conductive features as trajectory organizations, each of which has a substantially equal length and is at least one connected to it. 5- This paper is compliant with the National Standard (CNi) A4 specification (210X297). Love 1

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相器特徵之輸出及輸入之間被轉置，且最好是在該等傳導軌跡芡間。實際上，至少該反相器特徵沿著傳導特徵具有小於1 %的範圍，因而最好會有複數個反相器特徵分隔地沿著該傳導特徵或軌跡。較佳的反相器裝置係為雙向本質的，例如一對相鄰或背對背的相反反相器，且如此方式便利了直接同時生產相似或實質相同之反相週期信號組件。如此的定時訊號提供方式具有低功率損耗，其有效地被限於傳輸線及反向器動作才貝耗，也就是說，經由反相器提供而被限至近乎可忽略的頂部’且引導至已備製之操作電路，例如，經由被動電阻性之光雙向連接路徑及/或電容及/或電感或傳輸線本性，或單向’例如二極體或反相器。並且’至少原則上及無製程上之缺陷，此處之週期訊號提供沒有對方向或旋轉之先天偏好之傳送波傳遞，雖然個別藉由例如規定之間隔或其他反相器裝置之間之差異而可被預置或施加。貫際的脈衝產生器及振盪器，如包含傳輸線結構使用導電金屬及絕緣介電層以相容於IC製造之方法者，一般且特別地與再生電路一起相關於該此等傳輸線，傳統及便利地形成於其下並以孔徑連接。所需之絕緣交叉或分隔之傳輸線變壓器部分同樣地形成包含例如該交叉之孔徑跳躍’並造成例如作為再生裝置之雙向反相器之終端之有利的D C不穩定聯繫，較佳雙向反相器之同步偵測及橋狀整流器動作，強化此等雙向反相器之後續動作包含本紙張尺度適財Η Η家標準(CNS) A4€i(21GX 297& 裝訂The phaser features are transposed between the output and input, and preferably between these conduction tracks. In fact, at least the inverter feature has a range of less than 1% along the conduction feature, so it is best to have a plurality of inverter features along the conduction feature or trajectory separately. The preferred inverter device is bi-directional in nature, such as a pair of adjacent or back-to-back opposite inverters, and in this way facilitates the simultaneous and simultaneous production of similar or substantially the same inverted periodic signal components. Such a timing signal supply method has a low power loss, which is effectively limited to the transmission line and inverter operation, which means that it is limited to the near-negligible top through the inverter and is guided to the ready Controlled operating circuits, for example, via passive resistive bidirectional connection paths and / or capacitors and / or inductors or transmission line nature, or unidirectional 'such as diodes or inverters. And 'at least in principle and without process flaws, the periodic signals here provide transmission waves with no inherent preference for direction or rotation, although individually by, for example, prescribed intervals or differences between other inverter devices Can be preset or applied. Transient pulse generators and oscillators, including transmission line structures that use conductive metals and insulating dielectric layers to be compatible with IC manufacturing methods, are generally and specifically associated with these transmission lines along with regenerative circuits, traditional and convenient A ground is formed underneath and connected with an aperture. The required insulated crossover or separated transmission line transformer part likewise forms a favorable DC-unstable connection that contains, for example, the crossover aperture jump 'and causes, for example, a terminal of a bidirectional inverter as a regeneration device. Simultaneous detection and bridge rectifier action to enhance the subsequent actions of these bi-directional inverters including paper size Η Η Home Standard (CNS) A4 € i (21GX 297 & Binding

線 496038 A7 p--------- B7 五、發明説明（4 ) 相關於電源之電能等。再者’疋時訊號之產生及分佈電路之聯繫/内耦合係可得的’播論係藉由直接連接或藉由分享磁及/或電場；及在一自我同步基礎延伸至不同頻率，特別是在單數諧波關係中0 發明概論此等在I C之中或之間之定時的提供之内耦合及協調，可在包括不必然是I c的電路部分之間達成資料傳輸，而與本發明有特別的關連，在以下說明中敘述的及/或在申請專利範圍中獨立或附屬項中列出的本發明的結構及特徵均併入本文。圖式簡單說明本發明的特別具體實施例參考下列的說明及附圖，其中圖1為G B 0 0 / 0 4 8 9 1案中一傳輸線設備的外形圖；圖2顯示一 Moebius波帶；圖3為一行波振盪器電路外形圖；圖4為另外的行波振盪器電路外形圖；圖5a及5b為部份傳輸線的分配電模式的當量電路圖；圖6a顯示差動輸出波型的理想化圖形；圖6b顯示傳輸線的傳播延遲，電長學度及物理長度之間的關係； ' 圖7(i)-7(ix)為訊號波型相位的理想圖形；圖8a- 8b顯示傳輸線振盪器中一波型的瞬間相位；圖9為1C上部份傳輸線的斷面圖；Line 496038 A7 p --------- B7 V. Description of the Invention (4) Electricity related to the power source. In addition, the generation / distribution of the circuit signals and the linkage / internal coupling are available. The theory is obtained by direct connection or by sharing magnetic and / or electric fields; and extending to different frequencies on a self-synchronizing basis, especially It is in the singular harmonic relationship. 0 Introduction to the invention. These are coupled and coordinated within the provision of timing in or between ICs, and can achieve data transmission between circuit parts including not necessarily I c. Of particular relevance, the structures and features of the present invention described in the following description and / or listed independently or in appended items in the scope of the patent application are incorporated herein. The drawings briefly illustrate the specific embodiments of the present invention with reference to the following description and accompanying drawings, wherein FIG. 1 is an external view of a transmission line device in the case of GB 0 0/0 4 891; FIG. 2 shows a Moebius band; 3 is the outline of the one-line wave oscillator circuit; Fig. 4 is the outline of the other line-wave oscillator circuit; Figures 5a and 5b are equivalent circuit diagrams of the power distribution mode of some transmission lines; Figure 6a shows the idealization of the differential output waveform Figures; Figure 6b shows the relationship between the propagation delay of the transmission line, the electrical length, and the physical length; Figures 7 (i) -7 (ix) are the ideal patterns of the signal waveform phase; Figures 8a-8b show the transmission line oscillator The instantaneous phase of the medium one waveform; Figure 9 is a sectional view of a part of the transmission line on 1C;

496038 A7 _____B7 五、發明説明（5 ~) ~ - ~ 圖10a及1 Ob為電路外形及停止波的理想圖形；圖11為一傳輸線含反相變壓器局部外形圖；圖12顯示一對背對背反相器跨接部份傳輸線；圖13a及13b為CMOS背對背反相器外形及相當電路圖；圖14a為傳输線及CM0S電晶體的電容元件詳細圖；圖14b為圖14a的相當電路圖；圖1 5顯示連接傳輸線的電容短線連接；圖16顯示自行同步化傳輸線振盪器的一種連接；圖17a-17c顯示自行同步化傳輸線振盪器的其他連接；圖18為圖17a的代表圖形； ’ 圖19a及19b顯示四傳輸線振盪器的連接；圖20及21顯示磁連結的自行同步傳輸線振盧器·，圖2 2顯π二磁連結的自行同步傳輸線振湯器· 圖23顯示不同頻率自行同步化傳輸線振盪器的連接；圖24顯示單鋰1C的時鐘分配電路網的例子；圖25顯示定時系統立體執行圖；圖26a及26b顯示雙相位分接點的例子；圖27顯示三同心配置傳輸線振盡器；圖28a及28b顯示含交叉迺路連接的傳輸線· 圖29a顯示四相位訊號的傳輸線配置；圖29b顯示理想化的四相位訊號波型；圖30顯示開端傳輸線連接；圖3 1兩1C的頻率及相位協調；圖32顯示Mosfet型可選擇的數位式分路電容器， -8 - 本紙張尺度適用中國國家標準(CNS) A4規格(21〇Χ29Ϋ^釐） 496038 A7496038 A7 _____B7 V. Description of the invention (5 ~) ~-~ Figures 10a and 1 Ob are the ideal shapes of the circuit shape and stop wave; Figure 11 is a partial external view of a transmission line with an inverter transformer; Figure 12 shows a pair of back-to-back inverters Figure 13a and 13b are the outline and equivalent circuit diagram of CMOS back-to-back inverter; Figure 14a is the detailed diagram of the capacitor element of the transmission line and CM0S transistor; Figure 14b is the equivalent circuit diagram of Figure 14a; Figure 1 5 Capacitor short-line connection to the transmission line is shown; Figure 16 shows a connection of a self-synchronized transmission line oscillator; Figures 17a-17c show other connections of a self-synchronized transmission line oscillator; Figure 18 is a representative figure of Figure 17a; 'Figures 19a and 19b Figure 4 shows the connection of the four transmission line oscillators; Figures 20 and 21 show the magnetically-connected self-synchronous transmission line vibrators. Figure 2 shows the π-two-magnetically-connected self-synchronous transmission line vibrator. Figure 23 shows the self-synchronized transmission line oscillations at different frequencies. Device connection; Figure 24 shows an example of a single lithium 1C clock distribution circuit network; Figure 25 shows a three-dimensional execution diagram of the timing system; Figures 26a and 26b show examples of dual-phase tapping points; Figure 27 shows a transmission line stopper with three concentric configurations; Figures 28a and 28b show a transmission line with a cross loop connection; Figure 29a shows a transmission line configuration for a four-phase signal; Figure 29b shows an idealized four-phase signal waveform; Figure 30 shows the beginning Transmission line connection; Figure 3 1 2 1C frequency and phase coordination; Figure 32 shows Mosfet type optional digital shunt capacitor, -8-This paper size applies Chinese National Standard (CNS) A4 specification (21〇 × 29Ϋ ^^) 496038 A7

圖33顯示經過傳輸線的電容負載及運轉資料及/或電力。圖34a頻率及相位已協調IC的資料傳送；圖3 4 b - 3 4 e圖3 2 a系統的資料問；具體實施例之詳細說明已知的傳輸線一般分為兩類閱山 A两頒開崎型或特別的部份或d =封μ。本又計劃的傳輸線既非封端型也*是開端型c 甚至也不是如-向明白的所謂無端型；如本文所顯示，^Figure 33 shows the capacitive load and operating data and / or power passing through the transmission line. Figure 34a The frequency and phase have coordinated the data transmission of the IC; Figure 3 4 b-3 4 e Figure 3 2a System data question; Detailed description of specific embodiments The known transmission lines are generally divided into two types: Saki type or special part or d = seal μ. The planned transmission line is neither end-capped nor * open-end c, or even the so-called endless type as understood by-Xiang; as shown in this article, ^

端是本發明-種構造特徵，包括有理由供應—種訊號路名顯示環狀電磁連續性。裝圖！顯示-傳輸線15其設備顯示為實體環狀結構，包括_ 早H原始'導體結構17由兩適當隔離幾乎平行的軌道女 ^路⑸及15b組成並於19交又，並與導體17的任何現場售 =接供關。原始導體17的長度訂為S相當於傳輸線15的撰離兩圈迥路線15a及15b並經過交又19的長度。傳輸線15的這種結構具有編心遗帶相當的平面，The end of the invention is a structural feature of the present invention, including a reason to supply—a kind of signal road name showing circular electromagnetic continuity. Install map! Display-transmission line 15 whose equipment is shown as a solid ring structure, including _ early H original 'conductor structure 17 consisting of two properly isolated orbits of almost parallel orbits and 15b and intersect at 19, and any site with conductor 17 Sale = take over customs. The length of the original conductor 17 is set to be the length of the transmission line 15 equivalent to the length of the two lines 15a and 15b and passing through the circuit 19. This structure of the transmission line 15 has a relatively flat plane of the core cord,

2’其中刚。單轉的環狀帶具有明顯的㈣學能主動轉換成兩面及兩邊，但扭轉及兩端連接的原始帶成為只有一面及-邊’見帶中心線上的環狀箭頭軌跡。從沿帶的任何位置退回，其原來的左邊及右邊都經過反向，反轉或沿帶長度任何奇數扭轉的結果相同。該種導性材料帶符人本發明具體實施例訊號路徑要求’及組成本發明另外的：構f生特徵。撓性基板容許配置_真MGebius波帶傳輸線結構，即，與相當的平面交叉19比較，扭轉彎曲有利。如^ 形成.的撓性印刷電路板及其固定的ICs被認為是可行的計2 ’where just. The single-turn endless belt can obviously transform itself into two sides and two sides, but the original belt that twists and connects the two ends becomes only one side and -side 'sees the circular arrow track on the center line of the belt. Returning from any position along the belt, the original left and right sides are reversed, reversed, or any odd number of twists along the length of the belt have the same result. This kind of conductive material bears the signal path requirements of specific embodiments of the present invention, and constitutes another feature of the present invention: constructing f characteristics. The flexible substrate allows the arrangement of the true MGebius band transmission line structure, that is, torsional bending is advantageous compared to the equivalent plane crossing 19. Such as ^ formation. Flexible printed circuit boards and their fixed ICs are considered feasible

4^6038 A7 B7 五、發明説明（7 劃。圖3為脈衝發生器，真正的振盪器，的電路圖，使用圖1 傳輸線15，另外特別含多數的隔離主動再生設備便於作為雙向反相切換/放大電路21於導電迥路軌道15a，i5b之間連接。電路21在本具體實施例中將作進一步說明包括兩反相斋23a及23b，背對背連接。其他的再生設備依賴負電阻，負電容或另外合適非線型，及再生（如Gunn二極體）或傳輸線性質。較為理想，電路2 1為多數並沿傳輸線15分配，較理想為均勻分配；也可大量高達1 〇〇或更多的電路，更為理想’電路數量多但各個按實際合理縮小。各切換放大器21的反相器，23b具有一般操作連接相關正值及負值電壓供應軌，通常分為V+及gnd。.各電路21 的輸入/輸出端子如顯示於迥路15&，15b之間在單導體丨7的最大間距處連接，所以，各個幾乎都在傳輸線丨5中點。圖4為振盪器的另外電路圖使用傳輸線結構，但有三交叉 19a，19b及19c，所以，如圖3的應用具有同樣Moebius波帶型的反向/反轉/轉置性質。傳輸線1 5顯示為矩型及圓型只是為說明方便。可以為任何形狀，包括不規則幾何圖形，只要長度適合的操作頻率的需要，如’一訊號離開放大器21繞行「一整圈」的傳輸線15即隔離的迥路15a，15b加交叉19後返回，並在繞行時間Tp内有效定義操作頻率的脈衝宽度或半循環振i時間。沿傳輸線15均勻分配放大器21的優點有兩層。第一，擴散的離散電容主動堆在相關放大器21便於吸入傳輸線15特 10- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐）裝訂線 496038 五、發明説明（8 A7 B74 ^ 6038 A7 B7 V. Description of the invention (7 strokes. Figure 3 is a circuit diagram of a pulse generator, a real oscillator, using the transmission line 15 of Figure 1, and it also contains most of the isolated active regeneration equipment. The amplifying circuit 21 is connected between the conductive track 15a, i5b. The circuit 21 will be further explained in this specific embodiment, including two inverters 23a and 23b, connected back to back. Other regenerative devices rely on negative resistance, negative capacitance or Also suitable for non-linear, and regeneration (such as Gunn diode) or transmission line properties. Ideally, the circuit 21 is a majority and distributed along the transmission line 15, it is ideally evenly distributed; it can also be a large number of circuits of 100 or more More ideal 'circuits have a large number but each is reasonably reduced according to the actual situation. The inverters 23b of each switching amplifier 21 have a positive and negative voltage supply rail related to general operation connections, and are usually divided into V + and gnd. The input / output terminals are connected at the maximum distance between single conductors 7 and 15b, as shown in circuit 15 & 15b, so each is almost at the midpoint of the transmission line 5. Figure 4 shows the vibration The other circuit diagram of the oscillator uses the transmission line structure, but there are three crosses 19a, 19b, and 19c, so the application shown in Figure 3 has the same Moebius band type inversion / inversion / transposition properties. Transmission lines 15 are shown as rectangular and The round type is just for convenience of explanation. It can be any shape, including irregular geometric shapes, as long as the length is suitable for the operating frequency, such as' a signal leaves the amplifier 21 and goes around a "full circle" of the transmission line 15 which is an isolated circuit 15a. 15b returns after crossing 19, and effectively defines the pulse width or half-cycle vibration time of the operating frequency within the bypass time Tp. The advantages of evenly distributing the amplifier 21 along the transmission line 15 have two layers. First, the diffused discrete capacitor actively Stacked in the relevant amplifier 21 for easy suction of transmission line 15 special 10- This paper size applies to China National Standard (CNS) A4 specification (210X297 mm) binding line 496038 5. Description of the invention (8 A7 B7

性阻抗Zo因而減少訊號反射效果及改善不良的波形清晰度第一，由供應電壓V+及GND決定的訊號振幅在整個傳輸線15上會更穩定，易於補償傳輸線介電質及電導體材料引起的損失。連續閉合迥路傳輸線15及基本上均勾分配及連接的再生切換$又備21可以像似整齊結構從任何點看外觀 =同。一種良好的規則用於各再生切換製置相關的基本電谷及笔感（Ce及Le)及开）成一共振分流槽lc電路以便具有一共振頻率為1/(2*pi*root(Le*Ce))大於傳輸線15自持振盪頻率 F(F3，F5，等）。圖5 a為部份傳輸線1 5的分配電當量電路或模式圖。顯示交替分配電阻（R)及電感（L)元件串連，如，R〇串連Li然後串連R2 ’如此繼續形成迺路15a的一部份；及記錄l0串連然後串連L2，如此繼續形成迥路15b的一部份；分配電容元件C〇及(^並連橫跨傳輸線15，即在迺路i5a及15b的電阻/電感元件Ro/L!與電感/電阻元件Lo/Rii間連接CG，及在電感 /電阻元件Li/R2與電阻/電感元件之間連接q ;其中同一原件基本上維持R0=R1 = R2，L1 = L2=L3及C0=C1，顯示的分配RLC模式擴及傳輸線1 5的全長。雖然未顯示，實際有一寄生電阻元件與各電容元件C平行，特別具有介電材料。圖5b為另外的簡化替代的分配電當量電路或可忽略電阻模式，以圖5a顯示量（L)的半量（L/2)電感元件串連分配取代圖5a的元件。這種模式有助了解本發明具體實施例傳輸線的基本操作原理。 -11· 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)The impedance Zo thus reduces the signal reflection effect and improves the poor waveform clarity. First, the signal amplitude determined by the supply voltage V + and GND will be more stable on the entire transmission line 15, and it is easy to compensate for the loss caused by the dielectric and electrical conductor materials of the transmission line. . The continuous closed loop transmission line 15 and the regenerative switch which is basically evenly distributed and connected $ 21 and 21 can look like a neat structure from any point = the same. A good rule is used for the basic electric valley and pen feel (Ce and Le) and on related to each regeneration switching system into a resonant shunt lc circuit so as to have a resonance frequency of 1 / (2 * pi * root (Le * Ce)) is greater than the self-sustained oscillation frequency F (F3, F5, etc.) of the transmission line 15. Fig. 5a is a circuit or pattern diagram of the electrical distribution equivalent of a part of the transmission line 15. Display alternately distributed resistance (R) and inductance (L) components in series, for example, R0 in series with Li and then in series with R2 'so continue to form part of loop 15a; and record 10 in series and then in series with L2, so Continue to form part of the circuit 15b; the distribution capacitors C0 and (^ are connected in parallel across the transmission line 15, that is, between the resistance / inductance element Ro / L! And the inductance / resistance element Lo / Rii of the circuit i5a and 15b Connect CG, and connect q between inductance / resistance element Li / R2 and resistance / inductance element; where the same original element basically maintains R0 = R1 = R2, L1 = L2 = L3, and C0 = C1, the displayed allocation RLC mode is expanded And the full length of the transmission line 15. Although not shown, there is actually a parasitic resistance element parallel to each capacitive element C, especially with a dielectric material. Figure 5b is another simplified alternative distribution of electrical equivalent circuit or negligible resistance mode, as shown in Figure 5a The half (L / 2) inductance component of the display quantity (L) is serially distributed instead of the component in Figure 5a. This mode helps to understand the basic operating principle of the transmission line of the specific embodiment of the present invention. -11 · This paper size applies to Chinese national standards (CNS) A4 size (210 X 297 mm)

裝訂Binding

496038496038

裝在啟動」隖&，即電力首次供給放大器21後，因放大器2 1内部固有、音放大產生振盪，因而開始發生混亂並迅速沉靜在基本頻率F振盪，標準為十億分之一秒内。各別來自反相器23a及23b的個別訊號經歷過傳輸線15的傳播延遲Tp後反轉回到各放大器21。這種傳播延遲丁 p為傳輸線^ 的電阻及電感參數的函數；該函數以每公尺亨利及每公尺法拉（C)表示，並包括傳輸線的所有電容負載，導出特性阻抗Z〇=SQRT (L/C)及一直線繞行或傳播或相位速度 Pv=l/SQRT (L/C)。增強頻率，即選擇放大，使延遲邶成為半循環時間的整數再除數以產生主要的最低頻率，即基本頻率F-l/(2*Tp)，並滿足再除數條件。所有其他整數乘此頻率也能滿足再除數條件，但是，頻率較高，放大器2工的增益下降，即減少，因此傳輸線15會迅速沉降至基本振盪頻率F。Installed in the start "隖 & that is, after the power is first supplied to the amplifier 21, due to the inherent sound of the amplifier 21, the sound amplification generates oscillations, so it begins to confuse and quickly quietly oscillates at the basic frequency F. The standard is within one billionth of a second . The individual signals from the inverters 23a and 23b, respectively, are reversed back to the respective amplifiers 21 after passing through the propagation delay Tp of the transmission line 15. This propagation delay Dp is a function of the resistance and inductance parameters of the transmission line ^; this function is expressed in Henry per meter and Farad (C) per meter, and includes all capacitive loads of the transmission line, and derives the characteristic impedance Z0 = SQRT ( L / C) and linear detour or propagation or phase velocity Pv = l / SQRT (L / C). Enhance the frequency, that is, select amplification to make the delay 邶 an integer half-cycle time and then divisor to produce the main lowest frequency, that is, the basic frequency F-1 / (2 * Tp), and meet the re-divider condition. All other integer multiplications of this frequency can also satisfy the divisor condition. However, the higher the frequency, the gain of the amplifier 2 will decrease, that is, decrease, so the transmission line 15 will quickly settle to the basic oscillation frequency F.

傳輸線15具有環狀電磁連續性，隨反相器23a及23b的標準電晶體的快速切換時間發展成強烈方波型含有效增強振盪的基本頻率F的奇次諧波。在基本振盪頻率f，包括奇次諧波頻率，由於傳輸線15為，閉合迥路，無任何型式的端子’放大器21的端子出現無載’如此非常適合於低電力消耗及低動力需求。傳輸線15每單位長度的電感及電容可獨立變化，這也是優點及合乎需要圖6a顯示切換放大器21含反相器23a及23b的理想化波型。起動後不久，放大器21的輸入/輸出端子出現元件振篮波型φ 1，φ 2，並於正常操作中繼續存在。波型φ 1，φ2基 -12 - 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) A7 -——____B7 五、發明説明（1〇 ) 本上為方型及差動’即兩相反轉18〇度後不同相。這種差動波型φ 1，Φ2在最大訊號振幅（V+)的中點（v+/2)相交。這中點（V+ / 2)可當作可當作’零點，，因為波型φ 1，φ 2同电勢’而瞬間導體迥路軌道15a及15b之間沒有位移電流，也興任何差動電壓存在。對於本發明的這種較佳循環行波特徵而了’這種零點以非常快速上升及下降時間及非常，清楚’的方型波環繞傳輸線1 5進行有效掃描。這種零點也成為全循環二極時鐘訊號的反向偏移的基準電壓。考慮傳輸線1 5，以行波繞行的整圈長度及原始導軌丨7的總長S ’兩者都用「電學長度」表示，較為方便。圖gb顯示原始導線/軌道17的傳播延遲或繞行時間（Τρ)，電學長度 ()及物理長度（S)之間的關係。對各錯失相位波型φ 1，φ 2 及如所示由行波反覆繞行傳輸線15而言，每個方波偏移相當於一整圈，即一繞行時間Τρ，而後續的相反波偏移需要兩連續圈，即，二繞行時間（2χΤρ)。傳輸線15的一圈具有 180°’電學長度’，而兩圈需要一完全〇° - 3 6〇。二極訊號循環，即，相當於原始導體17的全長。例如，180°電學長度相當一圈及1/2波長1 GHz可形成一 50mm傳輸線具有等於30%光速（c)的相速度（pv)，即， Pv=0. 3*c，或 5 mm 其中 Pv= 0· 03* c，或 166 mm 自由空間，即，其中Pv= 1 * c。圖7(i)-7(ix)顯示波型φ 1，Φ2經過一全循環至下一循環的起點，特別在8個沿導體線或執道17樣品位置，其間距離同為45°電學長度。相位標示依照圖7(i)可以是軌道17 __-13- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 496038 A7 _B7 五、發明説明（1彳) 的任何地方，即，傳輸線15二圈，例如，隨意標示φ 1，Φ2 波型15的上升/下降為〇/360° 。設定7(i)為時間t0，圖7(ii) 顯示繞行線17全長S的1/8(0.125 S)後在時間t0+ (0.25 Tp) 的波型Φ 1，Φ2，等於繞行1/4傳輸線15，及45°電學長度。時間 t0+ (0·5 Tp)，t0+ (0.75 Tp)，t0+ (0.75 Τρ)......t0+ (2 Tp);繞行0·25 S，0.375 S，〇· 5 S，····· 1.0 S及90。，135 °，180。.··.·360° 分別如圖 7(iii)-(ix)所示。圖8a及8b顯示偏移極性的抽印（如圓圈所示），偏移電流 (如箭頭所示），及瞬間相位，從電磁環狀傳輸線丨5上的任意0/ 3 60 °位置涵蓋二圈傳輸線（等於連續原始導體丨7的全長）。圖7只顯示一種差動行’走電磁（EM)波型（取φ 1)，但沿傳輸線15的旋轉傳播可以為任何相反方向，即，順時鐘或反時鐘。另外的波型（Φ 2)當然與顯示波型（φ丨)相錯丨8〇。。 EM波的實際旋轉方向用p〇yntingS向量表示，即，電及磁向量交叉乘積。交叉區19當EM波繞行時產生無影響的訊號 Φ 1或Φ 2的微攪動。結果，快速上升/下降變換以相速以繞傳輸線移動，切換放大器2 1在第一次在供應電壓之間切換時放大該變換。傳輸線1 5的波型Φ 1及φ 2的相位可從傳輸線丨5上的任何任思基準點準確決定，結果具有強烈的相位關聯性及穩定性。用於雙向操作的適當（確實適合現有IC製造技術及習慣）切換放大器21係以背對背Mosfet反相器23a，b為準，沿本文傳輸線結構標準長度可裝備該種切換反轉放大器達1〇〇〇對 &張尺度適財目目家標準(CNS)域藏^χ297H-----~-—The transmission line 15 has a ring-shaped electromagnetic continuity, which develops into a strong square wave type odd harmonic wave including a fundamental frequency F which effectively enhances the oscillation with the fast switching time of the standard transistors of the inverters 23a and 23b. At the basic oscillation frequency f, including the odd-order harmonic frequencies, since the transmission line 15 is a closed circuit, no type of terminal ‘the terminal of the amplifier 21 is unloaded’ is very suitable for low power consumption and low power requirements. The inductance and capacitance per unit length of the transmission line 15 can be changed independently, which is also an advantage and desirable. Figure 6a shows the idealized waveform of the switching amplifier 21 with inverters 23a and 23b. Shortly after the start, the input / output terminals of the amplifier 21 appeared in a component vibration wave pattern of φ 1, φ 2 and continued to exist in normal operation. Wave shape φ 1, φ2 base -12-This paper size is applicable to Chinese National Standard (CNS) Α4 size (210 X 297 mm) A7 ----- ____B7 V. Description of the invention (1〇) This is square and differential 'That is, the two phases are out of phase after 180 °. This differential wave pattern φ 1, φ 2 intersects at the midpoint (v + / 2) of the maximum signal amplitude (V +). This midpoint (V + / 2) can be regarded as 'zero point', because the wave shape φ 1, φ 2 has the same potential, and there is no displacement current between the instantaneous conductor tracks 15a and 15b, and any differential The voltage is present. For this preferred cyclic traveling wave characteristic of the present invention, the zero point is scanned efficiently around the transmission line 15 with very fast rise and fall times and very, clear square waves. This zero point also becomes the reference voltage for the reverse offset of the full-cycle dipole clock signal. Considering the transmission line 15, it is convenient to use the "electrical length" to express both the full length of the traveling wave and the total length S of the original guide rail 7 '. Figure gb shows the relationship between the propagation delay or bypass time (Tρ), electrical length (), and physical length (S) of the original wire / track 17. For each of the missing phase waveforms φ 1, φ 2 and the transmission line 15 that is repeatedly detoured by the traveling wave as shown, each square wave offset is equivalent to a full turn, that is, a detour time τρ, and the subsequent opposite waves The offset requires two consecutive turns, that is, two detour times (2xΤρ). One turn of the transmission line 15 has 180 ° 'electrical length', and two turns need a complete 0 °-360. The two-pole signal loop is equivalent to the full length of the original conductor 17. For example, an electrical length of 180 ° is equivalent to one turn and 1/2 wavelength 1 GHz can form a 50mm transmission line with a phase velocity (pv) equal to 30% of the speed of light (c), that is, Pv = 0. 3 * c, or 5 mm where Pv = 0 · 03 * c, or 166 mm free space, ie, where Pv = 1 * c. Figures 7 (i) -7 (ix) show that the waveform φ1, Φ2 pass through a full cycle to the beginning of the next cycle, especially at the position of 17 samples along the conductor line or the road, and the distance is the same 45 ° electrical length. . The phase indication can be track 17 according to Figure 7 (i). This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 A7 _B7 5. Anywhere in the description of the invention (1 彳), That is, the transmission line 15 has two turns. For example, φ1 and φ2 waveform 15 rise / fall at 0/360 °. Set 7 (i) to time t0, and Figure 7 (ii) shows the wave pattern Φ1, Φ2 at time t0 + (0.25 Tp) after the detour 1 of the full length S of the bypass line 17 (0.125 S), which is equal to the detour 1 / 4 Transmission line 15 and 45 ° electrical length. Time t0 + (0 · 5 Tp), t0 + (0.75 Tp), t0 + (0.75 Τρ) ... t0 + (2 Tp); Bypass 0 · 25 S, 0.375 S, 0 · 5 S, ··· ·· 1.0 S and 90. , 135 °, 180. ····· 360 ° are shown in Figure 7 (iii)-(ix). Figures 8a and 8b show the offset polarity draw (as shown by the circle), the offset current (as shown by the arrow), and the instantaneous phase, covering two turns from any 0/3 60 ° position on the electromagnetic loop transmission line Transmission line (equivalent to the full length of the continuous original conductor). Fig. 7 shows only a differential traveling 'electromagnetic (EM) wave pattern (takes φ 1), but the rotation propagation along the transmission line 15 can be in any opposite direction, i.e., clockwise or counterclockwise. The other wave pattern (Φ 2) is of course different from the display wave pattern (Φ 丨). . The actual direction of rotation of the EM wave is represented by the poyntingS vector, that is, the cross product of electrical and magnetic vectors. The cross-section 19 produces a slight agitation of the signal Φ 1 or Φ 2 when the EM wave is detoured. As a result, the fast up / down transition moves at a phase speed around the transmission line, and the switching amplifier 21 amplifies the transition when switching between the supply voltages for the first time. The phases of the wave patterns Φ 1 and φ 2 of the transmission line 15 can be accurately determined from any arbitrary reference point on the transmission line 5 and the result has strong phase correlation and stability. Appropriate for bidirectional operation (really suitable for existing IC manufacturing technology and habits) Switching amplifier 21 is based on back-to-back Mosfet inverters 23a, b. This switching inverting amplifier can be equipped along the standard length of the transmission line structure in this article up to 100 〇 Pair of & Zhang scales suitable for financial projects (CNS) domain ^ χ297H ----- ~ ---

ijij

496038 A7 B7 五、發明説明（12 ) 以上。切換放大器2 1的雙向反轉操作為同步調整性質。與一白的傳統定時訊號比較，波型φ 1及φ 2的上升及下降時間: 以反相器23a，b的Mosfet電晶體的電子變換時間為基準，確實是非常迅速。另外，傳輸線15具有比較佳雙向切換放大器21的反相器的任何，開，電晶體為低的阻抗需要增強，雖然全部並聯對同樣問題有用。切換反向器設備使各放大器 2 1藉由對稱小把量脈衝造成的波極性必須向兩方向傳播°，如需要，向前引導EM波脈衝以達成作用。退回到先前切換放大器21的反向EM波脈衝極性與現有相同，因而增強原有切換狀®。電力供應軌與傳輸線1 5之間經過切換放大器21 的，開，電晶體之電阻路徑確保反向EM波脈衝的能量被電力供應軌V+，GND吸收，如此對能源節省有用。必須了解可用CMOS以外的技術執行，例如，使用N-頻道上拉，P-頻道下拉，二極電晶體，負電阻裝置例如Gunn 二極體，Mesfet，等。關於傳輸線15，例如，適當媒體應用於ICs及pcBs及連接成一般所謂微波帶或同平面波導或帶線，及熟知的可成型石印，如，電阻提花及蝕刻。實用Ic上面傳輸線的介電質包括二氧化矽（Si〇2)通常當作磁場氧化物，内金屬介電質，及基板介電質（至少用於半絕緣設備，如矽絕緣體型。）圖9為1C上面傳輸線層範例的部份斷面圖包括三金屬層 56, 58及60及二介電層62外64。中間金屬層58如圖示包括 _ -15- 本纸張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 496038 A7 ____B7 五、發明説明（13 ) 兩傳輸線迥路導軌15a及15b至少大約平行。上金屬層6〇可作為AC，接地’平面連接至正供應電壓v+，下金屬層5 6係一’接地’平面而可被連接至負供應電壓GNd。介電層62及 64在58金屬傳輸線執道與，接地，平面56之間及58標準使用二氧化矽形成 '整個顯示的結構係按照需要，實用上可能不必要如包括一或一 |接地·平面及介電層62，64。導軌 15a，15b之間的物理間隔66影響訊號傳播的差動及共同模式’較理想，速度必須相等，或大致相等，以便達到間隔 66電磁場的最小散播。使用接地平面改善濾波性質，如提供結構此力以便驅動不對稱負載，即不平衡，的導軌 15a ， 15b 〇標準IC CMOS方法上面的内金屬介電層很薄，約為〇.7#m，由於微波帶傳輸線特性含低訊號損失，必須具有低特性阻抗Zo (—向用於無端接，部份端接或_連端接點以減少訊號折射至可控制量）。自持，無端接，閉合迥路傳輸線Η 具有很低電力消耗以維持移動£1^波振盪，而須要克復的介電及導體損失很低。從圖5b ,必須了解，如果傳輸線15及放大器21沒有電阻損失，則傳輸線15除原來充電傳輸線μ 電感及電容元件需要的能量不再f要能量。EM波利用傳輸線15的全部能量繼續繞傳輸線15移動，在電及磁場之間，即電容Ce及電感Le元件，傳送或循環。雖然傳輸線15及放大器21必須有一些電阻損失，見圖“傳輸線電阻元件r『 R2 ’標準電阻很低，而產生的電阻損失也很低。使用低阻抗傳輸線15並無不利，而且有電容負載少影響的優點，因 496038 A7 _ B7 五、發明説明（14 ) 而造成邏輯閘有較「強力」的驅動。 1C上的交又19可藉由金屬層之間的「通孔」完成，較理想各處孔僅使用傳輸線15總長度S的一小部份。傳輸線15只有一放大器21連接該傳輸線時會有誤差，而且EM波不再繞傳輸線15移動因而產生停止波振盧，見圖 10a單一放大器21及圖10b差動波型。該種放大器不超出放大器15電學總長的5°，如果該單一放大器21不能完全「通過」或「離開」停止正弦波移動，傳輸線15會產生振i , 並改變含相同相位的振幅於相同位置包括兩固定，兩，零，區域。然後的行波操作使用少分隔或只有一長型CMOS雙向放大器構造，雖然多數小反相器會產生較平滑快速的結果。放大器21的偏離構造，甚至只有輸入/輸出端子，可預先安排EM波向傳輸線繞行的一方向移動，例如根據特別起動器境路將弟一及及稍候弟》—脈衝在不同位置驅上傳輸線，或併入一些已知的微波方向耦合器。反相傳輸線變壓器可以用來取代交叉（19)並且仍然具有環狀電磁連續性，見圖11局部詳細21T。圖12顯示一對背對背反相器23a，23b含電源線接頭及如圖5b傳輸線分配電感（L/2)及電容（C)元件顯示。圖13a顯示背對背反相器14a及14b的N-頻道及P-頻道Mosfet執行’見 NM0S及PM0S電晶體以夕卜。圖13b顯示NM0S(N1，N2)及PM0S(P1，P2)電晶體含寄生電容的當量電路圖，電晶體P2及N2的閘端子連接導軌 ___-17- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 496038 A7 __B7 五、發明説明（15 ) 15a及電晶體P2及N2的汲極端子。同樣，電晶體P2及N2的閘端子連接導軌15b及電晶體pi及N1的汲極端子。PMOS閘源電容CgsPl及CgsP2，PMOS閘汲電容CgdPl及CgdP2，及 PMOS汲極源及基板電容CdbPl及CdbP2，同樣NMOS閘源電容CgsNl及CgsN2，NMOS閘汲極電容CgdNl及CgdN2，及 NMOS汲源及基板電容CdbNl及CdbN2均主動吸入傳輸線特性阻抗Zo，所以對各NMOS及PMOS電晶體的變換時間影響大幅減少。波型Φ 1及Φ 2的上升及下降時間比先前電路快許多。為了容易了解圖12- 14省略相關的電阻元件（R)，圖23a只顯示傳輸線15及N/PMOS的電容元件（如圖12及13b)。圖14b 顯示圖14a其他當量電路圖包括該傳輸線分配電感（L/2)元件及主動電容係數Ceff :496038 A7 B7 5. Description of the invention (12) above. The bidirectional inversion operation of the switching amplifier 21 is a synchronous adjustment property. Compared with Yibai's traditional timing signal, the rise and fall times of the waveforms φ 1 and φ 2 are based on the electronic conversion time of the Mosfet transistors of the inverters 23a, b, which is indeed very fast. In addition, the transmission line 15 has any of the inverters of the two-way switching amplifier 21 which is better, and the resistance of the transistor to be low needs to be enhanced, although all parallels are useful for the same problem. Switch the inverter device so that the polarity of the waves caused by the symmetrical small handle pulses of each amplifier 21 must propagate in both directions. If necessary, guide the EM wave pulse forward to achieve the effect. Back to the previous switching amplifier The reverse EM wave pulse has the same polarity as the existing one, thus enhancing the original switching shape. Between the power supply rail and the transmission line 15 through the switching amplifier 21, the resistance path of the transistor ensures that the energy of the reverse EM wave pulse is absorbed by the power supply rail V +, GND, which is useful for energy saving. It is important to understand that it can be implemented with technologies other than CMOS, for example, using N-channel pull-up, P-channel pull-down, diodes, negative resistance devices such as Gunn diodes, Mesfet, etc. Regarding the transmission line 15, for example, appropriate media are applied to ICs and pcBs and connected into so-called microwave bands or coplanar waveguides or strip lines, and well-known formable lithographs such as resistance jacquard and etching. The dielectrics of practical transmission lines above Ic include silicon dioxide (SiO2), which is commonly used as magnetic field oxides, internal metal dielectrics, and substrate dielectrics (at least for semi-insulating devices, such as silicon insulators). 9 is a partial cross-sectional view of an example of a transmission line layer above 1C, including three metal layers 56, 58 and 60 and two dielectric layers 62 and 64. The intermediate metal layer 58 includes as shown in the figure. -15- This paper size is applicable to the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 A7 ____B7 V. Description of the invention (13) Two transmission line cross-rail guides 15a and 15b At least approximately parallel. The upper metal layer 60 can be used as AC, and the ground 'plane is connected to the positive supply voltage v +, and the lower metal layer 5 6 is a' ground 'plane and can be connected to the negative supply voltage GNd. The dielectric layers 62 and 64 are connected to the 58 metal transmission line, grounded, and the plane 56 and 58 standards are formed using silicon dioxide. The entire display structure is based on needs, and may not be necessary in practice such as including one or one | grounding. Planar and dielectric layers 62,64. The physical space 66 between the guide rails 15a, 15b affects the differential and common mode of signal propagation. It is ideal, and the speeds must be equal, or approximately equal, in order to achieve the minimum spread of the electromagnetic field at the space 66. Use the ground plane to improve the filtering properties, such as providing the structure to drive asymmetric loads, that is, unbalanced rails 15a, 15b. The inner metal dielectric layer on the standard IC CMOS method is very thin, about 0.7 # m, Because the characteristics of the microwave band transmission line include low signal loss, it must have low characteristic impedance Zo (—used for unterminated, partially terminated, or connected termination points to reduce signal refraction to a controllable amount). Self-sustaining, unterminated, closed-loop transmission line Η has very low power consumption to maintain mobile £ 1 ^ wave oscillations, and requires minimal dielectric and conductor losses. From FIG. 5b, it must be understood that if the transmission line 15 and the amplifier 21 have no resistance loss, the transmission line 15 needs no energy except the energy required to charge the transmission line μ inductor and capacitor. The EM wave uses the entire energy of the transmission line 15 to continue to move around the transmission line 15 and is transmitted or circulated between the electric and magnetic fields, that is, the capacitance Ce and the inductance Le element. Although the transmission line 15 and the amplifier 21 must have some resistance loss, see Figure "Transmission line resistance element r" R2 'The standard resistance is very low, and the resistance loss is also very low. There is no disadvantage in using low impedance transmission line 15 and there is less capacitive load The advantage of the impact is due to the 496038 A7 _ B7 V. Invention description (14) causes the logic gate to have a "stronger" drive. Intersection 19 on 1C can be completed by "through holes" between the metal layers. It is more desirable to use only a small portion of the total length S of the transmission line 15 for each hole. There is an error in the transmission line 15 when only one amplifier 21 is connected to the transmission line, and the EM wave no longer moves around the transmission line 15 and a stop wave is generated. See Figure 10a for a single amplifier 21 and Figure 10b for a differential wave pattern. This type of amplifier does not exceed 5 ° of the total electrical length of amplifier 15. If the single amplifier 21 cannot completely "pass" or "leave" to stop the sine wave movement, the transmission line 15 will generate vibration i and change the amplitude with the same phase at the same position including Two fixed, two, zero, zone. Subsequent traveling wave operations are constructed using less separation or only a long CMOS bi-directional amplifier, although most small inverters produce smoother and faster results. The deviation structure of the amplifier 21, even only the input / output terminals, can be arranged in advance to move the EM wave in a direction around the transmission line. Transmission lines, or incorporate some known microwave directional couplers. The inverting transmission line transformer can be used to replace the crossover (19) and still have toroidal electromagnetic continuity, see 21T for details. Fig. 12 shows a pair of back-to-back inverters 23a, 23b including power line connectors and the transmission line distribution inductance (L / 2) and capacitor (C) components as shown in Fig. 5b. Figure 13a shows the N-channel and P-channel Mosfet implementations of the back-to-back inverters 14a and 14b. See NMOS and PMOS transistors for further details. Figure 13b shows the equivalent circuit diagram of NM0S (N1, N2) and PM0S (P1, P2) transistors with parasitic capacitance. The gate terminals of the transistors P2 and N2 are connected to the guide rails. -17 A4 specification (210X297 mm) 496038 A7 __B7 V. Description of the invention (15) 15a and drain terminals of transistors P2 and N2. Similarly, the gate terminals of the transistors P2 and N2 are connected to the rail 15b and the drain terminals of the transistors pi and N1. PMOS gate-source capacitors CgsPl and CgsP2, PMOS gate-source capacitors CgdPl and CgdP2, and PMOS drain-source and substrate capacitors CdbPl and CdbP2, as well as NMOS gate-source capacitors CgsNl and CgsN2, NMOS gate-source capacitors CgdNl and CgdN2, and NMOS source Both the substrate capacitances CdbN1 and CdbN2 actively suck the characteristic impedance Zo of the transmission line, so the influence on the conversion time of each NMOS and PMOS transistor is greatly reduced. The rise and fall times of the waveforms Φ 1 and Φ 2 are much faster than the previous circuit. For easy understanding of Figure 12-14, the relevant resistance element (R) is omitted, and Figure 23a shows only the transmission line 15 and the N / PMOS capacitor (see Figures 12 and 13b). Figure 14b shows other equivalent circuit diagrams of Figure 14a including the transmission line distributed inductance (L / 2) element and active capacitance coefficient Ceff:

Ceff=C+CgdN+CgdP+ [(CgsN+CdbN+CgsP+CdbP)/4]; 其中：CgdN=CgdNl+CgdN2 ;Ceff = C + CgdN + CgdP + [(CgsN + CdbN + CgsP + CdbP) / 4]; where: CgdN = CgdNl + CgdN2;

CgdP=CgdPl+CgdP2 ;CgdP = CgdPl + CgdP2;

CgsN=CgsNl+CgsN2 ；CgsN = CgsNl + CgsN2;

CdbN=CdbNl+CdbN2 ；CdbN = CdbNl + CdbN2;

CgsP= CgsPlH-CgsP2 ；及 CdbP=CdbPl + CdbP2。由閘，沒極，源及基板連線電容引起的電容負載，較理想，如前述分配。具有差動及共同模式的傳輸線的優點為Mosfet電晶體内固有的寄生電容可由傳輸線阻抗Zo吸入，如圖14a及14b所 -18 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 4外038 A7 _____ B7 五、發明説明（16 ) 示’並可用來傳送及儲存能量。NMOS及PMOS電晶體的閘· 源電谷（Cgs)在訊號導執15a，15b與各別供應電壓軌之間出現並可藉由從傳輸線15連接至供應電壓軌以除去適當電容量而補偵’即導軌15a，i5b適當減薄。NMOS及PMOS電晶體的閘-沒極電容（Cgd)在導軌15a，15b之間出現並可藉由比例增加導軌l5a，i5b連接反相器23a/b的NMOS及PMOS電晶體之間的間隔66而補償。以非電阻為例，0.35 Mm CMOS方法，可用的5 GHz非重疊時鐘訊號必然造成相速度為30%光速而傳輸線迥路長度 (S/ 2)為9刪’如電容分流負載分配及介電常數決定，導體 17的總長度（s)為18 min。 NMOS及PMOS電晶體的基板接點電容（Cdb)因使用半絕緣或矽絕緣器型的技術方法可大幅減少。有一連續的DC路徑直接連接各放大器21的端子，即，各輸入/輸出端子及所有反相器23a，23b，但此路徑的特性為沒有穩定DC操作點。這種dc不穩性對於各放大器21i_21 的再生作用及正回饋作用有利。傳輸線15可以繞函數邏輯方塊形成閉合迴路經「分接」獲得「現場」時鐘訊號。CM0S反相器可作為傳輸線15的電容「短線」「分接放大器」使用。並可藉由消除相當的傳輸線現場電容量而脫離共振，即，如上述現場減薄導軌 (1 5a/ 1 5b)。電容「時鐘分接頭」可以根據間隔設計沿傳輸線15均勻擴散’如果間隔小於振盧訊號波長，則會減緩em 波傳播及降低傳輸線15的特性阻抗Zo，但仍然具有優退良 ____ -19- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 496038 17 五、發明説明（訊號傳輸特性。在比時鐘訊號波長小的函教邏輯方塊内，無端足作相位協調現場定時，見圖15。為了清楚，傳輸線15的一對連接如顯不稍為偏離，雖然，習慣上為彼此相反。另外無分接頭設備包括光雙向被動電阻，電感或傳輸線性質，或單向或反轉連接，包括以下說明的傳輸線⑽此互相連接。多數j盪器及傳輸線15可以連接或連結成本發明的另外一種狀·#’包括兩者相位及頻率同#，假定任何標稱頻率失配不大。電阻，電容，電感或傳輸線連接/連結的正確長度’或其中任何合併，可以產生優良雙向訊號連接。傳輸線之間連結或訊號連接可使用已知連結技術達成如用於微波微帶電路，一般包括分擔相.鄰傳輸線之間電磁及/或電通。單向連接也有優點。接頭及連結器可以維持多數傳輸線振盪器繞行大系統，不論是在ICs之内或IC之間，即，印刷電路板（PCBs)上面的同步性及諧和性。二或以上傳輸線的連接/連結及交叉連接的規範與 Kirchoff電流定律相似，但是基本原理為輸入任何數目的傳輸線接點，即，連接或連結，的能量等於該接點輸出的也量’即是該接點不積存能量。如果供應電壓不變，該規範即成為Kirchoff電流定律。在實例中，三傳輸線共一接點，最為簡單，但非唯一，解決方法為一傳輸線具有的特性阻抗為另外一傳輸線的一半。如果是偶數連結傳輸線，則個別的特性阻抗相等。不過’滿足Kirchoff電流定律的阻抗連結數目供限。在一傳輸線内，交叉連接規範與上述 ___ - 20 - 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公釐)CgsP = CgsPlH-CgsP2; and CdbP = CdbPl + CdbP2. The capacitive load caused by the gate, non-polar, source, and substrate connection capacitance is more ideal, as described above. The advantage of transmission lines with differential and common modes is that the parasitic capacitance inherent in the Mosfet transistor can be sucked in by the transmission line impedance Zo, as shown in Figures 14a and 14b-18-This paper size applies to China National Standard (CNS) A4 (210X297 mm) ) 4 Wai 038 A7 _____ B7 V. Description of the invention (16) It can be used to transfer and store energy. NMOS and PMOS transistor gates and source valleys (Cgs) appear between the signal directors 15a, 15b and the respective supply voltage rails and can be supplemented by removing the appropriate capacitance by connecting from the transmission line 15 to the supply voltage rails 'That is, the guide rails 15a, i5b are appropriately thinned. NMOS and PMOS transistors' gate-to-electrode capacitors (Cgd) appear between the guide rails 15a, 15b and the ratio between the guide rails 15a, i5b and the interval between the NMOS and PMOS transistors of the inverter 23a / b 66 And compensation. Take the non-resistance as an example. With the 0.35 Mm CMOS method, the available 5 GHz non-overlapping clock signal will inevitably result in a phase speed of 30% and the transmission line stub length (S / 2) of 9, such as capacitor shunt load distribution and dielectric constant. It was determined that the total length (s) of the conductor 17 was 18 min. The substrate contact capacitance (Cdb) of NMOS and PMOS transistors can be greatly reduced by using semi-insulating or silicon insulator technology. There is a continuous DC path directly connected to the terminals of each amplifier 21, i.e., each input / output terminal and all inverters 23a, 23b, but the characteristic of this path is that there is no stable DC operating point. This dc instability is beneficial to the regenerative effect and positive feedback effect of each amplifier 21i_21. The transmission line 15 can form a closed loop around the function logic block to obtain a "live" clock signal via "tap". The CM0S inverter can be used as a capacitor "stub" and "tap amplifier" for transmission line 15. It is also possible to get rid of resonance by eliminating the equivalent field capacitance of the transmission line, that is, thinning the rail (15a / 15b) as described above. The capacitor "clock tap" can be evenly diffused along the transmission line 15 according to the interval design. 'If the interval is less than the wavelength of the Zhen Lu signal, it will slow down the em wave propagation and reduce the characteristic impedance Zo of the transmission line 15, but it still has excellent regression____ -19- This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 17 V. Description of the invention (Signal transmission characteristics. In a logic logic block with a wavelength smaller than the clock signal, there is no reason for phase coordination field timing See Figure 15. For clarity, a pair of connections of transmission line 15 are not slightly deviated, although, it is customary to be opposite to each other. In addition, tap-free equipment includes optical bidirectional passive resistance, inductance or transmission line properties, or unidirectional or inverted Connections, including the transmission lines described below, are connected to each other. Most j-oscillators and transmission lines 15 can be connected or connected. Another aspect of the invention includes the phase and frequency of both, assuming any nominal frequency mismatch is small. .Resistance, capacitance, inductance, or the correct length of the connection / connection of the transmission line 'or any combination thereof, can produce a good two-way signal connection The connection or signal connection between transmission lines can be achieved using known connection technology. For example, it is used in microwave microstrip circuits, which generally includes shared phases. Electromagnetic and / or electrical communication between adjacent transmission lines. Unidirectional connections also have advantages. Connectors and connectors can be maintained Most transmission line oscillators bypass large systems, whether within ICs or between ICs, that is, synchronicity and harmony on printed circuit boards (PCBs). Specifications for the connection / linkage and cross-connection of two or more transmission lines and Kirchoff's current law is similar, but the basic principle is that the energy of any number of transmission line contacts, that is, connections or connections, is equal to the amount of output from the contact, that is, the contact does not accumulate energy. If the supply voltage does not change, the The specification becomes Kirchoff's current law. In the example, three transmission lines have one contact point, which is the simplest, but not the only one. The solution is that one transmission line has half the characteristic impedance of the other transmission line. If it is an even-numbered transmission line, the individual The characteristic impedances are equal. However, the number of impedance connections that meet Kirchoff's current law is limited. In a transmission line, Fork connection specification above ___ - 20 - this paper scale applicable Chinese National Standard (CNS) A4 size (210X297 mm)

二或以上傳輸線連接的規範相同。如果符合下列規範，傳輸線網15上各點會有高品質的差動訊號波型Φ1及Φ2，相位及振幅： (i) 傳輸線基本上符合電學長度 (H) 滿足上述Kirchoff功率規範 (iii) 相位反轉當然’無限數連結傳輸線網設計及供應電壓會符合上述三規範，例如·的慢而低阻抗的短傳輸線連接快而高阻抗的長傳輸線；及一及/或三維結構，等。不過，欲獲得最佳波型及最低寄生電力損失，共同模式及差動模式的相位速度’即’偶數及奇數模式，必須大致相等。相位速度，相等或大致相等’可以設計成一種改變傳輸線電容系統。供應電壓v+不需要整個系統不變，假定上述Kirch〇ff功率/阻抗維持並產生電壓變換系統，則結合反向器23&及231) 的同步碉整，系統的不同部份可以在不同供應電壓下操作及在系統的不同部份之間雙向傳送電力。圖16顯示兩相同傳輸線振盪器的連接以便頻率及相位自行同步。傳輸線15ι及的迥路導軌共同部份係二重連接，符合上述Kirchoff功率/阻抗規範，因為該部份的阻抗為傳輸線15i&152其餘部份阻抗（z〇)的一半，及該共同部份傳送兩傳輸線15i&i52的旋轉波能量。如上述，一傳輸線的原始執道長度S為決定振盪頻率的因素，所以，傳輸線15 !及152使用相同媒體及其相同長度S會有相同振盪頻率 F及相位諧調。圖16中，各em波繞傳輸線15!及152以相反 ______-21 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)The specifications for two or more transmission line connections are the same. If the following specifications are met, there will be high-quality differential signal waveforms Φ1 and Φ2 at each point on the transmission line network 15, phase and amplitude: (i) the transmission line basically meets the electrical length (H) meets the above Kirchoff power specification (iii) phase Reversed course, the design of the unlimited number of transmission line networks and the supply voltage will meet the above three specifications, such as: • Slow and low impedance short transmission lines connected to fast and high impedance long transmission lines; and one and / or three-dimensional structures. However, in order to obtain the best waveform and the lowest parasitic power loss, the phase speeds of the common mode and differential mode, i.e., the even and odd modes must be approximately equal. Phase velocity, equal or approximately equal 'can be designed as a system that changes the capacitance of the transmission line. The supply voltage v + does not need to be constant throughout the system. Assuming the Kirchff power / impedance is maintained and a voltage conversion system is generated, combined with the synchronous trimming of inverters 23 & and 231), different parts of the system can be at different supply voltages. Operating and transmitting power in both directions between different parts of the system. Figure 16 shows the connection of two identical transmission line oscillators for frequency and phase self-synchronization. The common part of the transmission line 15m and the double-track guide is double-connected, which meets the Kirchoff power / impedance specification mentioned above, because the impedance of this part is half of the impedance (z0) of the rest of the transmission line 15i & 152, and the common part The rotational wave energy of the two transmission lines 15i & i52 is transmitted. As mentioned above, the original length S of a transmission line is a factor that determines the oscillation frequency. Therefore, transmission lines 15 and 152 using the same medium and the same length S will have the same oscillation frequency F and phase tuning. In Figure 16, each of the em waves is wound around the transmission lines 15! And 152 in the opposite direction. ______- 21-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm)

裝訂Binding

496038 A7 B7 五、發明説明（19 ) 方向行進及循環，見箭頭1L&2L (或是相對），類似齒輪嚙合的情況。這種傳輸線雙重連接可立即按序擴及到任何數目的「嚙合」連接傳輸線振盪器。圖17a顯示兩相同傳輸線振盪器含傳輸線15ι及152直接連接在分散位40及42以達到頻率及相位自行同步化的另一實例。圖17b顯示該種經被動元件44, 46直接連接成為電阻，電容或電感或任何可行結合。圖17c顯示該種經單項設備Μ 直接連接，該設備可能是反相器5〇1及5〇2。單項設備以確保從一條傳輸線（152)回到另一條（15ι)不發生連結或訊號折射，即只有另一條路。循環EM波的行進方向由箭頭 1L , 2L表示，根據希望作為.平行連接的傳輸線對具有反向灯波，實線，但隨意，表示傳輸線振盪器15丨，而虛表示傳，線振堡器152。圖18為圖m的兩自行同步化傳輸線振盧器的方便簡化表示，類似的表示會在下圖出現。圖19a顯tf四個自行同步化傳輸線振盪器15ι·丨、連接，基本上如圖17a· 17e ’但另外提供本發明第五主動傳輸線定時訊號源’根據四傳輸線振1器15rl54 EM波的環形方向1L· L4提供循環行進_波。如圖示中心、第五傳輸線振湯器實質上包括其他四振逢器的各一部份及具有一環形方向5L，與其他相反，特別為順時鐘，而1L_L4為反時鐘方向。必須了解，這種傳輸線振i器連接一起的方法也可擴任何而要數目及任何需要的全圖案變化以覆蓋任何需要的地另外一種連接如圖19b所示 ,其中中心第五傳輸線振盪器496038 A7 B7 V. Description of the invention (19) Directional travel and circulation, see arrow 1L & 2L (or relative), similar to the case of gear engagement. This dual transmission line connection can be immediately extended to any number of "mesh" connected transmission line oscillators. Fig. 17a shows another example of two identical transmission line oscillators including transmission lines 15m and 152 connected directly to scattered bits 40 and 42 to achieve frequency and phase self-synchronization. Figure 17b shows that the passive components 44, 46 are directly connected to form a resistor, capacitor or inductor or any feasible combination. Figure 17c shows this kind of direct connection via a single device M, which may be inverters 501 and 502. A single item of equipment to ensure that there is no connection or signal reflection from one transmission line (152) to another (15), that is, there is only another way. The traveling direction of the cyclic EM wave is indicated by arrows 1L, 2L, according to the wish. Parallel transmission line pairs have reverse light waves, solid lines, but random, which means the transmission line oscillator 15 丨, and imaginary transmission, line vibrator. 152. Fig. 18 is a convenient simplified representation of the two self-synchronized transmission line oscillators of Fig. M, and a similar representation will appear in the following figure. Figure 19a shows tf four self-synchronized transmission line oscillators 15ι · 丨 connected, basically as shown in Figure 17a · 17e 'but additionally provides the fifth active transmission line timing signal source of the present invention' according to the ring of the four transmission line oscillator 15rl54 EM wave Direction 1L·L4 provides cyclic travel_waves. As shown in the center of the figure, the fifth transmission line vibrating soup device actually includes each part of the other four vibrating devices and has a ring direction of 5L, contrary to the others, especially clockwise, and 1L_L4 is the counterclockwise direction. It must be understood that this method of connecting the transmission line oscillators can also be expanded to any number and any required full pattern change to cover any required ground. Another connection is shown in Figure 19b, where the center fifth transmission line oscillator

發明說明為非循％型’但是不僅有用並且有利於取得定時訊號所需的相位。、圖2〇顯示兩自行同步振盪器含傳輸線151及152實際上並無連接，但操作上磁連結；其目的係有利於使用延長的傳輸線以便達到更多更好的磁連結。圖21顯示另一磁連結自仃同步振盪器含傳輸線151及Η:的實例，基本上如圖2〇， : 連結加強磁鐵帶52放在磁連結相鄰部份之間。圖22顯示三自行同步傳輸線振盪器含傳輸線Η!，Μ?及 153由放在傳輸線15!及152之間的第一磁鐵帶52，及放在傳輸、’泉152及153之間的第二磁鐵帶磁連結。作為振盪訊號源，傳輸線152不需要任何再.生設備21只要足夠振盪能量從構成設備的其他傳輸線151及153連結。實用上:傳輸線 152需要較長及較大周圍面積而不需要或具有再生設備21，也不需要交叉19 ;較理想為奇數倍長度（3S , 5S，7S，等）或至少電學長度至少等於傳輸線15ι及153之一。當然，另外隱含頻率鎖定及相位鎖定的自行同步振盪器於適當間隔 (如使用傳輸線& 153)。另外的替代實例包括使用介電材料（未顯示）跨過導軌電磁連結部份的上面及/或下面。以不同頻率同步操作傳輸線振量器不但可行且實際。圖 24中，兩自行同步振盈器的傳輸線為不同電學長度。特別，使用相同傳輸線設備/材料，第一傳輸線ΐ5ι具有總導體長度S及基礎振盪頻率F=F1，與具有總導體長度為第— 傳輸線15l的總導體長度三分之_ ’即3/3,頻率為3F，的 ___ - 23 _ ------ 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公爱了五、發明説明（ 21 A7 B7 ，1、52連結及同步。虛線箭頭表示腹波的旋轉方向。 -連接如圖17a- c所示，雖然其他技術也可以使用。自行 2步係由於上述強力第三言皆波⑶）的第一傳輸線A為方土。相似的結果來自較高奇數諧波，如，汀，7F，等頻率。在t同奇數讀波相關頻率操作的振盪器傳輸線之間的較佳，…為單向，使較低自然頻率線（1 $ 1)不受激勵以嘗試與車乂冋自然頻率線(i 52)同步。任何數目的不同奇數諧波相關頻率的振盈器傳輸線可以連結在一起及同步，如圖％所示〇裝丁循環傳輸線振盈器可用來產生及分配基準定時訊號，如時4里，於半導體積體電路（IC)内；及也用於印刷電路板 (PCB) ’如’用來固定及連接電路包括多數ICs，或，其他任何確實需要定時基準訊號的適當裝置/系統。用於ICs如’根據1C製造方法及其發展計劃模擬使用工業標準SPICE技術證明非常高頻率，至數千GHz，的時鐘訊號的供應潛勢。訊號產生及分配可以主動存於及用於含預定相位及其間相位關係的1C的各部份，包括許多具有相同或不同頻率的時鐘訊號。另外，傳輸線振盪器的操作原理及其自行同步相亙連結不只提供任何1C内及ICs之間操作電路可靠定時訊號服務，並且可以確信對ICs間資料傳送也很重要並具創意。整個傳輸線15设備及電路網包括再生電路21的振湯。傳輸線1 5無端操作，即，傳輸線形成一閉合迥路。傳輸、線白勺 -24- 本纸張尺度^用中國國家標準(CNS) A4規格(210X297公釐) 496038 A7 一___B7 五、發明説明（22 ) 特性阻抗Zo很低及只需頂部能量維持振盧。較理想，兩導軌15a，15b之間的阻抗均勻分配，以便獲得良好平衡，有助達成良好定義差動訊號波型（φ1，φ2)。如果訊號Φ1，Φ2在傳輸線15上遇到這種18〇。或接近18〇。的所有反相放大器21連接傳輸線丨5的相位移位要求，便會產生共振，即，所有放大器21在沿傳輸線丨5各點之間已知相位關係的協調狀態下操作^兩種訊號能量，電感及電容，即磁力及電力，傳送至傳輸線15，如為差動模式在訊號導體15a，15b之間，如為兩個別共同模式則在各訊號導體與基準接地之間（如果沒有上面及下面接地平面，則不存在，也不用無遮屏絞線電纜連接）。 CMOS反相器為非線型操作切換及放大電器元件，具有交叉傳導電流低損失，因為正常會有損失的電晶體，輸入，閘及，輸出，汲極電容包括電晶體基板電容都被吸入交變的阻抗Zo，所以電力消耗並不遵守一般1/2 · CV2公式。通常假設因MOS電晶體閘電容加入及排出的電力散失為不可避免。不過，傳輸線15的自持振盪性質能以低電力損失起動電晶體閘的端子。這是由於事實需要的起動能量係在靜電場中’即MOS閘的電容的電容場及磁場，即傳輸線 15電感場元件，之間交變。所以，傳輸線丨5内含有的能量不會完全散失，事實上在循環。能量節省適用於傳輸線15 所有操作連接的電晶體閘。設想這種低損失效率的傳輸線振盪器可作為定時ICs用於许多從前流行的邏輯系統，該系統因不能用已經廢棄，原 —_ - 25 - 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐)DESCRIPTION OF THE INVENTION It is a non-cyclic type 'but not only useful but also useful for obtaining the phase required for timing signals. Fig. 20 shows that the two self-synchronizing oscillators including transmission lines 151 and 152 are not actually connected, but are magnetically connected. The purpose is to facilitate the use of extended transmission lines in order to achieve more and better magnetic connections. FIG. 21 shows another example of a magnetically coupled self-oscillating synchronous oscillator including transmission lines 151 and Η :, basically as shown in FIG. Figure 22 shows three self-synchronous transmission line oscillators including transmission lines Η !, M? And 153 by a first magnet band 52 placed between transmission lines 15! And 152, and a second place placed between transmission, 'Spring 152 and 153. Magnet with magnetic link. As the oscillating signal source, the transmission line 152 does not need any regenerating equipment. The generating equipment 21 needs only sufficient oscillating energy to be connected from the other transmission lines 151 and 153 constituting the equipment. Practically: the transmission line 152 needs a longer and larger surrounding area without the need for or with regeneration equipment 21, and does not need to cross 19; ideally it is an odd multiple of the length (3S, 5S, 7S, etc.) or at least the electrical length is at least equal to Transmission line one of 15ι and 153. Of course, there are also frequency- and phase-locked self-synchronizing oscillators at appropriate intervals (eg, using transmission lines & 153). Additional alternative examples include the use of a dielectric material (not shown) across the top and / or bottom of the rail's magnetically connected portion. It is not only feasible and practical to operate transmission line vibrators simultaneously with different frequencies. In Figure 24, the transmission lines of the two self-synchronizing oscillators have different electrical lengths. In particular, using the same transmission line equipment / material, the first transmission line ι5ι has a total conductor length S and a fundamental oscillation frequency F = F1, and has a total conductor length of the third-threeth of the total conductor length of the transmission line 15l_ ', ie 3/3, Frequency is 3F, ___-23 _ ------ This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297). 5. Invention description (21 A7 B7, 1, 52 link and synchronization The dotted arrow indicates the direction of rotation of the abdominal wave.-The connection is shown in Figures 17a-c, although other techniques can also be used. The first transmission line A of 2 steps is due to the strong third word (3). The first transmission line A is square earth. Similar results are derived from higher odd harmonics, such as Ting, 7F, etc. It is better to use t between the transmission lines of oscillators operating at odd frequency-related frequencies, ... for unidirectional, making lower natural frequency lines ( 1 $ 1) Unexcited to try to synchronize with the natural frequency line (i 52) of the car. Any number of oscillator transmission lines with different odd harmonic-related frequencies can be connected and synchronized, as shown in Fig. Ding loop transmission line oscillator can be used to generate and distribute Benchmark timing signals, such as 4 miles, in semiconductor integrated circuits (ICs); and also used in printed circuit boards (PCBs) 'such as' to fix and connect circuits including most ICs, or any other timing reference that does require Appropriate device / system for signals. Used for ICs such as' according to 1C manufacturing method and its development plan to simulate the use of industry standard SPICE technology to prove the supply potential of clock signals at very high frequencies up to thousands of GHz. Signal generation and distribution can be proactive All parts of 1C stored and used for the predetermined phase and the phase relationship between them, including many clock signals with the same or different frequencies. In addition, the operating principle of the transmission line oscillator and its self-synchronous phase connection are not only provided in any 1C. The operation circuit between ICs and ICs provides reliable timing signal services, and can be sure that the data transmission between ICs is also important and creative. The entire transmission line 15 equipment and circuit network includes the vibration soup of the regeneration circuit 21. The transmission line 15 operates for no reason, that is, The transmission line forms a closed loop. Transmission and line -24- This paper size ^ uses China National Standard (CNS) A4 specification (210X297 mm) 496038 A7 ___B7 V. Description of the invention (22) The characteristic impedance Zo is very low and only the top energy is needed to maintain the vibration. Ideally, the impedance between the two guide rails 15a and 15b is evenly distributed in order to obtain a good balance and help achieve a good balance Define the differential signal waveform (φ1, φ2). If the signals Φ1, Φ2 meet this type of transmission line 15 on the transmission line 15, or close to 18 °, all the inverting amplifiers 21 are connected to the transmission line, and the phase shift is required. Resonance will occur, that is, all amplifiers 21 are operating in a coordinated state with a known phase relationship between the points along the transmission line. 5 Two types of signal energy, inductance and capacitance, that is, magnetic force and power, are transmitted to the transmission line 15. The dynamic mode is between the signal conductors 15a and 15b. If there are two common modes, it is between the signal conductors and the reference ground (if there is no ground plane above and below, it does not exist, and it is not connected by unshielded twisted-pair cables. ). CMOS inverters are non-linear operation switching and amplifying electrical components, and have low cross-conduction current loss, because normally there will be loss of transistors, inputs, gates, and outputs, and the drain capacitance including the transistor substrate capacitance is all drawn into the alternating Impedance Zo, so power consumption does not follow the general 1/2 · CV2 formula. It is generally assumed that power loss due to the addition and discharge of MOS thyristor capacitors is inevitable. However, the self-sustained oscillating nature of the transmission line 15 enables the terminals of the thyristor to be started with low power loss. This is due to the fact that the required starting energy is in the electrostatic field, that is, the capacitance field and magnetic field of the capacitance of the MOS gate, that is, the inductive field elements of the transmission line. Therefore, the energy contained in the transmission line 5 will not be completely lost, but is actually circulating. Energy saving applies to all operating thyristors of transmission line 15. It is envisaged that such low-loss efficiency transmission line oscillators can be used as timing ICs in many previously popular logic systems. This system has been abandoned because it cannot be used. The original —_-25-This paper standard applies to China National Standard (CNS) A4 specifications ( 210X 297 mm)

因是產生一些問題，如，時鐘偏移，時鐘分配，電力消耗’等。非消耗型該種邏輯配置的例子包括多相邏輯及能置回收或絕熱切換邏輯，該種邏輯配置為熟知本技蓺者了解。 π 斤圖24顯示用於單鋰IC 68的時鐘分配電路網（如其他圖，不照比例）。IC 68貝有多數傳輸線如圖示為迥路nL，、中迴路1L-10L及13L皆具有相等的主動長度（如上述為s) 並在頻率F振盪，而迥路11L及12L各具較短的迥路長度（如上述為S/3)並在頻率3 F振盪。迥路1L-8L及11L-13L為全傳輸、’泉振盥器包括再生設備，而9L及1 〇L為前面四傳輸線的部份，分別為1L，3L，4L，及5L ; 4L，5L，6L及8L。迥路13L的傳輸線（15)靠近IC 68邊緣（即劃線）的側面延長以便可以連結另外分開的配置相似的單鋰Ic，使用磁連結鎖定頻率及相位的倒裝技術，如上述。分開單鋰⑴的頻率及相位鎖定對混合系統非常有用。圖25顯π亙相連接傳輸線振盪器立體電路網用於訊號分配的可行性，特別是簡單金字塔型配置，雖然任何其他構造可以達到希望的作,不論多複雜，只要符合連接規範有關的電學長度，阻抗配合，任何資料傳輸的相位要求等。 ICs的設計可以為任何構造以便達到要求的總頻率及相位鎖定才目位相干性，包括用於二或以上自持傳輸線之間的振盪器，以便在及所有1(3有關各邏輯及處理方塊之間同步控制及操作資料處理作業。There are some problems, such as clock offset, clock distribution, power consumption ', etc. Examples of such non-consumable logic configurations include polyphase logic and energy recovery or adiabatic switching logic. Such logic configurations are well known to those skilled in the art. π Jin Figure 24 shows the clock distribution circuit network for a single lithium IC 68 (as in the other figures, not to scale). There are many transmission lines in IC 68 as shown in the circuit nL. The intermediate circuits 1L-10L and 13L all have the same active length (such as s above) and oscillate at frequency F, while the circuits 11L and 12L each have shorter lengths. The circuit length (S / 3 as above) and oscillates at 3 F. Jiu Road 1L-8L and 11L-13L are full transmission, 'Quanzhen toilets include regeneration equipment, and 9L and 10L are the first four transmission lines, respectively 1L, 3L, 4L, and 5L; 4L, 5L , 6L and 8L. The 13L transmission line (15) is extended to the side near the edge of the IC 68 (ie, the scribe line) so that it can be connected to a separate single-lithium Ic with a similar configuration, using a magnetic connection to lock the frequency and phase of the flip chip, as described above. Separating the frequency and phase lock of a single lithium plutonium is very useful for hybrid systems. Figure 25 shows the feasibility of a π 亘 phase-connected transmission line oscillator three-dimensional circuit network for signal distribution, especially a simple pyramid configuration, although any other structure can achieve the desired operation, no matter how complicated, as long as it meets the electrical length related to the connection specification , Impedance coordination, phase requirements for any data transmission, etc. ICs can be designed for any structure in order to achieve the required total frequency and phase-locked coherence, including oscillators used for two or more self-sustaining transmission lines, in order to reach all 1 (3 related logic and processing blocks). Synchronous control and operation of data processing operations.

496038496038

圖26a顯示一雙相位分接％叫， x 祛點的例子，使用一對CMOS反相益70丨及7〇2为別連接傳輸線導勤 A 求等軌15a及15b以提供現場時鐘於及/或按邏輯方塊72!分配。雖炊雖然邏輯万塊72】如圖示在傳輸線15 1閉合’，另外在傳輪绐月J、’泉15 %繞的面積之外包括邏輯方塊722及附屬反相器7〇3，7〇，芬味社你认a 3 /〇4及跨接傳輸線1 5的導軌 15a，15b。如果需要，大邏錄古金铒万魏72丨及/或722，傳輸線15 可以分接多對反相器70 ,包括佯材、潘絲、％、匕拾任何邏輯万塊72需要的現場相位，見虛線。準確選擇振量時鐘訊號φi，中2的能力容許複雜的管線邏輯及多相邏輯（見圖29下方）按控制。圖26b與上述不同，其中邏輯方塊％及％分別由處理元件73,’ 732取代’雖然元件可以更多，而—或更多的傳輸線可以用來定時-或更多的處理元件。二或較多的處理元件可獨立及/或結合操作，即，併聯以便達到非常快速及有力的資料處理ICs/系統。圖27a顯示三同心配置的實體長度逐漸減少的傳輸線 15丨〜153。不過，三傳輸線15ι〜153的每個傳輪線都可以製成在同一頻率振盪，不論是設備或是藉由增加單位長度電感及/或電容而減少的環繞較短傳輸線1 及1 53的各EM波旋轉速度。另外，傳輸線15^153可以選擇性具有一或更多的操作連接70及72以達成三傳輸線15丨〜153同步。這種連接 70，72的優點，同步性除外，為傳輸線15l〜153可以 (i) 作為一單一多纖傳輸線； ⑴）具有較小導執（15a，15b); _____-27- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐)Figure 26a shows an example of a bi-phase tapping, called x, using a pair of CMOS inverters 70 and 70 to connect the transmission line guide A to obtain equal orbits 15a and 15b to provide a field clock at and / Or press logical box 72! To assign. Although the logic is 72, as shown in the figure, it is closed on the transmission line 15 1 '. In addition, it includes logic block 722 and auxiliary inverters 703, 704 in addition to the area of the transmission wheel J, and 15% of the area of the spring. , Fenweishe think of a 3 / 〇4 and the guide rails 15a, 15b of the crossover transmission line 15. If necessary, Daluo records Gu Jinxuan Wanwei 72 丨 and / or 722, and transmission line 15 can tap multiple pairs of inverters 70, including sacrificial material, pans,%, and any field phase required by logic 72. See dotted line. The ability to accurately select the oscillating clock signal φi, the ability of the middle 2 allows complex pipeline logic and polyphase logic (see Figure 29 below) to be controlled. Figure 26b is different from the above, in which logical blocks% and% are replaced by processing elements 73, '732, respectively. Although more elements can be used, and-or more transmission lines can be used for timing-or more processing elements. Two or more processing elements can operate independently and / or in combination, that is, in parallel to achieve very fast and powerful data processing ICs / systems. Fig. 27a shows transmission lines 15 to 153 of decreasing physical length in a three concentric configuration. However, each of the three transmission lines 15 to 153 can be made to oscillate at the same frequency, whether it is equipment or each of the shorter transmission lines 1 and 1 53 which is reduced by increasing the unit length inductance and / or capacitance. EM wave rotation speed. In addition, the transmission line 15 ^ 153 may optionally have one or more operational connections 70 and 72 to achieve synchronization of the three transmission lines 15 丨 ~ 153. The advantages of this connection 70, 72, except for synchronization, can be (i) as a single multi-fiber transmission line for transmission lines 15l to 153; ⑴) has a small guide (15a, 15b); _____- 27- this paper size Applicable to China National Standard (CNS) A4 (210X 297mm)

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496038 A7 B7 五、發明説明（25 ) (iii) 涵蓋較大的八時範圍； (iv) 產生較少的表皮效應損失；及 (v) 產生較少的串調及連結。圖28a顯示傳輸線具有一交叉迥路連接於a，B , 〇及〇位置之間，並包括另外傳輸線1 5c ’ 1 5d，該傳輸線具有，在本例中，90°電學長度以配合A，B及C，D位置的間距。可以選擇其他交叉連接的電學長度，但操作連接的A , B , C 及D位置的間距不同。交叉連接容許在傳輸線15圍繞的範圍内有另外的分接點。部份傳輸線15 d於A及C點之間連接並與線74代表的部份傳輸線15平行。同樣，部份傳輸線i5c 於B及D點之間連接並與線76代表的部份傳輸線15平行。部份傳輸線15c，15d，74及76會達到滿意，如果所含的阻抗各為其餘傳輸線15阻抗的一半，如上述。傳輸線1 5及1 5 c d 操作連接放大器2 1。圖28b顯示傳輸線15的交叉迥路連接及位置A ’ B，C及D相對78及80，即，代替74及76，的部份傳輸線15的配置，但是再度應用Kirchoff型規範造成各部份15c ’ 15d，78及80各具阻抗為其餘相關傳輸線阻抗的_ 半。按為要增加額外多數傳輸線，例如，1 5 c，d，橫過傳輸線15實屬可行。圖29a顯示一種產生四相位時鐘訊號的方法。傳輸線15完成其訊號傳送界限的雙繞行，如圖示為矩形，而另外重複繞行還可產生更多的相位。如例中所示，位置A1，A2 , B 1 及B2會產生現場四相位時鐘訊號，如位置匸1，C2，D1及 D2所產生一樣。重複的界限繞行須配合傳輸線1 5的隔離間 ____-28- 本纸張尺度適用中國國家標準(CNS) A4規格(210X297公爱^ 496038496038 A7 B7 V. Description of the invention (25) (iii) Covers a larger eight o'clock range; (iv) Generates less skin-effect loss; and (v) Generates less crosstalk and connection. Figure 28a shows that the transmission line has a crossover circuit connected between positions a, B, 〇, and 〇, and includes another transmission line 15c'15d, which has, in this example, a 90 ° electrical length to match A, B And the distance between C and D positions. You can choose other electrical lengths of the cross-connect, but the spacings of the A, B, C, and D positions of the operational connection are different. The cross connection allows additional tapping points in the area surrounded by the transmission line 15. The partial transmission line 15 d is connected between points A and C and is parallel to the partial transmission line 15 represented by the line 74. Similarly, a part of the transmission line i5c is connected between points B and D and is parallel to a part of the transmission line 15 represented by the line 76. Some of the transmission lines 15c, 15d, 74, and 76 will be satisfactory if the included impedance is each half of the impedance of the remaining transmission lines 15 as described above. Transmission lines 1 5 and 1 5 c d operate the connection amplifier 2 1. Figure 28b shows the crossover connection and position A'B, C, and D of the transmission line 15 relative to 78 and 80, that is, the configuration of part of the transmission line 15 instead of 74 and 76, but the application of the Kirchoff type specification again causes each part 15c '15d, 78 and 80 each have an impedance _ half of the impedance of the remaining relevant transmission line. It is considered to add an extra majority of transmission lines, for example, 1 5 c, d. It is feasible to cross the transmission line 15. Figure 29a shows a method for generating a four-phase clock signal. The transmission line 15 completes the double winding of its signal transmission limit, which is rectangular as shown in the figure, and the repeated winding can generate more phases. As shown in the example, positions A1, A2, B1, and B2 will generate a live four-phase clock signal, as generated by positions 匸 1, C2, D1, and D2. Repeated detours must be used in conjunction with the transmission line 1 5 compartments ____- 28- This paper size applies to China National Standard (CNS) A4 specifications (210X297 public love ^ 496038

距以避免相亙連結。圖29b顯示點A1，A2 , βΐ及B2，及 C1 ’ C2 ’ D1及D2的理想四相位訊號波型。圖30顯不開端被動傳輸線（15e，i5f)連接閉合迥路傳輸線15並具有下列特性，18〇。電學長度，分接點不產生反作用，因為作為開端電路振盪短線。沿本開端線15e，f沒有放大器21但疋反相器23放在各軌道15c及15d的遠端以減少假振盪的危險。確實，調整短線15e，f的振盪，傳輸線 15可具有用再生效果可用於增強及/或穩定用途。被動傳輸線連接沒有阻抗配合的特別要求，可以用來連接相同’或大部份相同頻率的傳輸線，至少假定二系統之間建充分的連接，其中連接點有相同的連接電路網相關相位。這種連接可以協助ICs及系統之間高速數位訊號同步化，因為非時鐘訊號（如，IC/系統資料線）具有相似的延誤特性’如果時鐘連接而未併入相同路徑（如，帶電境，絞線’傳輸線），則會造成不同系統間資料及定時干擾。圖31顯示兩單經ics 68: , 682的兩時鐘分配電路網的相干頻率及相位操作例子，各該…具有時鐘產生及分配及Ic内連接對E ’ F及G，Η。該相關兩1C會產生相干操作，即，在相同頻率及相同相位關係，其中各連接的電學長度大約 180°或滿足360°·η+18(Γ，其中η為〇或整數。單對的1C内連接（Ε，F或G，Η)會造成頻率及相位鎖定。多於一對的1C内連接（Ε，F及G，Η如顯示）會造成在時鐘波方向或旋轉鎖定。如圖3 1所示為第一及第二短線連接82及83，雖然任何一 -29« 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐)Distance to avoid mutual connection. Figure 29b shows the ideal four-phase signal waveforms of points A1, A2, βΐ and B2, and C1'C2'D1 and D2. Figure 30 shows that the open-ended passive transmission line (15e, i5f) is connected to the closed loop transmission line 15 and has the following characteristics, 18 °. Electrical length, the tap point does not have the opposite effect, because the short circuit oscillates as a start circuit. Along the start line 15e, f, there is no amplifier 21 but the chirped inverter 23 is placed at the far end of each track 15c and 15d to reduce the risk of false oscillations. Indeed, by adjusting the oscillation of the short lines 15e, f, the transmission line 15 may have a regeneration effect and may be used for enhancement and / or stabilization purposes. Passive transmission line connections have no special requirements for impedance matching. They can be used to connect transmission lines of the same frequency or most of the same frequency. At least it is assumed that sufficient connections are established between the two systems, where the connection points have the same phase of the connection circuit network. This connection can help synchronize high-speed digital signals between ICs and the system, because non-clock signals (such as IC / system data lines) have similar delay characteristics. 'If the clock connection does not merge into the same path (such as a charged environment, Twisted pair 'transmission line), it will cause data and timing interference between different systems. Fig. 31 shows an example of coherent frequency and phase operation of two clock distribution circuit networks of two single warp ics 68 :, 682, each having ... having clock generation and distribution and Ic internal connection pairs E'F and G, Η. The related two 1Cs will produce a coherent operation, that is, at the same frequency and the same phase relationship, where the electrical length of each connection is about 180 ° or satisfies 360 ° · η + 18 (Γ, where η is 0 or an integer. A single pair of 1C Interconnections (E, F or G, Η) will cause frequency and phase lock. More than one pair of 1C internal connections (E, F, and G, as shown) will cause clockwise or rotational lock. Figure 3 1 shows the first and second short-circuit connections 82 and 83, although any one -29 «This paper size applies to China National Standard (CNS) Α4 specifications (210 X 297 mm)

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線 496038 A7 B7 五、發明説明（27 ) 連接可以更多。第一短線連接82具有總電學長度180°以便協助穩定操作。第二短線連接83係為開端型，也具有電學長度180°及有助於穩定操作。該種短線連接82，83對於本發明的非1C應用特別有用，其中導軌定義比用於ICs較不精確。連接對E，F及G，Η及連接82，83的阻抗在正常操作中可以為任何值，一旦這些連接通電，其中沒有淨電流供校正相位。不過，較理想，這些連接Ε，F及G，Η及82，83的阻抗大於所連接的傳輸線15振盪器阻抗。這些連接支撐靜止 ΕΜ波而非移動ΕΜ波。圖31的連接同樣可以應用·在1C内部，1C之間，1C與PCB 及/或任何非1C，即，PCB對PCB，的系統連接。圖32顯示可選擇數位分流電容器在Mosfet電晶體外製成。圖32顯示的可選擇數位分流電容器能操作連接傳輸線15 並控制稍為延遲的移動EM)皮，即，振盪頻率可以控制。這種延遲對傳輸線頻率的細調整有用。如圖示，八個分流電容器係由Mosfet電晶體裝配完成。Mosfet電晶體Ml，M2， M5及M6為PM0S電晶體而Mosfet電晶體M3，M4，M7及M8 為NM0S電晶體。Line 496038 A7 B7 V. Description of the invention (27) The connection can be more. The first stub connection 82 has a total electrical length of 180 ° to assist stable operation. The second short-line connection 83 is an open type, and also has an electrical length of 180 ° and contributes to stable operation. This type of stub connection 82, 83 is particularly useful for non-1C applications of the present invention, where the rail definition is less precise than for ICs. The impedance of the connection pairs E, F and G, Η and connections 82, 83 can be any value in normal operation. Once these connections are energized, there is no net current for phase correction. However, ideally, the impedance of these connections E, F and G, Η and 82, 83 is greater than the impedance of the 15 transmission line oscillator connected. These connections support stationary EM waves rather than moving EM waves. The connection of Fig. 31 can also be applied. · Within 1C, between 1C, 1C and PCB and / or any system other than 1C, ie PCB to PCB. Figure 32 shows that an optional digital shunt capacitor is made outside the Mosfet transistor. The optional digital shunt capacitor shown in Fig. 32 can be operated to connect the transmission line 15 and control the slightly delayed mobile EM) skin, that is, the oscillation frequency can be controlled. This delay is useful for fine adjustment of the transmission line frequency. As shown, the eight shunt capacitors are assembled by Mosfet transistors. Mosfet transistors M1, M2, M5 and M6 are PMOS transistors and Mosfet transistors M3, M4, M7 and M8 are NMOS transistors.

Mosfet Ml，M3，M5及M7具有汲極及源端子連接内傳輸線導體，例如，15a及Mosfet M2，M4，M6及M8具有汲極及源端子連接外傳輸線導體15b。Mosfet Ml，M2，M5及 M6的基板端子連接正電壓供應軌V+及Mosfet M3，M4， -30- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 裝訂Mosfet M1, M3, M5, and M7 have drain and source terminals connected to internal transmission line conductors. For example, 15a and Mosfet M2, M4, M6, and M8 have drain and source terminals connected to external transmission line conductors 15b. Mosfet Ml, M2, M5 and M6 substrate terminals are connected to the positive voltage supply rail V + and Mosfet M3, M4, -30- This paper size applies to China National Standard (CNS) A4 (210X 297 mm) binding

496038 A7 B7 五、發明説明（28 ) M7及M8的基板端子連接負電壓供應軌GND。496038 A7 B7 5. Description of the invention (28) The substrate terminals of M7 and M8 are connected to the negative voltage supply rail GND.

Mosfet Ml及M2的閘端子連接一起並由控制訊號CS0控制及Mosfet M3及M4的閘端子連接一起並由控制訊號CS0反向控制。同樣，Mosfet M5及M6的閘端子連接一起並由控制訊號CS1控制及Mosfet M7及M8的閘端子連接一起並由控制訊號C S 1反向控制。以下為Mosfet分流電容器（Ml-M8)給於傳輸線15的電容，即’Mosfet開f，的真值表。 CS0 CS1 Mosfet ’ 開' Mosfet，關， 0 0 M1-M8 - 0 1 M1-M4 M5-M8 1 0 M5-M8 M1-M4 1 1 - M1-M8 較理想，連接至，内部，及，外部’傳輸線導軌15a，15b的各分流電容器的數量及尺寸要相同，即平衡。雖然圖示八個 Mosfet分流電容器M1-M8，只要傳輸線15如圖32所示為平衡，任何數量具有適當尺寸及電容的Mosfet分流電容器都可使用。其他用於製造可控制數位分流電容器的構造可能會用或不用Mosfet電晶體製成。一個已知例子，使用Mosfet，例如，可以使用二位元加權Mosfet電容器。另外，例如， M0S電容器供應可變電容包括可變電抗器器及P/N二極體。電容器沿傳輸線重複標準間距排列有利阻抗分配。 _-31 - 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 496038 A7 B7 五、發明説明（29 ) 圖33顯示如何安排資料及/或電力通過傳輸線的路徑及藉由類似鐵路枕木的設備88，較理想，以標準間距放置在導軌15a，15b的下面，以便改變電容負載。另外，設備88可放在傳輸線導軌15a，15b的上面及/或下面。如斷面圖所示，軌道15a，15b較理想放在金屬層上面並與設備88絕緣，如，亞氧化矽層92。這種設備88具有增加傳輸線電容的作用及用來改變傳輸線的阻抗，即，EM波移動速度。這種設備88也可以用來安排資料及/或電力的路徑99。如圖示，安排資料及/或電力的路徑99，因為傳輸線15上面的時鐘訊號Φ1，Φ2為差動，這些時鐘訊號Φ1，Φ2對安排資料及/或電力訊號沒有影響。雙向開關（21)使用反相器23a，23b作為時鐘頻率同步整流器，因為可從大部份至GND負電壓供應軌及大部份至V+ 正電壓供應軌的電阻路徑推算。所以，由反相器23a及23b 背對背構成的NMOS及PMOS電晶體（見圖22b)必須由傳輸線15上的隅發EM波切換至一狀態其中兩’開’電晶體（分別為NMOS及PMOS)連接大部份負傳輸線導軌至NMOS電晶體的現場GND供應及至PMOS電晶體的現場V+供應。兩對 NMOS/PMOS電晶體因架橋整流同步振盪導致隅發EM波訊號極性相反而產生交變，例如，DC- AC- DC轉換模式的雙向性。所以，傳輸線15能雙向抽取及導引電流，以便當現場供應電壓大於傳輸線1 5電壓時供應電流至傳輸線，及當現場電壓供應軌電壓小於傳輸線電壓時抽取電流，而傳輸線15在本模式中作為電導體’見下表： _-32- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 裝訂The Mosfet M1 and M2 gate terminals are connected together and controlled by the control signal CS0, and the Mosfet M3 and M4 gate terminals are connected together and controlled by the control signal CS0 in the reverse direction. Similarly, the gate terminals of Mosfet M5 and M6 are connected together and controlled by the control signal CS1 and the gate terminals of Mosfet M7 and M8 are connected together and controlled by the control signal C S 1 in the reverse direction. The following is a truth table of the capacitance given to the transmission line 15 by the Mosfet shunt capacitors (Ml-M8), that is, 'Mosfet open f'. CS0 CS1 Mosfet 'On' Mosfet, Off, 0 0 M1-M8-0 1 M1-M4 M5-M8 1 0 M5-M8 M1-M4 1 1-M1-M8 Ideal, connect to, internal, and external ' The number and size of the shunt capacitors of the transmission line guide rails 15a, 15b should be the same, that is, balanced. Although eight Mosfet shunt capacitors M1-M8 are shown, as long as the transmission line 15 is balanced as shown in FIG. 32, any number of Mosfet shunt capacitors having an appropriate size and capacitance can be used. Other constructions used to make controllable digital shunt capacitors may or may not be made with Mosfet transistors. A known example uses Mosfet. For example, a two-bit weighted Mosfet capacitor can be used. In addition, for example, the M0S capacitor supply variable capacitor includes a variable reactor and a P / N diode. Capacitors repeat the standard pitch arrangement along the transmission line to facilitate impedance distribution. _-31-This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 A7 B7 V. Description of the invention (29) Figure 33 shows how to arrange the path of data and / or power through the transmission line and by A device 88 similar to a railway sleeper is ideally placed under the guide rails 15a, 15b at a standard pitch in order to change the capacitive load. Alternatively, the device 88 may be placed above and / or below the transmission line guides 15a, 15b. As shown in the sectional view, the tracks 15a, 15b are preferably placed on the metal layer and insulated from the device 88, such as the silicon oxide layer 92. This device 88 has the function of increasing the capacitance of the transmission line and is used to change the impedance of the transmission line, i.e., the EM wave moving speed. This device 88 can also be used to arrange data and / or power paths 99. As shown, the arrangement data and / or power path 99, because the clock signals Φ1, Φ2 above the transmission line 15 are differential, and these clock signals Φ1, Φ2 have no effect on the arrangement data and / or power signals. The bidirectional switch (21) uses inverters 23a, 23b as clock frequency synchronous rectifiers, because it can be estimated from most of the resistance paths to the GND negative voltage supply rail and most to the V + positive voltage supply rail. Therefore, the back-to-back NMOS and PMOS transistors (see Figure 22b) composed of inverters 23a and 23b must be switched to a state by the burst of EM waves on transmission line 15 of which are two 'on' transistors (NMOS and PMOS, respectively) Connect most of the negative transmission line rails to the on-site GND supply of the NMOS transistor and the on-site V + supply to the PMOS transistor. The two pairs of NMOS / PMOS transistors are alternating due to the opposite polarity of the burst EM wave signal caused by the synchronous rectification of the bridge rectification, for example, the bidirectionality of the DC-AC-DC conversion mode. Therefore, the transmission line 15 can draw and steer current in both directions, so as to supply current to the transmission line when the on-site supply voltage is greater than 15 voltages on the transmission line, and to draw current when the on-site voltage supply rail voltage is less than the transmission line voltage, and the transmission line 15 is used in this mode as See the following table for electrical conductors: _-32- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) binding

線 496038 A7 B7 五、發明説明（30 )Line 496038 A7 B7 V. Description of the invention (30)

輸入 PMOS1 開， NMOS丨開’ PMOS，關， 15a=GND 15b=V+ PI (15b連接現場V+) N2(15a連接現場GND) N1，P2 15a=V+ 15b=GND P2(15a連接現場V+) N1 (15b連接現場GND) N2，PI 當並聯’電阻上1可比較於供應連接之串聯D C電阻時，此種電子循環特別適合於閘長度小於0.1 之I C處理技術。這種同步整流可作為1C的某些無法供電地方的電力分配基準，特別可用於’充電泵’電路，即，DC對DC電流轉換。另外基本能力為DC對AC電流轉換及其相反。其他，當然，可應用於已知的片上變壓器。已知的可能性為達到最高可能頻率含不可能拆開切換的邏輯電路，包括發展相關的半導體製造技術。誠然，傳輸線本身設備必須與1C處理技術配合，較小及較快電晶體設備自然會產生較高時鐘頻率用的較短及較快的傳輸線振盪器。另外的可能性包括保持低電力消耗；無關應用，任何電容及電感連接都能與傳輸線共振，及特別用於相關的如位移暫存器或預先充電/評估邏輯。雖然證明有利，不必使用外部定時基準例如，水晶，不用PLL技術，可能有些情況及應用，其中本發明應用須結合外部定時晶體等。雖然本文在目前1C主要的CMOS技術的範疇内已作了詳細說明，但是熟悉有關原理者必然了解，本發明也適用於 _-33- 本紙張尺度適用中國國家標準(CNS) A4規格(210X297公釐) 裝訂Input PMOS1 on, NMOS 丨 on 'PMOS, off, 15a = GND 15b = V + PI (15b is connected to the field V +) N2 (15a is connected to the field GND) N1, P2 15a = V + 15b = GND P2 (15a is connected to the field V +) N1 ( 15b connection on-site GND) N2, PI When the parallel 1 resistance is compared with the series DC resistance of the supply connection, this type of electronic cycle is particularly suitable for IC processing technology with a gate length less than 0.1. This kind of synchronous rectification can be used as a power distribution standard in some places where 1C cannot supply power, and it can be particularly used in a 'charge pump' circuit, that is, DC-to-DC current conversion. The other basic capability is DC to AC current conversion and vice versa. Others, of course, can be applied to known on-chip transformers. Known possibilities are to reach the highest possible frequency of logic circuits with impossibility to switch apart, including the development of related semiconductor manufacturing techniques. It is true that the equipment of the transmission line itself must cooperate with the 1C processing technology. Smaller and faster transistor devices will naturally produce shorter and faster transmission line oscillators for higher clock frequencies. Other possibilities include keeping power consumption low; irrelevant applications, any capacitor and inductive connection can resonate with the transmission line, and specifically for related applications such as shift registers or pre-charge / evaluation logic. Although it proves to be advantageous, it is not necessary to use an external timing reference, such as a crystal, without PLL technology, there may be situations and applications where the application of the present invention must be combined with an external timing crystal, etc. Although this article has been described in detail in the scope of the current 1C main CMOS technology, those who are familiar with the relevant principles must understand that the present invention is also applicable to _-33- This paper size applies to the Chinese National Standard (CNS) A4 specification (210X297) (Centimeters)

線 A7 B7 31 五、發明説明（，他半導體技術，例如，矽鍺（si_Ge)，坤化鎵（WAS) 等。最後，非常有利的特別用途是用來克復高頻率定時所發生的問題’例如，其中F>1 GHz，無其他結合定時訊號產生及分配的適用條件須從預定的範圍排除，例如，用來操作頻率小於1 GHz的系統及裝置。圖34 a顯示兩相亙連接單鋰ICs 68ι ,⑼2係鎖定相位及旋轉並另外具有多數雙向資料閂84及鏈86以促分量開的資料處理系統連接成為一相干設備以便定相位及傳送資料。相關傳輸線15上面的連接位置基本上在各1(：連接線的】，κ端之間有180。相位差，雖然一般有至少丨。的公差。多數的… 連接86在ICs 68!，682的相當傳輸線15之間可以連接成具有，雙絞線，的性質。這些IC間連接86的阻抗，較理想，須大於含時鐘產生傳輸線15的阻抗。不需要相等數目的時鐘/相位及資料連接。另外，資料及時鐘傳輸媒體86有相同長度及電配合，所以兩者具有同等的傳播延遲的優點。標稱1 80。相位差代表一半的時鐘循環，即，Tp，所以，資料脈衝藉由升高時鐘波型p丨邊緣從任何1C傳送至其他1C，則在升高時鐘波型p 2邊緣時或之後，會收到該資料。圖34b顯示圖34a作為方塊的較佳發明資料問84。資料問 84係藉由差動時鐘訊號φ 1及φ 2邊緣起動以便作傳輸（τχ) 及接收（RX)，並具有雙向差動輸入/輸出線，標示TX資料及RX資料的資料脈衝控制線，及時鐘訊號波型φ 1 , φ 2。 -34- 本紙張尺度適用中國國家標準(CNS) Α4規格(210 X 297公釐) 496038 A7 發明説明（本技術非常容易读出了 ρη 、成不冋IC 68ι，682上面相同相位定每的資料閂84之間通却。另从㈤ u疋時 ^ 、矾另外’圖34a顯示資料閂84的各對以不同相位起動，結果產生完全有利的多相位資：：运，並免除傳輸線86同步切換的需要，結果，㉟地流及正供應電壓下降。要也回裝在半雙資料傳送中，共中傳送雙資料位^ ,每 t，每次—個位元。資料傳送（tx)從-隐其他IC，^見 %邏輯控制，其中φ问，_及邏輯ι=ν+及邏〇=GND’各咖相當閃84在週期中傳送單—位元資料，= 中Φ卜卜每半循環，一資料位元從1(：681到^682及另—資料位7C從1C 682収68l。資料訊號經傳輸線86相亙傳送，但不干攪傳輸線86的雙絞線性質。最後收到半循環有用的資料訊號。當Φ1及Φ2從高到低各為丨。場邏輯狀態為Φΐ=0，φ2=1。在 c 1頁料及現 1在兩IC各有相同的閂84此時收訂到單一位兀資料係於前半循環中送出，其中夏。線圖34c顯示一電路以完成資料閃討。電晶體ρι :νι，ρ5 及Ν5係操作配置及控制以便產生差動輸出訊號並只有起動。打開Pi及Ν5以產生正以產生正差動輸出訊號，或打開 P5及N1以產生負差動輸出訊號。電日％體则，p4，⑽及⑼ 係操：：置及控制以便讓電晶體”，N1，”物切換到，開，其中Φ卜i，即，在傳輸時間中。電晶體ρ2，Ν2，^ N6係操作配置及控制以便切換輸出電晶體ρι , ni，？5及 N5到’關’，其中Φ2=1，即，在接收時間中。電晶體Ν3係操作配置及由ΤΧ資料控制訊號控制以便使相 -35-Line A7 B7 31 V. Description of the invention (, other semiconductor technology, such as silicon germanium (si_Ge), gallium quinone (WAS), etc.) Finally, a very advantageous special purpose is to overcome the problems that occur at high frequency timing 'for example Among them, F > 1 GHz, no other applicable conditions that combine timing signal generation and distribution must be excluded from the predetermined range, for example, used to operate systems and devices with frequencies less than 1 GHz. Figure 34a shows two-phase 亘 connected single lithium ICs 68ι, ⑼2 are phase-locked and rotated, and additionally have two-way data latches 84 and chains 86 to facilitate the open data processing system to be connected as a coherent device for phasing and transmitting data. The connection positions above the relevant transmission line 15 are basically at various 1 (: of the connection line), there is 180 between the kappa ends, although there is generally a tolerance of at least 丨. Most ... Connection 86 can be connected between the equivalent transmission lines 15 of ICs 68 !, 682, double The nature of the twisted pair. The impedance of these IC connections 86 is ideally greater than the impedance of the clocked transmission line 15. No equal number of clock / phase and data connections are required. In addition, the data and clock transmission medium 86 have the same length and electrical coordination, so both have the same propagation delay advantage. Nominal 1 80. The phase difference represents half the clock cycle, that is, Tp, so the data pulse is increased by The high clock waveform p 丨 edge is transmitted from any 1C to other 1C, then the data will be received when or after the clock waveform p 2 edge is raised. Figure 34b shows the preferred invention information of Figure 34a as a block question 84. Data Question 84 is initiated by differential clock signals φ 1 and φ 2 edges for transmission (τχ) and reception (RX), and has a bidirectional differential input / output line, a data pulse control line that indicates TX data and RX data And clock signal waveforms φ 1 and φ 2. -34- This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 A7 Description of the invention (This technology is very easy to read ρη, success冋 IC 68ι, 682 pass through each of the data latches 84 at the same phase above. In addition, from 疋 u 疋疋 ^, alum In addition, Figure 34a shows that the pairs of data latches 84 are activated at different phases, and the result is a much more favorable result. Phase Funding :: Win, and In addition to the need for synchronous switching of the transmission line 86, as a result, the ground current and the positive supply voltage are reduced. It must also be reloaded in semi-double data transmission, transmitting a total of double data bits ^, each t, each time-one bit. Data transmission (Tx) Slave-hidden other ICs, see% logic control, where φ asks, _ and logic ι = ν + and logic 0 = GND 'each coffee is equivalent to flashing 84 to transmit single-bit data in the cycle, = medium Φ Every half cycle, one data bit is from 1 (: 681 to ^ 682 and another—data bit 7C receives 68l from 1C 682. The data signal is transmitted through the transmission line 86, but the twisted-pair nature of the transmission line 86 is not disturbed. . Finally, a half-cycle useful data signal is received. When Φ1 and Φ2 are from high to low, they are 丨. The field logic state is Φΐ = 0 and Φ2 = 1. The material on c1 and the current 1 on both ICs have the same latches 84. At this time, a single bit is ordered and the data is sent in the first half of the cycle, which is Xia. Figure 34c shows a circuit to complete the data flash. Transistors ρι: νι, ρ5 and Ν5 are configured and controlled to produce differential output signals and only start. Turn on Pi and N5 to generate positive to generate a positive differential output signal, or open P5 and N1 to generate a negative differential output signal. The principle of the electric day%, p4, ⑽ and ⑼ system operation: Place and control so that the transistor ", N1," is switched to, on, where ΦBui, that is, in the transmission time. Transistors ρ2, N2, ^ N6 are operating configuration and control to switch the output transistors ρι, ni ,? 5 and N5 to 'Off', where Φ2 = 1, that is, in the receiving time. Transistor N3 is configured for operation and controlled by TX data control signal to enable phase -35-

496038 A7 __ _B7 五、發明説明（33 ) 關差動雙向輸出成為正，即，V+，經電晶體N4及P1，其中TX資料控制訊號為邏輯丨。電晶體p3係操作配置及由τχ 資料控制訊號控制以便使相關差動雙向輸出成為負，即， GND ’經電晶體Ρ4&Ν1，其中τχ資料控制訊號為邏輯〇。反相器11係操作配置及控制以便產生Τχ資料控制訊號的反向邏輯狀態。電晶，體Ν7係操作配置及由τχ資料控制訊號控制以便使相關差動雙向輸出成為正，經電晶體Ν8及Ρ5，其中τχ資料控制訊號為邏輯〇。電晶體Ρ7係操作配置及由ΤΧ資料控制訊號控制以便使相關差動雙向輸出成為負，經電晶體ρ8及 Ν5，其中ΤΧ資料控制訊號為邏輯！。電晶體N13係操作配置及控制以便在接收（RX)資料訊號時正確端接差動傳輸線86。電晶體T13具有操作電阻，大約等於傳輸線86的特性阻抗。電晶體N1- 8及P1- 8含反相器11構成雙向閂84的傳輸電路 TX1。電晶體N9及N1 0係操作配置及控制以便為整個半循環從電容器C1取樣資料訊號接收（RX)時的差動訊號。電晶體 Nl 1及N12係操作配置及控制以便切換電容器C1貯存充電樣品至操作配置及控制的差動-單端反相器。這種差動-單端反相器係操作配置及控制的反相器12，13及電容器C2構成。反相器13及電容器C3係操作配置作為電壓基準及反相器12操作配置及控制作為單端邏輯輸出緩衝器/放大器用來取樣接收的（RX’d)資料訊號。 — -36- 本紙張尺度適用中國國家標準(CNS) A4規格(210X 297公釐) 34 五、發明説明（電晶體N9- Nil及反相器12及13含電容器ci及C2構成雙向閂84的接收電路rxi。以下為資料訊號傳輸（τ)及接收（RX)中資料閂84操作總和真值表。 …496038 A7 __ _B7 V. Description of the invention (33) The differential bidirectional output becomes positive, that is, V +, via transistors N4 and P1, where the TX data control signal is logic. The transistor p3 is configured for operation and controlled by the τχ data control signal so that the related differential bidirectional output becomes negative, that is, GND ′ passes the transistor P4 & N1, where the τχ data control signal is logic 0. The inverter 11 is operatively configured and controlled to generate a reverse logic state of the TX data control signal. The transistor and the body N7 are configured for operation and controlled by the τχ data control signal so that the related differential bidirectional output becomes positive, via the transistors N8 and P5, where the τχ data control signal is logic 0. Transistor P7 is configured for operation and controlled by TX data control signals so that the related differential bidirectional output becomes negative. Through transistors ρ8 and Ν5, the TX data control signal is logic! . Transistor N13 is configured and controlled to properly terminate the differential transmission line 86 when receiving (RX) data signals. Transistor T13 has an operating resistance that is approximately equal to the characteristic impedance of transmission line 86. Transistors N1- 8 and P1- 8 include inverter 11 to form transmission circuit TX1 of bidirectional latch 84. Transistors N9 and N1 0 are operationally configured and controlled to receive (RX) a differential signal from the sampling data signal of capacitor C1 for the entire half cycle. Transistors Nl 1 and N12 are differential and single-ended inverters whose operating configuration and control are used to switch capacitor C1 to store charging samples to the operating configuration and control. This differential-single-ended inverter is composed of inverters 12, 13 and capacitor C2 which are configured and controlled for operation. Inverter 13 and capacitor C3 are configured as a voltage reference and inverter 12 is configured and controlled as a single-ended logic output buffer / amplifier to sample (RX'd) data signals. — -36- This paper size is applicable to China National Standard (CNS) A4 specification (210X 297mm) 34 V. Description of the invention (Transistors N9-Nil and inverters 12 and 13 include capacitors ci and C2 to form a two-way latch 84 Receiving circuit rxi. The following is the truth table of the total operation of the data latch 84 in data signal transmission (τ) and reception (RX) ...

有額外η循環等候時間（延遲），但是資料按次序每循環接收一次。另外，因I/O資料閂84電路内ΤΧ及RX電路的18〇。不同’為了改善定時相位可能稍有不同，所以資料問$ 4上的’保持時間，等補償一些切換延遲。圖34c顯示的電路圖並不包括習慣上要求的額外波型電路’但具有為人熟悉的性質。清晰差動波型的包裝電感問題減少，因為GND及V+包裝連接電流並不因為傳輸線86的輸出切換動作而產生。回流電流係經差動對而非供應銷的反訊號。所以包裝阻抗與傳輸線86的配合變為容易。圖34d顯示一内部連接ic具有多數單方向接收及傳輸資料閂’見85及87。第一單方向對傳輸及接收閂87i，85〗係操作連接兩不同傳輸線用來傳輸資料從一傳輸線至另外傳輸線。弟一接收閃85ι具有45。方位的延遲校正，其中45。代表各連接閂87!，85i的時鐘訊號的電學長度。 ___-37- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐) 496038 A7 B7 五、發明説明（35 ) 兩對單方向傳輸/接收閂852，872及853，873在如87丨及85! 相同的狀態下操作，但延遲校正的方位約10° ，代表時鐘訊號連接的電學長度。圖34e顯示單方向傳輸/接收閂85，87能傳輸及接收每時鐘循環二位元資料，如果閂87，85各具二同相位傳輸或接收電路為TX1及RX1，反之，各具有傳輸及接收電路TX1及 RX1。 _-38- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)There is additional n-cycle waiting time (delay), but the data is received once per cycle in order. In addition, because of the I / O data latch 84, the TX and RX circuits are 180. Different's may be slightly different in order to improve the timing phase, so the data asks for the 'holding time' on $ 4, etc. to compensate for some switching delays. The circuit diagram shown in Fig. 34c does not include the conventionally required extra wave-type circuit 'but has familiar properties. The problem of the package inductance of the clear differential wave type is reduced because the GND and V + package connection currents are not caused by the output switching action of the transmission line 86. The return current is an inverse signal through the differential pair, not the supply pin. Therefore, the coordination of the package impedance and the transmission line 86 becomes easy. Figure 34d shows an internal connection IC having most unidirectional receiving and transmitting data latches. See 85 and 87. The first unidirectional pair of transmission and reception latches 87i, 85 is operated to connect two different transmission lines for transmitting data from one transmission line to another transmission line. I received a flash of 85m with 45. Azimuth delay correction, of which 45. Represents the electrical length of the clock signal for each of the connection latches 87 !, 85i. ___- 37- This paper size applies Chinese National Standard (CNS) A4 specification (210 X 297 mm) 496038 A7 B7 V. Description of the invention (35) Two pairs of unidirectional transmission / reception latches 852, 872 and 853, 873 87 丨 and 85! Operate in the same state, but the orientation of the delay correction is about 10 °, which represents the electrical length of the clock signal connection. Figure 34e shows that the unidirectional transmission / reception latches 85 and 87 can transmit and receive two bits of data per clock cycle. If the latches 87 and 85 each have two in-phase transmission or reception circuits for TX1 and RX1, otherwise, each has transmission and reception. Circuits TX1 and RX1. _-38- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)

Claims

496038 A8 B8 .C8496038 A8 B8 .C8

6. 1 _ . 一種具有兩個電路部分之電子電路，該等電路部分各具有定時訊號產生及分配裝置，該裝置使用訊號路徑供應，其顯示環狀電磁連續性並以相關主動再生裝置提供訊號相位反轉，以便如同訊號源般供應定時訊號，該電子電路進一步包括各個電路部分的訊號路徑供應（間透過一 t氣長纟及在㈣路徑供應所在位置的聯繫，以協調電路部分之相互頻率及相位一致性，以及在各個電路部分中之雙向資料傳送裝置用以進一步與經協調的定時訊號共同協調。 2·如申請專利範圍帛丨項之電子電路，其中該聯繫具有一與該訊號路㈣定或纟奇數倍數之電氣長度實質相同之電氣長度。 3. 如申請專利範圍第i或第2項之電子電路，其中在— $其他電路部分中之該等聯繫之位置具有—相應於該等电路部分（孩等訊號路徑之電氣長度之相位差。 4. 如申請專利範圍第丨項之電子電路.，其中一第二不同電路部分聯繫供應進一步以預先描述沿著該等訊號路徑傳送之該等定時訊號。 5. 如申請專利範圍第i項之電子電路，其中該等電路部分係為不同之積體電路。 =專利範圍第i項之電子電路，其中該資料傳 :置包括藉由該雙相差動雙極經協調的控制的兩個時：號雙向資料鎖存器以便各自在該等定時訊號之一半週期傳送—資料位元至另-鎖存器，且兩個定6. 1 _. An electronic circuit with two circuit parts, each of which has a timing signal generation and distribution device, which is supplied using a signal path, which displays ring-shaped electromagnetic continuity and provides signals with relevant active regeneration devices The phase is reversed in order to supply timing signals like a signal source. The electronic circuit further includes the signal path supply of each circuit part (via a t gas length 间 and the connection at the location of the ㈣ path supply to coordinate the mutual frequency of the circuit parts). And phase consistency, and the two-way data transmission device in each circuit part is used to further coordinate with the coordinated timing signal. 2. If the electronic circuit of the scope of patent application item 帛丨, the connection has a circuit with the signal The electrical length of the fixed or odd multiples is substantially the same. 3. If the electronic circuit of the scope of application for item i or 2 of the patent application, where the positions of such connections in the-$ other circuit section have-corresponding to the And other circuit parts (phase difference of electrical length of children's signal path). The electronic circuit surrounding item 丨, a second different circuit part of which is in contact with the supply to further describe the timing signals transmitted along these signal paths in advance. 5. For an electronic circuit applying for item i of the patent scope, where The equal circuit part is a different integrated circuit. = The electronic circuit of the item i of the patent scope, wherein the data transmission: the set includes two time: the two-phase data latch by the two-phase differential bipolar coordinated control So that each of them transmits one half cycle of these timing signals—the data bit to the other—the latch, and two

裝 -39-Equipment -39-

496038 8 8 8 8 A B c D 、申請專利範圍 .訊號雙向資料鎖存器皆在該等定時訊號之下一半週期接收那些資料位元。 7.如申請專利範圍第6項之電子電路，包括該等扭曲連結對。 -40- 本紙張尺度適用中國國家標準(CNS) A4規格(210 X 297公釐)496038 8 8 8 8 A B c D, patent application scope. The two-way data latches of signals receive those data bits half a cycle below these timing signals. 7. The electronic circuit according to item 6 of the patent application scope, including such twisted connection pairs. -40- This paper size applies to China National Standard (CNS) A4 (210 X 297 mm)