TW471025B - Mask for mask ROM process - Google Patents

Mask for mask ROM process Download PDF

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Publication number
TW471025B
TW471025B TW88100578A TW88100578A TW471025B TW 471025 B TW471025 B TW 471025B TW 88100578 A TW88100578 A TW 88100578A TW 88100578 A TW88100578 A TW 88100578A TW 471025 B TW471025 B TW 471025B
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Taiwan
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mask
memory
pad
patent application
area
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TW88100578A
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Chinese (zh)
Inventor
Jin-Lung Chen
Jeng-Guei Tzeng
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United Microelectronics Corp
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Publication of TW471025B publication Critical patent/TW471025B/en

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Abstract

This invention provides a mask for mask read only memory (ROM) process, which combines conventional steps of mask for forming pad opening and mask for code-writing opening. This can save a lithography etching step and thus simplify processes and improve efficiency. Moreover, it can avoid barrier layer erosion due to residual etchant from etching step if the deposited barrier layer has to wait for the making of coding mask.

Description

471025 A7 B7 3 744tvvf.doc/008 五、發明説明(() 本發明是有關於一種應用於罩幕式唯讀記憶體(Mask ROM)製程之光罩,且特別是有關於一種應用於罩幕式唯 目買目己憶體之編碼(Encoding)和COB(Chip On Board)之焊墊 (Pad)製程的光罩。 記憶體之應用非常廣泛,配合資訊產品走上輕、薄、 短、小的時代,高容量、小體積、快速度的記憶體需求便 成了時勢所趨。具有埋入式位元線及低負載字元線形成矩 陣式的記憶體,因爲其面積小、密度高,是目前通用的一 種記憶體結構’尤其是具有埋入式位元線的罩幕式唯讀記 憶體,更成爲最普遍的一種罩幕式唯讀記憶體。 製作記憶體製程中,除了其記憶胞(cell)的製作與編碼 (Encoding)外’另外,會在晶片週邊製作焊墊(Pad),以方 便後續打線及封裝(Packaging)。而在編碼與製作焊墊過程 中,要在元件表面形成編碼圖形或是焊墊圖形,均需製作 光罩,因此光罩在製程中爲不可或缺的元件。 傳統的光罩,係以一層玻璃或石英作爲底材,一層用 以形成圖案的鉻遮蔽層以及一層作爲反反射層之氮化鈦層 所組成。但是在〇·25微米(Micron)以下之製程,由於光的 繞射與干涉的現象,使得微影的解析度無法提昇,故現在 的製程中亦有利用可改變光源之相位(Phase)的材質來形成 所需之圖案,以增加微影的解析度,這種光罩稱爲相移式 光罩(Phase Shift Mask)。 ’ 以下特舉一習知之具有埋入式位元線的罩幕式唯讀記 憶體爲例,並配合圖示解釋其部份製程如下: 請參照第1 A圖至第1D圖,其繪示的是習知一種幕罩 3 --- I I n I--,Ν 裝-I HI I - 、1τ (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ^ 471025 經濟部中央標準局員工消費合作社印裝 A7 3744twf.doc/008 D_ 五、發明説明(> ) 式唯讀記憶體之製程剖面示意圖。首先,請參照第1A圖, 在一矽基底101表面包括有記憶體區105和焊墊區103。 其中,在記憶體區1〇5已形成多個位元線(Bit Lines)107及 字元線(WordLines)lll。在焊墊區103則有一場氧化層109 結構。接著,沈積二氧化矽介電層113於記憶體區105上, 覆蓋於字元線111及焊墊區103的場氧化層109表面上。 然後,於介電層113上沈積阻障層(Barrier Layer)l 15。接 下來,便可進行記憶區105之編碼及焊墊之製作。在現場 的作業上,晶片的編碼必須依照客戶需要而定。因此,爲 節省時程上的浪費,以及增加效率,在製程上會先將欲形 成焊墊之區域定義出來,再視客戶需要來製作編碼光罩, 以進行編碼。 _ 接著,請再參照第1A圖,沈積光阻層117於阻障層 115上方。然後,以一具有焊墊開口圖案之光罩102,定 義光阻層117,以將光罩102上之圖案轉移到介電層103 上,光罩102之鳥瞰示意圖繪於第2A圖中。此光罩102 具有焊墊開口圖形207,對應到基底101上之焊墊區103。 在介電層103中,形成焊墊開口 119之後,透過焊墊開口 Π9去除裸露於焊墊開口 119之部份阻障層115,以露出 部份之介電層113。此步驟之目的在使後續在焊墊開口 119 中形成之焊墊,不易脫落。在半導體製程上,鋁爲最常被 使用的焊墊材料之一,以其製作焊墊時須先將作爲阻障層 之氮化鈦去除。然後,待客戶提供程式製作編碼光罩後, 再進行下一製程。 請參照第1B圖,接著,在去除光阻層117後,再沈積 4 ^張尺ϋ用中國國家標準(CNS ) A4&—格(210X297公釐) _ (請先閱讀背面之注意事項再填寫本頁) 471025 3 7 44twf.doc/008 A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明(3 ) 另一層光阻層121覆蓋於阻障層115上。之後,利用依客 戶需求之程式所製作之編碼光罩104,定義光阻121並蝕 刻部份之阻障層Π5,將編碼光罩104上之圖案轉移至光 阻層121和阻障層115上,以形成寫碼窗口(Code Ακα)123、125。光罩104的鳥瞰示意圖繪示於第2B圖中, 在光罩104上具有寫碼窗口圖案203,對應到基底101之 記憶區。 然後,請參照第1C圖所示,以光阻層121及阻障層 115爲罩幕,進行一離子植入步驟,以進行編碼,例如以 一磷離子122,透過寫碼窗口 123、125對通道區127、129 進行摻雜,以完成編碼。 然後,請照第1D圖,沈積一層金屬層(圖中未顯示) 於基底101整個表面上,再利用微影蝕刻程序,在此金屬 層上定義出積體電路所需的金屬線133及焊墊131之圖 案。接著,沈積一層保護層(Passivation)135用以保護這些 電路與元件。最後,在焊墊區域103,利用蝕刻程序形成 在保護層135中形成一焊墊開口 137,露出焊墊131,以 進行晶片的封裝,而完成後續的製程。 在上述過程中,在形成開口 119後,上光阻121前, 爲了配合編碼光罩的製作,通常必須等待一段時間,在這 .段時間,阻障層115很容易受到之前蝕刻步驟殘留的蝕刻 劑侵蝕,而造成腐蝕現象。另外,在沈積阻障層115後, 製作寫碼窗口 123、125及焊墊開口 119時,進行了兩次 微影蝕刻步驟,在成本上及效率均不甚理想。 因此’本發明的目的之-^^,就是在提供一'種應用於卓 --.ttn I ml - - l - * i^n —^1· n^i --^ (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) 471025 3 744l\vf.doc/008 A7 B7 經濟部中央標準局員工消費合作社印製 五、發明説明(冰) 幕式唯續彳思體製程之光罩’將製作寫碼窗〇之圖形及焊 墊開口之圖形合倂在一個光罩中,在一次微影蝕刻中完成 寫碼窗口及焊墊開口,可以節省製作光罩之成本及簡化製 程,並可避免阻障層受到殘留的蝕刻劑侵蝕,而導致腐蝕 的情形發生。 ’ 依照本發明的目的及其他目的,提出一種應用於罩幕 式唯讀記憶體製程之光罩,包括: 提供一光罩,此光罩同時具有一寫碼窗口圖形區及一 焊墊圖形區。其中,在寫碼窗口圖形區包括有寫碼窗口之 圖形,在焊墊圖形區有焊墊開口之圖形。 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉一較佳實施例,並配合所附圖式,作詳 細說明如下: 圖式之簡單說明: 第1Α〜1D圖是習知一種具有埋入式位元線的罩幕式唯 讀記憶體之製造流程的剖面示意圖; 第2Α圖和第2Β圖是習知的焊墊光罩和寫碼光罩之鳥 瞰示意圖; 第3Α圖是依照本發明製作之光罩的鳥瞰示意圖; 第3Β〜3D圖是依照本發明之一較佳實施例,一種罩幕 式唯讀記憶體之製造流程的剖面示意圖;以及 第3Ε圖是依照本發明製作之光罩的剖面示意圖。 圖式之標記說明: 101,301 :基底 102,104,350 :光罩 6 (請先閱讀背面之注意事項再填寫本頁) 1衣. 、1T. 本紙張尺度適用中國國家標準(CNS ) Α4規格(210X297公釐) 471025 A7 3744twi'.doc/008 _ 經濟部中央標隼局員工消費合作社印製 五、發明説明(^) 103,303 :焊墊區 105,305 :記憶區 107,307 :位元線 109,309 :場氧化層 111,311 :字元線 113,313 :介電層 115,315 :阻障層 117,121,317 :光阻層 119,137,337 :開口 122 :離子 123,125,323,325 :寫碼開口 127,129,327,329 :通道區 13 1,331 :焊墊 133,333 :金屬線 135,335 :保護層 203,356 :寫碼開口圖形 207,358 :焊墊開口圖形 3 19 :焊塾開口 354 :焊墊圖形區 3 5 2 :爲碼圖形區 360 :透明底材 362遮蔽層 364 :反反射層 實施例 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準(CNS〉Λ4規格(210X297公釐〉 471025 A7 B7 3744tvvl'.doc/008 五、發明説明(έ ) 請參照第3A圖,其繪示依照本發明製作之光罩的鳥瞰 示意圖。其係結合習知的寫碼光罩和焊墊光罩所製成的。 其中在光罩3SO上同時具有寫碼圖形區352(圖中被虛線所 包圍的區域)以及焊墊圖形區3 5 4 (圖中虛線以外之區域)。 其中在寫碼圖形區352中有多個寫碼窗口圖形356,對應 到矽基底301之記憶區3〇5(如第3B圖所示)。在焊墊圖形 區有多個焊墊開口圖形214,對應到基底301之焊墊區 3〇3(如第3B圖所示)。故以光罩350可在一次微影步驟中 進行寫碼窗口以及焊墊開口之製作。其中焊墊圖形區354 與寫碼圖形區352之佈局並非皆與本實例相同,視客戶之 要求而定。 此光罩3 5 0可以是傳統的光罩,或是相移式光罩。光 罩350其剖面圖繪示於第3E·圖中。其結構包括有透明底 材360,透明底材306之材質例如是石英或是玻璃。透明 底材360上有一層遮蔽層362(此遮蔽層上具有欲形成於矽 基底上之圖案)。遮蔽層362的材質例如是鉻。遮蔽層362 之上覆蓋有一層二氧化鉻或是氮化鈦作爲反反射層364。 如果是相移式光罩則會將遮蔽層362之材質改爲可使光源 可以產生相移角(Shift Angle)的材質,比如是透光率爲 4%〜10%的氮氧矽化鉬(MoSizOxNY)。 請參照第3B〜3D圖,其繪示依照本發明之一較佳實 施例,一種罩幕式唯讀記憶體之製造流程的剖面示意圖。 首先,請參照第3B圖所示,提供一矽基底301,其表面包 括有記憶體區305和焊墊區303。其中在記憶體區305已 8 ϋ張尺度適用中國國家標準(CNS ) A4規格(210X297公釐了 H. 11— I:— n I- I i— I I m I- - .. :.-- ! . .,/v- (請先閲讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 471025 A7 B7 經濟部中央標準局員工消費合作衽印製 3 744tw f.doc/008 五、發明説明(")) 形成有多個位元線307及字元線311。在焊墊區303則有 —場氧化層309結構。接著,形成介電層313於記憶體區 105上覆蓋字元線307,並且延伸覆蓋至焊墊區303的場 氧化層309表面上。介電層313的材質例如是二氧化矽, 形成的方式例如是化學氣相沈積法(CVD)。然後,形成一 阻障層315於介電層313上。阻障層315的材質例如是氮 化鈦,形成的方式例如是以濺鍍法(Sputtering)先沈積一鈦 金屬層,再於含氮氣或含氨之環境下,以高溫將鈦金屬層 氮化成氮化鈦層。 接著,請參照第3C圖,形成一光阻層317於阻障層 315後,以依照本發明之光罩350(如第3A圖所示)定義光 阻層317及阻障層315,以在記憶區305形成寫碼窗口 323、325,且同時在焊墊區303形成焊墊開口 319。例如 以傳統的微影蝕刻的方式,將光罩350之圖案,轉移至阻 障層315及光阻層317上。然後,以光阻層335、阻障層 315爲罩幕,透過寫碼窗口 323、325對通道區327、329 進行編碼,例如以一離子植入步驟,將一離子122(比如是 磷離子),透過寫碼窗口 323、325對通道區327、3M進行 摻雜,以完成編碼。由於形成阻障層315的氮化鈦’質地 相當緻密,故能作爲罩幕,有效的阻擋離子進入基底中’ 使得只有在寫碼窗口 323、325下之基底,才會被離子摻 雜。 然後,請照第3 D圖,形成一金屬層(圖中未威不)於基 底301整個表面上,再於此金屬層上定義出積體電路所需 的金屬連線333及焊墊331之圖案。金屬的材質例如爲 9 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐) (請先閲讀背面之注意事項再填寫本頁)471025 A7 B7 3 744tvvf.doc / 008 V. Description of the invention (() The present invention relates to a photomask used in a mask ROM process, and in particular to a mask applied to a mask This is a photomask for the Encoding and COB (Chip On Board) pad manufacturing processes. Memory is widely used to match information products with light, thin, short, and small Era, the demand for high-capacity, small-size, fast-speed memory has become the trend. With embedded bit lines and low-load word lines forming a matrix memory, because of its small area and high density, It is a kind of memory structure commonly used at present ', especially the mask type read-only memory with embedded bit lines, and it has become the most common type of mask type read-only memory. In the process of making a memory system, in addition to its memory In addition to the production and encoding of cells, in addition, pads will be made around the wafer to facilitate subsequent wire bonding and packaging. In the process of encoding and making pads, the surface of the component should be Form coding patterns or welding For the graphics, a photomask is required, so the photomask is an indispensable element in the manufacturing process. Traditional photomasks use a layer of glass or quartz as a substrate, a chrome shielding layer to form a pattern, and a layer as a reflection Layer of titanium nitride layer. However, in the process below 0.25 micron (Micron), due to the phenomenon of diffraction and interference of light, the resolution of lithography cannot be improved, so it can be used in the current process. Change the material of the phase of the light source to form the required pattern to increase the resolution of the lithography. This type of mask is called a phase shift mask. The mask-type read-only memory of the in-line bit line is taken as an example, and some processes are explained with the illustrations as follows: Please refer to Figures 1A to 1D, which show a conventional mask 3- -II n I-, N installed -I HI I-, 1τ (Please read the precautions on the back before filling out this page) Printed on paper standards of the China National Standards Administration (CNS ^) 471025 Consumer Cooperation of Central Standards Bureau, Ministry of Economic Affairs Printed by A7 3744twf.doc / 008 D_ V. Description of the process of the invention (>) read-only memory cross-section schematic diagram. First, please refer to Figure 1A, a silicon substrate 101 includes a memory region 105 and solder The pad area 103. Among them, a plurality of bit lines 107 and word lines 111 have been formed in the memory area 105. In the pad area 103, there is a field oxide structure 109. Then, a deposition is performed. The silicon dioxide dielectric layer 113 is on the memory region 105 and covers the surface of the field oxide layer 109 of the word line 111 and the pad region 103. Then, a barrier layer 115 is deposited on the dielectric layer 113. Next, the coding of the memory area 105 and the production of the pads can be performed. In the field operation, the coding of the chip must be determined according to the customer's needs. Therefore, in order to save time and waste, and increase efficiency, the area where the pads are to be formed is first defined in the manufacturing process, and then the coding mask is made according to the customer's needs for coding. _ Next, referring to FIG. 1A again, a photoresist layer 117 is deposited on the barrier layer 115. Then, a photomask 102 having a pattern of pad openings is used to define a photoresist layer 117 to transfer the pattern on the photomask 102 to the dielectric layer 103. A bird's-eye view of the photomask 102 is shown in FIG. 2A. The photomask 102 has a pad opening pattern 207 corresponding to the pad area 103 on the substrate 101. After the pad opening 119 is formed in the dielectric layer 103, a part of the barrier layer 115 exposed on the pad opening 119 is removed through the pad opening Π9 to expose a part of the dielectric layer 113. The purpose of this step is to make the pads formed in the pad openings 119 difficult to fall off. In the semiconductor manufacturing process, aluminum is one of the most commonly used pad materials. When making pads, aluminum nitride must be removed as a barrier layer. Then, after the customer provides a program to make a coded mask, the next process is performed. Please refer to Figure 1B, and then, after removing the photoresist layer 117, deposit 4 ^ Zhang ruler using China National Standard (CNS) A4 &-(210X297 mm) _ (Please read the precautions on the back before filling (This page) 471025 3 7 44twf.doc / 008 A7 B7 Printed by the Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs. 5. Description of the invention (3) Another layer of photoresist layer 121 covers the barrier layer 115. After that, using the coded photomask 104 made according to the program of the customer, define the photoresist 121 and etch part of the barrier layer Π5, and transfer the pattern on the coded photomask 104 to the photoresist layer 121 and the barrier layer 115 To form code writing windows (Code Ακα) 123, 125. A schematic bird's-eye view of the photomask 104 is shown in FIG. 2B. The photomask 104 has a code window pattern 203 corresponding to the memory area of the substrate 101. Then, referring to FIG. 1C, using the photoresist layer 121 and the barrier layer 115 as a mask, an ion implantation step is performed to perform encoding, for example, a phosphorus ion 122 is passed through the writing window 123, 125 pairs. The channel regions 127, 129 are doped to complete encoding. Then, according to Figure 1D, deposit a metal layer (not shown) on the entire surface of the substrate 101, and then use the lithographic etching process to define the metal wires 133 and solder required for the integrated circuit on this metal layer. Pattern of the pad 131. Next, a passivation layer 135 is deposited to protect these circuits and components. Finally, in the pad region 103, a pad opening 137 is formed in the protective layer 135 by an etching process, and the pad 131 is exposed, so as to package the wafer and complete the subsequent processes. In the above process, after the opening 119 is formed and before the photoresist 121 is formed, in order to cooperate with the production of the coding mask, it is usually necessary to wait for a period of time. During this period, the barrier layer 115 is easily susceptible to the etching remaining in the previous etching step. Agents can cause corrosion. In addition, after the deposition of the barrier layer 115, two lithographic etching steps were performed when the code writing windows 123, 125 and the pad openings 119 were made, which were not very cost effective and efficient. Therefore, 'the purpose of the present invention-^^ is to provide a kind of application to Zhuo-. Ttn I ml--l-* i ^ n — ^ 1 · n ^ i-^ (Please read the Note: Please fill in this page again.) This paper size is in accordance with Chinese National Standard (CNS) A4 specification (210X297 mm) 471025 3 744l \ vf.doc / 008 A7 B7 Printed by the Staff Consumer Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs (Ice) The mask of the curtain-type continuation system is to combine the pattern of the coding window 0 and the pattern of the pad opening in a photomask to complete the coding window and the pad opening in one lithographic etching. , Which can save the cost of manufacturing the photomask and simplify the manufacturing process, and can prevent the barrier layer from being eroded by the residual etchant, leading to corrosion. '' According to the purpose of the present invention and other objects, a photomask applied to a mask-type read-only memory system is provided, which includes: providing a photomask, the photomask has a writing window graphic area and a pad graphic area at the same time. . Among them, the graphic area of the coding window includes the graphic of the coding window, and the graphic of the pad opening has the graphic of the pad opening. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is given below in conjunction with the accompanying drawings for detailed description as follows: Brief description of the drawings: Section 1A ~ Figure 1D is a schematic cross-sectional view of the conventional manufacturing process of a mask-type read-only memory with embedded bit lines; Figures 2A and 2B are bird's-eye views of conventional pad masks and coded masks. Figure 3A is a bird's-eye view of a photomask made in accordance with the present invention; Figures 3B to 3D are schematic cross-sectional views of a manufacturing process of a mask-type read-only memory according to a preferred embodiment of the present invention; and 3E is a schematic cross-sectional view of a photomask made according to the present invention. Description of drawing marks: 101, 301: substrate 102, 104, 350: photomask 6 (Please read the precautions on the back before filling out this page) 1 clothing, 1T. This paper size applies to China National Standard (CNS) Α4 Specifications (210X297 mm) 471025 A7 3744twi'.doc / 008 _ Printed by the Consumer Cooperatives of the Central Bureau of Standards of the Ministry of Economic Affairs 5. Description of the invention (^) 103,303: Pad area 105,305: Memory area 107,307: Bit lines 109, 309: field oxide layers 111, 311: word lines 113, 313: dielectric layers 115, 315: barrier layers 117, 121, 317: photoresist layers 119, 137, 337: openings 122: ions 123, 125, 323, 325: code opening 127, 129, 327, 329: channel area 13 1, 331: pad 133, 333: metal wire 135, 335: protective layer 203, 356: code opening pattern 207, 358: Welding pad opening pattern 3 19: Welding pad opening 354: Welding pad pattern area 3 5 2: Code pattern area 360: Transparent substrate 362 Shielding layer 364: Retro-reflective layer embodiment (please read the precautions on the back first) (Fill in this page) This paper size applies to Chinese national standards (CNS> Λ4 specifications (210X297 mm> 471025 A7 B7 3744tvvl'.doc / 008 3. Description of the Invention Please refer to FIG. 3A, which shows a bird's-eye view of a photomask made in accordance with the present invention. It is made by combining a conventional coded photomask and a pad photomask. 3SO has both a code writing pattern area 352 (the area surrounded by the dotted line in the figure) and a pad pattern area 3 5 4 (the area outside the dotted line in the figure). There are multiple code writing windows in the code writing pattern area 352 The pattern 356 corresponds to the memory area 305 of the silicon substrate 301 (as shown in FIG. 3B). There are a plurality of pad opening patterns 214 in the pad pattern area, corresponding to the pad area 303 of the substrate 301 (such as (Shown in Figure 3B). Therefore, the mask 350 can be used to make the code writing window and the pad opening in one lithography step. The layout of the pad pattern area 354 and the code pattern area 352 are not all the same as this example. Depends on customer requirements. This photomask 350 can be a traditional photomask or a phase shift photomask. The cross-section of photomask 350 is shown in Figure 3E. Its structure includes a transparent bottom The material 360 and the transparent substrate 306 are, for example, quartz or glass. The transparent substrate 360 has a layer of shielding. 362 (this upper shielding layer having a pattern to be formed on the silicon substrate). Shielding layer 362 made of, for example, chromium. Shielding layer 362 above a layer of titanium covered with chromium or titanium nitride as an anti-reflection layer 364. If it is a phase-shifting photomask, the material of the shielding layer 362 will be changed to a material that can generate a phase shift angle (Shift Angle), such as MoSizOxNY with a light transmittance of 4% to 10%. ). Please refer to FIGS. 3B to 3D, which are schematic cross-sectional views illustrating a manufacturing process of a mask-type read-only memory according to a preferred embodiment of the present invention. First, referring to FIG. 3B, a silicon substrate 301 is provided, and its surface includes a memory region 305 and a pad region 303. Among them, in the memory area 305, the 8-sheet scale is applicable to the Chinese National Standard (CNS) A4 specification (210X297 mm H. 11— I: — n I— I i— II m I—-..: .--! . ,, / v- (Please read the notes on the back before filling out this page) Printed by the Consumers 'Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 471025 A7 B7 Printed by the Consumers' Cooperative of the Central Standards Bureau of the Ministry of Economic Affairs 3 744tw f.doc / 008 5. Description of the Invention (")) A plurality of bit lines 307 and word lines 311 are formed. In the pad region 303, there is a field oxide layer 309 structure. Next, a dielectric layer 313 is formed to cover the word lines 307 on the memory region 105, and extends to cover the surface of the field oxide layer 309 of the pad region 303. The material of the dielectric layer 313 is, for example, silicon dioxide, and the method of forming the dielectric layer 313 is, for example, chemical vapor deposition (CVD). Then, a barrier layer 315 is formed on the dielectric layer 313. The material of the barrier layer 315 is, for example, titanium nitride, and the formation method is, for example, a titanium metal layer is deposited by sputtering, and then the titanium metal layer is nitrided at a high temperature in an environment containing nitrogen or ammonia. Titanium nitride layer. Next, referring to FIG. 3C, a photoresist layer 317 is formed on the barrier layer 315, and then the photoresist layer 317 and the barrier layer 315 are defined according to the photomask 350 (as shown in FIG. 3A) of the present invention. The memory area 305 forms code writing windows 323 and 325, and at the same time, a pad opening 319 is formed in the pad area 303. For example, the pattern of the photomask 350 is transferred to the barrier layer 315 and the photoresist layer 317 by a conventional lithographic etching method. Then, the photoresist layer 335 and the barrier layer 315 are used as a mask, and the channel regions 327 and 329 are encoded through the code writing windows 323 and 325. For example, in an ion implantation step, an ion 122 (such as phosphorus ion) is used. The channel regions 327 and 3M are doped through the write code windows 323 and 325 to complete encoding. Since the titanium nitride 'forming the barrier layer 315 has a very dense texture, it can be used as a mask to effectively block ions from entering the substrate', so that only the substrate under the code writing windows 323 and 325 will be doped with ions. Then, according to FIG. 3D, a metal layer (not shown in the figure) is formed on the entire surface of the substrate 301, and the metal wiring 333 and the pad 331 required for the integrated circuit are defined on the metal layer. pattern. The material of the metal is, for example, 9 paper sizes. Applicable to China National Standard (CNS) A4 (210X297 mm) (Please read the precautions on the back before filling this page)

471025 3744twf.doc/008 gy 五、餐明説明(?) ^ 鋁,形成的方法例如爲濺鍍法。金屬連線333及焊執331 之形成方法例如是傳統的微影蝕刻法。接著,形成:保罐 層335,用以保護這些電路與元件。保護層33^的材質^ 如是二氧化矽,形成的方式例如爲常壓化學氣相沈積法 (APCVD)。其後,在焊墊區域3〇3上’在保護靥中形 成一開口 337露出焊墊331,例如以是微影蝕刻法定義保 護層335以在焊墊區303形成〜開口 337露出焊墊331。 然後,可進行晶片的封裝’而完成後續的製程。 由上述本發明之貫施例可瞭解,應用本發明具有如下 之特點: h將習知步驟中在阻P早層中形成焊墊開口之光罩诞形 成寫碼開口之光罩結合,減去一微影蝕刻步驟,可節省製 作光罩之成本及簡化製程,提高效率。 2·可避免阻障層在等待編碼光罩的製作時,因之前蝕 刻步驟殘留的蝕刻劑侵蝕,而造成腐蝕之情形。 雖然本發明已以一較佳實施例揭露如上,然其並非用 以限定本潑明,任何熟習此技藝者,在不脫離本發明之精 神和範圍內,當可作些許之更動與潤飾,因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準。 1·1 .^1 n I I I t ^ 1 - —— I I I 訂 (請先閱讀背面之注意事項再填寫本頁) 經濟部中央標準局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS ) A4規格(210X297公釐)471025 3744twf.doc / 008 gy Fifth, the instructions (?) ^ Aluminum, the formation method is, for example, sputtering. The method of forming the metal wiring 333 and the welding jig 331 is, for example, a conventional lithography method. Next, a can-keeping layer 335 is formed to protect these circuits and components. The material of the protective layer 33 ^ is, for example, silicon dioxide, and the formation method is, for example, atmospheric pressure chemical vapor deposition (APCVD). Thereafter, an opening 337 is formed in the protective pad on the pad region 303 to expose the pad 331. For example, the protective layer 335 is defined by the photolithography method to form the pad region 303. The opening 337 exposes the pad 331. . Then, the wafer can be packaged 'to complete subsequent processes. As can be understood from the foregoing embodiments of the present invention, the application of the present invention has the following characteristics: h Combines the mask that forms the pad opening in the P-layer in the conventional step with the mask that forms the code opening, and subtracts A lithography etching step can save the cost of making a photomask, simplify the manufacturing process, and improve efficiency. 2. It can avoid the situation that the barrier layer is corroded due to the etchant remaining in the previous etching step while waiting for the production of the coding mask. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Anyone skilled in the art can make some changes and retouch without departing from the spirit and scope of the present invention. The protection scope of the present invention shall be determined by the scope of the attached patent application. 1 · 1. ^ 1 n III t ^ 1-—— Order III (please read the notes on the back before filling this page) Printed by the Central Consumers Bureau of the Ministry of Economic Affairs, Consumer Cooperatives This paper is printed in accordance with Chinese National Standards (CNS) A4 Specifications (210X297 mm)

Claims (1)

471025 3744twf3.doc/002 A8 B8 C8 D8 修: 六 II471025 3744twf3.doc / 002 A8 B8 C8 D8 Repair: Six II 無明 |示 質1 容孓 准二 予日 修所 正提 。之 申請專利範圍 1. 一種應用於罩幕式唯讀記憶體製程之光罩,該光罩 包括: 一寫碼窗口圖形區;以及 一焊墊圖形區。 2. 如申請專利範圍第1項所述之應用於罩幕式唯讀記 憶體製程之光罩,其中該寫碼窗口圖形區包括複數個寫碼 窗口圖形。 3·如申請專利範圍第1項所述之應用於罩幕式唯讀記 憶體製程之光罩,其中該焊墊圖形區包括複數個焊墊開口 圖形。 4一種罩幕式唯讀記憶體之製造方法,該方法仞括: (請先閱讀背面之注意事項再填寫本頁) 提供一某底,該基底包括一記憶區及一焊墊區,日該 基底之記憶區中已形成複數個位元線及複數個字元線,目_ 該基底上已形成一介電層,該介電層上已形成一阳瞳層; 以該光罩定義該阻障層,以同時在該焊墊區上形成複 數個焊墊開口,在該記憶區上形成複數個寫碾開口 :以及 透渦該fe寫碼開口,對該基底進行一離子植入步驟, 以使該字元線完成編碼。 5. 如申請專利範圍第4項所述之罩幕式唯讀記憶體之 製造方法,更包括後續在該些焊墊開口中形成複數個焊 墊,以及在該記憶區上方形成一金屬連線。 6. 如申請專利範圍第4項所述之罩幕式唯讀記憶體之 製造方法,其中該阻障層的材質爲氮化鈦。 : 7. 如申請專利範圍第4項所述之罩,幕式唯讀記憶體 製造方法,其中該離子植入步驟係將一雜質植入該字元線 11 訂 線 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 471025 3744twf3.doc/002 7齡月獅少ί 伽允I 一 六、申請專利範圍 下之該基底。 8. 如申請專利範圍第7項所述之罩幕式唯讀記憶體之 製浩方法,其中該雜質爲硼。 9. 如申請專利範圍第7項所述之罩幕式唯讀記憶體之 製浩方法,其中該雜質爲磷。 --,ί * 丨 1 !丨 I — --I II — I I 訂----il·.^% (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印剩取 r 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐)Wu Ming | Show quality 1 Rong Hong Jun 2 to the Japanese repair institute is mentioning. Scope of patent application 1. A photomask used in a mask-type read-only memory system, the photomask includes: a writing window pattern area; and a pad pattern area. 2. The mask applied to the mask-type read-only memory system as described in item 1 of the scope of patent application, wherein the coding window graphics area includes a plurality of coding window graphics. 3. The photomask used in the mask-type read-only memory system described in item 1 of the scope of patent application, wherein the pad pattern area includes a plurality of pad opening patterns. 4 A method for manufacturing a mask-type read-only memory, the method includes: (Please read the precautions on the back before filling out this page) Provide a certain substrate, the substrate includes a memory area and a pad area. A plurality of bit lines and a plurality of word lines have been formed in the memory area of the substrate. A dielectric layer has been formed on the substrate, and a pupil layer has been formed on the dielectric layer. The resist is defined by the mask. A barrier layer to form a plurality of pad openings in the pad area at the same time, and a plurality of write mill openings in the memory area: and vortex the fe write code opening to perform an ion implantation step on the substrate to: The character line is encoded. 5. The manufacturing method of the mask type read-only memory as described in item 4 of the scope of patent application, further comprising forming a plurality of pads in the pad openings subsequently, and forming a metal connection above the memory area. . 6. The manufacturing method of the veil-type read-only memory according to item 4 of the scope of patent application, wherein the material of the barrier layer is titanium nitride. : 7. The manufacturing method of the mask-type read-only memory as described in item 4 of the scope of patent application, wherein the ion implantation step is to implant an impurity into the character line 11 The paper size printed by the cooperative is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) 471025 3744twf3.doc / 002 7-year-old Shi Shao 允 Jia Yun I 16. The substrate under the scope of patent application. 8. The method of manufacturing a mask-type read-only memory as described in item 7 of the scope of patent application, wherein the impurity is boron. 9. The method for manufacturing a mask-type read-only memory as described in item 7 of the scope of patent application, wherein the impurity is phosphorus. -, ί * 丨 1! 丨 I — --I II — II Order ---- il ·. ^% (Please read the precautions on the back before filling this page) The Intellectual Property Bureau of the Ministry of Economic Affairs, Consumer Consumption Cooperatives Take r This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm)
TW88100578A 1999-01-15 1999-01-15 Mask for mask ROM process TW471025B (en)

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