TW449999B

TW449999B - Digital video system and methods for providing same

Info

Publication number: TW449999B
Application number: TW88112431A
Authority: TW
Inventors: Dale R Adams; Laurence A Thompson; Jano D Banks; David C Buuck; Cheng Hwee Chee
Original assignee: Dvdo Inc
Priority date: 1998-07-23
Filing date: 1999-07-30
Publication date: 2001-08-11

Abstract

A digital image enhancer includes a deinterlacing processor receptive to an interlaced video stream. The deinterlacing processor includes a first deinterlacer and a second deinterlacer and provides a deinterlaced video stream. The digital image enhancer also includes a video output processor receptive to the output of the deinterlaced video stream to provide a scaled, deinterlaced video stream. A portable DVD layer including the digital video enhancer has a generally thin prismatic enclosure having a first major surface, a second major surface separated from said first major surface, and side surfaces connecting the first major surface to the second major surface. At least a portion of the first major surface includes a video display, and the enclosure includes a DVD entry port such that a DVD can be inserted into the enclosure.

Description

1 26diH Λ Λ y\ 2 o d ι449 99 § 0 0 2 經濟部智慧財產局員工消费合作社印製 B7 五、發明說明（f ) 本發明是有關於一種可攜式視頻機技術及視頻影像之處理，且特別是有關於一種解交錯及增強視頻影像之技術。由於數位視頻提供有許多的優點，故從類比視頻技術急速的發展至數位視頻技術。因爲數位視頻可被儲存在隨機存取媒體上，例如磁碟裝置（硬碟）及光碟媒體如習知光碟片(CDs)，故數位視頻相較於類比視頻來說，數位視頻可較爲便宜的被儲存及分配。一旦儲存在隨機存取媒體上，數位視頻可變爲互動，並允許其被使用在遊戲、目錄、訓練、課程及其他應用上。以數位視頻技術爲基礎的最新產品之一係爲數位視頻碟片，有時稱爲”數位多功能碟片”或僅稱爲”DVD〜這些碟片之尺寸如同音樂CD，但其提供有17兆資料位元組，音樂CD上之資料的26倍。DVD儲存容量（nG位元組)遠大於CD-ROM(600M位元組）’且DVD比CD-ROM可在一較高的速率下傳遞資料。因此’ DVD技術代表在視頻與聲音品質上之一巨大改善，其遠優於傳統系統例如電視、 VCRs 及 CD-ROM。然而，利用DVD及其他數位視頻技術來顯示動畫的主要問題，在於動畫源具有不同的圖框速度。舉例來說，當使用國家電視系統委員會（NTSC)標準之電視廣播更新運作爲60Hz時’標準膜之射出速率爲24 Hz。透過一稱爲解交錯之過程將動畫轉換成數位視頻，通常會在解析度中產生一顯著的縮小狀況，如同習知運動膺像之失真。 4 本紙張尺度適用中國國家標準（CNS)A4規格（210x297公釐） (請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------.^、經濟部智慧財產局員工消费合作社印製 4 49 9¾2¾ 五、發明說明（z ) 另一個利用數位視頻技術的問題，係動畫以各種不同的格式到達。舉例來說’當視頻顯示器通常較爲狹長時，戲院中之電影會被格式化用於寬螢幕。視頻影像製作用以將一數位或數位化影像從一格式轉換成另一格式舉例來說’爲了在一特定顯不裝置例如具有一固定解析度爲 640x480之LCD面板上顯示，則具有一空間解析度爲720 水平乘以48〇垂直像素之數位影像，可能會被轉換成另一解析度。然而，大多習知的視頻製作方法，於轉換影像中提供拙劣的解析度。此製作方法提供之品質解析度，於實行時花費極高。然而視頻影像製作的另一問題，係其可能需要介於兩不同步及/或不同資料率領域間之資料傳輸。使用上述段落之範例，從720水平像素製作成640像素（比率爲9 : 8)，則需要介於541^12領域與48]\/[112：領域（比率爲9:8)間之一介面。在習知技藝中，介於兩不同步及/或不同資料率領域間之資料傳輸，其需使用巨大、昂貴的緩衝器。數位視頻技術會較難利用的另一原因，係因爲DVD 播放機一般都是較大、較笨重的裝置，而不易運送。因爲 DVD播放機在操作時必須附加一視頻顯示器，例如電視或電視螢幕，故使其實際上被限制在無法於任何地方使用。此外，習知的行動視頻系統亦有一大堆惱人的問題。手持與行動電視·般都設定到呈現接收弊端例如RF多路徑干擾，以及在鄕村地區中之拙劣或不規則的訊號強度。經由提供捲帶播放性能，整合TV/VCR樂隊單元可解決這些問本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ί' ---* 裝 - ------訂 ------!^·> (請先閱讀背面之注意事項再填寫本頁) A7 B7 S ] 20pit'l .<.1〇cMKJ2 449 99 9 五、發明說明（多）題，但其實體太大故不適於攜帶。如上述所言，具有一能夠易於攜帶且能在各種狀況下使用之可攜式視頻播放機是有必要的。此外，在消除行動人爲因素的同時，具有提供保存影像之全解析之.一解交錯及重新格式化的方法與裝置’也是有必要的。當要縮小成本時，具有一用以提供高品質視頻標度及垂直處理之方法與裝置，也是有必要的。當要縮小成本及消除巨大與昂貴緩衝器之需要時，具有一用以提供不同步資料介面之方法與裝置，是有必要的。有鑒於此，本發明可以數個方法來實現，包括例如一過程'一裝置系統、一元件或一方法。本發明之幾個發明實施例將描述如下。在本發明之一實施例中，提出一種數位影像增強器。數位影像增強器包括一解交錯處理器，接收一交錯視頻串。此解交錯處理器包括一第一解交錯器與一第二解交錯器’並提供一解交錯視頻串。數位影像增強器也包括一視頻輸出處理器，接收解交錯視頻串之輸出，以提供一標度、解交錯視頻串。在本發明之另一實施例中，提出一種數位影像增強器，包括一解交錯處理器，接收一交錯視頻串並提供一解交錯視頻串。數位影像增強器也包括一視頻輸出處理器，接收解交錯處理器之輸出。解交錯處理器處理垂直截割之交錯視頻串’以提供一標度、解交錯視頻串。在本發明之再一實施例中，提出-種可攜式DVD播放本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公釐） ----------I > * 11 I--I 訂- ----- - - -線 1 (請先閒讀背面之注意事項再填寫本頁) 經濟部智慧財產局貝工消費合作社印製 A7 4 4 9 gP90|9'1 doc 002 五、發明說明（％ ) 機。此可攜式DVD播放機包括一槪略薄稜柱圍繞物，具有一第一主表面、從第一主表面分離之一第二主表面，以及側面連接第一主表面及第二主表面。至少一部分之第一主表面包括一視頻顯示器，以及此圍繞物包括一 DVD進入埠，其可使〜-DVD被***圍繞物中。可攜式DVD播放機也包括一數位處理系統，包括一解碼器、一影像增強裝置及一顯示控制器。解碼器接收來自被***圍繞物中之一 DVD的信號，以提供一解碼、交錯視頻信號。影像增強裝置轉換交錯視頻信號成一解交錯視頻信號。顯示控制器使用解交錯視頻信號以提供累進掃描視頻於視頻顯示器上。在本發明之又一實施例中，提出一種處理數位視頻的方法。此方法包括經由至少一數量之解交錯方法之一，解交錯一交錯視頻串，以產生一解交錯視頻串。此方法也包括調整此解交錯視頻串。爲讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉較佳實施例，並配合所附圖式，作詳細說明如下= 圖式之簡單說明：第1A及1B圖繪示的是依照本發明一較佳實施例之可攜式DVD播放機的示意圖；第2A、2B及2C圖繪示的是依照本發明一較佳實施例之DVD播放機的幾個不同應用的示意圖；第2D圖繪示的是依照本發明一較佳實施例之DVD播本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） ------------ --------訂- - --- - ---1 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消费合作社印製經濟部智慧財產局wc工消費合作社印製 4 49 9 9t2grin d^002 A7 B7 五、發明說明（夕）放機的平台及伴隨之視頻監視器的示意圖；第2E圖繪示的是依照本發明一較佳實施例之”桌上型平板”(“0以10^以1^”)0乂0播放機的示意圖；第3圖繪示的是依照本發明一較佳實施例之DVD播放機之電子電路的方塊圖；第4圖繪示的是依照本發明一較佳實施例之影像增強機制(IE2)的系統圖；第5圖繪示的是依照本發明一較佳實施例之在解交錯過程中，結合圖場至圖框中的方法示意圖；第6圖繪示的是依照本發明一較佳實施例之視頻解交錯器的方塊圖；第7圖繪示的是依照本發明一較佳實施例之累進圖框偵測器的系統圖；第8圖繪示的是依照本發明一較佳實施例之在圖場區別模組內的處理步驟流程圖：第9圖繪示的是依照本發明一較佳實施例之頻率偵測模組的詳細描述圓：第10圖繪示的是依照本發明一較佳實施例之PFPD模組的系統圖；第11圖繪示的是依照本發明一較佳實施例之解交錯過程的示意圖；第12圖係顯示用來描述本發明之像素値的兩尺寸陣列圖；第13圖繪示的是依照本發明一較佳實施例之用以從 --— —— — — — — I I - · I I-----^ I I I-----^、 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（2]0 X 297公釐） i'l .dou. 002 A7 B7 五、發明說明（（）第〗2圖之兩尺寸陣列中獲得一輸出像素的方法示意圖；第〗4A圓繪示的是依照本發明一較佳實施例之用來描述該方法的示意圖；第14B圖繪示的是從第14A圖之取樣線中之.一組樣本的圖表：第14C圖繪示的是一取樣餘弦波的圖表；第15圖繪示的是依照本發明一較佳實施例之用來描述臨限一偵測値的方法示意圖；第丨6圖繪示的是依照本發明一較佳實施例之混合電路的方塊圖；第Π圖繪示的是當DV大於”0”，但小於”1”時，依照本發明一較佳實施例之混合電路的示範操作圖；第18圖繪示的是依照本發明一較佳實施例之用以偵測對角線特徵的方法示意圖；第19圖繪示的是依照本發明一較佳實施例之對角線混合電路的方塊圖；第20圖繪不的是用來計算第16圖之對角線混合電路之輸出之二次陣列的像素示意圖；第21圖繪示的是依照本發明一較佳實施例之對角線偵測方法的流程圖；第22圖繪示的是依照本發明一較佳實施例之可變標度FIR濾波器的簡例圖： $ 第23圖繪不的是低通濾波器在時域中之圖表；桌24圖繪不的是係數組成L組，每組有多個係數的本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先閱讀背面之注意事項再填寫本頁> I I I I I I 訂-----It—— 經濟部智慧財產局員工消費合作社印製 A7 B7 4 49 99 9 五、發明說明（1) 圖表；第25圖繪示的是依照本發明一較佳實施例之量子化的方法流程圖；第26圖繪示的是依照本發明一較佳實施例之改變係數的方法流程圖；第27圖繪示的是依照本發明一較佳實施例之視頻圖框的示意圖，其經由一對應數量之掃描線’被細分成做爲一截割（slice)掃描序列之一數量之垂直截割’ 第28圖繪示的是起始截割中心部分的簡例圖’在其左邊緣及右邊緣上有無效資料的問題；第29圖繪示的是一截割沿著起始截割中心部分的左及右邊緣，具有增加的屏翼(wings); 第30圖繪示的是重疊截割/屏翼結合之整個結構不思圖；第31圖繪示的是依照本發明一較佳實施例之處理視頻的方法流程圖；第32圖繪示的是依照本發明一較佳實施例之以視頻處理器爲基礎之截割的系統示意圖；第3 3圖繪示的是依照本發明一較佳貫施例之視頻處理晶片架構的系統示意圖；第34圖繪示的是依照本發明一較佳實施例之一不同步介面的方塊圖：第35圖繪示的是依照本發明一較佳實施例之一交替不同步介面的方塊圖；本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公釐） -----------' 11--— 11 訂----I I ί .. (請先閲讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消费合作社印製 4 5 1 2 6 p 11 i . d o c ' 0 0 249 99 9 A7 B7 五、發明說明（¾ ) 第36圖繪示的是依照本發明一較佳實施例之3-緩衝同步器序列的示意圖，其編排與3 RAM緩衝器之讀取及寫入操作有關：第37圖繪示的是依照本發明一較佳實施例之用以透過RAM位址及模組編排的方法流程圖；以及第38圖繪示的是依照本發明一較佳實施例之用以在視頻標度應用中之本發明之同步器的輪廓圖。圖式之標號說明： 10 :可攜式DVD播放機螢幕經濟部智慧財產局員工消费合作社印製 14 ： 18 ： 22 ： 26 ： 30 ： 34 ： 38 ： 42 ： 60 ： 90、 102 106 130 場緩衝器 142 電源及信號介面媒體傳送裝置驅動模組影像增強機制系統控制器電池組視頻資料緩衝器視頻輸出處理器 132 ' 136 ' 138 ' =薄膜圖框 12 :外殼 16 :控制按鈕 20 :紅外線介面 24 ： DVD 28 :解碼器 32 :聲音/紅外線聯結器 3 6 :顯不器 40 :電源供應器 50 :視頻處理晶片架構 70、80 :解交錯平台 140 ： FIFO 104 :視頻圖場 106a、106b :解交錯圖框視頻解交錯器 134 、 134a-d :圖 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------線> 累進圖框偵測器 144 : L/N 信號本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 4 49 93，fl.d°c_2 a? B7 五、發明說明（?） 146 :累進圖框偵測信號 150 :圖場組合平台出圖框 154 :內部圖框解交錯器 148 :平台1偵測値 152:累進格式輸 154 :圖場區別模組 156 158 160 168 170 174 頻率偵測模組累進圖框圖案偵測模組 162、164 :圖場等歷史位元頻率偵測歷史位元 Π6 :像素集 166 :轉換偵測3 : 2數値 172 :轉換偵測2 : 2數値 178 :差動器 180 ：差値 182 :圖場差値累加器 184 ：圖場差値 186、 200 、 214 、 222 ' 240 • 3己憶體模組 192 ：轉換3 : 2輸出信號 194 :臨界操作 198 ：等圖場位元 206 :垂直相鄰像素 212 ：可程式臨界値 218 ：圖場頻率偵測累加器 220 :圖場頻率偵測値 220。圖場頻率偵測値 228 .轉換2 : 2位元 (諳先閲續背面之注意事項再填寫本頁) . 111 訂---------妗- 經濟部智慧財產局員工消费合作社印製 230 :圖場偵測値 232 :乘法器 234 :可程式圖場頻率臨界暫存器 239 :相對頻率差位元 242 :頻率偵測歷史位元 244 :圖場差歷史位元 246、248、250 ' 252、254、258 :邏輯運算 256 :邏輯OR閘 260 :計時器本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） ,Λ Λ Λ5]1ύρ\Π .doc · 00 2 4 49 99 9 Α7 Β7 五、發明說明（β) 經濟部智慧財產局員工消費合作社印製 262 :邏輯AND閘 302、304 :視頻圖場 306、308、314 ' 316 :掃描線 310 :圖場結合解交錯處理器 3 1 2 :結合圖框 318 :陣列 320、322 :歹IJ 338 :輸出像素 334 :最後偵測値 336 :混合操作 340 :影像 342 :扭曲目標 344 、 426 、 428 、 430 :線 346 :圖表 348 :樣本 350 :取樣餘弦波 352 :圖表 354 :非臨限標度 356 :臨限標度 358 :上臨限點 360 :低臨限點 400 :混合電路 402 :三像素陣列 406 :輸出像素 410 :二次陣列 412 :對角線偵測電路 414 : Sign 信號 416 : SlopeFade 信號 418 :對角線混合電路 420 :多工器 422、424 :混合器 500 :可變標度FIR濾波器 502 :位移暫存器 504 :暫存器 506 :時脈 508、510、5〗2 :乘法器 514 :濾波支線 516 :係數儲存單元 518 :加法器 520 :低通濾波係數 522 :曲線 524 :係數 600 :視頻圖框 602 、 622 ' 632 、 634 、 648 、652 :截割 -----------L --------訂-----！！梦 (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 5 I 1 cl〇e/0(J2 5 I 1 cl〇e/0(J2 A7 B7 604 :掃描線 606 *截割中心部分 608 :左邊緣 610 :右邊緣 612、614 :矩陣 616 :像素資料 618 :頂邊緣 620 :底邊緣 - 624 :左屏翼 626 :右屏翼 628 :重疊截割/屏翼結合 630 :行 638 :左外部屏翼 640 :左內部屏翼 642 :左內部屛翼 644 :右外部屏翼 646、650 :處理平台 6S4 :截割基礎視頻處理器 656、658 :輸入緩衝器 660 ' 662 :輸出緩衝器 664 :輸入資料格式器 666、688 :垂直視頻處理區段 668 :輸出資料格式器 670 :視頻處理晶片架構 672 :視頻處理器 674 :外部記憶體源 676 :輸入平台 680 :記憶體控制器 678 ' 682 ' 684 ' 686 :圖場記憶體緩衝器 690、692 :圖框緩衝器區域 449999 五、發明說明（ff ) (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 694 :水平處理區塊 700、722 :不同步介面 702 :資料源 704 ' 760 :輸入資料串 705、 758 :同步器 706、 724、768 :寫入控制邏輯單元 708、710、712 : RAM 緩衝器 714、732、774 :讀取控邏輯單元本紙張尺度適用申國國家標準（CNS)A4規格（210 X 297公g ) Α7 4 49 夺9ύΙ9Ί·^_2 ____Β7____ 五、發明說明（丨2·) 716、782 :輸出資料串 718 :資料目的地 720 :同步邏輯單元 726、728、730、762、764、766 : RAM 緩衝器 734、780 : MUX . 736:可選擇同步邏輯單元738: 3-緩衝同步器序列 739 :歪斜 770 ' 772、776、778 ·計數器實施例爲了提供本發明之徹底理解，將在以下的描述中詳細說明。然而’本發明並不限定在所描述之一些或所有特定描述’任何熟習此技藝者，當可對本發明作各種潤飾。在其他例子中，一些過程操作未被詳細描述，但亦不用以限定本發明。請參照第1A及1B圖，其繪示的是依照本發明一較佳實施例的一種可攜式DVD播放機10的示意圖。DVD播放機10包括一外殼12,用以做爲DVD播放機1〇之元件的封套或框架。螢幕14用以看見視頻，以及控制按鈕16位於外殼12之頂面，用以控制DVD播放機1〇。電源及信號介面18位於外殻12的兩側面之一上，而紅外線（ir)介面20 與媒體傳送裝置22位於另一側面上。DVD 24可合適於媒體傳送裝置22中之一適當的輪廓凹室內，以及媒體傳送裝置22可移至外殼12 —邊中，以允許DVD 24之播放。第2A圖係顯示使用於汽車中的示意圖，但此構想可延伸至大部分型式之運輸工具。本發明較適用於花費長時本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） (請先間讀背面之注意事項再填寫本頁) 裝--------訂---------^ 經濟部智慧財產局員工消費合作社印製 5 I 2 6 p i t 1 . d o c ' 0 0 2 49 99 9 五、發明說明（l>) 間在通勤中之旅客，例如在飛機、火車、或地下鐵上，如第2B圖所示。此外，也適用在許多商業的應用上，舉例來說’在計程車上之視頻廣告或其他存在有走也走不掉的聽眾之地點。本發明也可安裝在每個Stairmaster®練習機器之雜誌架上及健身中心之踏車上，如第2C圖所示。不論何時何地’當需要播放可攜式視頻時，本發明都可達成。在任何地方需要大型音樂、播放DVD及CD，或看TV時’本發明將是最佳的行動解決方案。本發明多用途之大部分實例用在：空中旅行娛樂、電影、錄影帶、個人教育及學習(每一碟片能夠儲存數千書籍），以及立刻在主題上自己動手做視頻例如自動修理、造園、烹調、家庭設計。此外，本發明可用做爲視頻遊戲、播放機或數位無聲照相機影像觀察之可攜式視頻顯示裝置，以及做爲例如視頻亭、商業班機與健身中心之OEM應用。可攜式DVD播放機10也可用在目前的銷售內容：巴士、升降機、計程車、透過視頻之實際階層步行等。甚至可利用做爲懸掛在牆上之平板電視或顯示裝置-上等技術碟片，”動態技術”等。第2D圖繪示的是提供一簡單、一步驟連接及操作性能之”家庭電影院平台站”，其用以當本發明使用做爲連結一般家庭電視組之單一 DVD播放機時的示意圖。此平台提供一電纜介面給電視或其他家庭電影院元件-例如聲音系統-當本發明與一外部系統使用時，其可維持在固定地方。此平台較佳的是相同形式要件如傳統VCR ;其可設計成與使用者擁有之系統元件架混合，以及也可立即辨別出其目本紙張尺度適用中國固家標準（CNS)A4規格（210 X 297公髮） (請先閱讀背面之注意事項再填寫本頁) 裝-------訂·--------\ 經濟部智慧財產局員工消費合作社印製 Λ7 B7 . 5 1 26ηίΠ doc/002 449 99 9 五、發明說明（$) 的功能。紅外線遠端控制器較佳的是與平台站梱紫。此遙控器具有廣泛的控制特徵，最佳的是存取可能用於DVD格式之所有額外增進特徵。此遠端控制器的設計中心是一最吸引人的工業設計，其將小心避免恐懼及使用困難”海上按鈕，，，故一般常見於消費者生產遙控器上。第2E圖繪示的是依照本發明一較佳實施例之”桌上型平板DVD播放機的示意圖。此桌上型平板之應用’例如可用在臥室、密室或廚房’其中一”固定”單元放置是有需要的。此產品基本上在相同的銷售地點做爲傳統TV/VCR組合單元。類似於”單軌”個人電腦之形式’薄的桌上型平板將能夠獨自或懸掛在牆上操作。許多獨立之可攜式驅動設計需要本發明之行動機器’桌上型平板將包括一高品質整合擴音器系統。第3圖繪示的是第1、2圖之DVD播放機10之驅動模組26的方塊圖。驅動模組26包括媒體傳送系統22，用以讀取DVD。接著來自DVD之視頻資料會被傳送至MPEG/ 杜比(Dolby)數位（或”MPEG/AC-3”)解碼器28中。經過解碼後，影像增強機制(IE2)30解交錯數位視頻，以提供一累進掃描視頻信號。最後視頻透過一顯示器36顯示出來。 DVD驅動模組26也包括一聲音/紅外線聯結器32、一系統控制器34、一電池組38、一電源供應器40、一視頻資料緩衝器42以及一使用者介面在其他繪示元件、匯流排與次系統中間。DVD驅動模組26之元件最初儲藏在外殼12 本纸張尺度適用中國國家標準（CNS)A4規格（21〇 X 297公釐） --------— II ---I----訂---------户 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消费合作社印製 S 1 2i)pii*l .doc 002 4 49 99 9 A7 B7 五、發明說明（（y) 內，每一元件將詳細描述於下。對可攜式電腦之設計而言，DVD傳送系統22較佳的是使用一非定製的驅動模組26。驅動模組26的厚度較佳的是Π公厘或更薄，以允許一非常薄的系統形成於其中D適合的DVD驅動模組26，可利用來自日本東京之Toshiba America Information Systems Inc之產品.此外，本發明之驅動模組26較佳是能與來自機械的震盪及碰撞有物質及電性隔絕。較特別的是，驅動模組26是機械震盪被安裝在外殻 U中，以及在解碼之前，來自驅動模組26之資料是在記憶體中緩衝一段時間，以允許磁區在震盪減輕資料串不連續之事件中被重新讀取。MPEG/Dolby數位解碼器28較佳是一非安置的單晶片解碼器，其把消費者DVD播放機當作目標。較佳是同時執行MPEG-1與MPEG-2解碼，杜比數位 (“AC-3”）、MPEG及LPCM聲音解碼具有A/V同步，且對資料儲存及緩衝而言，其具有唯一單記憶裝置之特徵。此種解碼器可從各種來源獲得，包括加州之Milpitas之C-Cube Microsystems ° IE2 30較佳是從DVD或提供累進掃描視頻信號之其他中解交錯數位視頻，包括專有動作偵測及補償硬體。對淸晰度及準確視頻顯示來說，其額外較佳的是改正亮度、對比、伽馬、以及彩色溫度修正。爲了額外改善影像， IE2 3〇之高品質標度引擎較佳是用來將視頻影像從長方形轉換成正方形像素，並在其他比640x480之平板尺寸上對全掃描顯示刻劃視頻。本紙張尺度適时國國家標準（CNS)A4規格（210x 297公髮） f請先閱讀背面之注意事項再填寫本頁)1 26diH Λ Λ y \ 2 od 449449 99 § 0 0 2 Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed B7 V. Description of the invention (f) The present invention relates to a portable video machine technology and processing of video images. In particular, it relates to a technique for de-interlacing and enhancing video images. Because digital video provides many advantages, it has rapidly developed from analog video technology to digital video technology. Because digital video can be stored on random access media, such as magnetic disk devices (hard disks) and optical disc media such as conventional CDs, digital video is cheaper than analog video Is stored and allocated. Once stored on random-access media, digital videos can become interactive and allow them to be used in games, catalogs, training, courses, and other applications. One of the latest products based on digital video technology is digital video discs, sometimes called "digital multi-disc" or just "DVD" ~ These discs are the same size as music CDs, but they are available in 17 Megabytes of data, 26 times the data on a music CD. DVD storage capacity (nG bytes) is much larger than CD-ROM (600M bytes) 'and DVDs can operate at a higher rate than CD-ROMs Passing data. So 'DVD technology represents a huge improvement in video and sound quality, which is far superior to traditional systems such as TVs, VCRs and CD-ROMs. However, the main problem of using DVD and other digital video technologies to display animation, The reason is that the animation source has different frame speeds. For example, when the television broadcast update using the National Television System Committee (NTSC) standard operates at 60Hz, the output rate of the standard film is 24 Hz. Through a process called deinterlacing Converting an animation into a digital video usually produces a significant reduction in resolution, as is the case with the distortion of the conventional artefacts. 4 This paper size applies the Chinese National Standard (CNS) A4 specification (210x297) Li) (Please read the notes on the back before filling out this page) -------- Order ---------. ^, Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperatives 4 49 9¾2¾ V. Description of the Invention (z) Another problem with digital video technology is that animations arrive in various formats. For example, 'when video displays are usually narrow and long, movies in theaters are formatted for wide screens. Video image production is used to convert a digital or digitized image from one format to another. For example, 'for display on a particular display device such as an LCD panel with a fixed resolution of 640x480, there is a space A digital image with a resolution of 720 horizontal by 48 vertical pixels may be converted to another resolution. However, most conventional video production methods provide poor resolution in the converted image. This production method provides The quality resolution is extremely expensive to implement. However, another problem of video image production is that it may require data transmission between two areas that are not synchronized and / or different data rates. Use the above paragraphs As an example, from 720 horizontal pixels to 640 pixels (a ratio of 9: 8), you need an interface between 541 ^ 12 field and 48] \ / [112: field (a ratio of 9: 8). In In conventional techniques, data transmission between two asynchronous and / or different data rate fields requires the use of huge and expensive buffers. Another reason why digital video technology is difficult to use is because DVD players are generally Both are large, bulky devices that are not easy to transport. Because a DVD player must be attached with a video display, such as a TV or TV screen, it is practically limited to use anywhere. In addition, Xi Known mobile video systems also have a whole host of annoying problems. Both handheld and mobile TV are generally set to present reception disadvantages such as RF multipath interference, and poor or irregular signal strength in the village. By providing reel-to-reel performance, integrated TV / VCR band units can solve these problems. Paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) ί '--- * Packing------- Order ------! ^ · &Gt; (Please read the precautions on the back before filling this page) A7 B7 S] 20pit'l. &Lt; 1〇cMKJ2 449 99 9 V. Description of the Invention (Multiple) Questions , But its entity is too large to carry. As mentioned above, it is necessary to have a portable video player that can be easily carried and can be used in various situations. In addition, while eliminating the human factor of action, it is also necessary to have a method and device for providing full analysis of the saved image. A method and device for de-interlacing and reformatting. When it comes to reducing costs, it is also necessary to have a method and apparatus for providing high-quality video scaling and vertical processing. When it comes to reducing costs and eliminating the need for huge and expensive buffers, it is necessary to have a method and device to provide an asynchronous data interface. In view of this, the present invention may be implemented in several methods, including, for example, a process, a device system, an element, or a method. Several inventive embodiments of the present invention will be described below. In one embodiment of the present invention, a digital image enhancer is provided. The digital image enhancer includes a de-interlacing processor that receives an interlaced video stream. The deinterleaving processor includes a first deinterleaver and a second deinterleaver 'and provides a deinterlaced video string. The digital image enhancer also includes a video output processor that receives the output of the de-interlaced video string to provide a scaled, de-interlaced video string. In another embodiment of the present invention, a digital image enhancer is provided, which includes a de-interlacing processor, which receives an interlaced video string and provides a de-interlaced video string. The digital image enhancer also includes a video output processor that receives the output of the de-interlacing processor. The de-interlacing processor processes the vertically-interleaved interlaced video string ' to provide a scaled, de-interlaced video string. In yet another embodiment of the present invention, a portable DVD player is proposed. This paper is applicable to the national standard (CNS) A4 specification (210 X 297 mm) ---------- I > * 11 I--I order---------Line 1 (please read the precautions on the back before filling out this page) Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs A7 4 4 9 gP90 | 9'1 doc 002 5. Description of the invention (%) machine. The portable DVD player includes a thin prismatic enclosure with a first main surface, a second main surface separated from the first main surface, and a side connection between the first main surface and the second main surface. At least a portion of the first major surface includes a video display, and the enclosure includes a DVD access port that allows the DVD to be inserted into the enclosure. The portable DVD player also includes a digital processing system including a decoder, an image enhancement device, and a display controller. The decoder receives a signal from one of the DVDs inserted into the surround to provide a decoded, interlaced video signal. The image enhancement device converts an interlaced video signal into a deinterlaced video signal. The display controller uses a de-interlaced video signal to provide progressively scanned video on the video display. In still another embodiment of the present invention, a method for processing digital video is proposed. The method includes deinterleaving an interlaced video string through at least one of a number of deinterlacing methods to generate a deinterlaced video string. This method also includes adjusting this deinterlaced video string. In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following describes the preferred embodiments in detail with the accompanying drawings as follows: = Brief description of the drawings: Sections 1A and 1B The figure shows a schematic diagram of a portable DVD player according to a preferred embodiment of the present invention; Figures 2A, 2B and 2C show several differences of a DVD player according to a preferred embodiment of the present invention Schematic diagram of application; Figure 2D shows the paper size of a DVD broadcast according to a preferred embodiment of the present invention, applicable to China National Standard (CNS) A4 (210 x 297 mm) --------- --- -------- Order--------- 1 (Please read the notes on the back before filling out this page) Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Consumer Cooperatives Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by WC Industry and Consumer Cooperatives 4 49 9 9t2grin d ^ 002 A7 B7 V. Description of the invention (Even) Schematic diagram of the platform and accompanying video monitor; Figure 2E shows a preferred embodiment according to the present invention. Figure of "Desktop Tablet" ("0 to 10 ^ to 1 ^") 0 乂 0 player; Figure 3 shows the A block diagram of an electronic circuit of a DVD player according to a preferred embodiment of the present invention; FIG. 4 shows a system diagram of an image enhancement mechanism (IE2) according to a preferred embodiment of the present invention; FIG. 5 shows a According to a preferred embodiment of the present invention, in the de-interlacing process, a schematic diagram of a method combining a field to a frame is shown; FIG. 6 shows a block diagram of a video deinterleaver according to a preferred embodiment of the present invention; FIG. 7 is a system diagram of a progressive frame detector according to a preferred embodiment of the present invention; FIG. 8 is a diagram of a field difference module according to a preferred embodiment of the present invention; Process flow chart: Figure 9 shows a detailed description of a frequency detection module according to a preferred embodiment of the present invention. Figure 10 shows a PFPD module according to a preferred embodiment of the present invention. FIG. 11 shows a schematic diagram of a de-interlacing process according to a preferred embodiment of the present invention; FIG. 12 shows a two-dimensional array diagram for describing a pixel unit of the present invention; FIG. 13 shows What is used in accordance with a preferred embodiment of the present invention from-- — — — — — II-· I I ----- ^ II I ----- ^, (Please read the notes on the back before filling out this page) This paper size applies to China National Standard (CNS) A4 (2] 0 X 297 mm) i'l .dou. 002 A7 B7 V. Description of the invention (() No. 2 The schematic diagram of the method for obtaining an output pixel in the two-dimensional array of No. 2; Figure 4A shows the circle A schematic diagram for describing the method according to a preferred embodiment of the present invention; FIG. 14B illustrates a sampling line from FIG. 14A. A set of sample diagrams: FIG. 14C illustrates a sampling cosine Figure 15 shows a schematic diagram of a method for describing a threshold-detection threshold according to a preferred embodiment of the present invention; Figure 6 shows a schematic diagram of a preferred embodiment according to the present invention; Block diagram of a hybrid circuit; Figure Π shows an exemplary operation diagram of a hybrid circuit according to a preferred embodiment of the present invention when DV is greater than "0" but less than "1"; Figure 18 shows a A schematic diagram of a method for detecting a diagonal feature according to a preferred embodiment of the present invention; FIG. 19 illustrates a method according to the present invention. A block diagram of a diagonal hybrid circuit of a preferred embodiment is shown in FIG. 20; FIG. 20 does not show a pixel schematic diagram of a secondary array used to calculate the output of the diagonal hybrid circuit of FIG. 16; FIG. 21 shows FIG. 22 is a flowchart of a diagonal detection method according to a preferred embodiment of the present invention; FIG. 22 shows a schematic diagram of a variable-scale FIR filter according to a preferred embodiment of the present invention: Figure 23 does not show the low-pass filter in the time domain. Table 24 does not show the coefficients that make up L groups. Each paper has multiple coefficients. The paper size applies the Chinese National Standard (CNS) A4 specification ( 210 X 297 mm) (Please read the notes on the back before filling out this page> Order IIIIII ----- It—— Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs A7 B7 4 49 99 9 V. Description of the invention (1) Diagram; FIG. 25 shows a flowchart of a quantization method according to a preferred embodiment of the present invention; FIG. 26 shows a flowchart of a method for changing a coefficient according to a preferred embodiment of the present invention Figure 27 shows a video diagram according to a preferred embodiment of the present invention; Schematic diagram of a vertical cut through a corresponding number of scan lines 'subdivided into one of a number of slice scan sequences'. Figure 28 shows a simplified example of the center portion of the initial cut 'There is a problem with invalid data on its left and right edges; Figure 29 shows a cut along the left and right edges of the center of the initial cut with increased wings; 30 The figure shows the whole structure of overlapping cutting / screen combination; Figure 31 shows a flowchart of a method for processing video according to a preferred embodiment of the present invention; Figure 32 shows a flowchart according to A schematic diagram of a video processor-based cutting system according to a preferred embodiment of the present invention; FIG. 33 shows a system schematic diagram of a video processing chip architecture according to a preferred embodiment of the present invention; FIG. 34 FIG. 35 is a block diagram of an asynchronous interface according to a preferred embodiment of the present invention: FIG. 35 is a block diagram of an alternate asynchronous interface according to a preferred embodiment of the present invention; Order Country National Standard (CNS) A4 Specification (210 X 2 97 mm) ----------- '11 --- 11 Order ---- II ί .. (Please read the notes on the back before filling out this page) Staff Consumption of Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the cooperative 4 5 1 2 6 p 11 i. Doc '0 0 249 99 9 A7 B7 V. Description of the invention (¾) Figure 36 shows a 3-buffer synchronizer sequence according to a preferred embodiment of the present invention The schematic diagram is related to the read and write operations of the 3 RAM buffers. Figure 37 shows a flowchart of a method for arranging through RAM addresses and modules according to a preferred embodiment of the present invention; And FIG. 38 shows an outline diagram of the synchronizer of the present invention for video scaling applications according to a preferred embodiment of the present invention. Description of numbered drawings: 10: Portable DVD player screen Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 14: 18: 22: 26: 30: 34: 38: 42: 60: 90, 102 106 130 Field buffer 142 Power supply and signal interface Media transmission device driver module Image enhancement mechanism System controller Battery pack Video data buffer Video output processor 132 '136' 138 '= film frame 12: housing 16: control button 20: infrared interface 24 : DVD 28: Decoder 32: Sound / Infrared Coupler 3 6: Display 40: Power Supply 50: Video Processing Chip Architecture 70, 80: Deinterlacing Platform 140: FIFO 104: Video Field 106a, 106b: Decoder Interlaced picture frame video deinterleaver 134, 134a-d: picture (please read the precautions on the back before filling in this page) Install -------- order --------- line > progressive Frame detector 144: L / N signal This paper size is applicable to Chinese National Standard (CNS) A4 (210 X 297 mm) 4 49 93, fl.d ° c_2 a? B7 V. Description of the invention (?) 146 : Progressive frame detection signal 150: Field combination platform output frame 154: Internal image Frame deinterleaver 148: Platform 1 detection 値 152: Progressive format input 154: Field difference module 156 158 160 168 170 174 Frequency detection module Progressive frame pattern detection module 162, 164: Field and other history Bit frequency detection history bit Π6: Pixel set 166: Transition detection 3: 2 counts 172: Transition detection 2: 2 counts 178: Differentiator 180: Difference 182: Field difference accumulator 184 : Field difference 186, 200, 214, 222 '240 • 3 memory module 192: Conversion 3: 2 output signal 194: Critical operation 198: Field bit 206: Vertical adjacent pixels 212: Programmable Critical 値 218: Field frequency detection accumulator 220: Field frequency detection 値 220. Field frequency detection 値 228. Conversion 2: 2 bits (谙 Please read the notes on the back of the next page before filling out this page). 111 Order --------- 妗-Staff Consumer Cooperatives, Intellectual Property Bureau, Ministry of Economic Affairs Print 230: Field detection 値 232: Multiplier 234: Programmable field frequency critical register 239: Relative frequency difference bit 242: Frequency detection history bit 244: Field difference history bits 246, 248 , 250 '252, 254, 258: Logic operation 256: Logic OR gate 260: Timer This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm), Λ Λ Λ5] 1ύρ \ Π.doc · 00 2 4 49 99 9 Α7 Β7 V. Description of the invention (β) Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 262: Logical AND gate 302, 304: Video field 306, 308, 314 '316: Scan line 310: Figure Field combined deinterlacing processor 3 1 2: Combined frame 318: Array 320, 322: 歹 IJ 338: Output pixels 334: Last detection 値 336: Blending operation 340: Image 342: Distorted target 344, 426, 428, 430 : Line 346: chart 348: sample 350: sampled cosine wave 352: chart 354: non-threshold scale 356: threshold limit Degree 358: Upper threshold 360: Low threshold 400: Hybrid circuit 402: Three-pixel array 406: Output pixels 410: Secondary array 412: Diagonal detection circuit 414: Sign signal 416: SlopeFade signal 418: Right Angular hybrid circuit 420: Multiplexers 422, 424: Mixer 500: Variable-scale FIR filter 502: Displacement register 504: Register 506: Clock 508, 510, 5 〖2: Multiplier 514 : Filter branch line 516: Coefficient storage unit 518: Adder 520: Low-pass filter coefficient 522: Curve 524: Coefficient 600: Video frame 602, 622 '632, 634, 648, 652: Clipping ----- ---- L -------- Order -----! !! Dream (please read the notes on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) 5 I 1 cl〇e / 0 (J2 5 I 1 cl〇e / 0 (J2 A7 B7 604: Scan line 606 * Cut center part 608: Left edge 610: Right edge 612, 614: Matrix 616: Pixel data 618: Top edge 620: Bottom edge-624: Left screen wing 626: Right screen Wing 628: Overlap cutting / screen combination 630: Line 638: Left external screen 640: Left internal screen 642: Left internal wing 644: Right external screen 646, 650: Processing platform 6S4: Cutting basic video processing 656, 658: input buffer 660 '662: output buffer 664: input data formatter 666, 688: vertical video processing section 668: output data formatter 670: video processing chip architecture 672: video processor 674: external Memory source 676: Input platform 680: Memory controller 678 '682' 684 '686: Field memory buffer 690, 692: Frame buffer area 449999 V. Description of the invention (ff) (Please read the back (Please fill in this page for further information.) Cooperative printed 694: Horizontal processing blocks 700, 722: Asynchronous interface 702: Data source 704 '760: Input data string 705, 758: Synchronizer 706, 724, 768: Write control logic units 708, 710, 712: RAM buffers 714, 732, 774: read control logic unit This paper size is applicable to the National Standard of China (CNS) A4 (210 X 297 g) Α7 4 49 9ύΙ9Ί · ^ _2 ____ Β7 ____ V. Description of the invention (丨 2 ) 716, 782: Output data string 718: Data destination 720: Synchronous logic units 726, 728, 730, 762, 764, 766: RAM buffers 734, 780: MUX. 736: Synchronous logic unit can be selected 738: 3 -Buffer synchronizer sequence 739: Skew 770 '772, 776, 778 Counter embodiments will be described in detail in the following description in order to provide a thorough understanding of the invention. However, the invention is not limited to some or all of the described Specific description 'Any person skilled in the art can make various modifications to the present invention. In other examples, some process operations have not been described in detail, but it is not intended to limit the present invention. Please refer to FIGS. 1A and 1B, which are schematic diagrams of a portable DVD player 10 according to a preferred embodiment of the present invention. The DVD player 10 includes a housing 12 for use as an envelope or frame for the components of the DVD player 10. The screen 14 is used to see the video, and the control button 16 is located on the top surface of the casing 12 to control the DVD player 10. The power and signal interface 18 is located on one of the two sides of the housing 12, and the infrared (ir) interface 20 and the media transmission device 22 are located on the other side. The DVD 24 may fit into one of the appropriate contoured recesses in the media transfer device 22, and the media transfer device 22 may be moved into the side of the casing 12 to allow playback of the DVD 24. Figure 2A shows a schematic diagram used in a car, but the concept can be extended to most types of vehicles. The present invention is more suitable for long-term use. The paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) (please read the precautions on the back before filling this page). Loading -------- Order --------- ^ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5 I 2 6 pit 1. Doc '0 0 2 49 99 9 V. Description of Invention (l >) Passengers during commute , Such as on an airplane, train, or subway, as shown in Figure 2B. In addition, it is also applicable to many commercial applications, for example, ‘video ads on taxis or other places where there are listeners who ca n’t walk away. The invention can also be installed on the magazine rack of each Stairmaster® exercise machine and on the treadmill in the fitness center, as shown in Figure 2C. The present invention can be achieved whenever and wherever 'when a portable video needs to be played. When you need large music, play DVDs and CDs, or watch TV anywhere, the present invention will be the best mobile solution. Most examples of the multi-purpose of the present invention are used in: air travel entertainment, movies, videotapes, personal education and learning (each disc can store thousands of books), and immediately do-it-yourself videos on topics such as auto repair, garden , Cooking, home design. In addition, the present invention can be used as a portable video display device for video game, player or digital silent camera image observation, as well as OEM applications such as video kiosks, commercial airliners and fitness centers. The portable DVD player 10 can also be used in current sales contents: buses, elevators, taxis, walking in real class through video, and the like. It can even be used as a flat-panel TV or display device hanging on the wall-first-rate technology discs, "dynamic technology", etc. Figure 2D is a schematic diagram of a "home cinema platform station" that provides a simple, one-step connection and operability when the present invention is used as a single DVD player connected to a general home television group. This platform provides a cable interface to a television or other home cinema component-such as a sound system-which can be maintained in a fixed location when the present invention is used with an external system. This platform is preferably of the same form as a traditional VCR; it can be designed to be mixed with the system component racks owned by the user, and it can also be immediately discerned that its standard paper size applies to the Chinese solid standard (CNS) A4 specification (210 Published by X 297) (Please read the precautions on the back before filling out this page) Packing --------- Order · -------- \ Printed by Λ7 B7 of the Intellectual Property Bureau Staff Consumer Cooperatives. 5 1 26ηίΠ doc / 002 449 99 9 V. Function of invention description ($). The infrared remote controller is preferably connected to the platform station. This remote has a wide range of control features, and it is best to access all the additional enhancements that may be used in the DVD format. The design center of this remote controller is one of the most attractive industrial designs, it will be careful to avoid fear and difficult to use "button on the sea, so it is generally common in consumer production remote control. Figure 2E shows the A schematic diagram of a "desktop flat-panel DVD player" according to a preferred embodiment of the present invention. The application of this desktop tablet, for example, can be used in a bedroom, closet, or kitchen where one of the "fixed" units is placed. This product is basically a traditional TV / VCR combination unit at the same sales location. A form similar to a "monorail" personal computer, a thin desktop tablet will be able to operate on its own or on a wall. Many independent portable drive designs require the mobile machine ' desktop tablet of the present invention to include a high quality integrated loudspeaker system. FIG. 3 is a block diagram of the driving module 26 of the DVD player 10 shown in FIGS. The drive module 26 includes a media transfer system 22 for reading a DVD. The video data from the DVD is then transmitted to an MPEG / Dolby Digital (or "MPEG / AC-3") decoder 28. After decoding, the image enhancement mechanism (IE2) 30 deinterleaves the digital video to provide a progressively scanned video signal. The final video is displayed through a display 36. The DVD drive module 26 also includes a sound / infrared coupling 32, a system controller 34, a battery pack 38, a power supply 40, a video data buffer 42, and a user interface. Rows are in the middle of the secondary system. The components of the DVD drive module 26 are initially stored in the case 12. The paper size is applicable to the Chinese National Standard (CNS) A4 specification (21 × 297 mm) ---------- II --- I --- -Order --------- Household (please read the notes on the back before filling out this page) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economy S 1 2i) pii * l.doc 002 4 49 99 9 A7 B7 V. Invention description ((y), each component will be described in detail below. For the design of a portable computer, the DVD transmission system 22 preferably uses a non-customized drive module 26. Drive The thickness of the module 26 is preferably Π mm or thinner to allow a very thin system to be formed in the DVD drive module 26 suitable for D, and products from Toshiba America Information Systems Inc of Tokyo, Japan can be used. The driving module 26 of the present invention is preferably able to be physically and electrically isolated from mechanical shock and collision. More specifically, the driving module 26 is installed in the housing U by mechanical vibration, and before decoding, The data from the drive module 26 is buffered in the memory for a period of time to allow the magnetic zone to reduce vibration The stream is re-read in the event of discontinuities. The MPEG / Dolby digital decoder 28 is preferably a non-located single-chip decoder that targets consumer DVD players. It is preferred to perform MPEG-1 simultaneously With MPEG-2 decoding, Dolby Digital ("AC-3"), MPEG and LPCM audio decoding has A / V synchronization, and for data storage and buffering, it has the characteristics of a single memory device. This decoder Available from a variety of sources, including C-Cube Microsystems ° IE2 30 in Milpitas, California, and preferably de-interlacing digital video from DVDs or other sources that provide progressively scanned video signals, including proprietary motion detection and compensation hardware. For clarity and accurate video display, it is better to correct the brightness, contrast, gamma, and color temperature correction. In order to improve the image, the high-quality scaling engine of IE2 30 is preferably used to convert the video image. Convert from rectangular to square pixels, and scribe the full-scan display video on other flat sizes than 640x480. This paper is in accordance with the national standard (CNS) A4 specification (210x 297). F Please read first Note the surface to fill out this page)

Mil —---—訂---11--- 經濟部智慧財產局員工消費合作社印製 4 4 9 9 9i9ptn A〇c (>02 Λ7 Β7 五、發明說明（A) 聲音/IR連結器32 (包括一個或多個整合電路晶片）解碼來自MPEG2/Dolby數位解碼器28提供之杜比數位資料串，混合5.1頻道降至2頻道做爲傳統立體輸出，以及編碼 /處理5.1頻道做爲環繞受話器輸出（可選擇模組）。_立體D/A 轉換器提供做爲受話器輸出。用以5.1頻道杜比數位串之D/A轉換器可用在平台模組連接器上。用以外側解碼器之非解碼杜比數位串也可用在平台模組連接器上。也可提供用以無線受話器之可選擇 IR發送器做爲具有立體功率放大器之立體揚聲器，用以呈現或播放而無須使用受話器& 系統控制器34較佳是一單晶片微處理器來處理大部分的動作，若不是全部的話，則具有系統控制功能。舉例來說，微處理器較佳是處理系統啓動及配置，使用者介面與控制器之特徵爲設定選擇（例如母控制等）、DVD驅動控制以及IE2、MPEG解碼器、聲音系統及顯示控制器配置。適合的微處理器可使用德州Austin之Motorola INC.之零件號碼 MC68HC16。經濟部智慧財產局員工消費合作社印製 (請先閱讀背面之注意事項再填寫本頁) 顯示器36較佳是一具有高輸出螢光冷陰極發光之 11.3吋LCD顯示器（可用具主動及被動矩陣樣式）。顯示器 36較佳是具有640x480像素解析度及18位元彩色深度。適合的顯示器可使用華盛頓Camas之Sharp Electronics Corp.。用以顯示器36之視頻控制器提供高解析度、具彈性之螢幕圖像、全營幕視頻播放之重疊圖像，以及LCD驅動器用以直接連接至顯示器。本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公餐） A7 5 I26piH .doc 002 49 99 9 五、發明說明（) 外殼12較佳是具有一”平板”形狀，其容易使用及攜帶。封入物之單鍵外殼設計提供簡單、方便製造、嚴格性質、減低重量及實用性。可選擇的平台站允許簡單之一次連接裝配至外部視頻系統。 - 電池組38較佳是一可替代的、可再充電的模組，其以NiMH技術爲基礎，用在低成本下之高功率密度。較佳是電池組使用標準、具有40瓦特-小時性能之非定製的電池胞，其可在連續操作下提供超過2.5小時之飽和功率。此期間正常滿足去看到一完整、特徵長度之電影。也如輸入及輸出至/從單元所示。當從系統控制器34 內連接至其他元件時如匯流排所示，若適當於特定之非定製元件精選，這些實際上可經由各別的連接來實現。DVD 驅動模組26之架構可依照元件之標準尺寸及方便擴充來設計。可經由I/O選擇模組介面來完成系統擴充，其允許驅動模組26互動於視頻及聲音次系統，如同系統控制器34。具有例如交替聲音及/或視頻輸入及特定聲音處理功能之介面容納擴充模組，允許本發明讓使用者可依據各種應用來自行定製。交替的產品架構可輕易地被關鍵系統元件取代容納。若標準元件使用在系統之許多區域時(例如DVD驅動模組26)，類似的元件可簡單的被取代。例如，可經由利用一較小的LCD極電池組來架構多數的小型單元。當電源轉換器與電池充電器建構成可用於不同的電池尺寸與技術本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） <請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------^ 經濟部智慧財產局員工消费合作社印製經濟部智慧財產局員工消f合作社印製 5 I 26ρ ί t'l . doc,· D〇2 4 4 9 9 9 9 A7 __ B7 五、發明說明（ΓΪ) 時，則顯示控制器可直接容納各種顯示尺寸。此架構之多數完整功能可包括用以附加功能之額外的（可選擇的）元件。舉例來說，具有視頻之全元件與聲音I/O之單元，僅需要增加額外的D/A轉換器 '視頻解碼器、附加連接器以及封入物修正。本發明之可攜式DVD播放機之系統軟體，較佳是建構成兩個主階段：高階使用者介面軟體與低階元件控制軟體。在系統微控制器34上執行之軟體，其較佳是儲存在一唯讀記憶體(”ROM”)(未繪示出)上。低階區段介面直接連結系統之各硬體元件，並與其直接互動於暫存器階段。其提供開啓電源與起始化，硬體元件之架構，基本元件控制與同步化，以及使用者介面軟體。在這兩階之間，本發明提供一”控制/狀態”應用程式介面(“API”）。這是一個適中的高階介面，具有對應直接連結傳統使用者控制器之API功能，例如”玩”、”跳至下一軌，，、，，顯示過去時間”等。當狀態功能允許使用者介面軟體要求有關播放機硬體之狀態的訊息時，控制功能提供使用者介面軟體之裝置依據使用者的控制來發出命令。此架構允許定製使用者介面軟體。此”控制/狀態” API 提供一完全的中斷介於使用者介面與低階元件控制軟體之間’並允許另一使用者介面例如一定製使用者介面取代播放機的標準軟體。因此，本發明之軟體架構可支援各種產品架構，並允許有趣的產品特別長久及可攀登。電源供應器40包括一 DC-DC電源轉換器，以允許使 ϋ I I n I-^SJ1 II n ft f If Tt t— t (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 x 297公釐） 5 l 2 6 p 111 . d 〇 c 0 (J 2 49 99 9 A7 _B7__ 五、發明說明（（1) 用內部電池或外部DC源。DVD播放機較佳是從單一 DC 電源得到所有需求的內部電壓。高電壓反相器提供顯示器發光所需之電源。充電器（未繪示出）係用來重新充電內部可充電電池。使用者介面包括在前座上之一直線的控制長條，用以快速存取一般功能，以及軟體使用者介面允許全特徵，但是不包括簡單與直覺的播放機控制。軟體控制器表現出經由高解析度圖像，可重疊立即的使用者回授之視頻。第4圖繪示的是依照本發明一較佳實施例之影像增強機制(IE2)30(參照第3圖）的系統圖。IE230包括兩尺寸的視頻處理晶片架構50與一視頻輸出處理器60。晶片架構50 包括一第一解交錯平台70、一第二解交錯平台80及一組位址與序列FIFOs 90。第一解交錯平台70包括累進圖框序列偵測與圖場差處理。第二解交錯平台80包括垂直頻率偵測、標號反轉偵測及對角線特徵偵測。視頻輸出處理器60 包括平行標度、彩色空間轉換、8至6bpp晃動及伽馬、對比與亮度修正。第4圖之第一解交錯平台70將詳細討論於第5-10圖中。第5圖繪示的是依照本發明一較佳實施例之在解交錯過程中，結合圖場至圖框中的方法1〇〇示意圖。在每秒24 個圖框中之一連續的薄膜圖框102，會被轉換成每秒60個圖場之視頻圖場104。視頻圖場104接著會經由一解交錯處理，被轉換成解交錯圖框1 〇 6。經由結合兩最近的圖場成一單一圖框可得到解交錯圖框106a，但解交錯圖框106b是經 (請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------户經濟部智慧財產局員工消費合作社印製本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 5 1 2 (1 p ί Π . d 〇 c 0 0 24 49 99 9 Λ7 Β7 經濟部智慧財產局員工消費合作社印製五、發明說明（21?) 由結合不同視頻圖場而得到，其可從粗體箭頭與粗體邊來區別。請參照第5圖，當圖場2是”目前的”圖場時’則可經由結合圖場1(“過去的”圖場）及圖場2(”目前的”圖場)得到 DI圖框1。在此相同方法下，當圖場3是目前的圖場時’ 則可經由結合圖場3及圖場2可得到DI圖框2 °相對的’ 當圖場4是目前的圖場時，結合圖場4及圖場5可得到DI 圖框3。在此情況下，組合是”目前的”與”下一個”圖場。當在此方法執行圖場結合時，所有的解交錯圖框1〇6將可經由結合創造來自相同源圖框之圖場而得到β因爲從相同源圖框創造之這些結合圖場，其時間相關。因此，不會有人爲因素存在於解交錯圖框106中。如第5圖所示，結合圖場至圖框中需要確認用在最初源中之動作圖片的型式。第一，必須確認最初累進圖框存在於一來源中；第二，爲了組合視頻圖場至圖框中及避免人爲因素，必須確定用來創造來自最初源之圖框之圖場的序列。第6圖繪示的是依照本發明一較佳實施例之視頻解交錯器130的方塊圖。在數位視頻串被寫入一數位記憶體單元134之前，其透過一 FIFO記憶體模組132進入解交錯器 130中。數位記憶體單元134具有儲存四個完整視頻圖場於一指定之圖場緩衝器134a-d的性能。進入圖場會依序被寫入到每一圖場緩衝器134a-d中。因此，第一進入視頻圖場會被寫入至圖場緩衝器134a中，第二進入視頻圖場會被寫 (請先閱讀背面之注意事項再填寫本頁)Mil —---— Order --- 11 --- Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 4 4 9 9 9i9ptn A〇c (> 02 Λ7 Β7 V. Description of the invention (A) Sound / IR connector 32 (including one or more integrated circuit chips) decodes the Dolby digital data string provided by the MPEG2 / Dolby digital decoder 28, mixing 5.1 channels down to 2 channels as traditional stereo output, and encoding / processing 5.1 channels as surround Receiver output (optional module). _ Stereo D / A converter is provided as receiver output. D / A converter for 5.1 channel Dolby digital string can be used on the platform module connector. For external decoder The non-decoded Dolby digital string can also be used on the platform module connector. An optional IR transmitter for a wireless receiver can be provided as a stereo speaker with a stereo power amplifier for presentation or playback without the use of a receiver & amp The system controller 34 is preferably a single-chip microprocessor to handle most of the actions, if not all, it has a system control function. For example, the microprocessor is preferably to handle system startup and configuration, The user interface and controller are characterized by setting selection (such as mother control, etc.), DVD drive control, and IE2, MPEG decoder, sound system, and display controller configuration. Suitable microprocessors can be used by Motorola INC. Of Austin, Texas. Part number MC68HC16. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs (please read the precautions on the back before filling out this page). Display 36 is preferably a 11.3-inch LCD display with high output fluorescent cold cathode light (can be actively used) And passive matrix style). The display 36 preferably has a resolution of 640x480 pixels and 18-bit color depth. A suitable display can use Sharp Electronics Corp. of Camas, Washington. The video controller for the display 36 provides high resolution, Flexible screen image, overlay image of full screen video playback, and LCD driver for direct connection to the display. This paper size is applicable to China National Standard (CNS) A4 specification (210 X 297 meals) A7 5 I26piH .doc 002 49 99 9 V. Description of the invention () The housing 12 preferably has a "flat" shape, which is easy to use and carry The enclosed single-button housing design provides simplicity, ease of manufacture, strict nature, weight reduction and practicality. An optional platform station allows simple one-time connection and assembly to external video systems.-Battery pack 38 is preferably an alternative Rechargeable modules, which are based on NiMH technology, are used for high power density at low cost. It is preferred that the battery pack use a standard, non-customized battery cell with 40 watt-hour performance, which can be used in Provides saturated power for more than 2.5 hours under continuous operation. During this period normally meet to see a complete, feature-length movie. Also shown as input and output to / from units. When connecting to other components from within the system controller 34, as shown by the bus, these can actually be achieved through separate connections if appropriate for the particular unselected component selection. The structure of the DVD drive module 26 can be designed according to the standard size of the components and easy expansion. System expansion can be accomplished via the I / O selection module interface, which allows the driver module 26 to interact with the video and sound subsystems, as is the system controller 34. The interface accommodates expansion modules with, for example, alternate sound and / or video input and specific sound processing functions, allowing the present invention to allow users to customize it for various applications. Alternate product architectures can be easily replaced by key system components. If standard components are used in many areas of the system (such as the DVD drive module 26), similar components can simply be replaced. For example, most small cells can be constructed by using a smaller LCD battery pack. When the power converter and battery charger are constructed, they can be used for different battery sizes and technologies. The paper size is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) < Please read the precautions on the back before filling this page ) -------- Order --------- ^ Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by employees of the Intellectual Property Bureau of the Ministry of Economic Affairs, printed by the cooperatives 5 I 26ρ ί t'l. doc, · D〇2 4 4 9 9 9 9 A7 __ B7 5. In the description of the invention (ΓΪ), the display controller can directly accommodate various display sizes. Most of the full capabilities of this architecture can include additional (optional) components to add functionality. For example, units with full video components and sound I / O need only add additional D / A converters' video decoders, additional connectors, and enclosure modifications. The system software of the portable DVD player of the present invention is preferably constructed in two main stages: a high-level user interface software and a low-level component control software. The software running on the system microcontroller 34 is preferably stored in a read-only memory ("ROM") (not shown). The low-level segment interface directly connects the hardware components of the system and directly interacts with them in the register stage. It provides power on and initialization, hardware component architecture, basic component control and synchronization, and user interface software. Between these two stages, the present invention provides a "control / status" application programming interface ("API"). This is a moderately high-level interface with API functions that directly connect to traditional user controllers, such as "play", "skip to the next track ,,,,, show the elapsed time" and so on. When the status function allows the user interface software to request information about the status of the player hardware, the control function provides the user interface software to the device to issue commands based on the user's control. This architecture allows customization of user interface software. This "Control / Status" API provides a complete interrupt between the user interface and the low-level component control software 'and allows another user interface such as a custom user interface to replace the player's standard software. Therefore, the software architecture of the present invention can support various product architectures, and allows interesting products to be particularly long-lasting and climbable. The power supply 40 includes a DC-DC power converter to allow ϋ II n I- ^ SJ1 II n ft f If Tt t— t (Please read the precautions on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 specification (210 x 297 mm) 5 l 2 6 p 111. D occ 0 (J 2 49 99 9 A7 _B7__ V. Description of the invention ((1) Use internal battery or external DC source. DVD The player preferably obtains all the required internal voltage from a single DC power source. The high voltage inverter provides the power required for the display to emit light. The charger (not shown) is used to recharge the internal rechargeable battery. User interface Includes a linear control strip on the front seat for quick access to general functions, and the software user interface allows full features, but does not include simple and intuitive player controls. The software controller exhibits high-resolution images , Can overlay the immediate user feedback video. Figure 4 shows a system diagram of the image enhancement mechanism (IE2) 30 (refer to Figure 3) according to a preferred embodiment of the present invention. IE230 includes two sizes Video Processing Chip Architecture 50 A video output processor 60. The chip architecture 50 includes a first de-interlacing platform 70, a second de-interlacing platform 80, and a set of address and sequence FIFOs 90. The first de-interlacing platform 70 includes progressive frame sequence detection and Image field difference processing. The second de-interlacing platform 80 includes vertical frequency detection, label inversion detection, and diagonal feature detection. Video output processor 60 includes parallel scale, color space conversion, 8 to 6 bpp shake, and gamma Horse, contrast and brightness correction. The first de-interlacing platform 70 in Fig. 4 will be discussed in detail in Figs. 5-10. Fig. 5 illustrates the de-interlacing process according to a preferred embodiment of the present invention. Schematic diagram of method 100 combining field to frame. A continuous film frame 102 in one of 24 frames per second will be converted into a video field 104 at 60 fields per second. Video field 104 will then be converted into a de-interlaced frame 106 by a de-interlacing process. The de-interlaced frame 106a can be obtained by combining the two closest fields into a single frame, but the de-interlaced frame 106b is (Read the notes on the back and fill out this page) --- Order --------- Printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Household Economy Standards for this paper are applicable to China National Standard (CNS) A4 (210 X 297 mm) 5 1 2 (1 p ί Π .d 〇c 0 0 24 49 99 9 Λ7 Β7 Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The invention description (21?) Is obtained by combining different video fields, which can be obtained from bold arrows and bold edges Please refer to Figure 5. When field 2 is the "current" field, it can be obtained by combining field 1 (the "past" field) and field 2 (the "current" field). DI picture frame 1. Under this same method, when field 3 is the current field, then the DI frame 2 can be obtained by combining field 3 and field 2. When the field 4 is the current field, combine Fields 4 and 5 can be obtained as DI frame 3. In this case, the combination is the "current" and "next" field. When performing field combination in this method, all de-interlaced frames 106 will be created by combining fields from the same source frame to obtain β. Because these combined fields created from the same source frame, their time Related. Therefore, no artificial factor exists in the deinterlacing frame 106. As shown in Figure 5, it is necessary to confirm the type of the action picture used in the original source when combining the field to the frame. First, it must be confirmed that the original progressive frame exists in a source; second, in order to combine the video field into the frame and avoid human factors, the sequence of the field used to create the frame from the original source must be determined. FIG. 6 is a block diagram of a video deinterleaver 130 according to a preferred embodiment of the present invention. Before the digital video stream is written into a digital memory unit 134, it enters the deinterleaver 130 through a FIFO memory module 132. The digital memory unit 134 has the capability to store four complete video fields in a designated field buffer 134a-d. Entry fields are written sequentially into each field buffer 134a-d. Therefore, the first entry into the video field will be written into the field buffer 134a, and the second entry into the video field will be written (please read the precautions on the back before filling this page)

'裝 i — I 111111. .铸本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） A7 B7 . 5 1 26pifl doc. 002 449999 五、發明說明（q ) 入至圖場緩衝器134b中，等等。在圖場緩衝器134d被塡滿之後，下_進入視頻圖場會被再次寫入至圖場緩衝器 134a 中。在一圖場之時間週期期間，進入圖場會被寫入至一圖場緩衝器134中，並從其他圖場緩衝器134中讀取三個先前圖場。舉例來說，若如第6圖所示，進入圖場會被寫入至134a中，接著圖場緩衝器134b-d會被讀取至一指定FIFO 記憶體136、138與140中。FIFO記憶體136、138與140 用以供給四個視頻圖場之讀取與寫入至一單物質記憶體單元134中，也用以分離進入視頻、記憶體單元134及伴隨發生之解交錯處理平台的時脈領域。從進入視頻串之觀點來看，圖場緩衝器134a-d之標記如同”進入”、”第一”、”第二”與”第三”先前圖場。三個讀取 FIFOs 136 ' 138與140之輸出，分別被標記爲下一圖場、目前圖場與上一圖場。此標記從解交錯處理器130之觀點來_看，其指出解交錯處理強迫視頻串上之近乎兩圖場時間週期有一延遲。 FIFOs 136、138與140之輸出是同步的，以便使三圖場呈現於一致空間之伴隨發生的處理平台上。此三圖場接著會被做爲輸入呈現至一圖場間累進圖框偵測器142中，其會產生一上…/下一（L/N)信號144'一累進圖框偵S!J(PFD) 信號146及一平台1偵測値（StagelDV)148。L/N信號144 是一控制信號，其指示一圖場組合平台150組合目前圖場與上一圖場或下一圖場，其係來自輸入視頻串之三個連續本紙張尺度適用中國國家標準（CNS)A4規格（210 * 297公釐） (請先閱讀背面之注意事項再填寫本頁)'Load i — I 111111.. The size of the cast paper is applicable to the Chinese National Standard (CNS) A4 (210 X 297 mm) A7 B7. 5 1 26pifl doc. 002 449999 V. Description of the invention (q) Enter the buffer of the field Device 134b, and so on. After the field buffer 134d is full, the next entry video field will be written into the field buffer 134a again. During the time period of a field, the entering field is written into a field buffer 134, and three previous fields are read from the other field buffers 134. For example, as shown in Figure 6, the entry field is written to 134a, and then the field buffers 134b-d are read into a designated FIFO memory 136, 138, and 140. FIFO memories 136, 138, and 140 are used to read and write the four video fields into a single substance memory unit 134, and are also used to separate the video, memory unit 134, and the associated de-interlacing process. The clock domain of the platform. From the point of view of entering the video stream, the field buffers 134a-d are labeled like "enter", "first", "second" and "third" previous fields. The outputs of the three read FIFOs 136 '138 and 140 are respectively marked as the next field, the current field and the previous field. From the standpoint of the de-interlacing processor 130, this flag indicates that the de-interlacing process forces a delay of nearly two field time periods on the video string. The outputs of FIFOs 136, 138 and 140 are synchronized so that the three fields are presented on a co-occurring processing platform. The three fields will then be used as input to present to an inter-field progressive frame detector 142, which will generate an up ... / next (L / N) signal 144 ', a progressive frame detection S! J (PFD) signal 146 and a platform 1 detection tag (StagelDV) 148. The L / N signal 144 is a control signal, which instructs a field combination platform 150 to combine the current field with the previous field or the next field. It is from three consecutive input video strings. The paper size applies Chinese national standards. (CNS) A4 specifications (210 * 297 mm) (Please read the precautions on the back before filling this page)

^ ----1 訂-! 1·線 V 經濟部智慧时產局貝工消費合作社印κ 5 I 26ριΙΊ 4 9 9 9 9 五、發明說明（1丨）的圖場。在此三個圖場下，圖場組合平台150產生一累進格式輸出圖框1 5 2。假如目前圖場是偶數，則下一及上一圖場必須是奇數，反之亦同。因此，圖場組合平台150輸出之累進格式圖框152將會通常是一偶數與一奇數之組合。這是很重要的，此乃因爲圖場之正確組合成累進圖框，需要輸入一偶數與一奇數圖場。可選擇內部圖框解交錯器154可提供額外的處理過程，以去除在確實狀況下之輸出圖框152內發生的人爲因素，例如當PFD信號146是非主張(de-asserted)時。假如圖框偵測器142偵測最初來自一來源之進入視頻信號，則包含累進圖框、PFD信號146是主張的。來源視頻之三個最初型式會被偵測：每秒24圖框下之薄膜 '每秒30圖框下之電腦動畫或圖框表現、或靜態影像，超過幾個圖場期間沒有動作發生在影像中。當PFD信號〗46是主張時，可選擇處理器154是被禁能。然而，假如圖框偵測器142無法偵測來自進入視頻圖場之累進圖框序列，則其將設定圖場組合平台15〇中之L/N 信號144總是組合目前與上一圖場。然後，圖框偵測器142 不主張PFD信號146，其會通知可選擇解交錯器154在輸出圖框中存在有人爲因素，並可能需要額外處理過程來去除人爲因素及創造一最終累進輸出圖框152’。累進圖框序列之偵測需要維持先前圖場之歷史紀錄。然而，累進圖框偵測器H2可預先僅觀看一個圖場。 (請先閱讀背面之注意事項再填寫本頁) * 1 I -----訂.------l_r— 經濟部智慧財產局員工消費合作社印製本紙張尺度適用中國國家標準（CNS)A4規格（2〗0 X 297公釐） 449 99 9 5 J 26piH doc 002 A7 B7 經濟部智慧财產局貝工消費合作社印製五、發明說明（4) 如果發生影像大轉換，由於編輯最初視頻源的因素，可能使累進圖框序列改變。這呰改變可能迫使進入圖場創造出之圖框改變，但卻無法提前知道進入圖場之抵達。由於這個原因，累進圖框偵測器142必須能夠偵測動畫之轉換，因爲轉換可能指出編輯其可能會改變累進圖框序列。假如一轉換被偵測，累進圖框偵測器142於時間週期將不主張PFD信號146，並被要求確認新的累進圖框序列。此將允許在時間週期期間，經由可選擇解交錯器154 去除動作失真，並需要重新獲得累進圖框序列。如果累進 '圖框序列不被偵測且PFD輸出是不被主張的，則StagelDV 148輸出包含與存在於影像中動作數量有關之重要訊息。此訊息可能會被用在可選擇解交錯器154中，以額外處理影像。第7圖繪示的是依照本發明一較佳實施例之累進圖框偵測器142的系統圖。圖框偵測器142包括一圖場區別模組154、一頻率偵測模組156以及一累進圖框圖案偵測 (PFPD)模組158。圖場區別模組154計算介於一下一圖場 160與一上一圖場162間之差値，並處理此差値成StagelDV 148、一轉換偵測3:2數値166以及複數個等歷史位元168。頻率偵測模組156結合一目前圖場164與上一圖場 162成一圖框，然後偵測結果來自動作失真之垂直高頻。接著，頻率偵測模組156輸出一數量之頻率偵測歷史位元170 及一轉換偵測2 : 2數値172。最後，PFPD 158接獲做爲輸入之轉換偵測3: 2數値166、複數個等圖場歷史位元168、 26 本紙張尺度適用中國§家標準（CNS)A4規格（210 X 297公g ) --I------I 11 ' I----I 1 ^ I--1 — — ！ v (請先閱讀背面之注意事項再填寫本頁) 5\2βρ\449 99 9 5 ! 26pit'l .doc/002 A7 B7 經濟部智慧財產局貝工消费合作社印挺五、發明說明（评）頻率偵測歷史位元】70及轉換偵測2 : 2數値Π2，以產生 L/N信號144及PFD信號146。第8圖繪示的是依照本發明一較佳實施例之在圖場區別模組154內的處理步驟流程圖。像素174之下二陣列是下一圖場160之子集，以及像素176之上一陣列是上一圖場162之子集，其皆輸入至一差動器178中。下一與上— 像素陣列174與Π6可被看做爲視窗(windows)，移動橫越其各圖場。”視窗”會從左至右及從上至下移動。每一時間視窗移動’一新的差値會被計算出來。差値操作178之結 ' 果是一陣列之差値180。使用差値180陣列之一加權平均値，以計算出 StagelDV 148。此加權値如同鄰近差値陣列中心之差値，其對加權平均値有很大的影響。差値180之陣列也會輸入至一圖場差値累加器182中，總計整個圖場之差値，以產生一圖場差値184。先前儲存在記憶體模組186中之五個圖場差値，會在一操作188下被總計。在操作190中’比較先前五個圖場差値之總和與目前圖場差値’而其結果爲轉換3 : 2輸出信號192。目前圖場差値184會在一臨界操作194中與可程式圖場差値184中的數値比較。臨界操作194之結果是一等圖場位元198,其係一單位元’代表下一圖場160與上一圖場162是相同的。先前等圖場歴史位元168會被儲存在記憶體模組200中，且其會被用在第7圖之PFPD 158中。第9圖繪示的是依照本發明一較佳實施例之頻率偵測本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） I I I 11 11 - 11111--- (請先閱讀背面之达意事項再填寫本頁) 5 1 26pifi doc/002 Λ7 99 9_B7_ 五、發明說明（$) 模組156的詳細步驟示意圖。當它們出現在顯示器上時，來自目前圖場164之垂直相鄰像素206與上一圖場162會被組合。在操作208中計算一頻率偵測値。此計算結果會被執行去偵測伴隨解交錯動作失真之頻率。在操作-2 10中，頻率偵測之輸出會與可程式臨界値212比較。五個相鄰頻率偵測値之結果會被儲存在記憶體模組214中，並在操作 216中被總計。在整個圖場週期之圖場頻率偵測累加器218中之操作 216的輸出會被累加，以產生圖場頻率偵測値220。圖場頻率偵測値220會被儲存在一包含有先前五圖場頻率偵測値之記憶體模組222中。五個先前圖場頻率偵測値在一操作 224中被總計，而其結果會在操作226中與目前頻率偵測値 220比較。在操作226中之比較結果係爲轉換2: 2位元228，其代表發生在2 : 2序列中之轉換。經濟部智慧財產局員工消t合作社印¾ (锖先閲讀背面之注意事項再填寫本頁) 如同部分平行過程，一儲存在記憶體模組22中之第一先前圖場偵測値230會被傳送至一乘法器232中，使其與儲存在可程式圖場頻率臨界暫存器234之一數値相乘。在操作236中比較此乘法結果與目前圖場頻率偵測値 220。此結果是一相對頻率差位元239，其接著會被儲存在 -記憶體模組240中《先前十個相對頻率差位元242輸出至PFPD模組158中。第10圖繪示的是依照本發明一較佳實施例之PFPD模組158的系統圖。PFPD模組158在一組圖場差歷史位元 244 '頻率偵測歷史位元242 '轉換3 : 2數値192(參考第8 本紙張尺度適用中a國家標準（CNS)A4規格<210 X 297公《 ) 4 49 9¾2¾ 5 126oitl ；d〇c/002 A7 4 49 9¾2¾ 5 126oitl ；d〇c/002 A7 經濟部智慧財產局具工消费合作社印製 B7 五、發明說明（外）圖）及轉換2 : 2數値228(參考第9圖）上，執行邏輯運算。在圖場差歷史位元244之輸入後，邏輯運算246經由找尋每一第五圖場是相等之圖案，確認3 : 2下拉偵測位元。接著，當多數最近四個圖場差爲〇時，邏輯運算248經由設定STILL位元來偵測靜態影像。經由邏輯運算250來設定 L/N控制信號之狀態。來自頻率偵測歷史位元242之輸入，邏輯運算252經由尋找在連續圖場次數中之高頻與低頻的交錯圖案，以及監測頻率偵測歷史位元242,來偵測一 2:2下拉偵測位元。然後，邏輯運算254確認L/N控制信號係做爲2 : 2下拉情況。從3 : 2下拉偵測位元、轉換3 : 2數値192、2 : 2下拉位元及轉換2 : 2數値228，可確認出PFD信號146。三來源型式之累進圖框會被偵測。使用經由計算偶數圖場對與奇數圖場對間之差値偵測到之3 : 2下拉，以及尋找每一第五差値是〇之狀況，薄膜會被轉換成視頻。此狀況由3 : 2下拉信號指示。使用2 : 2下拉之電腦產生動畫，可經由使用一頻率偵測方法尋找伴隨在每一第二結合圖框中之動作失真來偵測，其由2 : 2下拉信號指示。當幾個連續圖場之圖場差是〇時，靜態影像會被偵測，其由STILL 信號指示。累進圖框僅是這三個信號之邏輯OR，如圖所示之邏輯OR閘256。然而，轉變也必須被提供至紀錄中。如上所述，轉變是圖場序列中之一大改變，其結果來自編輯、或視頻信號之脫離。假如一大改變被偵測，則依據幾個圖場 29 本紙張尺度適用令國國家標準（CNS>A4規格<210 X 297公釐）、裝--------訂---------線. (請先閲讀背面之注項再填寫本頁) 經濟部智慧財產局貝工消費合作社印製 5 1 26ρ.Π .doc/002 A7 4 4 9 9 9 9 _ B7______ 五、發明說明（1) 之歷史紀錄偵測累進圖框’在週期中要求建立累進圖框圖案可能是不可靠的。在範例描述中’此週期是十個圖場次數或大約獨第六之每秒60Hz圖場。在一組邏輯操作258中，一脈衝會在兩狀況下產生。一是3 : 2下拉序列被偵測時，另一是序列中之轉變被偵測時。若十個圖場在時間週期中被要求建立一新的累進序列，任一事件會觸發一計時器260以產生十個圖場持續時間之一脈衝。在此時間期間’邏輯AND閘262禁能PFD位元146。如先前所述，假如PFD位元146是非主張，則可選擇內部圖框解交錯處理器如第6圖所示)可去除暫停期間之動作失真。因此必須注意的是，本發明之累進圖框偵測過程提供消除視頻影像中之邊緣人爲因素。此可經由驗證最初動畫之型式，以及在解交錯過程中使用訊息幫助結合視頻圖場來完成。這些結合技術提供一低人爲因素、高解析度解交錯影像。第4圖之第二解交錯平台80將於第11-21圖中詳細討論描述。第11圖繪示的是解交錯過程的方法300圖。視頻圖場3〇2包含有掃描線306及一先前視頻圖場304，圖場 304包含有掃描線30S供給至一圖場結合解交錯處理器3 10 中。任一視頻圖場是720像素乘以280像素。結合來自視頻圖場302之掃描線314與來自視頻圖場304之掃描線 316，此結果是720像素乘以480像素結合圖框312。當執行習知單一解交錯過程，以及動畫經交錯顯示器 30 泰紙張尺度適用中SS家標準（CNS⑷規格（210: 297公釐) ' III ^ ------- 訂----- I---線 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 5l26ριΠ .doc 0 0 249 99 9 五、發明說明（β) 格式化轉換成·一累進格式時，一顯著的”人爲因素”或錯誤增加，此乃因爲垂直相鄰線之影像內容是時間位移l/60lh，如先前所提及。此錯誤很明顯的環繞在動作中之目標邊緣。 _ 第12圖係顯示像素値318之兩尺寸陣列圖，其是第 11圖之結合圖框312的子集，將用來描述本發明之範例。像素318之陣列具有一寬爲5及高爲7之像素。陣列318 被標記橫越頂部C0至C4代表行，以及被標記垂直沿著左側，從頂部至底部至R6代表列。包含在陣列318中之像素，被用來計算一頻率偵測値。另外，陣列318也被用來偵測對角線特徵及最後計算結果像素。 • 陣列318是被定位，以便使一組偶數列320包含有來自最初來源之多數最近或”目前”圖場的像素’以及使一組奇數列322包含有來自先前圖場的像素。陣列318接著會從左至右水平地移動越過結合圖框312(參照第11圖）。每一步驟使得任一行C卜C2與C3、C4位移至其左方。行C0 中之像素會位移出陣列318,以及一新行之像素會位移至行 C4。在陣列318移動越過結合圖框312之所有水平位置之後，其會垂直向下移動兩個像素，並回到結合圖框312之左側。因此，偶數列320包含有來自多數最近圖場之像素，以及奇數列322包含有來自先前圖場之像素。此過程會重複進行，陣列318會再次從左至右水平地移動越過結合圖框312。在兩尺寸陣列之每一位置中，一偵測値（DV)會被 —裝--------訂· (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（2】〇χ 297公釐） 5 I26pifl doc/002 經濟部智慧財產局員工消費合作社印製 A74 49 99 9_^_ 五、發明說明（4) 計算出。第13圖繪示的是從兩尺寸陣列318中獲得一輸出像素338的方法326示意圖。在操作328中’使用兩尺寸陣列318之每一行之七個像素，可獲得一頻率偵測値。由於有五行，所以會有五次頻率偵測操作會被執行’以產生一組偵測値fdO、fdl、fd2、fd3與fd4。接著’操作330臨限此組偵測値W0-W4。然後，在操作332中’此組偵測値 fd0-fd4會被結合在加權平均値，以達到一最後偵測値 (UDV)334。此加權因子是可變動的。一加權範例如下所述： UDV=(fd0+(2*fdl)+(8*fd2)+(2*fd3)+fd4V〗4。此加權使得頻率偵測値非常接近陣列318之中心，藉以在UDV 334上具有最大的影響。在此方法下，使用五個水平相鄰頻率偵測値造成一低通濾波操作，以便在結合圖框312內之區域間提供較平滑傳送，其中不論動作失真是否存在0 在操作332中計算UDV 334，其用以控制一混合操作 336，較佳的是執行下列方程式：像素輸出 =(UDV*(pR2C2+pR4C2)/2)+((l-UDV)*pR3C2)，其中像素輸出是解交錯操作之新的輸出像素，PR2C2是陣列318之像素於位置列2、行2, pR4C2是陣列318之像素於位置列4、行2，以及PR3C2是陣列318之像素於位置列3 '行2。混合操作之結果，陣列318之像素pR3C2的新値係根據UDV 334 〇假如計算UDV 334時沒有動作被偵測到，貝1J 像素PRJC2將是先前圖場中在其位置之像素的非修正値。 --'裝 - ------訂，------!r! (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中囡园家標準（CNS)A4規格 (210x297 公釐） 5 I 26ριΠ .dc 002 5 I 26ριΠ .dc 002 Λ7 B7 449999 五、發明說明（%) 假如一大的UDV 334亦即1結果之數値，則一強動作失真會被偵測，PR3C2的値會經由平均陣列318之像素pR2C3 與pR4C3的値計算出。因爲其係由多數最近圖場的値創造出，其時間與多數最近圖場相關聯，故此平均結果將不會顯示動作失真。介於〇與1間之偵測値’將使得像素PR3C2 是pR3C2之混合及pR2C3與pR4C3之平均値。第14A圖繪示的是影像340於操作328的詳細描述示意圖。影像340顯示陣列318之一行之單一頻率偵測値的計算結果。影像340包括一扭曲目標342，其受到一交錯麗L 作失真的影響。影像沿著線344被取樣，其顯示出做爲範例。此取樣對應於兩尺寸陣列318中之其中一行。在此範例中，線344穿過人爲因素存在之一區域’但一般來說’ 垂直相鄰像素之取樣可或不可包含人爲因素。第14B圖繪示的是經由第14A圖之取樣線344中獲得之一組樣本348的圖表346。此取樣組348係以列數沿著水平座標，以及像素之亮度或強度沿著垂直座標標示出。如圖表346所示，很明顯的，此區域存在有動作失真，例如此取樣組348，將顯示一特性頻率。這是在空間中之頻率，相當地及時與較方便表達做爲週期每線(cycles Per line)優於週期每秒(cycles Per second)或赫兹(Hertz)。此特性頻率是1週期/2線（1 cycle/2 lines)或0.5週期/線。第14C圖繪示的是取樣餘弦波350的圖表。經由將此組取樣348乘以取樣餘弦波350偵測之動作失真，可到特性頻率。取樣餘弦波350具有一頻率，相當於動作失真之本紙張尺度適用_國國家標準（CNS)A4規格（2】0 X 297公釐〉 (請先閱讀背面之注意事項再填寫本頁) -111 — — — — ^ I I I I I - f 經濟部智慧財產局員工消费合作社印製 Λ7 4 4 9 92yit'5dot，0(,2 _______B7___ 五、發明說明（5() 特性頻率。接著，此結果可使用下列方程式來整合之： Λ 二6 fd = (R) cos(2i?^r * Q.5cycle i line) ,I裝i {請先閱讀背面之注意事項再填窝本頁) 其中，fd是陣列318之一行的頻率偵測値，R是一線指數對應於陣列318之R0...R6,且具有單位”線”，以及Y(R) 是垂直相鄰取樣組348。當 R=0,254 和 6 時，數學式 cos(2 π R*〇.5cycWline)可簡化至1，當R=l，3和5時，則可簡化至-1。假如1和-1以 R0…R6取代，頻率偵測方程式變爲：fd=(Y6/2 + Y4 + Y2 +Y0/2) - (Y5 + Y3 +Y1) 〇注意Y6與Y0都除以2，此乃因爲整合結果超過限制0至6。最後的fd是一絕對値： fd=Abs(fd)。第13圖之方法326會重複在陣列318中之每一行進行，以產生頻率偵測値組33〇。 -Γ 經濟部智慧財產局員工消费合作杜印製第15圖繪示的是詳細描述臨限操作330的圖表352 示意圖。每一W是一範圍0至1之數。圖表352包括一非臨限標度354，其値從臨限至臨限標度356。臨限設定所有高於上臨限點358之數値爲1。所有低於低臨限點360之數値設定爲〇。介於上與下臨限之數値展開至範圍〇至1。臨限可以下列方程式來描述：tfdKptfd-LTH)/UTH，其中tfd 是臨限頻率偵測値，ptfd是預先臨限頻率偵測値(操作328 之輸出），LTH是低臨限値，以及UTH是高臨限値。假如 tfd>1.0，貝〇 tfd=1.0。另一方面，假如 tfd<0，貝lj tfd=0 因此必須注意的是，本發明之解交錯過程提供良好的垂直解析度，而不會在視頻影像之移動目標中引起邊緣人 34 本紙張尺度適用中國國家標準（CNS)A4規格<210 X 297公釐） 5126pit)d〇c;0029 9 9 λ? 經濟部智慧財產局員工消费合作社印製五、發明說明（多}) 爲因素。此可經由使用兩圖場交錯其中影像是相對地靜止’以及使用一圖場線加倍其中影像是快速地改變來完成。适些技術之結合結果’提供了 -^*低人爲因素、高解析度解交錯影像。、 UDV 334較佳是用在如第16圖所示之一混合電路400 中。混合電路400計算在陣列318位置R3C2中之像素的一新値。假如沒有偵測到動作失真，則UDV 334的値將會是’以及混合電路400將會輸出最初像素R3C2。假如 UDV 334的値是”1”，以及混合電路400將會輸出R3C2之上與下像素的平均値，如此混合電路400之輸出是R2C2 與R4C2的平均値。第17圖繪示的是當UDV 334大於”0”，但小於”1”時，混合電路400的示範操作圖。混合電路400使用來自三像素陣列402混合R3C2之訊息及R2C2與R4C2的平均値，以形成一新的輸出像素406於位置R3C2。第18圖繪示的是用以偵測對角線特徵的方法408示意圖。二次陣列410係爲陣列318的子集，並輸入至一對角線偵測電路412中，其操作並行於第13圖之方法326。假如沒有偵測到對角線特徵，則對角線偵測電路412不輸出。然而，假如偵測到對角線特徵，則對角線偵測電路412 產生兩個輸出：一單位元Sign信號414與一多位元 SlopeFade 信號 416。用來計算 Sign 與 SlopeFade 信號 414 與416的特定方法及其對應描述如第2丨圖所示。 Sign信號414係用來確認哪一對像素是對角線相鄰於 (請先閲讀背面之注意事項再填寫本頁) 褒---- ----訂 --------f·! 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 5 1 26pifl a〇c/002 4999 9_B7__ 五、發明說明（%) R3C2。SlopeFade信號416是一對角線特徵之量値。量値是由沿著對角線特徵之對比數來確認。高對比例如橫越一黑色背景之對角線白色線’將會產生於SloPeFade信號416 之最高値。低對比產生於sloPeFade信號416之較低値° 第19圖繪示的是依照本發明一較佳實施例之對角線混合電路418的方塊圖。對角線混合電路418包括一多工器420、一第一混合器422以及一第二混合器424。多工器 420倚靠Sign信號414來確認哪一對像素相鄰於使用之像素。在一對對角線相鄰像素選擇被選擇之後’第一混合器 422混合垂直相鄰於R3C2之像素値與對角線相鄰於R3C2 之像素値。經由SlopeFade信號416可確認混合數’其與偵測到之對角線特徵的量値成比例。第二混合器424是最後混合平台，其相當於如第I6 圖所示之混合電路400。第二混合器424產生一輸出’其係經由輸入像素R3C2與第一混合器422之輸出來確認。UDV 334做爲第二混合器424之控制輸入。簡單來說，於R3C2 之新像素値會從二次陣列410之像素値中被計算出。用以確認最後像素値之控制信號爲UDV 334、Sign信號414與 SlopeFade 信號 416。第20圖繪示的是用來計算對角線混合電路418之輸出之二次陣列410的像素示意圖。假如在二次陣列410內沒有對角線特徵被偵測到，則混合電路之輸出從沿著線426 之像素來確認。假如在對角線偵測電路412中偵測到對角線特徵，則像素斜對相鄰於沿著線428或線430之R3C2 ’ 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公釐） C請先閱讀背面之注意事項再填寫本頁) 裝！----訂·！ ---I ·線經濟部智慧財產局員工消費合作社印製經濟部智慧財產局貝工消费合作杜印紫 5 126ριί_1 4 4 9 9 9 9 Α? I---------Β7__ 五 '發明說明（ff) 並被用來計算輸出像素。Sign信號414係用以確認哪一條線428或430被使用° 第21圖繪示的是依照本發明一較佳實施例之對角線偵測方法432的流程圖。方法432顯示邏輯與數學運算的流程，用以計算來自二次陣列410之SlopeFade信號416 與Sign信號414。經由操作434，角落像素會被分成兩個水平對與兩個垂直對。水平對標示爲hv2與hv4，以及兩個垂直對標示爲vv2與VV4。每一對角落像素値經由減去差數，產生一對水平差數與一對垂直差數。在操作436中，兩水平與垂直差數會被總計，以產生二次陣列410之一水平與垂直差數向量。操作438計算水平與垂直差數向量之絕對値。在操作440中，一臨限値被用來調整SlopeFade輸出416之量値。操作44〇之輸出是一絕對的 SlopeFade 信號（unQualSlopeFade)，其依 DiagDetect 信號之”零輸出”與方法432平行操作產生之SlopeDisQual 信號而定。來自操作434之水平與垂直差數的記號會被紀錄及儲存在操作442中。此記號指出不論操作434導致正或負數。接著，操作444尋找水平與垂直差數操作的記號爲相互對立的事件。假如找到此種事件，則SlopeDisQua丨設定爲”1”。假如差數操作之記號不是對立的，則Sl〇pePlsQua丨爲”0”。在操作444中，對角線偵測器尋找相對大之對角線特徵；特別是，此特徵必須大於九個像素二次陣列410 ’用以做爲輸入至對角線處理器中。影像特徵小於二次陣列410 ’ 本紙張尺度適用中國國家標準<CNS)A4規格（210 X 297公釐） 1 I! ^ -1----Ϊ 1 ---11 — {靖先閱讀背面之注意事項再填寫本頁) 5 ) 2 6 fn t J . d t /00 2 5 ) 2 6 fn t J . d t /00 2 A7 B7 4 49 99 9 五、發明說明（％) 可使對角線處理成錯誤偵測一對角線特徵。因此，這些小的特徵可經由查看記號與設定SlopeDisQual來偵測。操作446比較在操作438中計算出之水平與垂直向量的量値，以偵測一對角線特徵。然後，在操作440中使用水平與垂直向量會產生DiagDetect信號。水平與垂直向量之差數比以及水平與垂直向量之總和，可經由一臨限値 diagDetThresh 來調整。在操作448中計算最後SlopeFade輸出，並使用兩單位元輸入來限制SlopeFade輸出。第一位元是一 DiagonalDetect 位元以及第二位兀是一SlopeDisQual 位元。假如DiagDetect是0或假如SlopeDisQual是1時， SlopeFade將會是0，另一方面，SlopeFade將會獲得 unQualSlopeFade之數値。在無法可靠地計算出對角線特徵之斜率的情況下，SlopeDisQual信號會改變SlopeFade信號至0。最後，在操作450中，使用於操作436中執行水平與垂直向量之總和產生的記號位元，計算出Sign信號414。 Sign信號4]4會被使用此邏輯運算來計算，以確認對角線特徵之斜率。第4圖之視頻輸出處理器60將於第22-27圖中詳細描述討論。第22圖繪示的是可變標度FIR濾波器500的簡例圖。可變標度FIR濾波器500包括一位移暫存器502，具有一連續之暫存器504，每一暫存器504連接至時脈506。每一暫存器5〇4經由一連續之濾波支線514之一，連接至一 — — — — — —— -裝 i (請先閱讀背面之注意事項再填窝本頁) 訂，* 經濟部智慧財產局貝工消费合作社印製本紙張尺度適用中國困家標旱（CNS)A4規格（210 X 297公爱） 5 1 2 6 p i t、1. d ο ι; ’ ϋ ί) 2 A7 B7 五、發明說明（^ ) 組乘法器508、510與512之一。乘法器508、510與512 接收兩輸入並將之相乘。第一輸入是一八位元資料字元，以及第二輸入是一係數。乘法器508、510與512彼此不同的是，其接收係數被量子化爲不同位元數。乘法器508使用每一係數之最小位元數，以及乘法器5U使用每一係數之最大位元數。乘法器508、510與512連接至一係數儲存單元516與一加法器518。八位元資料透過位移暫存器輸入至可變標度FIR 濾波器500。每一暫存器504之輸出經由一連續之濾波支線 514之一，耦接至一組乘法器508、510與512之一 ’並且與係數儲存單元516產生之一係數相乘。在時脈506之每一週期，一新組之係數會經由係數儲存單元5丨6載入乘法器508、510與5】2中。經由加法器518之每一乘法器508、 510與512的總和結果，會產生一濾波輸出取樣。第23圖繪示的是低通濾波係數520在儲存於用以產生係數之係數儲存單元516之時域中的圖表。低通濾波係數520可以下列方程式表示：〇) yc(/) =——^——* sin[2 fcnii -1/2)] *{0.54 + 0.46 ws[2n{i -1/2)/ taps}} V ' tT W 2/c^(/-l/2) 曲線522代表非量子化與連續波。濾波係數524如圖曲線522上或接近之標示位置。由於經由量子化每一係數以限制位元數會產生錯誤’一些係數524看起來稍微遠離曲線。第24圖係顯示係數524組成L=8組’每組有6個係本紙張尺度適用中國國家標準（CNS〉A4規格（210*297公釐） (請先閱讀背面之注意事項再填窝本頁) 裝------—訂---------綠經濟部智慧財產局貝工消费合作社印裳經濟部智慧財產扃貝工消费合作社印製 5 t 26pii't .d〇c/0U2 449 99 9____ 五、發明說明（多1) 數的圖表。每一組i之所有係數的總和其中i=l至L可以下列方程式表示： js-mul/s (2)外)=ΣΓ(Ζ()-1)+/)^ ---- 1 Order-! 1 · Line V Printed by the Shellfish Consumer Cooperative of the Wisdom and Time Bureau of the Ministry of Economic Affairs κ 5 I 26ριΙΊ 4 9 9 9 9 V. The field of invention description (1 丨). Under these three fields, the field combination platform 150 generates a progressive format output frame 1 5 2. If the current field is even, the next and previous fields must be odd, and vice versa. Therefore, the progressive format frame 152 output by the field combination platform 150 will usually be a combination of an even number and an odd number. This is very important, because the correct combination of the fields into a progressive frame requires the input of an even and an odd field. The optional internal frame deinterleaver 154 may provide additional processing to remove artifacts that occur in the output frame 152 under certain conditions, such as when the PFD signal 146 is de-asserted. If the frame detector 142 detects an incoming video signal originally from a source, it is claimed that a progressive frame and a PFD signal 146 are included. The three original patterns of the source video will be detected: the film under the frame of 24 frames per second, the computer animation or the frame performance under the frame of 30 frames per second, or the static image. No motion occurs in the image during more than a few fields in. When PFD signal 46 is asserted, optional processor 154 is disabled. However, if the frame detector 142 cannot detect the progressive frame sequence from the incoming video field, it will set the L / N signal 144 in the field combination platform 15 to always combine the current and previous fields. Then, the frame detector 142 does not claim the PFD signal 146, it will notify the optional deinterleaver 154 that there are human factors in the output frame, and may require additional processing to remove the human factors and create a final progressive output Frame 152 '. The detection of the progressive frame sequence needs to maintain the historical record of the previous field. However, the progressive frame detector H2 can view only one field in advance. (Please read the notes on the back before filling out this page) * 1 I ----- Order .------ l_r— The paper printed by the Consumers' Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs applies the Chinese national standard (CNS ) A4 specification (2〗 0 X 297 mm) 449 99 9 5 J 26piH doc 002 A7 B7 Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (4) If a large image conversion occurs, due to the original editing The factors of the video source may cause the progressive frame sequence to change. This change may force the frame created by entering the field to change, but it is impossible to know in advance the arrival of the field. For this reason, the progressive frame detector 142 must be able to detect transitions in the animation, as the transition may indicate that editing it may change the progressive frame sequence. If a transition is detected, the progressive frame detector 142 will not assert the PFD signal 146 during the time period and will be asked to confirm the new progressive frame sequence. This will allow motion distortion to be removed via the optional deinterleaver 154 during the time period, and a progressive frame sequence needs to be retrieved. If a progressive 'frame sequence is not detected and the PFD output is not asserted, the StadelDV 148 output contains important information about the number of actions present in the image. This information may be used in optional deinterleaver 154 to additionally process the image. FIG. 7 is a system diagram of a progressive frame detector 142 according to a preferred embodiment of the present invention. The frame detector 142 includes a field discrimination module 154, a frequency detection module 156, and a progressive frame pattern detection (PFPD) module 158. The field difference module 154 calculates the difference between the next field 160 and the previous field 162, and processes the difference into StagelDV 148, a conversion detection 3: 2 number, 166, and multiple history. Bit 168. The frequency detection module 156 combines a current field 164 and a previous field 162 into a frame, and then the detection result comes from the vertical high frequency of motion distortion. Next, the frequency detection module 156 outputs a number of frequency detection history bits 170 and a conversion detection 2: 2 counts 172. Finally, PFPD 158 received the conversion detection as input 3: 2 digits 値 166, multiple historical field bits 168, 26, etc. This paper size is in accordance with China's Standard (CNS) A4 specification (210 X 297 g) ) --I ------ I 11 'I ---- I 1 ^ I--1 — —! v (Please read the notes on the back before filling this page) 5 \ 2βρ \ 449 99 9 5! 26pit'l .doc / 002 A7 B7 Printed by the Shellfish Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs Frequency detection history bit] 70 and transition detection 2: 2: 値 Π2 to generate L / N signal 144 and PFD signal 146. FIG. 8 shows a flowchart of processing steps in the field identification module 154 according to a preferred embodiment of the present invention. The two arrays below the pixel 174 are a subset of the next field 160, and the one array above the pixel 176 is a subset of the previous field 162, which are all input to a differentiator 178. Next and Top — The pixel arrays 174 and Π6 can be viewed as windows, moving across their fields. The "window" will move from left to right and from top to bottom. Every time the window is moved 'a new rate is calculated. The result of the rating operation 178 is' 180 in an array. Use one of the weighted 180 arrays to calculate the StagelDV 148. This weighted frame is like the difference between the adjacent array centers, which has a large effect on the weighted average frame. The array of rates 180 is also input to a field rate accumulator 182, which sums the entire field's rate to produce a field rate of 184. The five field rates previously stored in the memory module 186 are totaled in one operation 188. In operation 190, 'the total of the previous five field differences is compared with the current field difference' and the result is a conversion 3: 2 output signal 192. The current field rate 184 is compared with the number in the programmable field rate 184 in a critical operation 194. The result of the critical operation 194 is a first-order field bit 198, which is a unit cell 'representing that the next field 160 is the same as the previous field 162. The previously-waiting field location 168 will be stored in the memory module 200, and it will be used in the PFPD 158 of FIG. 7. Figure 9 shows the frequency detection according to a preferred embodiment of the present invention. The paper size applies the Chinese National Standard (CNS) A4 (210 X 297 mm) III 11 11-11111 --- (Please read first Please fill in this page on the back of the idea) 5 1 26pifi doc / 002 Λ7 99 9_B7_ V. Description of the invention ($) Detailed steps of the module 156. When they appear on the display, the vertically adjacent pixels 206 from the current field 164 and the previous field 162 are combined. A frequency detection chirp is calculated in operation 208. The result of this calculation is performed to detect the frequency of distortion associated with the deinterlacing action. In operation-2 10, the output of the frequency detection is compared with the programmable threshold 212. The results of the five adjacent frequency detection frames are stored in the memory module 214 and totaled in operation 216. The output of the operation 216 in the field frequency detection accumulator 218 during the entire field period is accumulated to generate a field frequency detection 値 220. The field frequency detection unit 220 is stored in a memory module 222 containing the previous five field field detection units. The five previous field frequency detections are totaled in operation 224, and the results are compared in operation 226 with the current frequency detections 220. The comparison result in operation 226 is a conversion 2: 2 bit 228, which represents the conversion that occurred in the 2: 2 sequence. Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs of the People's Republic of China (锖 Please read the notes on the back before filling in this page) As part of the parallel process, a first previous field detection stored in the memory module 22 will be detected Send it to a multiplier 232 to multiply it by one of the numbers stored in the programmable field frequency critical register 234. This multiplication result is compared with the current field frequency detection 値 220 in operation 236. The result is a relative frequency difference bit 239, which is then stored in the memory module 240. The previous ten relative frequency difference bits 242 are output to the PFPD module 158. FIG. 10 is a system diagram of a PFPD module 158 according to a preferred embodiment of the present invention. The PFPD module 158 converts a set of field difference history bits 244 'Frequency detection history bits 242' into 3: 2 numbers 値 192 (refer to the 8th national standard (CNS) A4 specification applicable to this paper standard) 210 X 297 (") 4 49 9¾2¾ 5 126oitl; doc / 002 A7 4 49 9¾2¾ 5 126oitl; doc / 002 A7 Printed by B7, Industrial Property and Consumer Cooperatives, Intellectual Property Bureau, Ministry of Economic Affairs 5. Description of invention (outside) Figure) And conversion 2: Count 228 (refer to Figure 9) and perform logical operations. After the field difference history bit 244 is input, the logical operation 246 finds that each fifth field is an equal pattern, and confirms that the 3: 2 pull-down detection bit. Next, when the difference between the most recent four fields is zero, the logical operation 248 detects a still image by setting the STILL bit. The state of the L / N control signal is set via a logic operation 250. The input from the frequency detection history bit 242, the logic operation 252 detects a 2: 2 pull-down detection by finding the high-frequency and low-frequency interlaced patterns in the number of consecutive fields, and monitoring the frequency detection history bit 242. Positioning unit. Then, a logic operation 254 confirms that the L / N control signal is a 2: 2 pull-down condition. Detecting the bit from 3: 2, converting 3: 2 to 値 192, 2: 2 to pull down the bit, and converting 2: 2 to 228, the PFD signal 146 can be confirmed. The progressive frame of the three-source pattern will be detected. Using a 3: 2 pulldown detected by calculating the difference between the even field pair and the odd field pair, and looking for a condition where every fifth difference is 0, the film is converted into a video. This condition is indicated by a 3: 2 pull-down signal. The animation is generated using a 2: 2 pull-down computer, which can be detected by using a frequency detection method to find the motion distortion accompanying each second combined frame, which is indicated by a 2: 2 pull-down signal. When the field difference between several consecutive fields is 0, the still image will be detected, which is indicated by the STILL signal. The progressive frame is only the logical OR of these three signals, as shown in the logical OR gate 256. However, change must also be provided to the record. As mentioned above, the transition is a major change in the field sequence, the result of which comes from editing, or the separation of the video signal. If a major change is detected, according to several plots, this paper size applies national standards (CNS > A4 < 210 X 297 mm), installation ------ order --- ------ line. (Please read the note on the back before filling out this page) Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 5 1 26ρ.Π .doc / 002 A7 4 4 9 9 9 9 _ B7______ V. Description of the invention (1) Historical record detection progressive frame 'It may be unreliable to require the establishment of a progressive frame pattern in the cycle. In the example description, 'this period is ten fields or about 60 Hz per second. In a set of logic operations 258, a pulse is generated under two conditions. One is when a 3: 2 pull-down sequence is detected, and the other is when a transition in the sequence is detected. If ten fields are required to create a new progressive sequence in a time period, any event will trigger a timer 260 to generate a pulse of ten field durations. During this time ' the logical AND gate 262 disables the PFD bit 146. As previously mentioned, if the PFD bit 146 is non-assertive, an internal frame de-interlacing processor can be selected (as shown in Figure 6) to remove motion distortion during the pause. Therefore, it must be noted that the progressive frame detection process of the present invention provides the elimination of edge human factors in the video image. This can be done by verifying the type of initial animation and using messages to help combine the video field during the de-interlacing process. These combined technologies provide a low-artifact, high-resolution deinterleaved image. The second de-interlacing platform 80 of Fig. 4 will be discussed and described in detail in Figs. 11-21. FIG. 11 illustrates a method 300 of the de-interlacing process. The video field 302 includes a scan line 306 and a previous video field 304. The field 304 includes a scan line 30S to be supplied to a field combined deinterlacing processor 3 10. Any video field is 720 pixels by 280 pixels. Combining scan line 314 from video field 302 with scan line 316 from video field 304, the result is 720 pixels by 480 pixels combined with frame 312. When performing the conventional single de-interlacing process, and the animation is interlaced on a 30-Taiwan paper scale, the SS home standard (CNS⑷ specification (210: 297 mm)) 'III ^ ------- Order --- I --- line (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5l26ριΠ.doc 0 0 249 99 9 V. Description of the invention (β) Formatted conversion into a progressive format At the same time, a significant "artificial factor" or error increases because the image content of the vertical adjacent lines is a time shift of 1/60 lh, as mentioned earlier. This error clearly surrounds the edge of the target in action. _ Figure 12 shows a two-dimensional array diagram of pixel 値 318, which is a subset of the combined frame 312 of Figure 11 and will be used to describe an example of the present invention. The array of pixel 318 has a width of 5 and a height of 7 pixels. Array 318 is marked across the top from C0 to C4 for rows, and is marked vertically along the left, from top to bottom to R6 for columns. The pixels contained in array 318 are used to calculate a frequency detection A. In addition, array 318 is also used to detect diagonal lines. Features and final calculated pixels. • Array 318 is positioned so that a set of even columns 320 contains the most recent or "current" field pixels from the original source, and a set of odd columns 322 contains the pixels from the previous image. The pixels of the field. The array 318 will then horizontally move from left to right across the combined frame 312 (refer to Figure 11). Each step shifts any of the lines C2, C3, and C4 to the left. Among the lines C0 Pixels will be shifted out of array 318, and a new row of pixels will be shifted to row C4. After array 318 moves across all horizontal positions of combined frame 312, it will move two pixels vertically downwards and return to the combined frame Left side of 312. Therefore, even-numbered column 320 contains pixels from most recent fields, and odd-numbered column 322 contains pixels from previous fields. This process is repeated and the array 318 moves horizontally from left to right again Combined with frame 312. In each position of the two-dimensional array, a detection frame (DV) will be installed ------ ordered (please read the precautions on the back before filling this page) Applicable paper size National Standard (CNS) A4 Specification (2) 〇χ 297 mm 5 I26pifl doc / 002 Printed by Employee Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs A74 49 99 9 _ ^ _ 5. Description of the invention (4) Calculated. 13 The figure shows a schematic diagram of a method 326 for obtaining an output pixel 338 from a two-size array 318. In operation 328, 'use seven pixels of each row of the two-size array 318 to obtain a frequency detection frame. Since there are five Therefore, five frequency detection operations will be performed to generate a set of detections: fdO, fdl, fd2, fd3, and fd4. Then 'operation 330 threshold' this group detects W0-W4. Then, in operation 332, 'this set of detection thresholds fd0-fd4 will be combined into a weighted average threshold to achieve a final detection threshold (UDV) 334. This weighting factor is variable. A weighting example is as follows: UDV = (fd0 + (2 * fdl) + (8 * fd2) + (2 * fd3) + fd4V〗 4. This weighting makes the frequency detection 値 very close to the center of the array 318, so that it is at UDV 334 has the greatest impact. In this method, five horizontally adjacent frequency detection chirps are used to create a low-pass filtering operation in order to provide smoother transmission between the areas within the combined frame 312, regardless of whether motion distortion exists 0 Calculate UDV 334 in operation 332, which is used to control a hybrid operation 336, preferably the following equation is performed: pixel output = (UDV * (pR2C2 + pR4C2) / 2) + ((l-UDV) * pR3C2) , Where the pixel output is the new output pixel for the de-interlacing operation, PR2C2 is the pixel of array 318 at position column 2, row 2, pR4C2 is the pixel of array 318 at position column 4, row 2, and PR3C2 is the pixel of array 318 at Position column 3 'Row 2. As a result of the blending operation, the new pixel pR3C2 of the array 318 is based on UDV 334. If no movement is detected during the calculation of UDV 334, Bay 1J pixel PRJC2 will be at its position in the previous field Non-correction of the pixels.-'Install------- order, ------! R! (Please read the back first Please fill in this page before filling in this page.) This paper size is in accordance with the standard of China Garden Garden (CNS) A4 (210x297 mm) 5 I 26ριΠ .dc 002 5 I 26ριΠ .dc 002 Λ7 B7 449999 V. Description of the invention (%) If A large UDV 334 is a number of 1 result, a strong motion distortion will be detected, and the PR3C2's 値 will be calculated from the p of the pixels pR2C3 and pR4C3 of the average array 318. Because it is calculated by the most recent field値 Created, its time is related to most recent fields, so the average result will not show motion distortion. Detection between 0 and 1 will make the pixel PR3C2 is a mixture of pR3C2 and the average of pR2C3 and pR4C3. Figure 14A shows a detailed description of the image 340 in operation 328. The image 340 shows the calculation result of a single frequency detection chirp in one row of the array 318. The image 340 includes a warped target 342, which is subjected to an interlaced L The effect of distortion. The image is sampled along line 344, which is shown as an example. This sampling corresponds to one of the two sized arrays 318. In this example, line 344 passes through an area where human factors exist. Generally speaking, the sampling of vertically adjacent pixels may or may not include human factors. Figure 14B shows a chart 346 of a group of samples 348 obtained from the sampling line 344 of Figure 14A. This sampling group 348 is based on The number of columns is shown along the horizontal coordinates, and the brightness or intensity of the pixels is shown along the vertical coordinates. As shown in Figure 346, it is clear that there is motion distortion in this area. For example, this sampling group 348 will display a characteristic frequency. This is the frequency in space, which is quite timely and more convenient to express as Cycles Per Line is better than Cycles Per Second or Hertz. This characteristic frequency is 1 cycle / 2 lines or 0.5 cycle / line. FIG. 14C shows a graph of the sampled cosine wave 350. By multiplying this set of samples 348 by the detected motion distortion of the sample cosine wave 350, the characteristic frequency can be reached. Sampling cosine wave 350 has a frequency equivalent to the size of this paper. _ National Standard (CNS) A4 specification (2) 0 X 297 mm> (Please read the precautions on the back before filling this page) -111 — — — — ^ IIIII-f Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Λ7 4 4 9 92yit'5dot, 0 (, 2 _______B7___ V. Description of the invention (5 () characteristic frequency. Then, this result can use the following equation To integrate it: Λ 2 6 fd = (R) cos (2i? ^ R * Q.5cycle i line), I install i (Please read the precautions on the back before filling in this page) Among them, fd is the array 318 Frequency detection of one line, R is a line index corresponding to R0 ... R6 of the array 318, and has a unit "line", and Y (R) is a vertically adjacent sampling group 348. When R = 0,254 and 6, The mathematical formula cos (2 π R * .5cycWline) can be reduced to 1, and when R = 1, 3 and 5, it can be reduced to -1. If 1 and -1 are replaced by R0 ... R6, the frequency detection equation changes. For: fd = (Y6 / 2 + Y4 + Y2 + Y0 / 2)-(Y5 + Y3 + Y1) 〇 Note that Y6 and Y0 are divided by 2 because the integration result exceeds the limit of 0 to 6. The final fd is One Absolute 値: fd = Abs (fd). The method 326 in Fig. 13 will be repeated in each row in the array 318 to generate the frequency detection group 33. -Γ Printed by the employee ’s consumer cooperation of the Intellectual Property Bureau of the Ministry of Economic Affairs Figure 15 shows a diagram 352 describing the threshold operation 330 in detail. Each W is a number ranging from 0 to 1. The chart 352 includes a non-threshold scale 354, which ranges from the threshold to the threshold. Degree 356. Threshold sets all the numbers above the upper threshold 358 to 1. All the numbers below the low threshold 360 to 0. Sets the numbers between the upper and lower thresholds to the range of 0 to 1. Threshold can be described by the following equation: tfdKptfd-LTH) / UTH, where tfd is threshold frequency detection, ptfd is pre-threshold frequency detection (output of operation 328), and LTH is low threshold. And UTH is a high threshold. If tfd > 1.0, tfd = 1.0. On the other hand, if tfd < 0, tjdf = 0, it must be noted that the de-interlacing process of the present invention provides good vertical resolution. Degrees without causing edge people in the moving target of the video image Standard (CNS) A4 < 210 X 297 mm) 5126pit) doc; 0029 9 9 λ? Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. The invention description (multiple)) is a factor. This can be done by using two fields interlaced where the image is relatively still ' and using one field line doubled where the image is changing rapidly. The result of the combination of these technologies provides-^ * low human factor, high resolution de-interlaced images. UDV 334 is preferably used in a hybrid circuit 400 as shown in FIG. The hybrid circuit 400 calculates a new frame of pixels in the array R318C2 at position 318. If no motion distortion is detected, the UDV 334 will be 'and the hybrid circuit 400 will output the initial pixel R3C2. If the UDV 334 is "1" and the hybrid circuit 400 will output the average chirp of the upper and lower pixels of R3C2, the output of the hybrid circuit 400 is the average chirp of R2C2 and R4C2. FIG. 17 shows an exemplary operation diagram of the hybrid circuit 400 when the UDV 334 is greater than “0” but less than “1”. The mixing circuit 400 uses the three-pixel array 402 to mix the information of R3C2 and the average of R2C2 and R4C2 to form a new output pixel 406 at the position R3C2. Figure 18 illustrates the method 408 for detecting diagonal features. The secondary array 410 is a subset of the array 318 and is input to the diagonal detection circuit 412. Its operation is performed in parallel with the method 326 of FIG. If no diagonal feature is detected, the diagonal detection circuit 412 does not output. However, if a diagonal feature is detected, the diagonal detection circuit 412 generates two outputs: a single-bit Sign signal 414 and a multi-bit SlopeFade signal 416. The specific methods used to calculate the Sign and SlopeFade signals 414 and 416 and their corresponding descriptions are shown in Figure 2 丨. Sign signal 414 is used to confirm which pair of pixels are diagonally adjacent to (please read the precautions on the back before filling this page) 褒 ---- ---- Order -------- f ·! This paper size applies to China National Standard (CNS) A4 (210 X 297 mm) 5 1 26pifl a〇c / 002 4999 9_B7__ 5. Description of the invention (%) R3C2. The SlopeFade signal 416 is the amount of diagonal features. The measure 値 is confirmed by the number of contrasts along the diagonal. A high contrast, such as a diagonal white line across a black background, will be generated at the highest level of the SloPeFade signal 416. The low contrast results from the lower 値 ° of the sloPeFade signal 416. Figure 19 shows a block diagram of a diagonal mixing circuit 418 according to a preferred embodiment of the present invention. The diagonal mixing circuit 418 includes a multiplexer 420, a first mixer 422, and a second mixer 424. The multiplexer 420 relies on the Sign signal 414 to determine which pair of pixels are adjacent to the pixel in use. After a pair of diagonally adjacent pixels are selected, the first mixer 422 mixes pixels vertically adjacent to R3C2 (pixels diagonally adjacent to R3C2). The SlopeFade signal 416 confirms that the mixed number ' is proportional to the amount of diagonal features detected. The second mixer 424 is the final mixing platform, which is equivalent to the mixing circuit 400 as shown in FIG. The second mixer 424 produces an output 'which is confirmed by the input pixel R3C2 and the output of the first mixer 422. UDV 334 is used as a control input for the second mixer 424. In short, the new pixel 値 in R3C2 will be calculated from the pixel 二次 in the secondary array 410. The control signals used to confirm the last pixel are UDV 334, Sign signal 414, and SlopeFade signal 416. FIG. 20 is a schematic diagram showing the pixels of the secondary array 410 used to calculate the output of the diagonal hybrid circuit 418. If no diagonal features are detected in the secondary array 410, the output of the hybrid circuit is confirmed from the pixels along line 426. If a diagonal feature is detected in the diagonal detection circuit 412, the pixels are diagonally adjacent to R3C2 along line 428 or line 430. 'This paper size applies the Chinese National Standard (CNS) A4 specification (210x 297 Mm) C Please read the notes on the back before filling this page) ---- Ordered! --- I · Consumers' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs Printed by the Intellectual Property Bureau of the Ministry of Economic Affairs Shellfish consumer cooperation Du Yinzi 5 126ριί_1 4 4 9 9 9 9 Α? I --------- Β7__ 5 'Inventive Note (ff) and is used to calculate the output pixels. The Sign signal 414 is used to confirm which line 428 or 430 is used. FIG. 21 shows a flowchart of a diagonal detection method 432 according to a preferred embodiment of the present invention. Method 432 shows the flow of logic and mathematical operations to calculate the SlopeFade signal 416 and Sign signal 414 from the secondary array 410. Through operation 434, the corner pixels are divided into two horizontal pairs and two vertical pairs. The horizontal pairs are labeled hv2 and hv4, and the two vertical pairs are labeled vv2 and VV4. Each pair of corner pixels 値 is subtracted to generate a pair of horizontal differences and a pair of vertical differences. In operation 436, the two horizontal and vertical difference numbers are summed to generate a horizontal and vertical difference vector of one of the secondary arrays 410. Operation 438 calculates the absolute unitary of the horizontal and vertical difference vectors. In operation 440, a threshold value is used to adjust the amount of SlopeFade output 416. The output of operation 44 is an absolute SlopeFade signal (unQualSlopeFade), which depends on the SlopeDisQual signal generated by the "zero output" of the DiagDetect signal and the parallel operation of method 432. The sign of the horizontal and vertical difference from operation 434 is recorded and stored in operation 442. This tick indicates whether operation 434 results in a positive or negative number. Next, operation 444 finds the signs of the horizontal and vertical difference operations as mutually opposing events. If such an event is found, SlopeDisQua 丨 is set to "1". If the signs of the difference operation are not opposite, SlopePlsQua 丨 is "0". In operation 444, the diagonal detector looks for a relatively large diagonal feature; in particular, this feature must be larger than the nine pixel secondary array 410 'for input into the diagonal processor. Image characteristics are smaller than the secondary array 410 'This paper size applies Chinese National Standard < CNS) A4 specification (210 X 297 mm) 1 I! ^ -1 ---- Ϊ 1 --- 11 — {Jing Xian read the back Please fill in this page again) 5) 2 6 fn t J. Dt / 00 2 5) 2 6 fn t J. Dt / 00 2 A7 B7 4 49 99 9 V. Description of the invention (%) Diagonal Processed as false detection of diagonal features. Therefore, these small features can be detected by checking the mark and setting SlopeDisQual. Operation 446 compares the magnitudes of the horizontal and vertical vectors calculated in operation 438 to detect a pair of diagonal features. Then, using the horizontal and vertical vectors in operation 440 generates a DiagDetect signal. The ratio of the difference between the horizontal and vertical vectors and the sum of the horizontal and vertical vectors can be adjusted through a threshold 値 diagDetThresh. The final SlopeFade output is calculated in operation 448 and a two-bit input is used to limit the SlopeFade output. The first bit is a DiagonalDetect bit and the second bit is a SlopeDisQual bit. If DiagDetect is 0 or if SlopeDisQual is 1, SlopeFade will be 0. On the other hand, SlopeFade will get the number of unQualSlopeFade. When the slope of the diagonal feature cannot be calculated reliably, the SlopeDisQual signal will change the SlopeFade signal to zero. Finally, in operation 450, the sign signal 414 is calculated using the sign bits generated by performing the sum of the horizontal and vertical vectors in operation 436. Sign signal 4] 4 will be calculated using this logical operation to confirm the slope of the diagonal feature. The video output processor 60 in Fig. 4 will be discussed in detail in Figs. 22-27. Fig. 22 shows a simplified example of a variable-scale FIR filter 500. The variable-scale FIR filter 500 includes a displacement register 502 having a continuous register 504, and each register 504 is connected to the clock 506. Each register 504 is connected to one via one of the continuous filter branch lines 514 — — — — — — — — i (please read the precautions on the back before filling this page) Order, * Ministry of Economy Printed by the Intellectual Property Bureau Shellfish Consumer Cooperative Co., Ltd. The paper size is applicable to the Chinese Standard for Household Standards (CNS) A4 (210 X 297 public love) 5 1 2 6 pit, 1. d ο ι; 'ϋ ί) 2 A7 B7 5 2. Description of the invention (^) One of the group multipliers 508, 510, and 512. Multipliers 508, 510, and 512 take two inputs and multiply them. The first input is an eight-bit data character, and the second input is a coefficient. The multipliers 508, 510, and 512 differ from each other in that their reception coefficients are quantized into different numbers of bits. The multiplier 508 uses the minimum number of bits per coefficient, and the multiplier 5U uses the maximum number of bits per coefficient. The multipliers 508, 510, and 512 are connected to a coefficient storage unit 516 and an adder 518. The octet data is input to the variable-scale FIR filter 500 through a shift register. The output of each register 504 is coupled to one of a set of multipliers 508, 510, and 512 through one of a continuous filtering branch line 514 and multiplied by a coefficient generated by the coefficient storage unit 516. In each cycle of the clock 506, a new set of coefficients is loaded into the multipliers 508, 510, and 5] 2 through the coefficient storage unit 5 丨 6. The result of the sum of each of the multipliers 508, 510, and 512 of the adder 518 generates a filtered output sample. Fig. 23 shows a graph of the low-pass filter coefficient 520 in the time domain stored in the coefficient storage unit 516 for generating the coefficient. The low-pass filter coefficient 520 can be expressed by the following equation: 〇) yc (/) = —— ^ —— * sin [2 fcnii -1/2)] * {0.54 + 0.46 ws [2n {i -1/2) / taps }} V 'tT W 2 / c ^ (/-l / 2) Curve 522 represents non-quantized and continuous waves. The filter coefficient 524 is shown at or near the marked position on the curve 522. Some errors occur because quantizing each coefficient to limit the number of bits ' ' Some coefficients 524 appear to be slightly away from the curve. Figure 24 shows the coefficient of 524, which is composed of L = 8 groups. Each group has 6 paper sizes. This paper is applicable to Chinese national standards (CNS> A4 size (210 * 297 mm). (Please read the precautions on the back before filling the book.) Page) -------- Order --------- Printed by the Shellfish Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Green Economy, printed by Intellectual Property of the Ministry of Economic Affairs, printed by the Shellfish Consumer Cooperative, 5 t 26pii't .d 〇c / 0U2 449 99 9____ 5. The description of the invention (more than 1) number. The sum of all coefficients of each group i where i = 1 to L can be expressed by the following equation: js-mul / s (2) outside) = ΣΓ (Z ()-1) + /)

户I 第25圖繪示的是依照本發明一較佳實施例之量子化方法526的流程圖。方法526起始於一提供之參數組528 以計算出係數，其中L是標度率L/M之分子，mults是用在 FIR濾波器中之乘數，以及η是位元數，其係數將會被量子化。在操作530中’使用方程式（1)計算FIR濾波係數。在操作532中’係數從左至右被組成並且被標示爲 c(l)，c(2),c(3)，...c(L*mults)。在操作534中，每一係數被量子化並經四捨五入成n 位元數。接著，操作536開始一執行L次之迴路，一次用以每一係數組’使每一組之所有係數被總計。操作538總計如第24圖之組set(i)的係數。然後，操作540檢測總計操作538之結果是否爲1.0。假如操作540產生一真實結果，則不再進行額外的步驟。在操作542中迴路反覆增量，並控制傳回到操作536。假如操作540產生一不真實結果，則在操作544中計算出假定値F，其可由1.0減去操作53 8產生之總和（sum)而得。接著，進行操作，set(i)的係數之一會被改變，以便使所有係數之總和在set(i)=1.0。第26圖繪示的是第25圖中操作546之更詳細描述的流程圖。操作548是一透過特別次序中set(i)之係數之迴路 40 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） I I ---1 --------^-------1 (請先間讀背面之注意事項再填寫本頁) 5 1 2pit'l . doc,ΌΟ2 449 99 9 Α7 Β7 經濟部智慧財產局員工消费合作社印製五、發明說明（多6 ) 步驟。此次序開始於set⑴之最遠係數，然後向前移動至組的中心。因爲每組有mults個係數，故操作548會被執行 mults次。接著，在操作550中計算指數k，其被用在處理先前開始次序之係數。 - 在係數組之左或右邊緣的係數必須被處理做爲一特殊狀況。因此’於指數k上執行操作552 ’以確認被處理之係數是否爲第一係數c(l)或是最後係數c(L*muhs)。假如操作552確認係數需調整至最左一個，換言之，c(l)，則執行操作554。操作554評估c(l)與F之總和的絕對値是否小於或等於c(l)右邊之係數的絕對値。此表示c(k+l)$c(2)。假如結果是真實的，則c(l)可經由增加F來調整，無須創造一不連續或不同於零座標。係數在操作564中被調整，然後成功地離開操作546。假如結果是錯誤的，則操作560反覆執行一迴路。假如操作552確認係數被調整至最右一個，換言之， c(L*mults)’則方法進行至操作556。操作556評估c(L*mults) 與F之總和的絕對値是否小於或等於c(L*mults)左邊之係數的絕對値，換言之，c(L*mults-l)。假如結果是真實的，則c(L*multS)可經由增加F來調整，無須創造一不連續或不同於零座標。係數在操作564中被調整，然後成功地離開操作546。假如操作556結果是錯誤的，則在操作560中反覆執行一迴路。假如操作552確認係數未被調整至最左或最右一個， (請先閱讀背面之注意事項再填寫本頁) 裝-------訂---I-----^Figure 25 illustrates a flowchart of a quantization method 526 according to a preferred embodiment of the present invention. Method 526 starts with a provided parameter set 528 to calculate the coefficients, where L is the numerator of the scale rate L / M, mults is the multiplier used in the FIR filter, and η is the number of bits, and the coefficient will be Will be quantized. In operation 530 ', the FIR filter coefficient is calculated using equation (1). In operation 532, the 'coefficients are composed from left to right and labeled as c (l), c (2), c (3), ... c (L * mults). In operation 534, each coefficient is quantized and rounded to an n-bit number. Next, operation 536 starts a loop that is performed L times, once for each coefficient group 'so that all coefficients of each group are totaled. Operation 538 totals the coefficients of the set (i) of Fig. 24. Then, operation 540 detects whether the result of the total operation 538 is 1.0. If operation 540 yields a real result, no additional steps are performed. The loop is incremented repeatedly in operation 542, and control passes back to operation 536. If operation 540 produces an untrue result, then in operation 544, a hypothetical 値 F is calculated, which can be obtained by subtracting the sum generated by operation 53.8 from 1.0. Then, one of the coefficients of set (i) is changed so that the sum of all coefficients is set (i) = 1.0. FIG. 26 shows a more detailed flowchart of operation 546 in FIG. 25. Operation 548 is a loop through the coefficients of set (i) in a special order. 40 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) II --- 1 -------- ^ ------- 1 (Please read the precautions on the back before filling out this page) 5 1 2pit'l.doc, 2Ο2 449 99 9 Α7 Β7 Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs (Multiple 6) steps. This sequence starts with the furthest coefficient of set⑴ and moves forward to the center of the group. Because each group has mults coefficients, operation 548 is performed mults times. Next, an index k is calculated in operation 550, which is used to process the coefficients of the previous starting order. -The coefficients on the left or right edge of the coefficient group must be processed as a special case. Therefore, 'operation 552' is performed on the index k to confirm whether the processed coefficient is the first coefficient c (l) or the last coefficient c (L * muhs). If operation 552 confirms that the coefficient needs to be adjusted to the leftmost one, in other words, c (l), then operation 554 is performed. Operation 554 evaluates whether the absolute 値 of the sum of c (l) and F is less than or equal to the absolute 値 of the coefficient to the right of c (l). This means c (k + 1) $ c (2). If the result is true, c (l) can be adjusted by increasing F without creating a discontinuity or different from zero coordinates. The coefficient is adjusted in operation 564 and then successfully exits operation 546. If the result is erroneous, operation 560 executes a loop repeatedly. If operation 552 confirms that the coefficient is adjusted to the rightmost one, in other words, c (L * mults) 'then the method proceeds to operation 556. Operation 556 evaluates whether the absolute 値 of the sum of c (L * mults) and F is less than or equal to the absolute 値 of the coefficient to the left of c (L * mults), in other words, c (L * mults-l). If the result is true, c (L * multS) can be adjusted by increasing F without creating a discontinuity or different from zero coordinates. The coefficient is adjusted in operation 564 and then successfully exits operation 546. If the result of operation 556 is incorrect, a loop is performed repeatedly in operation 560. If operation 552 confirms that the coefficient has not been adjusted to the left-most or right-most one, (please read the precautions on the back before filling this page). ------------ Order --- I ----- ^

-J 本紙張尺度適用中國國家標準（CNS>A4規格（2〗0 X 297公釐）經濟部智慧財產局員工消费合作社印製 5 i 26pifl ,doc/002449999 五、發明說明（M) 則執行操作558。操作558評估c(k)與F之總和是否在係數左邊與其右邊的限制外，換言之c(k-l)與c(k+l)，經由評估方程式 c(k-l)各 c(k)gc(k+l)與 c(k-l)2c(k)gc(k+l)。假如任一方程式是真實的，則係數c(k)在操作564中被設定等於C(k)+F，而不會促成一不連續。因此，成功地離開操作 546。假如任一方程式是錯誤的，則在操作560中反覆執行一迴路。操作560增加迴路反覆變量，以評估下一係數。操作 562詢問set(i)中之所有係數是否都已評估。假如Set(i)中之所有係數未被評估，則控制會回到操作548之頂端，並對下一係數進行重複步驟。假如set(i)中之所有係數已被評估，則係數設定無法被量子化至η位元，無須促成不能接受的不連續至係數設定中。因此，在操作566中η是增量，並離開操作546。控制接著會回到方法526之操作534(第 25圖）中，其最初係數會被量子化至η的新値，並重複過程。在操作546成功離開的情況下，控制會回到方法526(第25 圖）之操作534中，並評估下一係數set(i)。兩尺寸晶片架構50以及第4圖之定址與排序FIFOs 90 ，將詳細討論如下，並請參照第27-33圖。第27圖繪示的是依照本發明一較佳實施例之視頻圖框600的示意圖，其經由一對應數量之掃描線604,被細分成做爲一截割掃描序列之一數量之垂直截割602。每一截割602在類似於用在傳統光柵掃描序列之格式中被掃描，當提供截割之末端到達時，掃描序列進行至伴隨截割。此種格式的優點是，經由 1 ---- - -----— II ^>— — — 11 —--^ i {請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用令國國家標準（CNS)A4規格（210 X 297公釐）經濟部智慧財產局負工消费合作社印製 5 I 2 6 p i f 1 . d o c / Ο Ο 2 4 49 99 9 A7 _— _ B7__ 五、發明說明（使甩槪略相當於垂直截割數量之因子，可減小線記憶體的長度。線記憶體仍是需要的，但目前它們遠短小於以往，造成大幅減低晶片上記憶體需求》然而，較難去做的是從此”截割”掃描組織發生。首先，常有的情況是，必須同時進行水平與垂直方向之處理。此結果在左與右截割邊界上的問題是，截割外之水平像素資料可能不適用。第二*傳統光柵掃描序列會被改變，導致位準與一般視頻源與顯示/儲存元件相反。這些問題將於下述中討論，並可由本發明來解決。第28圖繪示的是截割中心部分606的簡例圖，在其左邊緣608及右邊緣610上具有無效資料的問題。對於本圖之目的而言，無效資料僅繪示於第28圖之左邊緣上。視頻處理要求在水平與垂直方向，其圍繞一提供像素之資料是可用的(在5x5矩陣612與614位於像素中心的情況）。截割中心部分6〇6之中心具有處理矩陣612 ’因爲其可用於處理矩陣612之所有側面上的水平與垂直方向，故無有效資料的問題。在截割中心部分606之頂邊緣618與底邊緣620的情況下，在最頂端像素之上的資料與在最底端像素之上的資料是不可用的’相當於傳統光柵掃描格式。此種情形有幾種方法可以解決’例如以不存在於較高/ 較低的像素資料代替零資料。因此’截割中心部分606之頂與底邊緣618與620將不會有無效資料的問題產生。相反地，處理矩陣614位於截割中心部分6〇6之左邊緣608,水平地相鄰資料。因此’像素資料616之兩行漏掉， 43 本紙張尺度適用中國國家標準（CNS)A4規格<210 X 297公爱） I — — — — — — —^i —---- 訂！— " (請先閱讀背面之注$項再填寫本頁) 5 126pin.doc/0()24 49 99 9 A7 經濟部智慧財產局員工消费合作社印製 B7______ 五、發明說明（孓（）此乃因其位於截割中心部分606之左邊緣608外。爲解決這種情況，這些行的資料會立即從截割被提供至截割左邊來處理。第29圖繪示的是一截割622沿著左與右邊緣608與 610，包括一對薄垂直截割或”屏翼”624。屏翼624被附加至截割中心部分606 ’以提供處理矩陣所需之像素資料。屏翼626被附加至截割中心部分606之右邊緣610。因爲屏翼 624被附加至截割622 ’處理矩陣614不再遭受截割622之左邊緣608外的缺乏資料° 第30圖繪示的是重疊截割/屏翼結合628之整個結構示意圖。第29圖所示之截割622係做爲—範例截割。截割 622之屏翼624與626係由來自一對相鄰截割之資料所組成，—至截割622的左邊，一至截割622的右邊。較特別的是，屏翼624中像素之遺漏兩左行，係從截割632之最右行630直接地被提供至截割622的左邊。如此在截割634 之序列中，截割N之最左屏翼重疊截割N-1之中心部分’ 而截割N-1之最右屏翼重疊截割N之中心部分。第31圖繪示的是依照本發明一較佳實施例之處理視頻的方法636流程圖。視頻處理區塊之輸入係具有截割中心部分606、左屏翼624與右屏翼626之截割622。左屏翼 624被分成一左外部屏翼638與一左內部屏翼640。右屏翼 626被分成一右外部屏翼644與一左內部屏翼642。在此範例中，視頻處理區塊具有多處理平台，每一處理平台要求水平像素位於中心之每一面上。 -I I III 、^i —，--— —訂--- - - - - -- <請先M讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家伟準（CNS>A4規格（210 X 297公釐）經濟部智慧財產局員工消费合作社印製 5 I 2 6 p i Π . d 〇 c · Ο Ο 24 Q 9 9 9 五、發明說明（从> 方法636係利用一第一處理平台646與一第二處理平台650。第一處理平台646用以去除外部屏翼638與044，而留下由截割中心部分606、內部屏翼640與642組成之一輸出截割648。第二處理平台65〇用以去除內部屏翼640 與642。因此，屏翼624與626在此處理過程中被有效地去除，且處理區塊之輸出爲一具有相當於最初截割中心部分 606寬度之截割652。屏翼624與626的一個影響，是因屏翼624與626之寬度會增加晶片上截割線記憶體需求。然而，屏翼寬度一般與整個截割寬度較不相關。實際截割與屏翼寬度是獨立執行，且其係以處理需求與可闬的外部記憶體頻寬爲依據。本發明一較佳實施例係利用三個垂直視頻處理區塊。第一處理平台646要求一對外部屏翼638與644具有2 像素之寬度：第二處理平台650要求一對內部屏翼640與 642具有4像素之寬度；以及第三處理平台650要求沒有屏翼做爲指定處理演譯使用，不要求資料水平被處理成垂直資料。選擇截割中心部分寬度爲36像素，造成一 48像素之起始輸入截割寬度（中心部分+左-內部-屏翼+右-內部-屏翼+左-外部-屏翼+右-外部-屏翼=36+4+4+2+2=48)。令人遺憾的是，垂直處理區塊之資料輸入與輸出不是在光柵掃描視頻格式中，其標準於實際上所有視頻輸入源與視頻輸出顯示器與儲存元件。本發明包括一標準輸入/輸出格式轉換，其經由使用外部於視頻處理元件之記憶體來 I ' t--------t_!---- (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210x 297公釐） 5 1 26pifi ,d〇c^K)2 449 99 9 A7 B7 經濟部智慧財產局貝工消费合作社印製五、發明說明（★}) 完成。一商品dram記憶體元件被使用的理由爲價格與可利用性。依據進行視頻處理的型式，圖場或圖框尺寸緩衝器提供除了介於全圖場/圖框光柵掃描與截割掃描格式間之轉換外的其他必需目的。例如，解交錯過程一般要求一個（有時幾個）圖場緩衝器於短暫處理中’儲存視頻資料之多個圖場。緩衝器也需要圖框率轉換’其中輸出圖框率不同於輸入率；在多輸出圖場或圖框緩衝器的情況下，可能需要圖框率轉換過程。第32圖繪示的是截割基礎視頻處理器654的系統示意圖。一第一輸入緩衝器656 ' 一第二輸入緩衝器658、一第一輸出緩衝器660以及、桌一輸出緩衝器662係做爲截割轉換過程。因爲視頻應用一般要求真實時間輸入與輸出，以及因爲傳統光栅掃描與截割掃描之掃描過程不同，故第一輸入緩衝器656被用來儲存來自輸入資料格式器 664之視頻輸入資料串。第二輸入緩衝器658(代替先前圖場/圖框週期)在截割掃描格式中’被用來提供資料至垂直視頻處理區段666。一類似過程被用做爲輸出。當第一輸出緩衝器660(代替先前圖場/圖框週期)在傳統光栅掃描格式中，被用來輸出資料至輸出資料格式器668時’第二輸出緩衝器662接收截割掃描格式中來自垂直視頻處理區段666之處理資料。輸出資料串實際上可提供資料至額外視頻處理平台中，其僅處理水平方向之資料(例如水平掃描與彩色空間轉換）。 ! — ！ *^·ί1---f 訂--I------ (請先閱讀背面之注意事項再填寫本S ) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）經濟部智慧財產局貝工消費合作社印製 449 99 9 5126ρίΠ-<1〇(；，·〇ϋ2 Α7 _ Β7_ _ 五、發明說明（林）第33圖繪示的是視頻處理晶片架構670之一範例的系統示意圖。視頻處理晶片架構670包括一視頻處理器672 與一外部記憶體源674。在此特殊視頻處理執行下，多輸入圖場儲存(短暫處理)是需要的。視頻資料被提供至視頻處理器672之一輸入平台676中，以直接附加冗餘屏翼資料至視頻資料串內。此資料接著會在光柵掃描序列中’經由位於視頻處理器672內之記憶體控制器680，被寫入(包括屏翼)到外部記憶體源674之第一圖場記憶體緩衝器678中。在伴隨發生的圖場週期中，資料會依序被寫入一第二圖場記憶體緩衝器682、一第三圖場記憶體緩衝器684，以及一第四686圖場記憶體緩衝器中。接著，資料會從第二' 第三與第四圖場記憶體緩衝器682、684與686中被讀取’ 其都位於外部記憶體源674中’且並列連接。圖場緩衝器 682、684與686提供至位於視頻處理器6U內之垂直視頻處理區段688。資料在垂直視頻處理區段688中被處理’以去除屏翼。資料會在截割掃描格式中，從垂直視頻處理區段中被寫入至外部記憶體源674之一第一圖框緩衝器區域 690中。資料在傳統光栅掃描序列中，從外部記憶體源674 之一第二圖框緩衝器區域692中被讀取’以輸入至位於視頻處理器672內之一水平處理區塊694中。水平處理區塊 694之輸出是在光柵掃描格式’並且是視頻處理器672之輸出。在本發明一較佳實施例中’視頻輸入資料係做爲一 <請先閱讀背面之注意事項再填寫本頁) 裝--------訂---------'r\· 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐） 4 Η ^ 4 Η ^ 經濟部智慧財產局貝工消t合作社印製 5 J 2 6 ρ i fl . d o cϋ Ο 2 A7 I_______B7____ 五、發明說明（ 720x240像素格式中之資料的交錯圖場。每一視頻圖場進入具有36像素寬度之20截割，每一截割具有6像素之左與右屏翼（2像素之外部屏翼與4像素之內部屏翼）。屏翼被附加在視頻輸入資料串之適當點，以及結果資料串在光柵掃描序列，被寫入至外部SDRAM之一第一圖場緩衝器內。三資料圖場會從SDRAM中被同步地讀取。這些圖場資料可由第二、第三與第四圖場緩衝器中取得，並在垂直截割48像素寬(截割中心部分與屛翼）乘以240列中讀取。此資料經由第一垂直處理平台處理，其提供兩倍單圖場之輸入率的截割掃描格式資料至一第二平台。輸入至第二平台之截割資料會被格式化成44像素寬乘以480列（由於第 —平台之率倍增動作）。第二垂直處理平台處理資料，並提供相同比率之36像素寬截割掃描格式資料做爲第三垂直處理平台之輸入。第三平台是一垂直標度器，其執行非水平處理，故不需要截割格式資料上之屏翼。資料在一 36像素寬截割掃描格式中，從第三處理平台輸出至SDRAM之第一圖框緩衝器區域中。每一截割之列的數量，是依據指定垂直標度率來選擇。資料在72〇X480*M像素之傳統光栅掃描格式中’ 輸入至一水平唯一處理平台，其中Μ第三垂直處理平台之垂直標度因子。此資料經由水平處理器（其包括一水平標度器）處理，並在傳統光栅掃描格式輸出解析度 72〇*Νχ480*Ν，其中Ν是水平標度因子。整體來說，由於截割掃描架構，此執行結果會在晶片 II I I !'-1-------I ^— — — — — — — (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公复）經濟部智慧財產局員工消费合作社印製 449 99 9 5 1 2 ίί p i Π . d ο c / Ο 〇 2 五、發明說明（上記憶體需求造成一大於10倍的減少量。此花費節省在晶片上記憶體需求的減少量大於補償額外需求外部記憶體，並提供各種原型與產品選擇° 第4圖之視頻輸出處理器60將於第34_38圖中詳細描述討論。第34圖繪示的是依照本發明一較佳實施例之一不同步介面700的方塊圖。資料源702提供同步於時脈C1之資料於輸入資料串704至同步器705中。一旦同步器7〇5 接收到資料，寫入控制邏輯（WCL)單元706經由提供控制與位址信號至每一 RAM緩衝器708、710與712，引導此寫入資料至第一 RAM緩衝器708、第二RAM緩衝器710及第三RAM緩衝器712之一中。一旦資料被寫入RAM緩衝器、710與712，讀取控邏輯（RCL)單元714經由提供位址與控制信號至RAM緩衝器708 ' 710與712，引導來自RAM緩衝器7〇8、710與 712之讀取資料。此取回資料接著會從時脈率C2時之連續輸出資料串716之同步器705輸出至資料目的地718 ° 來自RAM緩衝器708、710或712提供之讀取資料不會開始，直到特定RAM緩衝器、71〇或712被WCL單元塡滿爲止。在RAM緩衝器708、710或712之一被塡滿之後，下一 RAM緩衝器708、710或712會依序被寫入，並可從先前塡滿之RAM緩衝器、710及/或712讀取資料。雖然此特定實施例使用三個RAM緩衝器來說明，但可依據系統需求而使用更多的RAM緩衝器。同步邏輯單元720外部於協調讀取及寫入資料之同步 49 本紙張尺度適用中8明家標準（CNS)A4规格（210 * 297公爱) -n ϋ n »n ·1· * f— n J a— n n n E> n I a (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局貝工消费合作社印製 4 49 99 9 5 1 26ριΠ d〇c/002 ^ B7 五、發明說明（叫）器7〇5。可自由選擇的是，同步邏輯720可以是同步器7〇5 的一部分。多同步方案可被執行。舉例來說’當開始一資料傳送時，同步邏輯720可指揮WCL單元706與資料源 702。一預定週期過後，當第一 RAM緩衝器708被塡滿，且第二RAM緩衝器710在塡滿過程時，同步邏輯720指示 RCL單元714開始讀取來自第一 RAM緩衝器708的資料’ 並提供其至資料目的地718。一可替換的方案是，可較自由或較不自由進行資料傳送。WCL單元706會接收來自資料源7〇2之資料，並寫入此資料至下一可用的RAM緩衝器708、710或712中，以及指揮RCL單元714使各緩衝器是塡滿的。”緩衝器塡滿”(“bufferfuU”)信號必須同步於C1至C2時域，一般是透過一雙位同步器。RCL單元714可閂鎖”緩衝器塡滿”之狀態或送回一握手(handshaking)信號（其必須同步於C2至C1 時域)至WCL單元706’以指出”緩衝器塡滿，，信號被接收或 RAM緩衝器708、710或712是空的。第35圖繪示的是交替不同步介面722的方塊圖。資料傳送經由一外部信號至WCL單元724起始，其代表開始資料傳送。WCL 724同步於時脈C1，用以產生寫入致能與位址至第一單埠RAM緩衝器726、第二單埠ram緩衝器728 及第三單埠RAM緩衝器730。單埠ram緩衝器726、728 與730具有同步寫入及不同步讀取性能。在任一時間中只有一單寫入致能爲主動，RAM緩衝器 726之寫入致能是第一主張，然後是RAK1緩衝器728，接本紙張尺度適用中困困家標準（CNS>A4規格（210 * 297公釐） ^裝------* -訂---------於^ (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局貝工消费合作社印製 4 49 99 9 5 1 2 6 p i fl . d 〇 c / Ο Ο 2 A7 _________B7 _ 五、發明說明（<(：?) _ 著是RAM緩衝器730,之後回到RAM緩衝器726,然後如前述。在RAM緩衝器728是塡滿以及RAM緩衝器73〇是大約半滿的觀點下，外部信號被主張至RCL單元732，以起始RAM緩衝器726 ' 728與730之資料讀取。RCL單元 732同步於時脈C2，用以產生位址與資料選擇線做爲RAM 緩衝器726、728及730之讀取操作。個別的RAM緩衝器726、728及730依據目前RAM 緩衝器7%、728或730之寫入狀態接收一讀取或寫入位址，換言之，當其他兩RAM緩衝器726、728及730從RCL 單元732接收其位址時，一 RAM緩衝器726 ' 728或730 被寫入以從WCL單元724接收其位址。資料MUX 734係由RCL單元732所控制，用以選擇來自目前被讀取之三個 RAMs之一之輸出資料串。雖然在此範例中，外部信號開始資料傳送讀取及寫入操作，一可選擇同步邏輯單元736可能存在於一個或多個外部”開始”信號之缺乏中。第36圖繪示的是3_緩衝同步器序列738的示意圖，其編排與3 RAM緩衝器之讀取及寫入操作有關。位準同步時脈延遲發出實際時間緩衝器序列歪斜（Skew)739提供大約一半RAM緩衝器分離位準碰撞之一緩衝區，其介於發生在相同時間下相同RAM緩衝器之讀取與寫入操作間。此緩衝區吸收”開始寫入”與”開始讀取”命令之錯誤，資料暫停期間之輸入資料串的變動，以及介於兩時域間之同步延遲及/或補償的時序偏差。第37圖繪示的是依照本發明一較佳實施例之用以透本紙張尺度適用中國國家標準（CNS>A4規格（2J〇x297公餐）裝 {請先閱讀背面之注意^.項再填寫本頁) 訂.. -r 449 99 9 5 \ 2όρΐΠ .doc/002 A7 經濟部智慧財產局員工消费合作社印" 五、發明說明（0) 過RAM位址及模組編排的方法740流程圖。方法740開始於操作742，設定讀取及寫入操作之ram位址爲〇，如同選擇RAM緩衝器。接著’操作744詢問資料是否有效。假如答案是否定(N) ’則重複操作744直到資料是有效爲止。假如答案是確定（Y)，則方法740進行至操作746，其會詢問是否有一稱爲EndCnt之變量等於1。假如答案是確定 (Y) ’則最後RAM模組已到達，且操作748增量以便在執行操作75Ό之前，選擇下一 RAM模組。假如答案是否定 (N)，則操作750增量RAM位址。接著方法740進行至操作752,以確認最後RAM位址是否已到達。假如到達的話，則在操作754中將EndCnt設定等於1。假如最後RAM位址未到達，則在操作756中將 EndCnt設定等於0。在操作754與756之後，方法740返回到操作744，並再次進行整個過程。必須注意的是，當讀取與寫入操作跟隨相同基本序列時，它們會及時歪斜大約一個或一半RAM緩衝器，如先前所提及。第38圖繪示的是依照本發明一較佳實施例之用在視頻標度應用中之同步器758的輪廓圖。輸入源產生一 8位元寬輸入資料串760給同步器758。輸入資料串760係以具有48MHz(C2)平均資料率之732MHz(Cl)時脈率運轉。使用三個8位元寬乘以丨6元件深之RAM緩衝器762、764與 766 ^ WCL單元768產生三個RAM寫入致能信號與一 4位元RAM位址。當輸入資料埠上之有效像素資料是可用時，視頻標度 52-J This paper size applies the Chinese national standard (CNS > A4 size (2) 0 X 297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 5 i 26pifl, doc / 002449999 V. The description of the invention (M) is performed 558. Operation 558 evaluates whether the sum of c (k) and F is outside the limits of the left and right sides of the coefficient, in other words c (kl) and c (k + l). k + l) and c (kl) 2c (k) gc (k + l). If any equation is true, the coefficient c (k) is set equal to C (k) + F in operation 564 without Will cause a discontinuity. Therefore, successfully leave operation 546. If any of the equations is wrong, iteratively execute a loop in operation 560. Operation 560 increases the loop iteration variable to evaluate the next coefficient. Operation 562 asks set ( Whether all the coefficients in i) have been evaluated. If all the coefficients in Set (i) have not been evaluated, then control will return to the top of operation 548 and repeat the steps for the next coefficient. If the coefficients in set (i) All coefficients have been evaluated, the coefficient setting cannot be quantized to the η-bit, and there is no need to cause unacceptable discontinuities to The coefficient is being set. Therefore, in operation 566, η is incremented and leaves operation 546. Control then returns to operation 534 (Figure 25) of method 526, whose initial coefficient is quantized to the new value of η, In the case that operation 546 successfully exits, control returns to operation 534 of method 526 (Figure 25) and evaluates the next coefficient set (i). The two-size chip architecture 50 and the addressing of Figure 4 The sorting FIFOs 90 will be discussed in detail below, and please refer to Figs. 27-33. Fig. 27 shows a schematic diagram of a video frame 600 according to a preferred embodiment of the present invention, which passes through a corresponding number of scan lines. 604, which is subdivided into a number of vertical cuts 602 as a cut scan sequence. Each cut 602 is scanned in a format similar to that used in a conventional raster scan sequence, and when the end of the provided cut arrives, The scanning sequence proceeds to the accompanying cutting. The advantage of this format is that 1 ----------— II ^ > — — — 11 —-- ^ i {Please read the precautions on the back before (Fill in this page) The paper size is applicable to the national standard (CNS) A4 (210 X 297 mm) 5 I 2 6 pif 1. Doc / Ο Ο 2 4 49 99 9 A7 _ — _ B7__ 5. Description of the invention (make dumping slightly equivalent to vertical cutting) The quantity factor can reduce the length of the line memory. Line memories are still needed, but currently they are much shorter than in the past, resulting in a significant reduction in on-chip memory requirements. However, it is more difficult to do this. "Scanning of tissue takes place. First, it is often the case that both horizontal and vertical processing must be performed simultaneously. The problem with this result on the left and right clipping boundaries is that horizontal pixel data outside the clipping may not be applicable. The second * traditional raster scan sequence will be changed, resulting in the opposite level of general video source and display / storage components. These problems are discussed below and can be solved by the present invention. Fig. 28 shows a simplified example of the cutting center portion 606, which has a problem of invalid data on the left edge 608 and the right edge 610 thereof. For the purpose of this figure, invalid data is only shown on the left edge of Figure 28. Video processing requires horizontal and vertical orientation, and information surrounding a provided pixel is available (in the case of 5x5 matrices 612 and 614 at the center of the pixel). The center of the cutting center portion 606 has a processing matrix 612 'because it can be used to process horizontal and vertical directions on all sides of the matrix 612, so there is no problem of valid data. In the case of cutting the top edge 618 and the bottom edge 620 of the central portion 606, the data above the top pixel and the data above the bottom pixel are unavailable ', which is equivalent to the conventional raster scan format. There are several ways to solve this situation ', such as replacing zero data with pixel data that does not exist in higher / lower pixels. Therefore, the top and bottom edges 618 and 620 of the 'cut center portion 606 will not have the problem of invalid data. Conversely, the processing matrix 614 is located at the left edge 608 of the cutting center portion 606, and is horizontally adjacent to the data. Therefore, the two rows of ’pixel data 616 are omitted. 43 This paper size applies to China National Standard (CNS) A4 specifications < 210 X 297 public love) I — — — — — — — ^ i —---- Order! — &Quot; (Please read the note on the back before filling this page) 5 126pin.doc / 0 () 24 49 99 9 A7 Printed by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs B7______ 5. Description of the invention (孓 () This It is because it is located outside the left edge 608 of the cutting center portion 606. To resolve this situation, the data of these rows is immediately provided from the cutting to the left of the cutting for processing. Figure 29 shows a cutting 622 Along the left and right edges 608 and 610, a pair of thin vertical cuts or "screens" 624 are included. The screens 624 are attached to the cut center portion 606 'to provide the pixel data needed to process the matrix. The screens 626 are Attached to the right edge 610 of the cut center portion 606. Because the screen 624 is attached to the cut 622 'processing matrix 614 no longer suffers from a lack of data outside the left edge 608 of the cut 622 ° Figure 30 shows overlapping cuts Schematic diagram of the entire structure of the cut / screen combination 628. The cut 622 shown in Figure 29 is used as an example cut. The screens 624 and 626 of the cut 622 are composed of data from a pair of adjacent cuts. , To the left of cutting 622, one to the right of cutting 622. More specifically, The missing two left rows of pixels in the screen 624 are provided directly from the rightmost row 630 of the clip 632 to the left of the clip 622. Thus, in the sequence of the clip 634, the leftmost screen of the clip N overlaps Cut the center part of N-1 'and the rightmost screen of N-1 overlaps and cut the center part of N. Figure 31 shows the flow 636 of a method for processing video according to a preferred embodiment of the present invention. Fig. The input of the video processing block is a cutting 622 with a cutting center portion 606, a left screen 624 and a right screen 626. The left screen 624 is divided into a left outer screen 638 and a left inner screen 640. The right screen wing 626 is divided into a right outer screen 644 and a left inner screen 642. In this example, the video processing block has a multi-processing platform, and each processing platform requires horizontal pixels on each side of the center. -II III, ^ i —, --- — Order --------< Please read the notes on the back before filling out this page) This paper size is applicable to China National Standard (CNS > A4 Specification (210 X 297 mm) Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5 I 2 6 pi Π. D 〇c · Ο Ο 24 Q 9 9 V. Description of the invention (from > Method 636 uses a first processing platform 646 and a second processing platform 650. The first processing platform 646 is used to remove the external screens 638 and 044, leaving the central portion of the cutting 606. One of the internal screens 640 and 642 is output cut 648. The second processing platform 65 is used to remove the internal screens 640 and 642. Therefore, the screens 624 and 626 are effectively removed during this processing, and the output of the processing block is a cut 652 having a width equivalent to the initial cut center portion 606. One of the effects of the screen wings 624 and 626 is that the width of the screen wings 624 and 626 will increase the cut line memory requirements on the chip. However, the screen width is generally less relevant to the entire cutting width. The actual cutting and screen width are performed independently, and it is based on processing requirements and available external memory bandwidth. A preferred embodiment of the present invention utilizes three vertical video processing blocks. The first processing platform 646 requires a pair of external screen wings 638 and 644 to have a width of 2 pixels: the second processing platform 650 requires a pair of internal screen wings 640 and 642 to have a width of 4 pixels; and the third processing platform 650 requires no screen wings As a designated processing interpretation, it is not required that the data be processed horizontally into vertical data. Select the width of the cut center part to be 36 pixels, resulting in a 48 pixel initial input cut width (center part + left-internal-screen wing + right-internal-screen wing + left-external-screen wing + right-external- Wing = 36 + 4 + 4 + 2 + 2 = 48). It is regrettable that the data input and output of the vertical processing block is not in the raster scan video format. It is standard for virtually all video input sources and video output displays and storage components. The present invention includes a standard input / output format conversion, which uses I't -------- t _! ---- (Please read the notes on the back before filling in (This page) This paper size is in accordance with Chinese National Standard (CNS) A4 (210x 297 mm) 5 1 26pifi, doc ^ K) 2 449 99 9 A7 B7 Printed by Shelley Consumer Cooperative, Intellectual Property Bureau, Ministry of Economic Affairs SUMMARY OF THE INVENTION (★}) is completed. The reason for using a commodity dram memory element is price and availability. Depending on the type of video processing, the field or frame size buffer provides other necessary purposes than the conversion between full field / frame raster scan and crop scan format. For example, the de-interlacing process generally requires one (sometimes several) field buffers to store multiple fields of video data during short-term processing. The buffer also needs frame rate conversion, where the output frame rate is different from the input rate; in the case of multiple output fields or frame buffers, a frame rate conversion process may be required. Figure 32 shows the system schematic of the basic video processor 654. A first input buffer 656 ', a second input buffer 658, a first output buffer 660, and a table one output buffer 662 are used as the cutting conversion process. Because video applications generally require real-time input and output, and because the scanning processes of conventional raster scanning and cropping scanning are different, the first input buffer 656 is used to store the video input data string from the input data formatter 664. A second input buffer 658 (instead of the previous field / frame period) is used in the cropped scan format 'to provide data to the vertical video processing section 666. A similar process is used as output. When the first output buffer 660 (instead of the previous field / frame period) is used to output data to the output data formatter 668 in the traditional raster scan format, the second output buffer 662 receives the data from the cropped scan format. Processed data in vertical video processing section 666. The output data string can actually provide data to an additional video processing platform, which only processes data in the horizontal direction (such as horizontal scanning and color space conversion). ! —! * ^ · Ί1 --- f Order --I ------ (Please read the notes on the back before filling in this S) The paper size applies to China National Standard (CNS) A4 (210 X 297 mm) Printed by 449 99 9 5126ρίΠ- < 1〇 (;, · 〇ϋ2 Α7 _ Β7_ _) V. Invention Description (Lin) Figure 33 shows the video processing chip architecture 670. An example system diagram. The video processing chip architecture 670 includes a video processor 672 and an external memory source 674. Under this special video processing execution, multi-input field storage (transient processing) is required. Video data is provided To one of the video processors 672 into the input platform 676 to directly add redundant screen data to the video data string. This data will then be 'in the raster scan sequence' via the memory controller 680 located in the video processor 672, It is written (including the screen) to the first field memory buffer 678 of the external memory source 674. In the accompanying field cycle, the data will be sequentially written to a second field memory buffer. 682, a third field memory buffer 6 84, and a fourth 686 field memory buffer. The data will then be read from the second 'third and fourth field memory buffers 682, 684, and 686', which are all located in external memory The source 674 is connected in parallel. The field buffers 682, 684, and 686 are provided to the vertical video processing section 688 located in the video processor 6U. The data is processed in the vertical video processing section 688 'to remove the screen wings. The data will be written to the first frame buffer area 690, one of the external memory sources 674, from the vertical video processing section in the cut-and-scan format. The data will be from the external memory sources in the traditional raster scan sequence One of 674 is read in the second frame buffer area 692 'for input to a horizontal processing block 694 located in the video processor 672. The output of the horizontal processing block 694 is in a raster scan format' and is a video The output of the processor 672. In a preferred embodiment of the present invention, the 'video input data is used as a < please read the precautions on the back before filling this page) ------ 'r \ · This paper size applies to Chinese national standards (CNS) A4 specifications (210 X 297 mm) 4 Η ^ 4 Η ^ Printed by the Shelley Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5 J 2 6 ρ i fl. Do cϋ Ο 2 A7 I_______B7____ 5. Description of the invention (720x240 Interlaced fields of data in pixel format. Each video field enters a 20-cut with a width of 36 pixels, each with a left and right screen of 6 pixels (a 2-pixel outer screen and a 4-pixel inner screen) Wings). The screen is attached to the appropriate point in the video input data string, and the resulting data string is rasterized and written to a first field buffer in an external SDRAM. The three data fields are read synchronously from the SDRAM. These field data can be obtained from the second, third, and fourth field buffers, and read in a vertical crop of 48 pixels wide (the center of the crop and the wings) multiplied by 240 columns. This data is processed by a first vertical processing platform, which provides data in a cut-and-scan format with twice the input rate of a single field to a second platform. The cut data input to the second platform will be formatted as 44 pixels wide by 480 columns (due to the rate-doubling action of the first platform). The second vertical processing platform processes the data and provides 36 pixels wide cropped scan format data of the same ratio as the input of the third vertical processing platform. The third platform is a vertical scaler, which performs non-horizontal processing, so there is no need to cut the screens on the format data. The data is output in a 36-pixel wide crop scan format from the third processing platform to the first frame buffer area of the SDRAM. The number of columns per cut is selected according to the specified vertical scale ratio. The data is input to a horizontal single processing platform in the traditional raster scan format of 72 × 480 * M pixels. Among them, the vertical scaling factor of the third vertical processing platform. This data is processed by a horizontal processor (which includes a horizontal scaler) and outputs a resolution of 72 ** 480 * N in a traditional raster scan format, where N is the horizontal scale factor. In general, due to the cut-and-scan architecture, this execution result will be on the chip II II! '-1 ------- I ^ — — — — — — (Please read the precautions on the back before filling this page ) This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 public review) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economy 449 99 9 5 1 2 ί pi Π. D ο c / 〇〇2 V. Invention Explanation (The above memory requirements result in a reduction of more than 10 times. This cost savings in chip memory reduction is greater than compensation for additional requirements of external memory, and provides a variety of prototypes and product options ° Video output processing in Figure 4 The device 60 will be described in detail in Figures 34-38. Figure 34 shows a block diagram of an asynchronous interface 700 according to a preferred embodiment of the present invention. The data source 702 provides data synchronized with the clock C1 at the input The data string 704 is sent to the synchronizer 705. Once the data is received by the synchronizer 705, the write control logic (WCL) unit 706 guides the writing by providing control and address signals to each of the RAM buffers 708, 710, and 712. Enter data into the first RAM buffer One of the buffer 708, the second RAM buffer 710, and the third RAM buffer 712. Once the data is written into the RAM buffers, 710 and 712, the read control logic (RCL) unit 714 provides the address and control signals to The RAM buffers 708 '710 and 712 guide the read data from the RAM buffers 708, 710, and 712. This retrieved data is then output from the synchronizer 705 of the continuous output data string 716 at the clock rate C2 to Data destination 718 ° Read data provided from RAM buffers 708, 710, or 712 will not start until a specific RAM buffer, 71 or 712 is filled with WCL units. In RAM buffer 708, 710, or 712 Once full, the next RAM buffer 708, 710, or 712 will be written sequentially and data can be read from the previously full RAM buffer, 710, and / or 712. Although this particular embodiment uses three A RAM buffer is used for illustration, but more RAM buffers can be used according to the system requirements. Synchronization logic unit 720 externally coordinates the synchronization of reading and writing data. 49 This paper is applicable to China Standard 8 (CNS) A4. Specifications (210 * 297 public love) -n ϋ n »n · 1 · * f— n J a— nnn E > n I a (Please read the notes on the back before filling out this page) Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 4 49 99 9 5 1 26ριΠ d〇c / 002 ^ B7 V. Description of the invention (called ). 705. Optionally, the synchronization logic 720 may be part of the Synchronizer 705. Multiple synchronization schemes can be implemented. For example, 'when a data transfer is initiated, the synchronization logic 720 may direct the WCL unit 706 and the data source 702. After a predetermined period has elapsed, when the first RAM buffer 708 is full and the second RAM buffer 710 is full, the synchronization logic 720 instructs the RCL unit 714 to start reading data from the first RAM buffer 708 'and Provide it to the data destination 718. An alternative is that the data can be transferred more or less freely. The WCL unit 706 receives the data from the data source 702 and writes this data to the next available RAM buffer 708, 710, or 712, and instructs the RCL unit 714 to make each buffer full. The "bufferfuU" signal must be synchronized in the C1 to C2 time domain, usually through a two-bit synchronizer. The RCL unit 714 can latch the "buffer full" state or send back a handshake signal (which must be synchronized to the C2 to C1 time domain) to the WCL unit 706 'to indicate that the "buffer is full, and the signal is The receive or RAM buffers 708, 710, or 712 are empty. Figure 35 shows a block diagram of an alternate asynchronous interface 722. Data transfer starts via an external signal to WCL unit 724, which represents the start of data transfer. WCL 724 is synchronized with clock C1, and is used to generate write enable and address to the first RAM RAM buffer 726, the second RAM RAM buffer 728, and the third RAM RAM buffer 730. The RAM RAM buffer 726, 728, and 730 have synchronous write and asynchronous read performance. Only one single write enable is active at any time. The write enable of RAM buffer 726 is the first claim, and then RAK1 buffer 728. ， The standard of this paper is applicable to the standard of hard-to-find families (CNS > A4 specification (210 * 297 mm) ^ installed ------ *-order --------- in ^ (Please read the back first Please fill in this page before printing) Printed by Shelley Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economy 4 49 99 9 5 1 2 6 pi fl. D 〇c / Ο Ο 2 A7 _________B7 _ V. Description of the invention (< (:?) _ followed by RAM buffer 730, then back to RAM buffer 726, and then as before. In RAM buffer 728 is full and RAM buffer 73 ° is about half full. The external signal is asserted to the RCL unit 732 to start reading the data in the RAM buffers 726 '728 and 730. The RCL unit 732 is synchronized to the clock C2 to generate the address and The data selection line is used for read operations of the RAM buffers 726, 728, and 730. The individual RAM buffers 726, 728, and 730 receive a read or write based on the current write status of the RAM buffers 7%, 728, or 730. Address, in other words, when the other two RAM buffers 726, 728, and 730 receive their address from the RCL unit 732, a RAM buffer 726 '728 or 730 is written to receive its address from the WCL unit 724. Data MUX 734 is controlled by the RCL unit 732 and is used to select the output data string from one of the three RAMs currently being read. Although in this example, an external signal starts data transfer read and write operations, one can select synchronization Logic unit 736 may exist on one or more external "start" letters The lack of it. Figure 36 shows a schematic diagram of the 3_buffer synchronizer sequence 738, the layout of which is related to the read and write operations of the 3 RAM buffer. The level synchronization clock delays the actual time buffer sequence skew (Skew) 739 provides about one half of the RAM buffer separation level collision one buffer, which is between read and write operations of the same RAM buffer that occur at the same time. This buffer absorbs the errors of the “start writing” and “start reading” commands, changes in the input data string during data suspension, and synchronization delays and / or compensated timing deviations between the two time domains. Figure 37 shows a Chinese paper standard (CNS > A4 specification (2J〇x297)) according to a preferred embodiment of the present invention for paper size application. {Please read the note on the back ^. (Fill this page) Order: -r 449 99 9 5 \ 2όρΐΠ .doc / 002 A7 Printed by the Consumers' Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs " V. Description of the invention (0) Method 740 through the RAM address and module arrangement Illustration. The method 740 starts at operation 742 and sets the ram address of the read and write operations to 0, as if selecting a RAM buffer. Then 'operation 744 asks whether the data is valid. If the answer is negative (N) ', operation 744 is repeated until the data is valid. If the answer is yes (Y), the method 740 proceeds to operation 746, which asks if there is a variable called EndCnt equal to one. If the answer is yes (Y) ', then the last RAM module has arrived and the operation 748 increment is performed to select the next RAM module before performing operation 75Ό. If the answer is no (N), the 750 increment RAM address is operated. The method 740 then proceeds to operation 752 to confirm whether the last RAM address has been reached. If it arrives, EndCnt is set equal to 1 in operation 754. If the last RAM address has not been reached, EndCnt is set equal to 0 in operation 756. After operations 754 and 756, method 740 returns to operation 744, and the entire process is performed again. It must be noted that when read and write operations follow the same basic sequence, they skew in time about one or half of the RAM buffer, as mentioned earlier. FIG. 38 shows an outline diagram of a synchronizer 758 used in a video scaling application according to a preferred embodiment of the present invention. The input source generates an 8-bit wide input data string 760 to the synchronizer 758. The input data string 760 operates at a 732 MHz (Cl) clock rate with an average data rate of 48 MHz (C2). Three RAM buffers 762, 764, and 766 ^ WCL units 768 that are three 8-bits wide and 6-elements deep are used to generate three RAM write enable signals and a 4-bit RAM address. Video scale 52 when valid pixel data is available on the input data port

本紙張尺度適用中國國家標準（CNS)A4規格（210x297公爱〉經濟部智慧財產局員工消费合作社印製 449 99 9 5 Ϊ 26nifl .cioc/0C)2 A7 ______B7____ 五、發明說明（%) 會產生一，，資料有效”信號a當此埠中之資料是有效時’其會被寫入到RAM緩衝器762、764與766中。WCL單元768 執行此寫入操作如上所述。WCL單元768係由從〇計數至 15並產生RAM位址之一第一計數器770,以及從〇.計數至 2並產生RAM選擇/寫入致能線之一第二計數器772(一環狀計數器)所組成。在大約一個及一半RAM緩衝器被塡滿時’一外部信號會被接收，以指出須開始資料輸出。RCL單元774接著開始產生一連續之位址至RAM緩衝器762、764與766中，以便在WCL單元768的控制下，獲得先前寫入之資料。RCL 單元774也包括從0計數至15並產生RAM位址之一第三計數器776，以及從0計數至2並透過MUX 780產生RAM 資料輸出之一第四計數器778 ^ 當其提供真實時間資料串用以光栅掃描顯示’ MUX 780產生一連續之輸出資料串7S2。視頻資料之每一掃描線是8位元元件長，以及此長度之連續資料串必須是由每一輸出掃描線來產生。同步器電路中之邏輯獲得水平掃描線之末端，並在線末端重設WCL單元768與RCL單元774，以準備下一視頻資料線。雖然本發明已以較佳實施例揭露如上，然其並非用以限定本發明，任何熟習此技藝者，在不脫離本發明之精神和範圍內，當可作各種之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者爲準。 (請先閱讀背面之注意事項再填窝本頁)This paper size applies the Chinese National Standard (CNS) A4 specification (210x297 Public Love) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 449 99 9 5 Ϊ 26nifl .cioc / 0C) 2 A7 ______B7____ 5. Description of the invention (%) will produce First, the data is valid "signal a, when the data in this port is valid, it will be written into the RAM buffers 762, 764, and 766. The WCL unit 768 performs this write operation as described above. The WCL unit 768 is It consists of a first counter 770 that counts from 0 to 15 and generates a RAM address, and a second counter 772 (a ring counter) that counts from 0 to 2 and generates a RAM select / write enable line. When about one and half of the RAM buffer is full, an external signal will be received to indicate that data output must start. The RCL unit 774 then begins to generate a continuous address into the RAM buffers 762, 764, and 766, so that Under the control of WCL unit 768, the previously written data is obtained. RCL unit 774 also includes a third counter 776 that counts from 0 to 15 and generates a RAM address, and counts from 0 to 2 and generates RAM data through MUX 780 Output one of the fourth counter 7 78 ^ When it provides a real-time data string for raster scan display 'MUX 780 generates a continuous output data string 7S2. Each scan line of video data is 8-bit element long, and a continuous data string of this length must be composed of Each output scan line is generated. The logic in the synchronizer circuit obtains the end of the horizontal scan line, and resets the WCL unit 768 and RCL unit 774 at the end of the line to prepare the next video data line. Although the present invention has been better implemented The example is disclosed as above, but it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. What is defined by the scope of patent application shall prevail (Please read the notes on the back before filling in this page)

- I 1 I I-I 1 I I

本紙張尺度適用中國國家標準<CNS)A4規格（21〇 x 297公釐This paper size applies Chinese National Standard < CNS) A4 size (21 × 297 mm)

Claims

449 99 9 A8 5 1 26pifl .doc/D〇2 B8 ___s_ 六、申請專利範圍 1. 一種數位影像增強器，包括：一解交錯處理器裝置，接收一交錯視頻串，該解交錯處理器裝置包括一第一解交錯器與一第二解交錯器，並提供一解交錯視頻串；以及 · 一視頻輸出處理器裝置，接收該解交錯視頻串，以提供一標度、解交錯視頻串。 2. 如申請專利範圍第〗項所述之數位影像增強器，其中該第一解交錯器用以分析該交錯視頻串之累進圖框，以確認一最初來源型式及用於該交錯視頻串之序列。 3. 如申請專利範圍第2項所述之數位影像增強器，其中該第一解交錯器更包括使用一轉換過程，並依據該最初來源型式及該序列之該偵測，將該交錯視頻串轉換成一解交錯視頻串。 4. 如申請專利範圍第1項所述之數位影像增強器，其中該第二解交錯器用以減少經由該交錯視頻串之一頻率分析偵測到之動作失真。 5. 如申請專利範圍第1項所述之數位影像增強器，其中該第二解交錯器用以偵測對角線特徵及使該偵測對角線特徵平滑。 6. 如申請專利範圍第1項所述之數位影像增強器，其中該解交錯處理器裝置處理垂直截割中之該解交錯視頻串° 7. 如申請專利範圍第1項所述之數位影像增強器，其中該視頻輸出處理器裝置用以調整該解交錯視頻串，以修正一視頻輸出串之一視頻顯示輸出格式。 ί請先閲讀背面之注<1^項再填寫本頁) . - 装------— —訂 i — —！！線經濟部智慧財產局員工消費合作社印製本紙張尺度適用中國國家標準（CNS>A4規格（210 * 297公釐）經濟部智慧財產局員工消費合作社印製 449 99 9 AS 5 1 26pit'l .dot/002 BS C-o D8 六、申請專利範圍 8. 如申請專利範圍第]項所述之數位影像增強器，其中該視頻輸出處理器裝置包括一資料率同步器，介於該解交錯視頻串之一第一資料率與一視頻輸出串之一第二資料率之間。〜 9. 一種數位影像增強器，包括：一解交錯處理器，用以接收一交錯視頻串，並提供一解交錯視頻串；以及一視頻輸出處理器，接收該解交錯處理器之輸出’其中該解交錯處理器處理垂直截割中之該交錯視頻串’以提烘一標度'解交錯視頻串。 10. 如申請專利範圍第9項所述之數位影像增強器’其中該解交錯處理器用以分析該交錯視頻串之累進圖框’以確認一最初來源型式及用於該交錯視頻串之序列。 11. 如申請專利範圍第10項所述之數位影像增強器’其中該解交錯處理器更包括使用一轉換過程，並依據該最初來源型式及序列之該偵測，將該交錯視頻串轉換成一解交錯視頻串。 12. 如申請專利範圍第9項所述之數位影像增強器’其中該解交錯處理器用以減少經由該交錯視頻串之一頻率分析偵測到之動作失真。 13. 如申請專利範圍第9項所述之數位影像增強器’其中該解交錯處理器用以偵測對角線特徵及使該偵測對角線特徵平滑。 14. 如申請專利範圍第9項所述之數位影像增強器’其 1 ---------------11^ (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐）經濟部智慧財產局員工消費合作社印製 449 99 9 512eP,nd〇c,aoa έ88 C8 __D8 六、申請專利範圍中該視頻輸出處理器用以調整該解交錯視頻串，以修正一視頻輸出串之一視頻顯示輸出格式^ 15.如申請專利範圍第9項所述之數位影像增強器，其中該視頻輸出處理器包括一資料率同步器，介於該解交錯視頻串之一第一資料率與一視頻輸出串之一第二資料率之間。 16.—種可攜式DVD播放機，包括：一槪略薄稜柱圍繞物，具有一第一主表面、從該第一主表面分離之一第二主表面，以及側面連接該第一主表面及該第二主表面，其中至少一部分之該第一主表面包括一視頻顯示器’以及其中該圍繞物包括一DVD進入埠，其可使一DVD被***該圍繞物中；以及一數位處理系統，包括一解碼器、一影像增強裝置及一顯示控制器，其中該解碼器接收來自被***該圍繞物中之一DVD的信號，以提供一解碼、交錯視華信號，該影像增強裝置轉換該交錯視頻信號成一解交錯視頻信號，以及該顯示控制器使用該解交錯視頻信號以提供累進掃描視頻於該視頻顯示器上。如申請專利範圍第〗6項所述之可攜式DVD播放機’其中該數位處理系統包括一微處理器，用以提供控制信號至該解碼器、該影像增強裝置及該顯示控制器中。 18.如申請專利範圍第16項所述之可攜式DVD播放機’更包括一DVD傳送機構，結合該DVD進入埠於該圍繞物。 56 裒--------訂--------線 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4規格（21〇 X 2耵公釐） 449 99 9 5 I26pifl .ctoc/002 B8 C8 D8449 99 9 A8 5 1 26pifl .doc / D〇2 B8 ___s_ VI. Patent application scope 1. A digital image enhancer comprising: a de-interlacing processor device for receiving an interlaced video string, the de-interlacing processor device includes A first deinterleaver and a second deinterleaver, and providing a deinterlaced video string; and a video output processor device receiving the deinterlaced video string to provide a scaled, deinterlaced video string. 2. The digital image enhancer as described in the scope of the patent application, wherein the first deinterleaver is used to analyze a progressive frame of the interlaced video string to confirm an original source type and a sequence used for the interlaced video string . 3. The digital image enhancer as described in item 2 of the scope of patent application, wherein the first deinterleaver further comprises using a conversion process and the interlaced video string according to the original source type and the detection of the sequence. Convert to a deinterlaced video string. 4. The digital image enhancer according to item 1 of the patent application scope, wherein the second deinterleaver is used to reduce motion distortion detected by a frequency analysis of the interlaced video string. 5. The digital image enhancer according to item 1 of the scope of patent application, wherein the second deinterleaver is used to detect diagonal features and smooth the detected diagonal features. 6. The digital image enhancer as described in item 1 of the scope of patent application, wherein the de-interlacing processor device processes the de-interlaced video string in vertical cut ° 7. The digital image as described in item 1 of the scope of patent application An enhancer, wherein the video output processor device is used to adjust the deinterlaced video string to modify a video display output format of a video output string. (Please read the note on the back &1; and then fill out this page).-Install ------- —Order i — —! !! Printed on the paper by the Consumers ’Cooperative of the Intellectual Property Bureau of the Ministry of Online Economics. The paper is printed in accordance with Chinese national standards (CNS> A4 size (210 * 297 mm)) and printed by the Consumers’ Cooperative of the Intellectual Property Bureau of the Ministry of Economy. 449 99 9 AS 5 1 26pit'l. dot / 002 BS Co D8 6. Application for Patent Scope 8. The digital image enhancer as described in item [Scope of Application for Patent], wherein the video output processor device includes a data rate synchronizer, located between the deinterlaced video string Between a first data rate and a second data rate of a video output string. ~ 9. A digital image enhancer comprising: a deinterlacing processor for receiving an interlaced video string and providing a deinterlaced video And a video output processor that receives the output of the de-interlacing processor 'wherein the de-interlacing processor processes the interlaced video string in a vertical cut' to improve a scale to de-interlaced video string. 10. Such as The digital image enhancer described in item 9 of the scope of patent application 'wherein the de-interlacing processor is used to analyze the progressive frame of the interlaced video string' to confirm an original source type And the sequence used for the interlaced video string. 11. The digital image enhancer as described in item 10 of the patent application scope, wherein the de-interlacing processor further includes using a conversion process and according to the original source type and sequence of the Detecting, converting the interlaced video string into a deinterlaced video string. 12. The digital image enhancer as described in item 9 of the patent application scope, wherein the deinterlacing processor is configured to reduce the frequency analysis and detection through one of the interlaced video strings. Measured motion distortion. 13. The digital image enhancer as described in item 9 of the scope of patent application, wherein the de-interlacing processor is used to detect diagonal features and smooth the detected diagonal features. 14. Such as Digital image intensifier described in item 9 of the scope of patent application 'its 1 --------------- 11 ^ (Please read the precautions on the back before filling this page) This paper size applies China National Standard (CNS) A4 (210 X 297 mm) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 449 99 9 512eP, nd〇c, aoa rudder 88 C8 __D8 6. In the scope of patent application, the video output processor is used to Tune The de-interlaced video string is used to modify a video display output format of a video output string ^ 15. The digital image enhancer as described in item 9 of the patent application scope, wherein the video output processor includes a data rate synchronizer, an interface Between a first data rate of the de-interlaced video string and a second data rate of a video output string. 16. A portable DVD player includes: a slightly thin prism surround with a first A main surface, a second main surface separated from the first main surface, and side surfaces connecting the first main surface and the second main surface, at least a portion of the first main surface including a video display 'and wherein The enclosure includes a DVD access port that enables a DVD to be inserted into the enclosure; and a digital processing system including a decoder, an image enhancement device, and a display controller, wherein the decoder receives information from the inserted Surrounds the signal of one DVD to provide a decoded, interlaced video signal, the image enhancement device converts the interlaced video signal into a deinterlaced video signal, and the display The deinterlacing video controller to provide a progressive scan video signal on the video display. According to the portable DVD player described in item 6 of the patent application scope, wherein the digital processing system includes a microprocessor for providing a control signal to the decoder, the image enhancement device, and the display controller. 18. The portable DVD player 'according to item 16 of the scope of patent application, further comprising a DVD transmission mechanism, which combines the DVD access port with the enclosure. 56 裒 -------- Order -------- line (please read the notes on the back before filling this page) This paper size is applicable to China National Standard (CNS) A4 specification (21〇X 2耵 mm) 449 99 9 5 I26pifl .ctoc / 002 B8 C8 D8

經濟部智慧財產局員工消費合作社印製夂、申請專利範圍 19. 如申請專利範圍第18項所述之可攜式DVD播放機，其中該DVD傳送機構包括一托盤，從一側面延伸出，用以負載與卸載一 DVD，其可縮回至該圍繞物中以播放該 DVD。 20. 如申請專利範圍第16項所述之可攜式DVD播放機，更包括一紅外線埠，結合該圍繞物，並耦接至該數位處理系統。 21. 如申請專利範圍第20項所述之可攜式DVD播放機，更包括一紅外線遠端控制，經由該紅外線埠提供控制命令至該DVD播放機中。 22. 如申請專利範圍第16項所述之可攜式DVD播放機，更包括一平台站，耦接至一視頻監視器，其中該平台站包括一平台埠，接收至少一部分之該圍繞物。 23. 如申請專利範圍第16項所述之可攜式DVD播放機，更包括震盪隔離裝置，用以減少物質撞擊到該圍繞物之影響。 24. —種處理數位視頻的方法，包括：經由至少一數量之解交錯方法之一，解交錯一交錯視頻串，以產生一解交錯視頻串；以及調整該解交錯視頻串。 25. 如申請專利範圍第24項所述之處理數位視頻的方法，其中該解交錯方法包括至少一最初來源偵測方法、一對角線特徵偵測方法及一動作失寘偵測方法之一。 26. 如申請專利範圍第24項所述之處理數位視頻的方 57 本紙張尺度適用中國國家標準（CNS)A4規格（210 X297公复〉 ^裝—-----訂！ — -破 Ί {猜先Μ讀背面之沒意事項再填寫本頁) 449 99 9 5 I 26pifl doc 002 A8B8C8D8 六、申請專利範圍法’其中該解交錯方法包括處理垂直截割中之該交錯視頻串。 27.如申請專利範圍第24項所述之處理數位視頻的方法，其中該調整包括該解交錯視頻串之一水平調整-。 2 S.如申請專利範圍第2 4項所述之處理數位視頻的方法，其中該調整包括一資料率同步器，介於該解交錯視頻串之一第一資料率與一視頻輸出串之一第二資料率之間。 (請先閱頜背面之注意事項再填寫本頁) 裝--------訂-------!線經濟部智慧財產局員工消费合作社印製本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐)Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs, patent application scope 19. The portable DVD player described in item 18 of the scope of patent application, wherein the DVD transfer mechanism includes a tray extending from one side, using Load and unload a DVD, which can be retracted into the enclosure to play the DVD. 20. The portable DVD player described in item 16 of the scope of patent application, further includes an infrared port, combined with the surroundings, and coupled to the digital processing system. 21. The portable DVD player according to item 20 of the patent application scope further includes an infrared remote control, and provides a control command to the DVD player through the infrared port. 22. The portable DVD player according to item 16 of the scope of patent application, further comprising a platform station coupled to a video monitor, wherein the platform station includes a platform port to receive at least a portion of the enclosure. 23. The portable DVD player described in item 16 of the scope of patent application, further includes a vibration isolation device to reduce the impact of a substance hitting the surrounding object. 24. A method for processing digital video, comprising: deinterleaving an interlaced video string to generate a deinterlaced video string through at least one of a number of deinterlacing methods; and adjusting the deinterlaced video string. 25. The method for processing digital video as described in item 24 of the patent application scope, wherein the de-interlacing method includes at least one of an original source detection method, a diagonal feature detection method, and a motion loss detection method . 26. The method of processing digital video as described in item 24 of the scope of patent application 57 This paper size applies to the Chinese National Standard (CNS) A4 specification (210 X297 public reply) ^ Install —----- Order! — -Break [Guess to read the unintentional matter on the back before filling in this page.] 449 99 9 5 I 26pifl doc 002 A8B8C8D8 6. Application for Patent Scope Method 'The de-interlacing method includes processing the interlaced video string in vertical cutting. 27. The method for processing digital video as described in item 24 of the scope of patent application, wherein the adjustment includes a level adjustment of one of the de-interlaced video strings. 2 S. The method for processing digital video as described in item 24 of the scope of patent application, wherein the adjustment includes a data rate synchronizer between one of the first data rate of the deinterlaced video string and one of a video output string The second data rate is between. (Please read the precautions on the back of the jaw before filling out this page) Packing -------- Order -------! Printed on paper scales applicable to Chinese national standards (CNS) A4 size (210 X 297 mm)