4482 4 〇 C7 D7 五、創作説明（/ ) 一、本發明「半導體晶圓回收再生之方法」其主要是將 已使用過的半導體晶圓片，翻新至原來未使用前之原來狀 況’以供再次使用的新方法，利用化學機械硏磨法（CMP)以及 晶圓片之洗刷過程’運用聚乙烯醋酸（PVA)刷洗來洗刷而恢復 已使用過的半導體晶圓的品質’以便晶圓之回收再用者。 按’近幾十年來，全球半導體積體電路（IC)工業，無疑快 速發展，全世界每年需要製造半導體器件不計其數，使用半 導體晶圓之數量非常巨大，其中除了在用於製造1(:成品之晶 圓片以外，需要更多的測試晶圓片用在試驗或監視製程，後 者數量約爲每一 1C製造工廠成品之10-15%，假如每月生產晶 圓片成品30,000片，測試用之晶圓片即需3,〇〇〇片左右。然 而，測試晶圓片本身品質對晶圓製造關係重大，因爲晶圓製 造易受操作情況的影響，例如操作溫度、壓力、或濕度，除 此之外，製造設備之校正若稍有偏差，都會影響製造成果， 晶圓半成品（通常25片合成一組）製作時，測試晶圓片必須經 常用來偵察設備，包括是否被塵粒污染，否則倘若污染超過 標準，整批半成品都會報廢必須立即處理，其製程始可繼續， 由於製造設備極度精緻，晶圓製程必須在各別器材測試合格 本紙適用中國ϊϋ準（CNS ) A4現格（2丨〇><2易公* ) (請先閱讀背面之注意事項再填寫本頁) -1 經濟.":廿兑44:5^工;!,|,’^作^印贺 448245 C7 _D7__ 五、創作说明（>") 調整穩定後始可使用，視製程要求，典型的1C製造工廠，每 天每一反應爐，必須一再測試設備以便使用，因此，1C生產 工廠，年需測試晶圓片之量龐大可知。 再者，以往晶圓生產工廠甚少回收已使用過之晶圚片， 通常將之廢棄，原因是晶圓生產利潤豐厚，而新舊晶圓片價 格相差無幾，翻新晶圓片的品質以及翻新技術不足等，無關 理由大部份半導體工業就是不想使用翻新過的晶圓片，可是 現代1C工業近況有重要變化，1C生產利潤一般降低，而晶圓 由611增至8”甚而12”，其成本大增，利用翻新晶圓可大量降 低晶片成本，每一 12M晶圓片較6”晶圓片多容納四倍的晶體， 故丟棄一 12"晶圓片其潛在利潤損失較6”晶圓片達四倍之 多。近幾年來，半導體工業界已開始翻新已用過之晶圓片了， 而翻新技術也有發展，一般而言傳統的技術步驟，首先爲酸 融蝕，再用傳統的硏磨，最後淸洗。酸融蝕法用以淸除晶圓 片上的金屬或氧化物（通常測試用之晶圓片並無元件的印刷 圖案，但有金屬或氧化物或兩者都有），傳統的翻新作業初步 先將晶圓片上的金屬或氧化物溶蝕，方法是把晶圓片浸入注 滿酸的化學溶液槽內，或把化學藥品滴在晶圓片上，使其溶 ---J---- 本紙張尺度適用中困國家揉率（CNS ) A私見格（210X297公釐） (請先閲讀背面之注意事項再填寫本頁) ιπ 經."部^"!1|走^4工5,:._-"^印製 44824b C7 D7 五、創作説明ο ) 蝕附著的金屬及氧化物。僅僅以酸來溶蝕氧化物/金屬，其實 是不足澈底翻新已用過的晶圓片，原因是溶蝕後的晶圓片仍 有可觀的雜質（塵粒及表面缺陷），這些雜質可能在矽晶圓的 外表附著深入1-2微米。翻新的晶圓片必須極度淸潔，且絕 無雜質始可。舉例而言，1C製程中設備測試中的一項重要條 件就是塵粒污染度測試，亦即測試附著雜質量或晶圓片的缺 陷。故而測試晶圓片本身必須絕無瑕疵，始可用以測試保證 其結果。否則本身不良的晶片，訊號/雜音比太高，是不可能 用使判斷某設施的淸潔或污染的程度，酸融法雖可淸除晶圓 片上附著的氧化物及金屬，但無法處理仍附有雜質的晶圓 片，無法用來幫助監視1C生產，必須將酸浴過的晶圓片再處 理才可重新作測試之用。 由於上述缺失，通常1C製造廠在酸浴後應用傳統硏磨技 術以淸除雜質或/及磨光晶圓片表面缺損。傳統的硏磨技術， 重要的是以化學性硏磨料slurry，以機械方式硏磨來打光晶 圓片。硏磨時用硏磨墊在硏磨平台上，硏磨晶圓片使其平坦 化，或磨去一層薄膜，一如使用酸浴法，進行中使用去離子 純水流過晶圓片以降溫（硏磨及淸除雜質摩擦生熱）。 本紙張尺度適用中圃困家榡準（CNS > Α4規格（210X2^7公釐^ (請先Μ讀背面之注意Ϋ項再填寫本頁)4482 4 〇C7 D7 V. Creation instructions (/) 1. The "method for recycling semiconductor wafers" in the present invention is mainly to refurbish used semiconductor wafers to the original condition before the original unused ones "for supply New method used again, using chemical mechanical honing method (CMP) and wafer cleaning process 'using polyvinyl acetate (PVA) scrubbing to restore the quality of used semiconductor wafers' for wafer recovery Reuser. According to 'In recent decades, the global semiconductor integrated circuit (IC) industry has undoubtedly developed rapidly. The world needs to manufacture countless semiconductor devices every year, and the number of semiconductor wafers used is very large. In addition to the finished wafers, more test wafers are needed for the test or monitoring process. The number of the latter is about 10-15% of the finished products of each 1C manufacturing plant. If 30,000 wafers are produced monthly, test About 3,000 wafers are used. However, the quality of the test wafer itself is of great importance to wafer manufacturing because wafer manufacturing is susceptible to operating conditions such as operating temperature, pressure, or humidity, In addition, if there is a slight deviation in the calibration of the manufacturing equipment, it will affect the manufacturing results. When manufacturing semi-finished wafers (usually a set of 25 wafers), test wafers must often be used to detect equipment, including whether it is contaminated by dust particles. Otherwise, if the pollution exceeds the standard, the entire batch of semi-finished products will be scrapped and must be disposed of immediately. The process can continue. Because the manufacturing equipment is extremely delicate, the wafer process must be The papers that pass the test for each device are applicable to China Standards (CNS) A4 (2 丨 〇 > < 2 Easy Public *) (Please read the precautions on the back before filling out this page) -1 Economy. &Quot;: 廿44: 5 ^ 工;!, |, '^ 作 ^ 印 贺 448245 C7 _D7__ V. Creative Instructions (> ") Available after adjustment and stability, depending on the process requirements, a typical 1C manufacturing plant, each day The reactor must repeatedly test equipment for use. Therefore, the amount of wafers to be tested in 1C production plants is known to be huge. Furthermore, in the past wafer production plants have rarely used used wafers and usually discarded them. The reason is that the wafer production is very profitable, but the price of the old and new wafers is almost the same, the quality of the refurbished wafers and the refurbishment technology are insufficient, and there is no reason. Most semiconductor industries do not want to use refurbished wafers, but modern There are important changes in the current situation of the 1C industry. The profit of 1C production generally decreases, and the cost of wafers has increased from 611 to 8 "or even 12". The use of refurbished wafers can significantly reduce wafer costs. Each 12M wafer is 6 " Wafers hold four times more crystals Therefore, the potential profit loss of discarding a 12 " wafer is four times that of a 6 "wafer. In recent years, the semiconductor industry has begun to refurbish used wafers, and the refurbishment technology has also developed. Generally The traditional technical steps are acid ablation, then traditional honing, and finally honing. Acid ablation is used to remove metals or oxides from wafers. The printed pattern of the component, but there is metal or oxide or both), the traditional refurbishment operation initially dissolves the metal or oxide on the wafer by immersing the wafer in a chemical solution tank filled with acid ， Or drip the chemicals on the wafer to make it soluble --- J ---- This paper size is applicable to the middle and poor countries (CNS) A private opinion (210X297 mm) (Please read the precautions on the back first (Fill in this page again) ιπ.. &Quot; 部 ^ "! 1 | Take ^ 4 工 5,: ._- " ^ Print 44824b C7 D7 V. Creation instructions ο) Etch attached metals and oxides. The use of acid to dissolve oxides / metals is actually insufficient to refurbish used wafers. The reason for this is that the wafers after dissolution still have considerable impurities (dust particles and surface defects). These impurities may be in silicon crystals. The appearance of the circle is 1-2 microns deep. Refurbished wafers must be extremely clean and free of impurities. For example, an important condition in equipment testing in the 1C process is the dust particle contamination test, that is, testing the quality of impurities or wafer defects. Therefore, the test wafer itself must be absolutely flawless before it can be used to test to ensure its results. Otherwise, the bad chip and the signal / noise ratio are too high. It is impossible to judge the degree of cleanliness or pollution of a certain facility. Although the acid melting method can remove the oxides and metals attached to the wafer, it cannot be processed. Wafers with impurities cannot be used to help monitor 1C production. The acid-baked wafers must be reprocessed before they can be used for testing again. Due to the above-mentioned defects, 1C manufacturers usually apply traditional honing techniques after acid baths to remove impurities or / and polish wafer surface defects. The traditional honing technology is to use chemical honing slurry and mechanical honing to polish the wafer. When honing, use a honing pad on a honing platform, honing the wafer to flatten it, or grinding away a thin film. As in the acid bath method, deionized pure water is used to flow through the wafer to reduce the temperature ( Honing and removing impurities to generate heat). This paper size is applicable to the standard of Chinese families (CNS > Α4 size (210X2 ^ 7mm ^ (please read the note on the back before filling this page))
.1T 經濟部甘兑^走：^::::工-^斤^作灶卬製 /14 8 2 4 5 C7 D7 五、創作説明（ί/ ) (請先閲讀背面之注項再填寫本頁).1T Ministry of Economic Affairs Gan Wei ^ go: ^ :::: 工-^ catenary ^ Zuozhuo / 14 8 2 4 5 C7 D7 V. Creation Instructions (ί /) (Please read the notes on the back before filling in this page)
•1T 經濟部iy'i^-^/.Jn 工.·ή'·,?.ν作ii印製 傳統硏磨技術也有缺點，例如使用硏磨砂常常甚爲粗糙，結 果每次硏磨後，晶圓片厚度及耗損25微米！尤有甚者，硏磨 技術甚難在大面積上精密控制。其硏磨結果，晶圓片表面隨 處厚度不一，而硏磨技術無法應用到較大面積的晶圓片，如 8”或12"也通常因其厚度參差，無法應用於最進步的深次微米 技術。傳統晶圓片翻新方法的第三步驟是淸洗已溶蝕並硏磨 後的晶圓片，淸潔乾淨的晶圓片，對任何製程當然不可或缺， 尤其是在高溫製程中特別重要。淸洗以傳統的不接觸方法來 達成，亦即在淸洗中不能用刷子，而是通常在水洗工作台上 完成。過去，不接觸淸洗法常用在半導體工業的製程中，例 如最常用的超音波淸洗技術、超音波經轉能器Transducer轉 換’常用約20,000 - 50,000 Hz超音度，或約850 kHz超高 音波。使用超音波/超高音波將浸在去離子水槽（或用去離子 水淋在晶圓片上）’利用淨水使附著於晶圓片表面之雜質殘餘 脫離。超音波/超高音波淸洗法仍只能淸除晶圓片上鬆散附著 的雜質’遇到雜質與晶圓片間因某種吸引力（化學性或物理性) 導致的問題仍無能爲力。例如，雜質與晶圓片間相互有正負 電荷吸引時’好像某種化學黏著力存在時等等…。類此情形， 本紙張尺度適用中國國家橾串（CNS ) Α4ϋ格(21〇X2:97公釐) ^48245 C7 D7 五、創作説明（f ) 超音波/超高音波無能爲力時，必須使用其他淸洗步驟來驅除 附著的雜質，使之更能提供絕對乾淨的晶圓片，以便翻新重 新使用。 二、 圖號說明：1.二氧化矽 4.分子 2. 矽箔 5,缺陷處 3. 金屬薄膜 三、 圖式說明： 第一圖係未處理前之半導體晶圓片結構示意圖。 第二圖係化學溶蝕後之晶圓片示意圖。 第三圖係化學溶蝕及CMP處理後之晶圓片示意圖。 第四圖係經本專利發明之化學溶蝕、CMP、PVA洗刷晶圓 淸洗處理後之晶圓片不意圖。 四、傳統上，翻新已用過之晶圓片之手續’從未曾使用特 定晶圓片洗刷程序。本專利發明本體方法之一提出：執行晶 圓片洗刷程序以使翻新之晶圓片重做測試及製造之用。此洗 刷係一種接觸式淸洗技術，近年來已在1C製造工業日益成爲 一有效的淸洗晶圓片技術，一般說來’利用刷子之類直接洗 _______ 6 本紙張尺及通用中囷國家梂準（CNS ) A4規格（210X297公釐） (婧先閱讀背面之注意事項再填寫本頁)• 1T Ministry of Economic Affairs iy'i ^-^ /. Jn 工. · Ή '·,?. Ν Zuo ii Printing traditional honing techniques also has disadvantages. For example, the use of honing matte is often very rough. As a result, after each honing, Wafer thickness and loss of 25 microns! In particular, honing technology is difficult to precisely control over a large area. As a result of honing, the thickness of the wafer surface varies from place to place, and honing technology cannot be applied to wafers with a large area, such as 8 "or 12 " and it is usually unable to be applied to the most advanced depth because of its thickness difference. Micron technology. The third step of the traditional wafer refurbishment method is to clean the wafers that have been eroded and honed. Cleaning the wafers is of course indispensable for any process, especially in high temperature processes. Important. Rinse is achieved by the traditional non-contact method, that is, brushes cannot be used in rinsing, but it is usually done on a water washing table. In the past, non-contact rinsing was commonly used in the process of the semiconductor industry. Commonly used ultrasonic scrubbing technology, the ultrasonic transducer is converted by the Transducer 'usually about 20,000-50,000 Hz supersonic, or about 850 kHz ultra-high-frequency sound. Use ultrasonic / ultra-high-frequency sound will be immersed in a deionized water tank (or Drain the wafer with deionized water) 'Using clean water to remove impurities remaining on the surface of the wafer. Ultrasonic / ultrasonic cleaning can still only remove loosely attached impurities on the wafer' encountered Problems caused by some kind of attraction (chemical or physical) between the substrate and the wafer are still powerless. For example, when there is a positive and negative charge attraction between the impurity and the wafer, it seems like when a certain type of chemical adhesion exists, etc ... In this case, this paper size applies to the Chinese National String (CNS) Α4 grid (21 × 2: 97 mm) ^ 48245 C7 D7 V. Creation Instructions (f) Ultrasound / ultrasonic can not help, you must use other The cleaning step removes the attached impurities, so that it can provide an absolutely clean wafer for refurbishment and reuse. 2. Description of the drawing number: 1. Silicon dioxide 4. Molecules 2. Silicon foil 5, Defects 3. Metal film III. Schematic illustration: The first diagram is a schematic diagram of a semiconductor wafer structure before being processed. The second diagram is a schematic diagram of a wafer after chemical etching. The third diagram is a wafer after chemical etching and CMP treatment. Schematic diagram. The fourth diagram is the wafer after chemical dissolution, CMP, and PVA cleaning of the patented invention. Was not intended. 4. Traditionally, the process of refurbishing used wafers has never been used. Specific wafer scrubbing Procedure. One of the main methods of the invention of the patent proposes that a wafer cleaning procedure be performed to re-test remanufactured wafers for testing and manufacturing. This cleaning is a contact cleaning technology, which has been increasingly used in the 1C manufacturing industry in recent years. Become an effective wafer cleaning technology, generally speaking, 'wash directly with a brush or the like _______ 6 paper rulers and general China National Standards (CNS) A4 specifications (210X297 mm) (Jing first read the back (Please fill in this page again)
、1T C7 D7 五、創作説明u ) (請先閱讀背面之注意事項再填寫本頁) 刷晶圓片表面以去雜質，晶圓片放置於轉盤上用一旋轉刷子 在去離子水流中刷去雜質。本專利發明本體方法推薦較好的 方法，如第二圖所示，是用一種洗滌劑或其他化學劑溶入水 中以增功效，可防止靜電在晶圓片與雜質間增生。刷子材料 亦需選擇，以免雜質殘餘及晶圓片間之電荷增生；否則雜質 殘餘益難消除！本專利發明本體方法推薦最好用聚乙烯醋酸 (PVA)材質的刷子，因其通常在晶圓片洗刷時，使雜質殘餘及 晶圓片間產生電荷排除效能，以便亦於沖走雜質。使用能不 使雜質與晶圓片間引起電荷的刷子亦是可以的》 經在••^•‘^^"CTd 工·71'"^作社印焚 如第三圖所示，晶圓片洗刷程序是在完成化學機械硏磨 法（CMP)過程後，淸洗晶圓片的典型手續。本專利發明本體方 法推薦更好的方法內容包含在洗刷晶圓片之前應用化學機械 硏磨（CMP)法來翻新已用過之晶圓片，而化學機械硏磨技術在 使半導體晶圓片或基材硏磨平坦化，因晶圓片表面必須極端 平坦，始可用作製造半導體器件或積體電路；否則，晶圓片 表面稍有凹凸不平，製成半導體器件的”良率"必大量降低！ 尤其在晶圓片上生產積體電路布線的各個製程中，π平坦"通 常是必須的。例如在層與層之間的絕緣體（ILD)、金屬前的絕 本紙張尺度適用中國國家揉準（CNS ) A4規格（210X^97公釐） d48245 C7 D7 五、創作説明（1 ) 緣體（PMD)的布線成型步驟中，必須以CMP或其他將晶圓片平 坦化技術，使層與層之間的絕緣體（ILD)或金屬前的絕緣體 (PMD)附著於晶圓片上平坦化，始可進行後續製程。若未先應 用平坦化步驟，後續製程例如照相界定金屬薄膜，必無法達 成完美品質！因之該半導體器件或積體電路必定嚴重失效。 另外，生產最新現代化層次微米半導體器件或積體電 路，平坦化的要求尤其重要，例如典型的現代金屬原件MOS 線距已縮減至0.35微米以下！而任何晶圓片基材或基材尙存 著薄膜有些微變形，極可能在製程中引入潛在的缺失。故此， 十餘年來已發展出諸多平坦化技術，其中各種平坦化技術固 然有用，但化學機械硏磨法（CMP)技術較之其他技術優勝甚 多！尤其適用於現代半導體生產製程。特別是化學機械硏磨 法（CMP)較之其他平坦化技術，在確實控制晶圓片的硏磨率不 使厚度變動方面，尤爲突出。亦即化學機械硏磨法（CMP)在勝 過其他平坦化技術的方面，可達到劃一之全面性平坦化效 果。此外，化學機械硏磨法（CMP)較之其他技術更可精確地控 制其硏磨率。也因此，化學機械硏磨法（CMP)已成爲晶圓片平 坦化過程中偏愛的製程。典型的化學機械硏磨法(CMP)之硏磨 本紙張尺度逋用中國國家標率（CNS ) A4说格（210X29?公釐） (請先閱讀背面之注意事項再填寫本頁) 訂J· 台 I Ay 經"'部^-^走：：？卩工;/1-'?^作社印製 ci D7 五、創作説明（$ ) (請先聞讀背面之注意事項再填寫本页) 率可控制在大約0.2-0.5微米/分（甚至更低）的範圍；相反 地，傳統的硏磨及機械硏磨技術常常每次硏磨要磨耗至25微 米或更多！因此已不適合現代製程之用。其間兩者主要優劣 在於CMP磨耗基材每次少於2微米，但傳統硏磨法磨耗至少 25微米！須知生產半導體器件或積體電路，其使用之晶圓片 不可太薄。每一工廠規格有所不同’但使用傳統硏磨技術只 能最多翻新晶圓片兩次，否則無法使用；相對而言，本專利 之效益可翻新已用過的晶圓片大約可超過50次！結果顯而易 見，本專利發明優勝於傳統技術，且可提供的巨大效益，可 以想見。 ^! 經濟部甘旯!||<^9工^资合作社印製 半導體製程中，化學機械硏磨法（CMP)過程實際上融合化 學腐蝕及機械硏磨兩者，大槪說明如下：化學機械硏磨法（CMP) 利用稱之爲”硏磨液"的化學機械硏磨料（Slurry)在機械硏磨 中溶蝕晶圓片上附著雜質，化學機械硏磨法（CMP)時，晶圓片 通常固定在硏磨平台上，以一硏磨墊，用約0-30psi加壓， 硏磨墊及晶圓片通常都是圓形，而硏磨片直徑大於晶圓片。 硏磨平台開始旋轉，晶圓片亦隨之旋轉，其旋轉速率可達 1，000rpm ’而硏磨墊轉速亦可達1 ,〇〇〇rpm。本專利發明本體 本紙张尺度適用中國國家梯準（CNS> A4现格（210XW7公釐） C7 D7 五、創作説明（f) (請先閲讀背面之注意事項再填寫本頁) 經濟部智^^^沁^工^^^作社印製 方法推薦理想作法：硏磨墊之材質是聚尿素，例如：1C 1000 或1C 1400，另一方面，硏磨墊也可以如聚尿素墊充聚乙烯材 質等合適材質，市場有售的Suba IV或Politex。化學機械 硏磨法（CMP)的另一重要特點是硏磨墊再處理工具，可使硏磨 墊再生。此再處理工具包含碳化矽、或金鋼砂。化學機械硏 磨法（CMP)進行中，此一再處理工具相對於硏磨墊迴旋前後動 作，即時將硏磨墊全表面再生。故此再處理工具使硏磨墊保 持良好硏磨狀態，以提昇化學機械硏磨法(CMP)之效果；而傳 統硏磨技術並無硏磨墊、再處理工具之設備。硏磨液乃pH値 調整好的化學溶液（含有硏磨砂之溶液），本專利發明之硏磨 液可能是鹼性或酸性。化學機械硏磨法（CMP)主要作用硏磨目 標，如對絕緣膜或金屬膜加以硏磨，加料的化學硏磨液即與 目標物表面最外層原子發生反應，使其軟化、氧化，易於硏 磨。此硏磨液可目旨包含KOH，NH4〇H，H2O2, KI〇3或Fe(N〇3)3 的化學成份’而其硏磨料含有SiCh、Ce〇2、AI2O3,或金鋼砂， 本專利發明視爲要達成優良晶圓片翻新效果，化學機械硏磨 法（CMP)製程可進行一次或多次，而每一次化學機械硏磨法 (CMP)硏磨液的成分、硏磨墊材質、硏磨平台以及硏磨墊的轉 本紙張尺度適用中國國家標準（CNS > A4現格（210 X 297公| ) C7 D7 五、創作说明（丨σ) (請先閲讀背面之注意事項务填寫本頁) 速，均可變化配合。結果，選擇硏磨砂，硏磨液內容化學， 其pH値，硏磨平台及硏磨墊轉速、硏磨墊材質等等，單一或 混同變化配合，以達成理想翻新效果，亦可以隨各客戶所好， 作出一程式，這種隨客戶所好的特色，亦是本專利發明勝過 傳統翻新技術的優勢所在。 經濟部^.^^-^^7.以工^^/:”作让印緊 本專利發明本體方法更推薦包括一酸融過程，如採用酸 融程序通常是翻新製程的第一步。酸融蝕程序是傳統方法， 本專利發明本體方法推薦較佳方法，如第四圖所示，是做完 酸融蝕程序後隨即進行化學機械硏磨法(CMP)程序，然後隨即 進行聚乙烯醋酸（PVA)洗刷程序。另一方法是化學機械硏磨法 (CMP)可取代酸融蝕程序，縮短翻新製程流程。更有一方法， 做完酸融蝕程序隨即進行聚乙烯醋酸（PVA)程序，亦可及省掉 :化學機械硏磨法(CMP)程序。而本專利發明本體方法推薦較佳 的方法是聚乙烯醋酸（PVA)洗刷程序後隨即進行淸洗程序，淸 洗程序可以是水槽淸洗，例如傳統的超高音波/超音波淸洗、 或用噴射沖洗法。噴射沖洗過程中，晶圓片環繞軸心旋轉， 噴射流體中加入酸性化學劑使成爲化學溶劑，以提高淸洗效 能；再者’噴射沖淸之化學溶劑包含_4〇H、SCI(H2〇、H2〇2 本紙張尺度適用中國國家橾準（CNS ) A4洗格（2丨OX2们公釐） C7 D7 五、創作説明（丨/ ) 及NH4〇H混合溶液)HCI、HF或檸檬酸基化學物質’同時使 晶圓片在淸洗變動旋轉速率，以更有效淸洗晶圓片。 上述過程作爲代表性摘要槪略，本發明包括下列五項列舉非 特定的手續之一： A. (1)酸蝕（2)聚乙烯醋酸(PVA)洗刷 Β· (1)酸蝕（2)化學機械硏磨（CMP) (3)聚乙烯醋酸PVA洗刷 C_ (I)酸餓（2)化學機械硏磨（CMP) (3)聚乙烯醋酸(PVA)洗廁（4)淸洗 D. (1)化學機械硏磨（CMP) (2)聚乙烯醋酸(PVA)洗刷 E. (1)化學機械硏磨（CMP) (2)聚乙烯醋酸(PVA)洗刷 F. (1)化學機械硏磨（CMP) (2)聚乙烯醋酸(PVA)洗刷（3)洗刷 第一圖顯示測試用晶圓片上附著有Si〇2及金屬薄膜。如圖所 示’晶圓片表面上均附著金屬薄膜及Sl〇2薄膜上有雜 質（塵粒及表面缺陷）存在，這是晶圓片表面一般情形。 第二圖顯示經過酸融蝕程序，金屬薄膜及Si〇2薄膜已自晶圓 片上溶去情況，但雖經酸融蝕，晶圓片上仍有雜質及 缺陷存在。 本紙張尺度速用中國困家榡準{ CNS ) A4说格（2丨Ο X 297公釐） (請先閱讀背面之注意事項再填寫本頁) 、ίτ Λ ! 經濟..Irr;·^'!'財 4 ,u:工:/]',?> 作让卬製 > <18 2 4 C7 D7 五、創作説明（ 第三圖顯示晶圓片經過化學機械硏磨(CMP)程序，表面缺陷雖 塵粒消除，但塵粒仍可能存在。 第四圖顯示按照本專利發明指示，晶圓片經PVA洗刷及清洗 程序，塵粒已全部淸除，結果，晶圓片已淸潔，表面 已無缺陷，可再使用，而其厚度耗損少於2微米。 綜上所述，雖然本專利發明本體推薦較佳方法或特定方 法，已詳細說明並作圖解，工作人員只要不偏離本專利發明的 意志及範圍，仍可增減變通。尤請注意，本專利發明亦可用 在有元件印刷圖案（patterned)之晶圓片，亦即半導體生產 製程之後段時作廢的晶片.本專利發明也可用作翻新已有離 子植入ion-implanted的晶圓片，其已植入的離子擴散亦可 經由本專利發明之方法消除，重新翻新使用。同樣地，本專 利發明也可翻新已有光阻劑photo-resist或/及玻璃附著塗 佈spin-on-gUss的晶圓片大面積丨2吋或更大面積晶圓片， 本專利發明同樣適用。加以本專利發明亦可翻新不但是矽晶 晶圓片’即使是其他材質，例如III-V化合半導體的晶圓片， 一體適用。本專利發明特別用作最新深次微米技術的現代半 導體工業’尤其有利；本專利發明亦適用於翻新磊晶成長法 本紙張以適用中:轉（CNS) Α4ΐ^_ (21GX297公釐） (請先閱讀背面之注意事項再填寫本頁〕 訂 經-却令-574^4工;;1'1?^作?1印焚、 1T C7 D7 V. Creation Instructions u) (Please read the precautions on the back before filling in this page) Brush the wafer surface to remove impurities, and place the wafer on a turntable with a rotating brush in a stream of deionized water Impurities. A better method is recommended in the method of the invention of the patent. As shown in the second figure, a detergent or other chemical agent is used to dissolve in water to increase the efficacy and prevent static electricity from growing between the wafer and impurities. The brush material also needs to be selected to avoid the accumulation of impurities and charge build-up between the wafers; otherwise, it is difficult to eliminate the residue of impurities! It is recommended to use a brush made of polyvinyl acetate (PVA) in the method of the invention of the patent, because it usually causes the impurity residue and the charge elimination effect between the wafers when the wafers are washed, so that the impurities can also be washed away. It is also possible to use a brush that does not cause an electric charge between the impurities and the wafer. "Jingzai •• ^ • '^^ " CTd 工 71' " ^ Zuoshe printed as shown in the third figure, crystal The wafer cleaning procedure is a typical procedure for wafer cleaning after the chemical mechanical honing (CMP) process is completed. The method proposed in the invention of the present invention is better. The method includes applying chemical mechanical honing (CMP) to refurbish used wafers before washing the wafers. The chemical mechanical honing technology is used to make semiconductor wafers or The substrate is honing and flattening, because the surface of the wafer must be extremely flat before it can be used to manufacture semiconductor devices or integrated circuits; otherwise, the surface of the wafer is slightly uneven, and the "yield" of the semiconductor device must be Significantly reduced! Especially in the various processes of producing integrated circuit wiring on wafers, π flat " is usually necessary. For example, the layer-to-layer insulator (ILD), the paper before the metal standard is applicable to China National Standard (CNS) A4 (210X ^ 97 mm) d48245 C7 D7 V. Creative Instructions (1) In the wiring forming step of the PMD, CMP or other planarization technology must be used. The layer-to-layer insulator (ILD) or the metal-in-insulator (PMD) is attached to the wafer and planarized before the subsequent processes can be performed. If the planarization step is not applied first, the subsequent processes such as photography define metal films It is impossible to achieve perfect quality! Because of this, the semiconductor device or integrated circuit must fail seriously. In addition, the production of the latest modern micron semiconductor devices or integrated circuits requires flattening requirements, such as the typical modern metal original MOS line spacing. Has been reduced to less than 0.35 micrometers! And any wafer substrate or substrate has a slight deformation in the film, which is likely to introduce potential defects in the process. Therefore, many flattening technologies have been developed for more than ten years, of which various Although the planarization technology is useful, the chemical mechanical honing method (CMP) technology has many advantages over other technologies! It is especially suitable for modern semiconductor production processes. In particular, the chemical mechanical honing method (CMP) is more suitable than other planarization technologies in It is particularly prominent in controlling the honing rate of the wafer so that the thickness does not change. That is, the chemical mechanical honing method (CMP) can achieve a uniform and comprehensive flattening effect in terms of surpassing other planarization techniques. In addition, Chemical mechanical honing method (CMP) can more accurately control the honing rate than other technologies. Therefore, chemical mechanical honing (CMP) has become the preferred process for wafer planarization. Typical CMP honing method This paper is scaled using the Chinese National Standard (CNS) A4 scale (210X29? Mm) (Please read the notes on the back before filling in this page) Order J · 台 I Ay & " '部 ^-^ 走 ：： 卩 工; / 1-'? ^ 作 作 社 印 ci D7 5. Creation instructions ($) (Please read the notes on the back before filling this page) The rate can be controlled in the range of about 0.2-0.5 microns / min (or even lower); on the contrary, traditional honing and mechanical honing techniques often The secondary honing requires abrasion to 25 microns or more! Therefore, it is not suitable for modern processes. The main advantages and disadvantages of the two are that the CMP abrasive substrate is less than 2 microns each time, but the traditional honing method wears at least 25 microns! It should be noted that the wafer used in the production of semiconductor devices or integrated circuits must not be too thin. The specifications of each factory are different ', but the traditional wafer honing technology can only be used to refurbish wafers at most twice, otherwise it cannot be used; in contrast, the benefits of this patent can refurbish used wafers about 50 times. !! The results are obvious and obvious. The patented invention is superior to the traditional technology, and the huge benefits it can provide are conceivable. ^! Gan Min of the Ministry of Economic Affairs! || < ^ 9Industrial cooperatives printed semiconductor manufacturing process, the chemical mechanical honing method (CMP) process actually combines chemical corrosion and mechanical honing, the big description is as follows: Mechanical Honing (CMP) The chemical mechanical honing material (Slurry) called "Honing Fluid" is used to dissolve impurities on the wafer during mechanical honing. Usually fixed on the honing platform, a honing pad is used with a pressure of about 0-30psi, the honing pad and the wafer are usually circular, and the diameter of the honing pad is larger than the wafer. The honing platform starts to rotate. The wafer also rotates with it, and its rotation speed can reach 1,000 rpm ', and the honing pad rotation speed can also reach 1,000 rpm. The paper size of the invention of this patent is applicable to the national standard of China (CNS > A4 now Grid (210XW7mm) C7 D7 V. Creation Instructions (f) (Please read the notes on the back before filling in this page) Ministry of Economic Affairs ^^^ 沁 ^ 工 ^^^ Printing methods recommended by the agency: 硏The material of the polishing pad is polyurea, for example: 1C 1000 or 1C 1400. On the other hand, the honing pad can also Polyurea pads are filled with suitable materials such as polyethylene, commercially available Suba IV or Politex. Another important feature of the chemical mechanical honing method (CMP) is the honing pad reprocessing tool, which can regenerate the honing pad. The processing tool includes silicon carbide or gold steel sand. During the chemical mechanical honing method (CMP), this reprocessing tool rotates back and forth relative to the honing pad to instantly regenerate the entire surface of the honing pad. Therefore, the reprocessing tool makes The pad maintains a good honing state to enhance the effect of the chemical mechanical honing method (CMP); while the traditional honing technology does not include a honing pad and reprocessing tools. The honing liquid is a pH-adjusted chemical solution ( The solution containing honing matte), the honing fluid of the present invention may be alkaline or acidic. The chemical mechanical honing method (CMP) is mainly used for honing targets, such as honing insulating films or metal films, and adding chemical honing. The polishing liquid reacts with the outermost atoms on the surface of the target, making it soft, oxidized, and easy to hob. The honing liquid can be designed to include KOH, NH4〇H, H2O2, KI〇3 or Fe (N〇3) 3 Chemical composition 'and its honing Contains SiCh, Ce02, AI2O3, or steel grit. The invention of this patent is considered to achieve excellent wafer refurbishing effects. The chemical mechanical honing method (CMP) process can be performed one or more times, and each chemical mechanical Grinding method (CMP) honing fluid composition, honing pad material, honing platform, and transfer paper size of the honing pad are applicable to Chinese national standards (CNS > A4 Appearance (210 X 297 male |) C7 D7 V. Creation instructions (丨 σ) (please read the precautions on the back and fill out this page). The speed can be changed and matched. As a result, the honing sand, the content of the honing fluid, the pH, the honing platform and the speed of the honing pad are selected. , Honing pad material, etc., single or mixed changes to achieve the ideal refurbishment effect, you can also make a program according to each customer's preferences, this feature with the customer's preferences, this patent invention is better than the traditional refurbishment The advantages of technology. The Ministry of Economic Affairs ^. ^^-^^ 7. It is more recommended to use the method of printing ^^ /: "to print the ontology of the invention of the patent, which includes an acid melting process. For example, the acid melting process is usually the first step in the refurbishment process. Acid The ablation procedure is a traditional method, and the preferred method of the invention of this patent recommends a better method. As shown in the fourth figure, after the acid ablation procedure is completed, the chemical mechanical honing method (CMP) procedure is performed, and then the polyvinyl acetate is then performed. (PVA) scrubbing procedure. Another method is that the chemical mechanical honing method (CMP) can replace the acid ablation procedure and shorten the refurbishment process. There is another method. After the acid ablation procedure is completed, the polyvinyl acetate (PVA) procedure is performed. Can also be omitted: chemical mechanical honing method (CMP) procedure. The preferred method of the patent method of the invention is a polyvinyl acetate (PVA) washing procedure followed by a washing procedure. The washing procedure can be a sink. Washing, such as traditional ultrasonic / ultrasonic washing, or jet flushing. During the jet flushing process, the wafer is rotated around the axis, and acidic chemicals are added to the spray fluid to make it a chemical solvent to improve the cleaning efficiency. ; Further 'The chemical solvents for jet flushing include _40H, SCI (H2O, H2O2) This paper size is applicable to China National Standards (CNS) A4 wash grid (2 丨 OX2 mm) C7 D7 V. Creation instructions (丨 /) and NH4〇H mixed solution) HCI, HF or citric acid-based chemicals' while the wafer is rotated at a variable rate to clean the wafer more effectively. The above process is a representative summary strategy, The present invention includes one of the following five non-specific procedures: A. (1) Acid etching (2) Polyvinyl acetate (PVA) scrubbing B. (1) Acid etching (2) Chemical mechanical honing (CMP) (3) ) Polyethylene acetate PVA scrub C_ (I) Acid starvation (2) Chemical mechanical honing (CMP) (3) Polyethylene acetic acid (PVA) toilet cleaning (4) Cleaning D. (1) Chemical mechanical honing (CMP) (2) Polyvinyl acetate (PVA) scrub E. (1) Chemical mechanical honing (CMP) (2) Polyvinyl acetate (PVA) scrub F. (1) Chemical mechanical honing (CMP) (2) Polyvinyl acetate (PVA) Scrubbing (3) Scrubbing The first image shows that Si02 and metal thin film are attached to the test wafer. As shown in the figure, the metal thin film and the S02 thin film have impurities (dust on the surface of the wafer). Grains and surface defects) Here, this is the general situation of the wafer surface. The second figure shows that after the acid ablation process, the metal film and the SiO2 film have been dissolved from the wafer, but there are still impurities on the wafer even after the acid ablation. And defects exist. This paper is a standard for fast-moving Chinese households (CNS) A4 (2 丨 〇 X 297 mm) (Please read the precautions on the back before filling this page), ίτ Λ! Economy..Irr ; · ^ '!' Choi 4, u: 工: /] ',? > Make and make system > &18; 18 2 4 C7 D7 V. Creation instructions (the third picture shows the wafer is subjected to chemical mechanical honing (CMP) procedure, although the surface defects are eliminated, the dust particles may still exist. The fourth figure shows that according to the instructions of the patent invention, the wafers have been completely cleaned by the PVA scrubbing and cleaning process. As a result, the wafers have been cleaned, the surface has no defects, and can be reused, with less thickness loss. At 2 microns. In summary, although the preferred method or specific method of the invention of the patent has been described and illustrated in detail, as long as the staff does not deviate from the spirit and scope of the invention of the patent, it can still be modified. In particular, please note that the patented invention can also be applied to wafers with patterned elements, that is, wafers that are obsolete in the later stages of the semiconductor manufacturing process. The patented invention can also be used to refurbish existing ion-implanted The implanted ion diffusion of the wafer can also be eliminated by the method of the present invention and re-used. Similarly, the invention of this patent can also refurbish wafers with photo-resist or spin-on-gUss with large photo-resistance, and / or glass-on-spin-on-gUss wafers with a large area, 2 inches or larger wafers. Be applicable. With the invention of this patent, not only silicon wafers but also other materials, such as wafers of III-V compound semiconductors, can be refurbished. This patented invention is particularly useful for the modern semiconductor industry of the latest deep sub-micron technology. It is particularly advantageous; this patented invention is also suitable for refurbishing epitaxial growth papers. Application: Transfer (CNS) Α4ΐ ^ _ (21GX297 mm) (Please First read the notes on the back before filling this page] Scripture-But order -574 ^ 4 工 ;; 1'1? ^ 作? 1 印 burn
五、創作説明（丨）） 育成之晶圓片。 最後’本專利發明亦可用作原始晶圓素材鏡切割，減少 其厚度耗損（對傳統硏磨技術而言）_典型切割付預留額外厚 度，約100微米。本專利發明之CMP對目的材質耗損，較傳 統硏磨技術爲少（大約每次2微米：25微米）。利用CMP，本 專利發明亦可在晶圓素材錠切割，大量減少耗損，結果，淨 得晶圓原片數量增加。因此本專利發明有爲1C生產工廠節省 巨大成本，亦即大幅增加利潤之潛力。 五、 實驗例： 以25片報廢晶圓經處理後是否可恢復晶圚原始狀態？本 實驗利用各種不同條件以分析結果。（見附表一） 六、 實驗步驟： (1) 報廢晶圓爲氧化砂/砂（W/s io2 /si)多層無線路 (cnpatterned)晶圓，鎢表面污穢。 (2) 25片晶圓均經過酸處理去除鎢表面金屬。 (3) 鎢金屬去除後的氧化矽表面，再經由第二種酸腐蝕氧化矽 表面，腐蝕停滯於矽表面。 (4) 此時的矽晶圓須經過厚度測試及表面雜質測試，前者使用 本紙張尺度適用中囷國家揉率（CNS ) A4规格（210 X 2M公釐） (請先閱讀背面之注意事項再填寫本頁) 訂 -I . Δ B 2 A 5 C7 D7 五、創作説明（丨/) ADE u! t ragage ’ 後者使用 Tencor Surfscan。 (5) 選爲條件最好的操作條件測試後的晶圓再經過不同條件 的化學機械硏磨及磨後淸洗。 (6) 硏磨淸洗後的晶圓再接受厚度及雜質測試選爲條件最好 的操作條件。 七、 附表一顯示矽晶圓在硏磨及淸洗前後的表面雜質 (parficle)及厚度很明顯的只用酸處理去除鎢及氧化矽，表 面的雜質高達30,000partide，無法使晶圓再生，然而使用硏 磨及淸洗在不同的操作條件下，雜質可大量降低至大約 lOOpartide，更重要的是晶圓的厚度更未經硏磨及淸洗降 低，晶圓的厚度仍然是如同全新的晶圓一般。 附表二顯示第17號晶圓硏磨淸洗後，表面雜質狀況。 八、 實驗結論： 本實驗證明經本創作之方法，即由化學機械硏磨及淸洗 後，報廢的晶圓可再生，晶圓的厚度不會因爲這種處理而顯' 著降低。 九、本發明之目標是將已使用過的半導體晶圓片，翻新 至原來未使用前之原來狀況，以供再次使用的新方法’目標 15 _ 本紙張尺度適用中國國家標準（CNS ) Μ規格（210Χ297公釐） (請先Μ讀背面之注意事項再填寫本X ) 訂 經濟邡f'!'5:-4:;r:u:工;^]企^作社印製 C7 D7 五、創作説明（丨$：) 的達成是利用化學機械硏磨法（CMP)以及晶圓片之洗刷過 程，按照本專利發明之翻新方法完成之，爰依法提呈發明專 利之申請。 (請先閱讀背面之注意事項再填寫本頁) 經濟部背ίι叫是'"::!:工;;,1-斤^作';1印製 本紙張尺度適用中國國家橾準（CNS ) Λ4说格（2[0Χ297公釐）V. Creation Instructions (丨)) Wafers that have been developed. Finally, the invention of this patent can also be used as the original wafer material for mirror cutting to reduce its thickness loss (for traditional honing technology). Typical cutting pay for extra thickness, about 100 microns. The CMP of the present invention consumes less material than the conventional honing technology (approximately 2 microns at a time: 25 microns). By using CMP, the invention of this patent can also cut wafer ingots, greatly reducing the loss, and as a result, the number of original wafers is increased. Therefore, the patented invention has the potential to save huge costs for 1C production plants, that is, to greatly increase profits. V. Experimental example: Can 25 wafers be used to recover the original state of the crystal after processing? This experiment uses a variety of different conditions to analyze the results. (See Appendix I) 6. Experimental steps: (1) Scrap wafers are oxidized sand / sand (W / s io2 / si) multi-layer wireless circuit (cnpatterned) wafers, and the tungsten surface is dirty. (2) Twenty-five wafers were all treated with acid to remove tungsten surface metal. (3) After the tungsten metal is removed, the silicon oxide surface is etched by the second acid, and the corrosion stops on the silicon surface. (4) At this time, the silicon wafer must pass the thickness test and the surface impurity test. The former uses this paper size to apply the Central China National Kneading Rate (CNS) A4 specification (210 X 2M mm) (Please read the precautions on the back before reading) (Fill in this page) Order-I. Δ B 2 A 5 C7 D7 V. Creative Instructions (丨 /) ADE u! T ragage 'The latter uses Tencor Surfscan. (5) The wafer selected as the best operating condition is then subjected to chemical mechanical honing and post-grinding washing under different conditions. (6) The thickness and impurity test of the wafer after honing and washing are selected as the best operating conditions. 7. Schedule 1 shows that the surface impurities and thicknesses of silicon wafers before and after honing and rinsing are obvious. Only the acid treatment is used to remove tungsten and silicon oxide. The surface impurities are as high as 30,000 partside, which makes it impossible to regenerate the wafer. However, using honing and honing under different operating conditions, impurities can be reduced to about 100partide. More importantly, the thickness of the wafer has not been reduced without honing and honing. The thickness of the wafer is still like a new crystal. Round. Attached Table 2 shows the state of surface impurities after wafer No. 17 was honed and cleaned. Eight, experimental conclusions: This experiment proves that after the method of this creation, that is, by chemical mechanical honing and honing, the discarded wafer can be recycled, and the thickness of the wafer will not be significantly reduced due to this processing. IX. The objective of the present invention is a new method of reusing used semiconductor wafers to their original condition before being unused for reuse. Objective 15 _ This paper size applies the Chinese National Standard (CNS) M specifications. (210 × 297 mm) (Please read the precautions on the back before filling in this X) Order the economy 邡 f '!' 5: -4:; r: u: 工; ^] Printed by the enterprise company C7 D7 V. The creation statement (丨 $ :) was achieved by using the chemical mechanical honing method (CMP) and the wafer cleaning process in accordance with the refurbishment method of this patent invention, and filing an application for an invention patent according to law. (Please read the notes on the back before filling out this page) The Ministry of Economic Affairs's name is '" ::!: 工 ;;, 1-jin ^ 作'; 1 This paper is printed in accordance with China National Standards (CNS) ) Λ4 Grid (2 [0 × 297 mm)