TW442787B - Layout of pull-up and pull down devices for off chip driver - Google Patents

Layout of pull-up and pull down devices for off chip driver Download PDF

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Publication number
TW442787B
TW442787B TW88116371A TW88116371A TW442787B TW 442787 B TW442787 B TW 442787B TW 88116371 A TW88116371 A TW 88116371A TW 88116371 A TW88116371 A TW 88116371A TW 442787 B TW442787 B TW 442787B
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Taiwan
Prior art keywords
pull
driver
pad
signal line
voltage level
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TW88116371A
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Chinese (zh)
Inventor
Tz-Je Shiau
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Vanguard Int Semiconduct Corp
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Priority to TW88116371A priority Critical patent/TW442787B/en
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Publication of TW442787B publication Critical patent/TW442787B/en

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Abstract

This invention is about the layout of pull-up and pull down devices for off chip driver, in which it is not necessary to reserve layout space in between the adjacent pads such that layout area can be greatly diminished and the advantage of simple layout is obtained. In addition, when the distance between the disposed positions of pull-up driver as well as pull down driver and the corresponding pads is very large, the problem of causing the increase of layout area will not occur. Furthermore, since the way of layout of this invention can greatly shorten the layout length of conducting wire, signal transmission speed can be faster.

Description

'442,7a;: 〇 c / 0 0 6 A7 B7 五、發明說明(/) 本發明是有關於—種積體電路之佈線(layout)»且特別 是有關於一種關斷晶片驅動器之上拉與下拉元件的佈線, 其可大輻縮小佈線面積’並使訊號傳遞速度較快。 近年來’由於積體電路之積集度日益增加’電子產品 亦隨之往輕、薄、短、小的方向發展。因此,用以承載晶 片進行封裝(Package)之晶片承載器(Carrier),以及用於電子 零件連接及組裝之印刷電路板(p C B)與線路載板等電路基 板’於佈線設計與製作等方面也必須加以改良。由於電子 元件之腳位數隨著積體電路積集度提升而增加,因此對於 電路基板上焊墊數量的需求亦隨之增加,所以必須提高基 板上的佈線密度(Lay〇ut Density)。此外,由於電路基板上 之佈線密度增加與線路細微化,使得線路上用以和其他元 件連接之焊墊的間距(Pitch)愈形縮小,故將電路基板上之 線路細微化,即可達到增加佈線密度之目的。 請參照第1圖,其繪示的是習知一種關斷晶片驅動器 (〇ff Chip Driver,〇CD)之上拉(pull-up)與下拉(pull down)元 件的佈線示意圖。 '^知關斷晶片驅動器之上拉與下拉元件的佈線10,包 括焊墊11與12、上拉驅動器21與22、下拉驅動器23與 24、上拉訊號線31與32以及下拉訊號線33與34,其中, 上拉驅動器21與下拉驅動器23係用以分別提供一上拉電 壓準位與一下拉電壓準位給焊墊11,而上拉驅動器22與 下拉驅動器24係用以分別提供一上拉電壓準位與一下拉 電壓準位給焊墊12。其配置關係爲,在焊墊11之相對兩 (請先閱讀背面之注意事項再填寫本頁) .裝 訂· 經濟部智慧財產局員工消費合作社印製 t紙張&度適用中國國家標準(CNS)A4規格(210 X 297公釐) 442 78 7 53 101,· :/()0 6 A7 B7 經濟部智慧財產局員工消費合作社印製 五、發明說明(厶) 側(例如上下兩側)分別配置有上拉驅動器21與下拉驅動器 23,而在焊墊12之上下兩側分別配置有上拉驅動器22與 下拉驅動器24。其中,上拉驅動器2]與22分別位在焊墊 11與12之同一側,且下拉驅動器23與24分別位在焊墊11 與12之同一側,如第1圖所示。 而其實際佈線爲,上拉訊號線31與32分別經由導線 41與42連接至上拉驅動器21與_22,用以分別提供一上拉 電壓準位給上拉驅動器21與22內之主動元件51與52例 如金氧半電晶體(MOS),藉以分別將上拉驅動器21與22 上拉至高準位狀態。必須注意的是,導線41係從上拉訊號 線31依序沿著下拉驅動器23、焊墊11與上拉驅動器21 之側邊,連接至上拉驅動器21內,而導線42亦是沿著上 拉驅動器22之側邊,連接至上拉驅動器22內。而下拉訊 號線33與34分別經由導線43與44連接至下拉驅動器23 與24,用以分別提供一下拉電壓準位給下拉驅動器23與 24內之主動元件53與54,藉以分別將下拉驅動器23與24 下拉至低準位狀態。必須注意的是,導線44係從下拉訊號 線34依序沿著上拉驅動器22、焊墊12與下拉驅動器24 之側邊,連接至下拉驅動器24內,而導線43亦是沿著下 拉驅動器23之側邊,連接至下拉驅動器23內。 • 當然,上述焊墊的數量並不限定在只有兩個,可以是 三個、四個或更多個,同理配置在這些焊墊之上下兩側之 上拉驅動器與下拉驅動器的數量亦隨之增加。 \然而,當焊墊的數量很多時,相鄰焊墊間必須預留空 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) (請先閱讀背面之注意事項再填寫本頁) '43^---1---丨訂----丨!丨-_ 442 78 7 1 01 \ν Γ. d u c /0 0 6 A7 B7 五、發明說明(’) 間,以便做爲從上拉訊號線及下拉訊號線分別拉出用來連 接上拉驅動器及下拉驅動器之導線佈線用,此時勢必會增 (請先閱讀背面之注音ί事項再填寫本頁) 加佈線面積。 此外,若配置在焊墊兩側之上拉驅動器與下拉驅動 器,其與焊墊之距離拉大時,將使得連接上拉驅動器及下 拉驅動器之導線佈線長度增大,如此不僅又會增加佈線面 積,同時也會造成訊號傳遞速度變慢。 因此,隨著積體電路之積集度日益增加,電子元件愈 做愈小,相對地佈線面積亦愈縮愈小,故如何有效達到縮 小佈線面積,亦是業界所亟盼。 經濟部智慧財產局員工消費合作社印製 有鑒於此,本發明提出一種關斷晶片驅動器之上拉與 下拉元件的佈線,包括第一與第二焊墊、第一與第二上拉 驅動器、第一與第二下拉驅動器、第一與第二上拉訊號線 以及第一與第二下拉訊號線。上述第二焊墊相鄰於第一焊 墊。第一上拉驅動器配置於第一焊墊之下側,用以提供第 一上拉電壓準位給第一焊墊。第一下拉驅動器配置於第一 上拉驅動器之右側,用以提供第一下拉電壓準位給第一焊 墊。第二上拉驅動器配置於第二焊墊之上側,用以提供第 二上拉電壓準位給第二焊墊。第二下拉驅動器配置於第二 上拉驅動器之左側,用以提供第二下拉電壓準位給第二焊 墊。第一上拉訊號線經由第一上拉導線從面對第一上拉訊 號線之第一上拉驅動器的下側,直接連接至第一上拉驅動 器內,用以提供第一上拉電壓準位給第一上拉驅動器內之 主動元件,藉以將第一上拉驅動器上拉至第一高準位狀 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 442787 i Olw l'.doc/0U6 A7 B7 五、發明說明(今) 態。第一下拉訊號線經由第一下拉導線從面對第一下拉訊 號線之第一下拉驅動器的下側,直接連接至第一下拉驅動 器內,用以提供第一下拉電壓準位給第一下拉驅動器內之 主動元件,藉以將第一下拉驅動器下拉至第一低準位狀 態。第二上拉訊號線經由第二上拉導線從面對第二上拉訊 號線之第二上拉驅動器的上側,直接連接至第二上拉驅動 器內,用以提供第二上拉電壓準位給第二上拉驅動器內之 主動元件,藉以將第二上拉驅動器上拉至第二高準位狀 態。第二下拉訊號線經由第二下拉導線從面對第二下拉訊 號線之第二下拉驅動器的上側,直接連接至第二下拉驅動 器內,用以提供第二下拉電壓準位給第二下拉驅動器內之 主動元件,藉以將第二下拉驅動器下拉至第二低準位狀 態。其中,第一上拉驅動器與第一下拉驅動器之配置位置 可互換,且第二上拉驅動器與第二下拉驅動器之配置位置 可互換。 依照本發明提出之關斷晶片驅動器之上拉與下拉元 件的佈線,不僅可大輻縮小佈線面積,同時具有佈線簡單 的優點。而且當上拉驅動器與下拉驅動器之配置位置與對 應焊墊之距離很大時,也不會造成佈線面積增加的問題。 更由於本發明之佈線方式可縮短導線佈線長度,故可使訊 號傳遞速度較快。'442,7a ;: 〇c / 0 0 6 A7 B7 V. Description of the invention (/) The present invention is related to-a kind of integrated circuit layout (layout) »and in particular relates to a pull-off of a chip driver With the wiring of the pull-down element, it can greatly reduce the wiring area and make the signal transmission speed faster. In recent years, ‘due to the increasing accumulation of integrated circuits’, electronic products have also developed in light, thin, short, and small directions. Therefore, the chip carrier (Carrier) used to carry the chip for packaging, and the circuit substrates such as the printed circuit board (p CB) and the circuit carrier board used for the connection and assembly of electronic components are used in wiring design and production. It must also be improved. As the number of pins of electronic components increases with the integration of integrated circuits, the demand for the number of pads on the circuit substrate also increases. Therefore, the wiring density (Layout Density) of the substrate must be increased. In addition, as the wiring density on the circuit substrate increases and the wiring becomes finer, the pitch of the pads used to connect with other components on the circuit is reduced. Therefore, the finer the wiring on the circuit substrate, the larger the increase. Purpose of wiring density. Please refer to FIG. 1, which shows a wiring diagram of a conventional pull-up and pull-down device for turning off a chip driver (CDF). '^ Know that the wiring 10 for the pull-up and pull-down components of the chip driver is turned off, including pads 11 and 12, pull-up drivers 21 and 22, pull-down drivers 23 and 24, pull-up signal lines 31 and 32, and pull-down signal lines 33 and 34, wherein the pull-up driver 21 and the pull-down driver 23 are used to provide a pull-up voltage level and the pull-down voltage level to the pad 11 respectively, and the pull-up driver 22 and the pull-down driver 24 are used to provide one The pulling voltage level and the pulling voltage level are provided to the bonding pad 12. The configuration relationship is two opposite pads 11 (please read the precautions on the back before filling this page). Binding and printing printed on paper & degree by the Intellectual Property Bureau of the Ministry of Economic Affairs, the Chinese National Standard (CNS) A4 specifications (210 X 297 mm) 442 78 7 53 101 , ·: / () 0 6 A7 B7 Printed by the Consumer Consumption Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs 5. Description of the invention (厶) Side (for example, both sides) There are a pull-up driver 21 and a pull-down driver 23, and a pull-up driver 22 and a pull-down driver 24 are arranged on the upper and lower sides of the bonding pad 12, respectively. Among them, the pull-up drivers 2] and 22 are located on the same side of the pads 11 and 12, respectively, and the pull-down drivers 23 and 24 are located on the same side of the pads 11 and 12, respectively, as shown in FIG. The actual wiring is that the pull-up signal lines 31 and 32 are connected to the pull-up drivers 21 and _22 via the wires 41 and 42 respectively to provide a pull-up voltage level to the active components 51 in the pull-up drivers 21 and 22, respectively. And 52, such as metal-oxide-semiconductor (MOS), to pull up the pull-up drivers 21 and 22 to a high level state, respectively. It must be noted that the lead 41 is connected from the pull-up signal line 31 along the side of the pull-down driver 23, the pad 11 and the pull-up driver 21 to the pull-up driver 21, and the lead 42 is also pulled along the pull-up The side of the driver 22 is connected to the pull-up driver 22. The pull-down signal lines 33 and 34 are connected to the pull-down drivers 23 and 24 via wires 43 and 44 respectively, and are used to provide the pull-down voltage levels to the active components 53 and 54 in the pull-down drivers 23 and 24, respectively, so as to connect the pull-down driver 23 respectively. And 24 pull down to low level. It must be noted that the lead 44 is connected from the pull-down signal line 34 to the pull-down driver 24 along the side of the pull-up driver 22, the bonding pad 12 and the pull-down driver 24, and the lead 43 is also along the pull-down driver 23. The side is connected to the pull-down driver 23. • Of course, the number of pads above is not limited to only two, but can be three, four or more. Similarly, the number of pull-up and pull-down drivers configured on the top and bottom sides of these pads also varies. Increase. \ However, when the number of pads is large, empty pads must be reserved between adjacent pads. The paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) (Please read the precautions on the back before filling in this Page) '43 ^ --- 1 --- 丨 Order ---- 丨!丨 -_ 442 78 7 1 01 \ ν Γ. Duc / 0 0 6 A7 B7 V. Description of the invention ('), so as to pull out the pull-up signal line and pull-down signal line to connect the pull-up driver and For the wiring of the pull-down driver, it is bound to increase (please read the note on the back before filling this page) and increase the wiring area. In addition, if the pull-up driver and pull-down driver are arranged on both sides of the pad, the distance between the pull-up driver and the pad will be increased, which will increase the length of the wire wiring connecting the pull-up driver and the pull-down driver, which will not only increase the wiring area. , Which will also cause slower signal transmission. Therefore, as the integration degree of integrated circuits is increasing, electronic components are getting smaller and smaller, and the relative wiring area is also shrinking. Therefore, how to effectively reduce the wiring area is also an industry's urgent hope. Printed by the Consumer Cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs In view of this, the present invention proposes to turn off the wiring of the pull-up and pull-down components of the chip driver, including the first and second pads, the first and second pull-up drivers, the first First and second pull-down drivers, first and second pull-up signal lines, and first and second pull-down signal lines. The second pad is adjacent to the first pad. The first pull-up driver is disposed below the first pad, and is used to provide a first pull-up voltage level to the first pad. The first pull-down driver is disposed on the right side of the first pull-up driver and is used to provide a first pull-down voltage level to the first pad. The second pull-up driver is disposed on the upper side of the second pad, and is used to provide a second pull-up voltage level to the second pad. The second pull-down driver is disposed on the left side of the second pull-up driver, and is used to provide a second pull-down voltage level to the second pad. The first pull-up signal line is directly connected to the first pull-up driver from the lower side of the first pull-up driver facing the first pull-up signal line through the first pull-up wire to provide a first pull-up voltage level. Position to the active component in the first pull-up drive, so that the first pull-up drive is pulled up to the highest level. The paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) 442787 i Olw l'.doc / 0U6 A7 B7 V. Description of the invention (today). The first pull-down signal line is directly connected to the first pull-down driver from the lower side of the first pull-down driver facing the first pull-down signal line through the first pull-down wire, so as to provide a first pull-down voltage level. The bit is given to the active element in the first pull-down driver, so as to pull the first pull-down driver to the first low level state. The second pull-up signal line is directly connected to the second pull-up driver from the upper side of the second pull-up driver facing the second pull-up signal line through the second pull-up wire to provide a second pull-up voltage level Give the active component in the second pull-up driver to pull the second pull-up driver to the second high level state. The second pull-down signal line is directly connected to the second pull-down driver from the upper side of the second pull-down driver facing the second pull-down signal line through the second pull-down wire, and is used to provide a second pull-down voltage level to the second pull-down driver. The active component pulls the second pull-down driver to the second low level state. Among them, the configuration positions of the first pull-up driver and the first pull-down driver are interchangeable, and the configuration positions of the second pull-up driver and the second pull-down driver are interchangeable. According to the present invention, the wiring for turning off the pull-up and pull-down components of the chip driver can not only greatly reduce the wiring area, but also has the advantage of simple wiring. In addition, when the distance between the pull-up driver and pull-down driver and the corresponding pad is large, the problem of increased wiring area will not be caused. Furthermore, since the wiring method of the present invention can shorten the wiring length of the wires, the signal transmission speed can be made faster.

爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂,下文特舉較佳實施例,並配合所附圖式,作詳細 說明如下I ----:--------裝--- U { (請先閱讀背面之注意事項填寫本頁) 訂: 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) ]0 t \ν Γ. d 〇 c / () 0 6 A7 B7 五、發明說明(5) 圖式之簡單說明: (請先閱讀背面之注音心事項再填寫本頁) :第1圖繪示的是習知一種關斷晶片驅動器之上拉與下 拉元件的佈線示意圖;以及 第2圖繪示的是依照本發明一較佳實施例的一種關斷 晶片驅動器之上拉與下拉元件的佈線示意圖。 圖式之標號說明: 10、 110:關斷晶片驅動器之上拉與下拉元件的佈線 11、 12、111、112 :焊墊 2卜22、121、122 :上拉驅動器 23、24、123、124 :下拉驅動器 3卜32、13卜132 :上拉訊號線 33、34、33、134 :下拉訊號線 4卜 42、43、44、14;1、142、143、144 :導線 5_卜 52、53、54、15卜 152、丨53、154 :主動元件 實施例 請參照第2圖,其繪示的是依照本發明一較佳實施例 的一種關斷晶片驅動器(OCD)之上拉與下拉元件的佈線示 意圖。 經濟部智慧財產局員工消費合作社印製 本發明之關斷晶片驅動器之上拉與下拉元件的佈線 110與習知佈線10相類似,包括焊墊1Π與112、上拉驅 動器121與122、下拉驅動器123與丨24、上拉訊號線131 與132以及下拉訊號線133與134,其中,上拉驅動器121 與下拉驅動器124係用以分別提供一上拉電壓準位與一下 拉電壓準位給焊墊111,而上拉驅動器122與下拉驅動器 7 本紙張尺度適用中國國家標準(CNS)A4規格(210 X 297公釐) 442 78 I 0iwr.<ioc/(J06 經濟部智慧財產局員工消費合作社印製 A7 B7 五、發明說明(ό) 123係用以分別提供一上拉電壓準位與一下拉電壓準位給 焊墊112。 其配置關係爲,在焊墊111之下側配置有上拉驅動器 m,在上拉驅動器121之右側配置有下拉驅動器124。而 在焊墊112之上側配置有上拉驅動器122,在上拉驅動器 122之左側配置有下拉驅動器123。在第2圖中,上拉驅動 器121與122分別位在焊墊H1與112之不同側,且下拉 驅動器123與124分別位在焊墊111與112之不同側。値 得注意的是,上拉驅動器121與下拉驅動器124之配置位 置可互換,且上拉驅動器122與下拉驅動器123之配置位 置可互換。 本發明之實際佈線爲,上拉訊號線131經由導線141 從面對上拉訊號線131之上拉驅動器121的側面(如圖爲其 下側),直接連接至上拉驅動器121內,用以提供一上拉電 壓準位給上拉驅動器121內之主動元件151例如金氧半電 晶體(MOS),藉以將上拉驅動器121上拉至高準位狀態。上 拉訊號線132經由導線142從面對上拉訊號線132之上拉 驅動器122的側面(如圖爲其上側),直接連接至上拉驅動器 122內,用以提供一上拉電壓準位給上拉驅動器122內之主 動元件152,藉以將上拉驅動器122上拉至高準位狀態。 另,下拉訊號線133經由導線143從面對下拉訊號線133 之下拉驅動器124的側面(如圖爲其下側),直接連接至下拉 驅動器124內,用以提供一下拉電壓準位給下拉驅動器124 內之主動元件154,藉以將下拉驅動器124下拉至低準位狀 (請先閱讀背面之注意事項再填寫本頁)In order to make the above and other objects, features, and advantages of the present invention more comprehensible, the following exemplifies preferred embodiments and the accompanying drawings to make a detailed description as follows I ----: ----- --- Install --- U {(Please read the notes on the back to fill in this page first) Order: Printed by the Employees' Cooperatives of the Intellectual Property Bureau of the Ministry of Economy This paper is printed in accordance with China National Standard (CNS) A4 (210 X 297)厘)] 0 t \ ν Γ. D oc / /) 0 6 A7 B7 V. Description of the invention (5) Brief description of the drawing: (Please read the phonetic note on the back before filling this page): Figure 1 Illustrated is a conventional wiring diagram for turning off pull-up and pull-down components of a chip driver; and FIG. 2 illustrates a method for turning off pull-up and pull-down components of a chip driver according to a preferred embodiment of the present invention. Wiring diagram. Description of the symbols of the drawings: 10, 110: Turn off the wiring of the pull-up and pull-down components of the chip driver 11, 12, 111, 112: pads 22, 121, 122: pull-up drivers 23, 24, 123, 124 : Pull-down driver 3, 32, 13, 132: Pull-up signal lines 33, 34, 33, 134: Pull-down signal lines 4, 42, 43, 44, 14; 1, 142, 143, 144: Wire 5_bu 52, 53, 54, 15 and 152, 53, and 154: Please refer to FIG. 2 for an embodiment of an active device, which shows a pull-up and pull-down of an off-chip driver (OCD) according to a preferred embodiment of the present invention. Schematic diagram of component wiring. The consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs printed the wiring 110 for pull-up and pull-down components of the shutdown chip driver of the present invention similar to the conventional wiring 10, including pads 1Π and 112, pull-up drivers 121 and 122, and pull-down drivers 123 and 24, pull-up signal lines 131 and 132, and pull-down signal lines 133 and 134. Among them, the pull-up driver 121 and the pull-down driver 124 are used to provide a pull-up voltage level and a pull-down voltage level to the pads, respectively. 111, while pull-up driver 122 and pull-down driver 7 This paper size applies the Chinese National Standard (CNS) A4 specification (210 X 297 mm) 442 78 I 0iwr. ≪ ioc / (J06 Printed by the Employees ’Cooperative of Intellectual Property Bureau, Ministry of Economic Affairs System A7 B7 V. Description of the invention (ό) 123 is used to provide a pull-up voltage level and a pull-down voltage level to the pad 112. The configuration relationship is that a pull-up driver is arranged below the pad 111 m, a pull-down driver 124 is disposed on the right side of the pull-up driver 121. A pull-up driver 122 is disposed above the pad 112, and a pull-down driver 123 is disposed on the left side of the pull-up driver 122. In the second figure, The pull drivers 121 and 122 are located on different sides of the pads H1 and 112, and the pull-down drivers 123 and 124 are located on different sides of the pads 111 and 112. It should be noted that the pull-up drivers 121 and 124 The arrangement positions are interchangeable, and the arrangement positions of the pull-up driver 122 and the pull-down driver 123 are interchangeable. The actual wiring of the present invention is that the pull-up signal line 131 pulls the side of the driver 121 above the pull-up signal line 131 through the wire 141. (As shown on the lower side), directly connected to the pull-up driver 121 to provide a pull-up voltage level to the active element 151 such as a metal-oxide-semiconductor (MOS) in the pull-up driver 121 to pull up The driver 121 is pulled up to a high level. The pull-up signal line 132 pulls the side of the driver 122 (shown as the upper side thereof) from above the pull-up signal line 132 via the wire 142, and is directly connected to the pull-up driver 122 for A pull-up voltage level is provided to the active element 152 in the pull-up driver 122, so as to pull up the pull-up driver 122 to a high-level state. In addition, the pull-down signal line 133 is pulled down to the pull-down signal line 1 through the wire 143. The side of the pull-down driver 124 (as shown below) is directly connected to the pull-down driver 124 to provide the pull-down voltage level to the active component 154 in the pull-down driver 124 to pull the pull-down driver 124 to a low level. Level (Please read the precautions on the back before filling this page)

本紙張尺度適用争國國家標準(CNS)A4規格(210 X 297公釐) 44278 ? 3 I 01 \\· ί*. ς| 〇 c / 0 () 6 Α7 Β7 五、發明說明(7) 態。下拉訊號線134經由導線144從面對下拉訊號線134 之下拉驅動器123的側面(如圖爲其上側),直接連接至下拉 驅動器123內,用以提供一下拉電壓準位給下拉驅動器123 內之主動元件153,藉以將下拉驅動器123下拉至低準位狀 態。 當然,本發明焊墊的配置數量並不限定在只有兩個, 可以是三個、四個或更多個,同理配置在這些焊墊一側用 以將焊墊上拉與下拉之上拉驅動器與下拉驅動器的數量亦 隨之增加。 、請同時參照第1圖與第2圖,藉以比較習知第1圖與 本發明第2圖之佈線方式的差異,下述並以導線41與導線 141爲例。導線141係從面對上拉訊號線131之上拉驅動器 121的下側直接連接至上拉驅動器121內’而導線41係從 上拉訊號線31依序沿著下拉驅動器23、焊塾11與上拉驅 動器2丨之側邊,連接至上拉驅動器21內’因此依照本發 明之佈線方式,很明顯的可減少習知導線41經下拉驅動器 23、焊墊11與上拉驅動器21之側邊的佈線長度。 因此,當本發明之焊墊的配置數量很多時’由於在相 鄰焊墊間無須預留空間’不僅可大輻縮小佈線面積,同時 亦有佈線簡單的優點。此外,若上拉驅動器與下拉驅動器 之配置位置與對應焊墊之距離很大時’也不會造成佈線面 積增加的問題。另’由於本發明之佈線方式可縮短導線佈 線長度’故也可使訊號傳遞速度較快。 綜上所述,本發明具有以下的優點: ---.1!--------·裝 --- (請先閱讀背面之注意事項^填寫本頁) 1T--------- 經濟部智慧財產局員工消費合作杜印製 本紙張尺度剌&lt;eNS)A4 (21Q x 297公釐) 442 78 7 5 3 I 0:w f.doc/006 五、發明說明(3) (1)可大輻縮小佈線面積。 ⑵佈線簡單。 (3) 有效提昇訊號傳遞速度。 (4) 更適用於高積集度之電子元件的佈線。 雖然本發明已以較佳實施例揭露如上,然其並非用以 限定本發明,任何熟習此技藝者,在不脫離本發明之精神 和範圍內,當可作各種之更動與潤飾,因此本發明之保護 範圍當視後附之申請專利範圍所界定者爲準。 (請先閲讀背面之注意事項再填寫本頁) \-裝--- 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用t國國家標準(CNS)A4規格(210 X 297公釐)The size of this paper applies to the national standard (CNS) A4 (210 X 297 mm) 44278? 3 I 01 \\ · ί *. Σ | 〇c / 0 () 6 Α7 Β7 V. Description of invention (7) Status . The pull-down signal line 134 is directly connected to the pull-down driver 123 from the side of the pull-down driver 123 facing the pull-down signal line 134 via the wire 144 (as shown on the upper side thereof) to provide a pull-down voltage level to the pull-down driver 123. The active device 153 is used to pull down the pull-down driver 123 to a low level state. Of course, the number of the pads of the present invention is not limited to only two, but may be three, four, or more. Similarly, the pads are arranged on one side of the pads to pull up and down the pads. And the number of pull-down drivers has also increased. Please refer to Fig. 1 and Fig. 2 at the same time to compare the differences in wiring methods between the conventional Fig. 1 and the second diagram of the present invention. The following uses the lead 41 and the lead 141 as examples. The lead 141 is directly connected to the pull-up driver 121 from the lower side of the pull-up driver 121 facing the pull-up signal line 131, and the lead 41 is sequentially pulled down from the pull-up signal line 31 along the pull-down driver 23, the welding pad 11 and the top The side of the pull driver 2 丨 is connected to the pull-up driver 21 '. Therefore, according to the wiring method of the present invention, it is obvious that the wiring of the conventional wires 41 through the pull-down driver 23, the bonding pad 11 and the side of the pull-up driver 21 can be reduced. length. Therefore, when the number of the pads of the present invention is large, 'there is no need to reserve space between adjacent pads' not only can greatly reduce the wiring area, but also has the advantage of simple wiring. In addition, if the distance between the position of the pull-up driver and the pull-down driver and the corresponding pad is large, it will not cause a problem of an increase in the wiring area. In addition, 'the wiring method of the present invention can shorten the wire wiring length', so that the signal transmission speed can also be made faster. To sum up, the present invention has the following advantages: ---. 1! -------- · install --- (Please read the precautions on the back first ^ Fill this page) 1T ----- ---- Consumption Cooperation of Employees of the Intellectual Property Bureau of the Ministry of Economic Affairs, Printed Paper Size 剌 <eNS) A4 (21Q x 297 mm) 442 78 7 5 3 I 0: w f.doc / 006 5. Description of the Invention ( 3) (1) The wiring area can be greatly reduced. ⑵Simple wiring. (3) Effectively improve the speed of signal transmission. (4) It is more suitable for wiring of electronic components with high accumulation. Although the present invention has been disclosed as above with a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make various modifications and retouches without departing from the spirit and scope of the present invention. Therefore, the present invention The scope of protection shall be determined by the scope of the attached patent application. (Please read the precautions on the back before filling this page) \ -Packing --- Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs This paper size is applicable to the national standard (CNS) A4 specification (210 X 297 mm)

Claims (1)

44278 7 A8 BS t、申請專利範圍 1.一種關斷晶片驅動器之上拉與下拉元件的佈線,包 括: (請先閱讀背面之注意事項再填寫本頁&gt; 一第一焊墊; 一第二焊墊,相鄰於該第一焊墊; 一第一上拉驅動器,配置於該第一焊墊之下側,用以 提供一第一上拉電壓準位給該第一焊墊; 一第一下拉驅動器,配置於該第一上拉驅動器之右 側,用以提供一第一下拉電壓準位給該第一焊墊; 一第二上拉驅動器,配置於該第二焊墊之上側,用以 提供一第二上拉電壓準位給該第二焊墊; 一第二下拉驅動器,配置於該第二上拉驅動器之左 側,用以提供一第二下拉電壓準位給該第二焊墊; 一第一上拉訊號線,經由一第一上拉導線從面對該第 一上拉訊號線之該第一上拉驅動器的下側,直接連接至該 第一上拉驅動器內,用以提供該第一上拉電壓準位給該第 一上拉驅動器內之主動元件,藉以將該第一上拉驅動器上 拉至一第一高準位狀態; 經濟部智慧財產局員工消費合作社印製 一第一下拉訊號線,經由一第一下拉導線從面對該第 一下拉訊號線之該第一下拉驅動器的下側,直接連接至該 第一下拉驅動器內,用以提供該第一下拉電壓準位給該第 一下拉驅動器內之主動元件,藉以將該第一下拉驅動器下 拉至一第一低準位狀態; 一第二上拉訊號線,經由一第二上拉導線從面對該第 二上拉訊號線之該第二上拉驅動器的上側,直接連接至該 本纸成尸、度適用中固固家慄芈(CNS)A.l規格(21ϋ X 297公釐) 44278 '3 I Olvvf.doc/006 A8 m cs m 六、申請專利範圍 第二上拉驅動器內,用以提供該第二上拉電壓準位給該第 二上拉驅動器內之主動元件,藉以將該第二上拉驅動器上 拉至一第二高準位狀態;以及 一第二下拉訊號線,經由一第二下拉導線從面對該第 二下拉訊號線之該第二下拉驅動器的上側,直接連接至該 第二下拉驅動器內,用以提供該第二下拉電壓準位給該第 二下拉驅動器內之主動元件,藉以將該第二下拉驅動器下 拉至一第二低準位狀態。 2. 如申請專利範圍第1項所述之關斷晶片驅動器之上 拉與下拉元件的佈線,其中該第一上拉驅動器與該第一下 拉驅動器之配置位置可互換。 3. 如申請專利範圍第1項所述之關斷晶片驅動器之上 拉與下拉元件的佈線,其中該第二上拉驅動器與該第二下 拉驅動器之配置位置可互換。 4. 如申請專利範圍第1項所述之關斷晶片驅動器之上 拉與下拉元件的佈線,其中該第一與該第二上拉驅動器及 該第一與該第二下拉驅動器內之主動元件包括金氧半電晶 (請先閱讀背面之注意事項再填寫本頁) s_裝 經濟部智慧財產局Ϊ貝工消費合作社印¾ 本纸5Ϊ、Κ度洎用中固囚家標準(CNSM1規格(21ϋ X 297公釐)44278 7 A8 BS t. Patent application scope 1. A wiring to turn off the pull-up and pull-down components of the chip driver, including: (Please read the precautions on the back before filling out this page &gt; a first pad; a second A pad is adjacent to the first pad; a first pull-up driver is disposed below the first pad to provide a first pull-up voltage level to the first pad; a first A pull-down driver is disposed on the right side of the first pull-up driver to provide a first pull-down voltage level to the first pad; a second pull-up driver is disposed on the upper side of the second pad To provide a second pull-up voltage level to the second pad; a second pull-down driver arranged on the left side of the second pull-up driver to provide a second pull-down voltage level to the second pad; A solder pad; a first pull-up signal line is directly connected to the first pull-up driver from a lower side of the first pull-up driver facing the first pull-up signal line through a first pull-up wire, For providing the first pull-up voltage level to the first pull-up driver The active component in the device is used to pull up the first pull-up driver to a first high-level state; the consumer cooperative of the Intellectual Property Bureau of the Ministry of Economic Affairs prints a first pull-down signal line through a first pull-down wire Directly connected to the first pull-down driver from the lower side of the first pull-down driver facing the first pull-down signal line to provide the first pull-down voltage level to the first pull-down driver An active component inside to pull the first pull-down driver to a first low-level state; a second pull-up signal line, and a second pull-up wire from the surface facing the second pull-up signal line The upper side of the second pull-up driver is directly connected to the paper, which is dead and suitable for CNS Al (21ϋ X 297 mm) 44278 '3 I Olvvf.doc / 006 A8 m cs m 6. In the scope of the patent application, the second pull-up driver is used to provide the second pull-up voltage level to the active component in the second pull-up driver, thereby pulling the second pull-up driver to a second high level. Level status; and a second pull-down signal line, A second pull-down wire is directly connected to the second pull-down driver from the upper side of the second pull-down driver facing the second pull-down signal line, and is used to provide the second pull-down voltage level to the second pull-down driver. The active component is used to pull down the second pull-down driver to a second low level state. 2. Turn off the wiring of the pull-up and pull-down components of the chip driver as described in item 1 of the patent application scope, wherein the first The configuration positions of the pull-up driver and the first pull-down driver are interchangeable. 3. Turn off the wiring of the pull-up and pull-down components of the chip driver as described in item 1 of the patent application scope, wherein the second pull-up driver and the The configuration position of the second pull-down driver is interchangeable. 4. Turn off the wiring of the pull-up and pull-down components of the chip driver as described in item 1 of the patent application scope, wherein the first and the second pull-up drivers and the first The active components in the second pull-down driver include metal-oxide semiconductors (please read the precautions on the back before filling out this page). This paper ¾ 5Ϊ, Κ of the solid with JI prisoners of Standards (CNSM1 specification (21ϋ X 297 mm)
TW88116371A 1999-09-23 1999-09-23 Layout of pull-up and pull down devices for off chip driver TW442787B (en)

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