436942 5 2-Unv Γ. 經濟部智慧財產局員工消費合作社印製 B7 五、發明說明（ί) 本發明是有關於一種半導體封裝方法，且特別是有關 於一種晶圓等級封裝方法。 習知在晶圖上完成半導體元件之製造之後，進行一晶 圓切割（die sawing)步驟，將晶圓切割成數個晶粒，再分 別進行封裝製程以形成各種型態的封裝。由於在晶圓上形 成之半導體元件的尺寸微小，因此極容易因爲持握 (handling)晶粒、空氣中之微粒、水氣（moisture)以及氣 流（air flow)導致形成於晶粒表面半導體元件之損害。所 以必須將晶粒加以封裝成一些密封型態，以避免使形成於 晶粒表面之半導體元件受到損害。 現今再進行晶圓切割之前，先進行一晶圓等級（wafer level)封裝製程，之後再進行晶圓之切割，以解決上述在 晶片切割之後再進行封裝所造成之問題。此外，晶圓等級 封裝還具有封裝尺寸與晶粒大小相當，因此可以大幅降低 封裝件之大小，使封裝件符合現今對於封裝件輕、薄、短、 小之需求》 然而，在晶圓等級之封裝方法係包括在晶圓上的承載 器進行熔劑塗佈、植球製程等製程，所以容易使晶圓之表 面受損或元件受到污染，再者，由於熔劑（nux)不易移 除，容易殘留在晶圓上，導致半導體產品產生電性上的問 題°因此產品之良率降低’造成製造成本的提高。 因此本發明提供一種晶圓等級封裝方法，其方法簡述 如下：提供一基板，其具有第一表面與第二表面，基板由 多個承載器緊密排列而構成，每一承載器具有一開口位於 3 本纸張尺度適用中國國家標準（CNS)A4規栳（2〗〇χ 297公爱） ---^---- -------裂 -------—訂---------線·- (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 1 436942 5 232i\v f diic/O06 A? B7 五、發明說明（>) 承載器之中央，開口周緣的第二表面上配置有多個焊線手 指，焊線手指之外圍具有多個接點，分別與焊線手指電性 連接。接著提供一晶圓，其由多個晶片所構成，晶片之主 動表面上分別具有多個焊墊。以一黏合層，將基板之第一 表面與晶圓之主動表面黏合，其中每一承載器分別對應一 個晶片，且每一晶片之焊墊分別位於對應之承載器的開口 中。進行打導線製程，以導線電性連接焊墊與對應承載器 的焊線手指。然後進行封膠製程，以封膠材料塡充於開 口，以包覆導線、焊墊與焊線手指。進行切割製程，以形 成多個完成晶圓等級封裝之封裝件。 依照本發明的一較佳實施例，其中形成接點之方法包 括進行一電鍍法、無電鍍法所形成之凸塊或是以植球製程 形成之焊接球，且凸塊之形狀可以是球狀或是平板狀=此 外，接點之材質包括含給量較高之錫鈴合金，且其具有較 高的熔點的特性。 在本發明中，在承載器上形成凸塊之後，再與晶圓黏 合，因此可以保護晶圓不受污染與損害，且可以提高產品 良率，甚至降低製造成本= 爲讓本發明之上述和其他目的、特徵、和優點能更明 顯易懂，下文特舉一較佳實施例，並配合所附圖式，作詳 細說明如下： 圖式之簡單說明__ 第1A圖至第1E圖所示，爲根據本發明一較佳實施例 之一種晶圓等級封裝方法流程剖面圖；以及 4 ----ill — — — —--< I . I I I I 1 I I ^ » — — — — — — — — i V (請先閱讀背面之注意事項再填寫本頁) 本紙張尺度適用中國國家標準（CNS)A4规格（210 X 297公釐） 經濟部智慧財產局員工消費合作社印製 436942 五、發明說明（3) 第2圖所示，爲第Μ圖中’承載器100之部分上視 圖； 第3圖係顯示根據本發明另一種凸塊形狀之剖面簡 圖。 其中，各圖標號與構件名稱之關係如下： 100 :基板 102 :開口 104 :承載器 106 :黏合層 108 :接點 109 :焊線手指 110 :切割線 112 :晶圓 112a :主動表面 114 :導線 116 :封膠材料 118 :晶粒 120a :第一表面 i20b :第二表面 實施例 弟1A圖至弟1E圖所不’爲根據本發明一較佳實施例 之一種晶圓等級封裝方法流程剖面圖。第2圖所示，爲第 1A圖中，承載器1〇〇之部分上視圖。 自靑参照第1A圖與第2圖，首先提供—基板 本紙張尺度適用中國國家標準（CNS)A4規格（210 X 297公釐〉 i !!裝.！ 丨 I 訂---ί!!^^ 丨 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消费合作社印製 436942 5252t\vr doc/(H)(i A7 B7 五、發明說明（竿） (substrate) 100，基板1〇〇係由多個承載器104緊密排列 所構成，且每一承載器之間具有一切割線110。基板100 具有一第一表面120a及一第二表面102b。每一承載器104 中央具有一開口 102,開口 102周緣的第二表面102b上配 置有多個焊線手指109 (bonding finger)，焊線手指109 外圍配置多個接點108，且焊線手指109與接點108間分 別以導電跡線（未繪示）電性連結。其中基板100之材質可 以是軟性基板，比如由聚亞醯胺（polyimide)及銅箔疊合 形成之捲帶型承載器，或者是硬質基板，比如是一般之積 IS- ( laminated board) ° 此外，基板100上之第一表面120a上形成有一層黏 合罾（adhesive layer) 106。而在承載器104形成接點108 之方法包括進行一電鍍法（e 1 ec t ι·ορ 1 a t i ng)或是無電鍍 法（elect ropl ess)，以在承載器104上，形成在後續製程 中與電路板電性連接的凸塊（bump)，或是以植球製程，在 承載器104上，形成在後續製程中與電路板電性連接的焊 球（s ο 1 d e r b a 1 1 )，且凸塊之形狀可以是球狀（如第1A圖 所示）或是第3圖所示之平板狀。此外，接點108之材質 包括含鉛量較高之錫鉛合金，且其具有較高的熔點，以防 止接點108在後續進行打導線製程之高溫下，產生變形。 習知晶圓等級之封裝方法中，係在承載器與晶圓相黏 合之後·再於承載器上形成接點或是進行植球製程。由於 在承載器上形成接點或是焊接球的製程過程中，還包含一 連串的淸洗製程與熱製程（例如熱流製程），因此容易對晶 -----------— I — 1— *—— — 1 — I - ^ I - — — — — — — I, 4 (請先閲讀背面之注意事項再填寫本頁) 本紙張尺度適用中囷國家標準（CNS)A4規格<2】〇x 297公釐） ^ 436942 >c/<)〇6 A7 B7 五、發明說明（孓） 圓造成污染以及損害，造成良率降低，產品之成本提高。 在本發明中，由於先在承載器104上形成接點，再於 後續製程中，將承載器104與晶圓黏合，因此可以保護晶 圓不受污染與損害，且可以降低製造成本與提高產品良 率。 接著，請參照第1B圖，經由基板100上的黏合層106 與一晶圓1 12的主動表面112a黏合。其中，晶圓112之 主動表面112a中形成有半導體元件（未繪示），且在主動 表面112a上，形成有與外界電性連接之焊墊112b，而焊 墊112b，則位於承載器104之開口 102中。 之後，請參照第1C圖，進行一打導線製程（wire bonding)，形成導線114，導線114相對應電性連接晶圓 Π2之焊墊112b與承載器104上之焊線手指109，也就是 晶圓112與承載器104經由導線114形成電性連接。 續之，請參照第1D圖，進行一封膠製程 (encapsulation process)，以形成包覆主動表面112a上 之焊墊112b、承載器104上之焊線手指109與導線114之 封膠材料116。其中，封膠製程例如是鑄模法（molding)、 網版印刷法（printing)或是點膠法（dispensing或可稱 爲 £lob top)等。 繼之，請參照第1E圖，進行一晶圓切割製程，由切 割線110爲準，將晶圓1〇〇切割成數個完成晶圓等級封裝 之封裝件118。 雖然本發明已以一較佳實施例揭露如上，然其並非用 7 本紙張尺度翻Ψ固國家樣準（CNS)A4規格（21qx 297公爱） — — — — — Ϊ — lllll-J ·1111111 ·11111111 ^ < (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員Η消费合作杜印製 436942 Λ 2 3 21 \\ Γ. d c /0 0 6 ^ B7 五、發明說明（厶） 以限定本發明，任何熟習此技藝者，在不脫離本發明之精 神和範圍內，當可作各種之更動與潤飾，因此本發明之保 護範圍當視後附之申請專利範圍所界定者爲準. (請先間讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消费合作社印髮 本紙張尺度適用中國固家標準（CNS>A4規格（210^297公釐）436942 5 2-Unv Γ. Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs B7 V. Description of the invention (ί) The present invention relates to a semiconductor packaging method, and more particularly to a wafer-level packaging method. It is conventionally known that after the fabrication of a semiconductor device is completed on a crystal pattern, a die sawing step is performed to cut a wafer into several dies, and then a packaging process is performed to form various types of packages. Due to the small size of the semiconductor elements formed on the wafer, it is extremely easy to cause the semiconductor elements formed on the surface of the die due to the handling of the dies, particles in the air, moisture, and air flow. damage. Therefore, the die must be encapsulated into some sealed forms to avoid damaging the semiconductor elements formed on the surface of the die. Before wafer dicing is performed today, a wafer level packaging process is performed first, and then wafer dicing is performed to solve the above-mentioned problems caused by packaging after wafer dicing. In addition, the wafer-level package also has a package size that is comparable to the die size, so it can significantly reduce the size of the package and make the package meet the current requirements for light, thin, short, and small packages. However, at the wafer level, The packaging method includes processes such as flux coating and ball implantation on the carrier on the wafer, so it is easy to damage the surface of the wafer or the components are contaminated. Furthermore, because the flux (nux) is not easy to remove, it is easy to remain On the wafer, electrical problems are caused in the semiconductor products. Therefore, the yield of the products is reduced, which leads to an increase in manufacturing costs. Therefore, the present invention provides a wafer-level packaging method. The method is briefly described as follows: A substrate is provided, which has a first surface and a second surface. The substrate is composed of a plurality of carriers closely arranged, and each carrier has an opening at 3 This paper size applies the Chinese National Standard (CNS) A4 Regulations (2) 〇χ 297 公 爱) --- ^ ---- --------------------- ------- Line ·-(Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 1 436942 5 232i \ vf diic / O06 A? B7 V. Description of the invention ( >) In the center of the carrier, a plurality of wire bonding fingers are arranged on the second surface of the opening periphery, and the periphery of the wire bonding fingers has a plurality of contacts, which are electrically connected to the wire bonding fingers, respectively. A wafer is then provided, which is composed of a plurality of wafers, each of which has a plurality of pads on its active surface. The first surface of the substrate is bonded to the active surface of the wafer with an adhesive layer, wherein each carrier corresponds to a wafer, and the pads of each wafer are respectively located in the corresponding openings of the carrier. Conduct the wire bonding process, and use the wire to electrically connect the solder pad to the wire bonding finger of the corresponding carrier. Then, the sealing process is performed, and the opening is filled with the sealing material to cover the wires, solder pads and welding fingers. A dicing process is performed to form multiple packages that complete wafer level packaging. According to a preferred embodiment of the present invention, the method for forming a contact includes performing a bump formed by an electroplating method, an electroless plating method, or a solder ball formed by a ball-planting process, and the shape of the bump may be spherical. Or flat-shaped = In addition, the material of the contact includes a tin-bell alloy with a relatively high content and has a high melting point. In the present invention, after the bumps are formed on the carrier, they are bonded to the wafer, so the wafer can be protected from contamination and damage, and the product yield can be improved, and even the manufacturing cost can be reduced. Other objects, features, and advantages can be more clearly understood. A preferred embodiment is described below in conjunction with the accompanying drawings to explain in detail as follows: Brief description of the drawings __ Figures 1A to 1E , Is a cross-sectional view of a wafer-level packaging method according to a preferred embodiment of the present invention; and 4 ---- ill — — — —-< I. IIII 1 II ^ »— — — — — — — — I V (Please read the notes on the back before filling in this page) This paper size is applicable to China National Standard (CNS) A4 (210 X 297 mm) Printed by the Consumers ’Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 436942 V. Description of Invention (3) Figure 2 is a top view of a portion of the carrier 100 in Figure M; Figure 3 is a schematic cross-sectional view showing another bump shape according to the present invention. Among them, the relationship between each icon number and component name is as follows: 100: substrate 102: opening 104: carrier 106: adhesive layer 108: contact point 109: wire bonding finger 110: cutting line 112: wafer 112a: active surface 114: wire 116: Sealant material 118: Die 120a: First surface i20b: Second surface Examples 1A to 1E are not shown in the figure. This is a cross-sectional view of a wafer-level packaging method according to a preferred embodiment of the present invention. . Figure 2 is a partial top view of the carrier 100 in Figure 1A. Please refer to Figure 1A and Figure 2 for the first time. First, the paper size of the substrate is applicable to China National Standard (CNS) A4 (210 X 297 mm). I !! Packing.! 丨 I Order --- ί !! ^ ^ 丨 (Please read the notes on the back before filling this page) Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 436942 5252t \ vr doc / (H) (i A7 B7 V. Invention Description (substrate) 100, The substrate 100 is composed of a plurality of carriers 104 closely arranged, and each carrier has a cutting line 110 therebetween. The substrate 100 has a first surface 120a and a second surface 102b. The center of each carrier 104 A plurality of bonding fingers 109 are disposed on the second surface 102b with an opening 102, and the periphery of the opening 102 is provided with a plurality of contacts 108 on the periphery of the bonding fingers 109. It is electrically connected by conductive traces (not shown). The material of the substrate 100 can be a flexible substrate, such as a tape-shaped carrier formed by laminating polyimide and copper foil, or a rigid substrate. For example, the general product IS- (laminated board) ° In addition, the substrate 1 An adhesive layer 106 is formed on the first surface 120a on 00. The method of forming the contact 108 on the carrier 104 includes performing an electroplating method (e 1 ec t ι · ορ 1 ati ng) or not. Electroplating (elect ropl ess) is used to form bumps on the carrier 104 to be electrically connected to the circuit board in subsequent processes, or to form a ball on the carrier 104 to form subsequent processes The solder ball (s ο 1 derba 1 1) which is electrically connected to the circuit board in the middle, and the shape of the bump can be spherical (as shown in FIG. 1A) or flat plate as shown in FIG. 3. In addition, The material of the point 108 includes a tin-lead alloy with a higher lead content, and it has a higher melting point to prevent the contact 108 from being deformed under the high temperature of the subsequent wire bonding process. In the conventional wafer-level packaging method, After the carrier and the wafer are bonded, a contact is formed on the carrier or a ball implantation process is performed. Because the process of forming a contact or a solder ball on the carrier includes a series of cleaning processes and Thermal processes (such as heat flow processes), so To crystal -----------— I — 1— * —— — 1 — I-^ I-— — — — — — I, 4 (Please read the notes on the back before filling this page ) This paper size applies the China National Standard (CNS) A4 specification < 2] 〇x 297 mm) ^ 436942 > c / <) 〇6 A7 B7 V. Description of the invention (孓) Circles cause pollution and damage, This results in lower yields and higher product costs. In the present invention, since a contact is formed on the carrier 104 first, and then the carrier 104 is bonded to the wafer in a subsequent process, the wafer can be protected from pollution and damage, and the manufacturing cost can be reduced and the product can be improved. Yield. Next, referring to FIG. 1B, the active layer 112 a of a wafer 112 is bonded to the active surface 112 a of the wafer 12 through the adhesive layer 106 on the substrate 100. Wherein, a semiconductor element (not shown) is formed in the active surface 112a of the wafer 112, and a pad 112b electrically connected to the outside is formed on the active surface 112a, and the pad 112b is located in the carrier 104. In the opening 102. After that, referring to FIG. 1C, a wire bonding process is performed to form a wire 114, and the wire 114 corresponds to the pad 112b of the wafer Π2 and the wire finger 109 on the carrier 104, which is a crystal The circle 112 and the carrier 104 are electrically connected to each other via a wire 114. Continuing, referring to FIG. 1D, an encapsulation process is performed to form an encapsulation material 116 covering the bonding pads 112b on the active surface 112a, the wire fingers 109 on the carrier 104, and the wires 114. The sealing process is, for example, a molding method, a printing method, or a dispensing method (also referred to as £ lob top). Next, referring to FIG. 1E, a wafer dicing process is performed. Based on the dicing line 110, the wafer 100 is cut into a plurality of packages 118 that complete a wafer-level package. Although the present invention has been disclosed as above with a preferred embodiment, it is not a 7-paper scale for the National Standard (CNS) A4 specification (21qx 297 public love) — — — — — Ϊ — lllll-J · 1111111 · 11111111 ^ < (Please read the notes on the back before filling out this page) Member of the Intellectual Property Bureau of the Ministry of Economic Affairs and Consumer Cooperation Du printed 436942 Λ 2 3 21 \\ Γ. Dc / 0 0 6 ^ B7 V. Description of the invention (厶) To limit the present invention, anyone skilled in the art can make various modifications and retouching without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be defined by the scope of the attached patent application. (Please read the precautions on the back before filling out this page) The paper size issued by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs applies this Chinese standard (CNS > A4 specification (210 ^ 297 mm)