434701 A7 ------_JB7 五、發明説明（/ ) 詳細說明： 技術領域： 本發明係關於一種利用離子佈植之基板切割法，特別 是關於一種能縮小基板切割時所須之切割線寬 確度至微料下等級的基板切割法。 發明背景： 按，硬脆基板之切割技術為半導體構裝製裎（如積體 電路(1C)、發光二極體等(LED))及光電元件製程（如半導 體雷射(Laser Diode)、太陽電池(s〇丨ar Cell)等）均需要的 關鍵製程技術。現今業界所通用的切割製程，係以電鍍鑽 石砂輪（Electroplated Cutting Wheel)或電鐘鑛片 (Electroplated Dicing Blade)來進行，以機械研磨的方式進 行基板的切割。例如德國西門子公司和日本東芝公司所共 同擁有的中華民國專利第293927號所揭露之「切割半導體 基板的方法與裝備」中，便是使用一組正交的線鋸陣列來 進行晶片的切割。 惟，上述二種習用技術皆是以機械研磨的方式進行基 板的切割，其具有下列的缺點： 1 _切割線寬大於20微米(Micron Meter)，電鍍鑽石砂 輪的切割線寬甚至在40微米以上，使得半導體元件在進行 a又af及佈局時必須預留相當大的面積做為晶片切割之用。 近二十年來’為了降低製造成本以提高產品的競爭力，各 薇家無不極力縮減積體電路的關鍵尺寸(Critical Dimension; CD)。然而因為基板的切割道佔了相當大的面積而且不能 本紙張尺度適财卵家料（CNS) M祕（2丨GX2〗7公董） (請先聞讀背面之注意事項再填寫本頁) -訂· 經濟部智慧財產局員工消費合作社印製 434701 A7 ----------- - 五、發明説明（/) ' ~~~ 縮減，每一基板所能產出的晶粒數便大受限制 成本無法進一步降低。 2. 利用機械研磨的方式進行基板切割時，必須一線、 -線逐-切割，而無法-次便完成—片基板的切割，切割 效率無法提昇。 3. 使用鑽石砂輪進行機械研磨，鑽石砂輪的磨損率相 當大’而且易產生大量的粉塵及顆粒而污染元件，使產品 的良率下降。 4. 任何基板在沉積上薄膜後，皆會因不同材質間晶格 常數(Lattice CGnstant)的差異喊线力，並目錢基板 產生應變(Warpage)。尤其是微處理器(Mjcr〇pr〇cess〇r)和 動態隨機存取記憶體(DRAM)等複雜的積體電路通常會沉 積上一十層以上的薄膜並將其定義成積體電路的圖案，晶 片上所產生的應變經常會大到幾十微米（對八吋晶片而 言）。若再加上晶背研磨(Back Grinding)製程，八吋晶片 所產生的應變有時會大到-百多微米。在如此大的應=及 應變下’使用機#研磨方式進行基板十刀割常會造成龜裂或 破片，影響產品的良率至矩。 由前述說明可得知，使用機械研磨的方式進行基板的 切割實有許多難以克服的缺點，因此找尋有別於機^研磨 方式的其他技術以克服這些缺點便顯得相當重要。在另一 方面，Kaminsky 在旧EE Trans. Nucl. Sci. MS- 18(1971)2〇8-論文中，首先揭露植入金屬的氣體離子會 在金屬内形成微小氣泡(Microbubbles)的現象。此後此現 本紙張尺度適用中國國家標準（CNS > A4規格（210X号7公瘦） (請先閲讀背面之注意事項再填寫本頁) i装 訂_ 經濟部智慧財產局員工消費合作社印製 經濟部智慧財產局員工消費合作社印製 4347 ϋ 1 Α7 _Β7_ 五、發明説明（多） 象成為核子反應爐之設計上的一個重要的問題’因為核子 反應所產生的α粒子（亦即氦氣離子）不斷撞擊在反應器 之内壁上，會造成金屬不斷地層狀剝離’對核子工業造成 莫大的困擾，此現象的說明及解釋請詳見S.K_ Das,在 Radiat. Eff. 53 (1980)257與R.G. Saint Jacques，在Nucl_ Instr. and Meth. 209/210(1983)333所發表的論文。 氣體離子的植入除了會使金屬層產生層狀剝離外，亦 會使半導體產生層狀剝離。Michel Brue丨在Nuclear Instruments and Methods in Physics Research B 108 (1996) 313-319 論文中以及 Christophe Maleville 在 Materials Science and Engineering 巳46 (1997) 14-19等論 文中皆提到，利用氫離子對半導體基板進行佈植並加熱可 以使所述基板整層剝離，用以製造絕緣層上矽晶層(Silicon On Insu丨ator)。其原理是當大量氫離子植入半導體基板並 對基板進行加熱之後，會使基板產生許多微小氣泡，所述 微小氣泡受熱膨脹’氣體壓力會使半導體基板整層剝離。 發明概述： 本發明的主要目的為提供一種利用離子佈植技術所進 行之基板切割法。 本發明的次要目的為提供一種能縮小基板切割時所需 之切割線寬及切割線精確度至微米以下等級之基板切割 法。 本發明係揭露一種利用離子佈植之基板切割法，能縮 本紙張纽適用中國國家標隼（c叫(2【〇 7公董） -~—- ——^--------X-----丨訂-------'!- - t (請先閱讀背面之注^項再填寫本頁) A7 B7 4347 Ο 1 五、發明説明（+ ) 小基板蝴時所需之切麟寬及城線精確度至微米以下 等級’將所述基m蝴道切朗而舰分離的晶粒， 並達到奈米等級的切割面粗糙度。其步驟首先將所述基板 置入一離子佈植機内，接著利用離子佈植法並藉由一遮蔽 罩的輔助，將氣體離子植入所述基板的切割道中，其中所 逃氣體離子係氫氣和氦氣等不會與該絲產生化學作用的 氣體。接下來對所述基板進行熱處理，基板便會在所述切 割道處裂開而完成基板的切割。 所述熱處理的溫度介於1〇〇至6〇〇它之間，必須依氣 體離子摻雜的濃度而定。若所植入氣體的濃度較高（如大 於1E17 cnr2) ’則所需加熱的溫度便不用太高（小於 250C)便能有剝裂切割之作用，以符合某些元件較低的 熱預算(Thermal Budget);反之，若氣體植入的濃度較 低，則須加熱至較高之溫度，方能有剝裂切割之作用。 本發明所揭露之方法的優點在於，切割道之寬度可縮 小至微来以下等級以及切割面的粗糙度可縮小至奈米等 級’使得半導體元件在進行設計及佈局時可節省切割道之 寬度而配屬較大的面積做為晶粒(Chjps)之用，如此單一晶 片上所能生產的晶粒數量便可大幅增加，可降低製造成本 而提高產品的競爭力。本發明揭露的方法可一次完成一整 片基板的切割’而且基板切割的過程不會因基板上的應力 而使基板造成龜裂或破片，可進一步提高切割製程的良率 以及產量。 本紙張尺度適用中國國家標孪（CNS ) A4規格（210X号7公釐} —^---------.氣— * (請先閲讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 4347 ϋ1434701 A7 ------_ JB7 V. Description of the invention (/) Detailed description: Technical field: The present invention relates to a substrate cutting method using ion implantation, and more particularly to a cutting line that can reduce the cutting of a substrate. Substrate cutting method with wide accuracy to submicron level. Background of the invention: According to the cutting technology of hard and fragile substrates, semiconductor fabrication (such as integrated circuits (1C), light emitting diodes (LED)) and optoelectronic component processes (such as semiconductor laser (Laser Diode), solar Batteries (solar cells, etc.) are key process technologies required. The cutting process commonly used in the industry today is performed by electroplated diamond wheels (Electroplated Cutting Wheel) or electro-plated dicing blade (Electroplated Dicing Blade), and the substrate is cut by mechanical grinding. For example, in the "Method and Equipment for Cutting Semiconductor Substrates" disclosed in the Republic of China Patent No. 293927, jointly owned by Germany's Siemens and Japan's Toshiba, a set of orthogonal wire saw arrays is used to cut the wafer. However, the above two conventional techniques are used to cut the substrate by mechanical grinding, which has the following disadvantages: 1_ The cutting line width is greater than 20 microns (Micron Meter), the cutting line width of electroplated diamond grinding wheels is even above 40 microns Therefore, a considerable area must be reserved for wafer cutting during the a and af and layout of the semiconductor element. In the past two decades, in order to reduce the manufacturing cost and improve the competitiveness of products, all Weijia families have tried to reduce the critical dimension (CD) of the integrated circuit. However, because the dicing path of the substrate occupies a considerable area and cannot be used in this paper scale (CNS) M Secret (2 丨 GX2〗 7), (please read the precautions on the back before filling this page) -Order · Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 434701 A7 ------------V. Description of the Invention (/) '~~~ Reduce the number of crystals that can be produced by each substrate The cost is limited and cannot be further reduced. 2. When substrate cutting is performed by mechanical grinding, cutting must be performed line by line, line by line, and cannot be completed in one pass. The cutting efficiency of the substrate cannot be improved. 3. The diamond grinding wheel is used for mechanical grinding. The wear rate of the diamond grinding wheel is quite large, and it is easy to produce a large amount of dust and particles to pollute the components, which reduces the yield of the product. 4. After any substrate is deposited with a thin film, it will cause a strain (Warpage) due to the difference in lattice constant (Lattice CGnstant) between different materials. In particular, complex integrated circuits such as microprocessors (Mjcr0pr〇cess〇r) and dynamic random access memory (DRAM) usually deposit more than ten layers of thin film and define it as a pattern of integrated circuits The strain generated on the wafer is often as large as tens of microns (for eight-inch wafers). If coupled with the Back Grinding process, the strain generated by an eight-inch wafer can sometimes be as large as -100 microns. Under such a large amount of stress and strain, the use of machine # grinding method for substrate ten-cut cutting often causes cracks or fragments, which affects the yield to the moment of the product. From the foregoing description, it can be known that the use of mechanical grinding to cut the substrate has many disadvantages that are difficult to overcome. Therefore, it is very important to find other technologies that are different from the mechanical grinding method to overcome these disadvantages. On the other hand, in the old EE Trans. Nucl. Sci. MS-18 (1971) 2008-paper by Kaminsky, he first revealed that the gas ions implanted into the metal can form microbubbles in the metal. Since then, this paper size applies to Chinese national standards (CNS > A4 size (210X No. 7 male thin) (Please read the precautions on the back before filling out this page) i Binding _ Printed by the Intellectual Property Bureau's Consumer Consumption Cooperative Printed by the Consumer Cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs 4347 ϋ 1 Α7 _Β7_ V. Description of the invention (many) Elephants have become an important issue in the design of nuclear reactors. 'Because of the alpha particles produced by nuclear reactions (that is, helium ions) ) Continuous impact on the inner wall of the reactor will cause the continuous stratified stripping of the metal, which will cause great disturbance to the nuclear industry. For a description and explanation of this phenomenon, see S.K_ Das, in Radiat. Eff. 53 (1980) 257 and RG Saint Jacques, Nucl_Instr. And Meth. 209/210 (1983) 333. The implantation of gas ions will not only cause layered peeling of metal layers, but also layered peeling of semiconductors. Michel Brue 丨 in Nuclear Instruments and Methods in Physics Research B 108 (1996) 313-319 and Christophe Maleville in Materials Science and Engineering 巳 46 (1997) 14- It has been mentioned in 19 papers that the use of hydrogen ions to implant and heat a semiconductor substrate can peel off the entire layer of the substrate to produce a Silicon On Insuator. The principle is that when a large number of After the hydrogen ions are implanted into the semiconductor substrate and the substrate is heated, the substrate will generate a lot of micro-bubbles, and the micro-bubbles will be thermally expanded and the gas pressure will cause the entire layer of the semiconductor substrate to peel off. Substrate cutting method by ion implantation technology. A secondary object of the present invention is to provide a substrate cutting method capable of reducing the cutting line width and cutting line accuracy required to a level below micron when cutting a substrate. The present invention discloses a substrate cutting method The substrate cutting method using ion implantation can reduce the size of the paper and apply the Chinese national standard (c called (2 [〇7 公 董)-~ —- —— ^ -------- X ---- -丨 Order ------- '!--T (Please read the note on the back ^ before filling in this page) A7 B7 4347 〇 1 V. Description of the invention (+) The cutting board needed for the small substrate butterfly Wide and city line accuracy to the sub-micron level 'will be described The crystals are separated and separated, and the cutting surface roughness reaches nanometer level. The steps are to first place the substrate in an ion implanter, and then use the ion implantation method and a mask With the help of the cover, gas ions are implanted into the cutting path of the substrate, wherein the escaped gas ions are hydrogen gas and helium gas, which do not have a chemical action with the wire. Next, the substrate is heat-treated, and the substrate is cracked at the cutting path to complete the cutting of the substrate. The temperature of the heat treatment is between 100 and 600, and it depends on the concentration of gas ion doping. If the concentration of the implanted gas is high (such as greater than 1E17 cnr2), then the required heating temperature does not need to be too high (less than 250C) to have the effect of peeling and cutting to meet the lower thermal budget of some components ( Thermal Budget); Conversely, if the concentration of the gas implantation is low, it must be heated to a higher temperature to have the effect of cracking and cutting. The method disclosed by the present invention has the advantages that the width of the dicing path can be reduced to the following level and the roughness of the cutting surface can be reduced to the nanometer level, so that the semiconductor device can save the width of the dicing path when designing and layout A larger area is allocated for the use of Chjps, so the number of crystals that can be produced on a single wafer can be greatly increased, which can reduce manufacturing costs and improve product competitiveness. The method disclosed in the present invention can complete the cutting of a whole substrate at a time, and the substrate cutting process will not cause the substrate to be cracked or broken due to the stress on the substrate, which can further improve the yield and yield of the cutting process. This paper size applies to China National Standard (CNS) A4 specification (210X No. 7 mm) — ^ ---------. Qi — * (Please read the precautions on the back before filling this page) Order economy Printed by the Ministry of Intellectual Property Bureau's Consumer Cooperatives 4347 ϋ1
圖式的簡要說明： 圖一為本發明所揭露利用離子佈植之基板切割法的流程 圖。 圖二Α是本發明中利用離子佈植法將氣體離子植入基板的 切割道中的製程剖面圖。 圖二B是本發明中利用離子佈植法將氣體離子植入基板的 切割道中的俯視圖。 圖三A是本發明所使用之遮蔽罩的示意圖。 圖三B是本發明中以遮蔽罩將氣體離子以線狀或網狀植入 的立體示意圖。 圖四A是本發明中在基板之切割道所植入的氫離子經熱處 理後形成微小氣泡的剖面示意圖。 圖四B是本發明中熱處理提昇到一定溫度之後，該微小氣 泡所產生的氣體壓力將基板從切割道裂開的剖面 示意圖。 圖四C顯示完成基板切割程序後的示意圖，圖中各方塊各 代表一晶粒。 (請先閲讀背面之注意事項再填寫本頁)Brief description of the drawings: FIG. 1 is a flowchart of a substrate cutting method using ion implantation disclosed in the present invention. FIG. 2A is a cross-sectional view of a process for implanting gas ions into a dicing path of a substrate using an ion implantation method in the present invention. Fig. 2B is a top view of a dicing path for implanting gas ions into a substrate by an ion implantation method in the present invention. FIG. 3A is a schematic diagram of a shielding cover used in the present invention. Fig. 3B is a schematic perspective view of implanting gas ions in a linear or mesh shape with a shielding cover in the present invention. FIG. 4A is a schematic cross-sectional view of the hydrogen ions implanted in the scribe line of the substrate in the present invention to form micro-bubbles after thermal treatment. FIG. 4B is a schematic cross-sectional view of the substrate cracked from the cutting path by the gas pressure generated by the micro-bubbles after the heat treatment is raised to a certain temperature in the present invention. Figure 4C shows the schematic diagram after the substrate cutting process is completed. Each block in the figure represents a die. (Please read the notes on the back before filling this page)
1T 經濟部智慧財產局員工消費合作社印製 圖號說明： 21-咬基板 22- 氫離子 23-切割道 30- 遮蔽罩 31-透空處 41- 微小氣泡 42-晶粒 ^紙張尺度適用中國國家標準· ( CNS ) A4規格（210X2g7公釐} 43470 1 A7 ------ B7 五、發明説明(I ) 一 ' —-- '本發_揭露，利_子佈婦程進行之基板切割 法。本方法適用於各種基板的切割，也適用於如積體電路 和發光二極體等半導體構裝製程，以及如半導體雷射或太 陽電池等光電元件的製程。 錢請參考®-，係本發騎揭露细離子佈植技術 之基板切割法的流程圖。首先將欲進行切割的基板置入一 離子佈植機_ _3_中10，利用離子佈植法將氣體 離子植入所述基板的切割道中H，接著對所述基板進行熱 處理12 ’紐便會在所述切割道處·而完絲板的切割 13 〇 本實施例以現今的主流產品之八吋矽基板(Sj丨丨c〇n1T Printed drawing description of employee cooperatives of the Intellectual Property Bureau of the Ministry of Economic Affairs: 21-biting substrate 22- hydrogen ion 23-cutting line 30- shielding cover 31-open space 41- micro-bubble 42-grain ^ paper size applicable to China Standard · (CNS) A4 specification (210X2g7mm) 43470 1 A7 ------ B7 V. Description of the invention (I) A '----' This issue_disclosure, Lee_Zibu women's board cutting This method is suitable for the cutting of various substrates, and also suitable for semiconductor fabrication processes such as integrated circuits and light-emitting diodes, as well as the fabrication of optoelectronic components such as semiconductor lasers or solar cells. Please refer to ®-, system The present invention discloses a flowchart of a substrate cutting method of fine ion implantation technology. First, a substrate to be cut is placed in an ion implanter __3_ in 10, and gas ions are implanted into the substrate by the ion implantation method. H in the dicing path of the substrate, and then heat-treating the substrate 12 'at the dicing path, and the cutting of the silk plate 13 is completed. In this embodiment, an eight-inch silicon substrate (Sj 丨 丨 c 〇n
Substrate)21關，說明本發明的製程步驟。原始八对秒 基板的厚度約為725 H在完成全部製程⑽約為735 微米，再經晶背研磨(Back Grinding)後其厚度約介於200 至300微来之間。接下來請參考圖二A及圖二B，配合圖 不洋細說明所述利用離子佈植法將氣體離子植入所述基板 的切割道中11的製程步驟，其中圖二A是此製程步驟的 剖面圖’而圖二B是俯視圖。本發明利用離子佈植機，將 氫離子22植入基板的切割道23中，其佈植能量介於4〇 至1000KeV之間’因此其植入的深度介於〇6至1〇〇微米 之間，其中最佳的佈植能量為2〇〇KeV;而其植入的濃度 則介於5E15至5E17cm-2之間，其中最佳的植入濃度為 8E16 cnrT2。 另外，本發明並不限定在矽基板的切割製程。舉凡光 .4規格（21〇X2$7公釐） ----------"-- (請先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 43470 hi B7 五、發明説明（^ ) 電半導體所使用的砷化鎵(GaAs) '磷化鎵(Gap)、磷化銦 (InP)、藍寶石(saphire)以及薄膜電晶體液晶顯示器(TFt_ LCD)所使用的玻璃基板等，不論單晶體(Single Crystal)或 非晶體(Amorphous)都可以應用本發明所揭露的方法進行 切割。 請參考圖三A和圖三B ’為了使氫離子僅植入基板的 切割道中’而不會植入基板的其他區域，本發明利用一特 徵結構為線狀或網狀的遮蔽罩3〇，只允許植入切割道的離 子通過’而將會植入晶粒的離子全數擋掉，以達到將氣體 離子以線狀或網狀植入基板之切割道的目的。所述遮蔽罩 如圖三A所示，其透空處31係對應基板的切割道，而圖 三B則顯示出以遮蔽罩將氣體離子以線狀或網狀植入基板 之切割道的立體示意圖.所述遮蔽罩30可使用金屬或其 他任何材質所形成，只要能達成阻擋氣體離子的功效即 可’其製作方法也沒有限制。 接下來請參考圖四A、圖四B、和圖四C，將上述基 板進行熱處理，基板便會在所述切割道處裂開而完成基板 的切割。加熱的方法可使用加熱板加熱或利用氣體、紅外 線、或雷射等做接觸或非接觸式的加熱。在經過加熱後， 在基板之切割道所植入的氫離子會形成許多微小氣泡 (Microbubbles)41，如圖四A所示（為求簡明，圖中僅顯 示一氣泡）。所述微小氣泡係在基板中所生成的氣相區域 (Gas Phase)，依摻雜氣體種類、濃度以及能量的不同而 生成基板中的點缺陷（Point Defects)、線缺陷（Line 本紙張妓適财關家網!·（ CNS ) A4胁（21GX2|7公釐） (祷先閱讀背面之注意事項再填寫本頁) 訂 經濟部智慧財產局員工消費合作社印製 434701 Α7 Β7 五、發明説明（'~〜Substrate) 21 level, explaining the process steps of the present invention. The thickness of the original eight-second substrate is about 725 H. After the entire process is completed, it is about 735 μm, and then the thickness of the substrate is about 200 to 300 micrometers after back grinding. Next, please refer to FIG. 2A and FIG. 2B, and describe in detail the process steps of implanting gas ions into the cutting path of the substrate by using the ion implantation method with reference to FIG. 2A, where FIG. 2A is the Sectional view 'and Figure 2B is a top view. In the present invention, an ion implanter is used to implant hydrogen ions 22 into the cutting path 23 of the substrate. The implantation energy is between 40 and 1000 KeV ', so the implantation depth is between 0.6 and 100 microns. Among them, the best implantation energy was 2000 KeV; and the implantation concentration was between 5E15 and 5E17cm-2, and the optimal implantation concentration was 8E16 cnrT2. In addition, the present invention is not limited to a dicing process of a silicon substrate. Ju Fanguang. 4 specifications (21〇X2 $ 7mm) ---------- "-(Please read the precautions on the back before filling out this page) Order by the Intellectual Property Bureau Staff Consumer Cooperatives System 43470 hi B7 V. Description of the Invention (^) Gallium arsenide (GaAs) 'Gap', InP, Saphire, and thin-film transistor liquid crystal display (TFt_ LCD) used in electrical semiconductors ) The glass substrate and the like used, whether single crystal or amorphous, can be cut by applying the method disclosed in the present invention. Please refer to FIG. 3A and FIG. 3B 'in order to implant hydrogen ions only into the cutting path of the substrate' and not to implant into other areas of the substrate, the present invention utilizes a shielding structure 3 which is linear or meshed with a characteristic structure, Only the ions implanted into the cutting path are allowed to pass through, and all the ions implanted into the crystal grain are blocked, so as to achieve the purpose of implanting gas ions into the cutting path of the substrate in a linear or mesh shape. The shielding cover is shown in FIG. 3A, and the through-hole 31 is corresponding to the cutting path of the substrate, and FIG. 3B shows a three-dimensional shape of the cutting path in which the gas ions are implanted into the substrate in a linear or mesh manner. Schematic. The shielding cover 30 can be formed of metal or any other material, as long as it can achieve the effect of blocking gas ions. There is no limitation on the manufacturing method. Next, please refer to FIG. 4A, FIG. 4B, and FIG. 4C, heat-treating the above-mentioned substrate, and the substrate will be cracked at the cutting path to complete the cutting of the substrate. The heating method can be heated with a hot plate or contacted or non-contacted with gas, infrared rays, or laser. After heating, many microbubbles 41 are formed by the hydrogen ions implanted in the dicing path of the substrate, as shown in Figure 4A (for simplicity, only one bubble is shown in the figure). The gas phase area (Gas Phase) generated in the substrate by the micro-bubbles generates point defects (Line Defects) and line defects (Line paper) in the substrate depending on the type, concentration and energy of the doping gas. Caiguanjia.com! (CNS) A4 (21GX2 | 7mm) (Please read the notes on the back before filling this page) Order printed by the Intellectual Property Bureau Staff Consumer Cooperatives of the Ministry of Economic Affairs 434701 Α7 Β7 V. Description of the invention ( '~~
Defects)、面缺陷（p|arie Deiects)、或體缺陷汩毗 Defects)。當熱處理提昇到一定溫度之後，該微小氣泡所 產生的氣體壓力便會使該基板從切割道處裂開（沿著圖中 箭頭方向），如圖四B所示。圖四C則顯示完成基板切割 程序後的示意圖，圖中各方塊各代表單一晶粒42。 所述熱處理的溫度介於1〇〇至6〇(rc之間，必須依， 體離子摻雜的濃度而定。若所植入氣體的濃度較高（如^ 於)E17 cm·2)，則所需加熱的溫度便不用太高（小於 250C)便能有剝裂切割之作用，以符合某些元件較低的 熱預算(Thermal Budget);反之，若氣體植入的濃度較 低，則須加熱至較高之溫度，方能有剝裂切割之作用。以 前揭最佳實施例而言，針對一經晶背研磨的八对石夕基板而 言，其佈植能量為200KeV，植入的濃度為8E16 an·2 ’ 則其所須熱處理的溫度約為250°C。 正因所須熱處理的溫度與氣體離子佈植的濃度息息相 關’配合產品的特性以決定溫度及濃度的參數便非常重 要。例如鋁的熔點為659/rc，然而若溫度超過的旳鋁 的結構便會開始改變，因此⑽金屬做為金屬連線的積體 電路’其熱處理的溫度便不宜高過4〇crc。因此在進行切 割製程時，所植入氣體的濃度便不宜過低。 此外，除了使用氫氣做為植入的氣體外，亦可使用氦 氣或是其他氣體，但有一限制是不得選用在高溫下會與基 板起化學變化的氣體。例如在石夕基板的切割製程便不能使 用氧氣做為植入氣體’否則氧氣在高溫下會與矽基板化合 本紙糾⑽鮮目轉料（CNS } Α4^(210χψ^) f請先聞讀背面之注意事項再嗔办尽耳) 訂 經濟部智慧財產局員工消費合作社印製 434701 i A.l 一 -------— — 五、發明説明（1) 〜 '— 成二氧化矽。 正因本發明是利用一遮蔽罩讓由離子佈植機所產生的 {請先閲讀背面之注意事項再填寫本頁) 氣體離子準確地植入基板的切割道，再經由熱處理使其板 在切割道裂開，因此切割道的寬度設計可以縮小至微二以 下的等級’而其切割面的粗糙度亦可縮至奈米等級。因此 利用本發明所揭露的方法進行基板的切割具有如下的優 點： 1. 切割道之寬度可縮小至微米以下等級，使得半導體 元件在進行设计及佈局時可節省切割道的寬度而配屬較大 的面積做為晶粒之用，如此單一晶片上所能生產的晶粒數 量大幅增加’可降低製造成本而提高產品的競爭力。 2. 切割面的粗链度亦可縮至奈米等級，因此切割製程 的良率可提高。 3. 基板切割的過程不會因基板上之薄膜及圖案所衍生 過大的應力而使基板造成龜裂或破片，可進一步提高切割 製程的良率。 經濟部智慧財產局員工消費合作社印製 4·本發明揭露的方法可一次完成一整片基板的切割， 不像傳統利用機械研磨的方式進行晶片切割時必須一線、 一線逐一切割，因此本發明可大幅提昇產量。 5·使用本方法可避免粉塵及顆粒的污染，可進一步提 面切割製程的良率。 以上所述係利用較佳實施例詳細說明本發明’而非限 制本發明的範圍’而且熟知此技藝的人士亦能明暸，適當 本紙張尺度適财關家縣---—- 434701 A7 __B7__ 五、發明説明（（0 ) = 而作些微的改變與調整，仍將不失本發明之要義所在，亦 不脫離本發明之精神和範圍。 (請先閱讀背面之注意事項再填寫本頁) 經濟部智慧財產局員工消費合作社印製 本紙張尺度適用中國國家標準（CNS ) A4規格（210X2pf公釐）Defects), p | arie Deiects, or body defects. When the heat treatment is raised to a certain temperature, the gas pressure generated by the micro bubbles will cause the substrate to crack from the cutting path (along the direction of the arrow in the figure), as shown in Figure 4B. Figure 4C shows the schematic diagram after the substrate cutting process is completed. Each square in the figure represents a single die 42. The temperature of the heat treatment is between 100 and 60 (rc, which must be determined according to the concentration of the doped ion. If the concentration of the implanted gas is higher (such as E17 cm · 2), The required heating temperature does not need to be too high (less than 250C) to have the effect of peeling and cutting to meet the lower Thermal Budget of some components; conversely, if the concentration of gas implantation is low, then It must be heated to a higher temperature to have the effect of peeling and cutting. For the previously disclosed best embodiment, for eight pairs of Shixi substrates polished by the crystal back, the implantation energy is 200KeV, and the implanted concentration is 8E16 an · 2 ', and the required heat treatment temperature is about 250. ° C. Because the temperature required for heat treatment is closely related to the concentration of the gas ion implantation, it is very important to determine the parameters of temperature and concentration based on the characteristics of the product. For example, the melting point of aluminum is 659 / rc. However, if the temperature exceeds the structure of rhenium aluminum, it will begin to change. Therefore, the temperature of heat treatment of rhenium metal as the integrated circuit of metal wiring 'should not be higher than 40crc. Therefore, the concentration of the implanted gas should not be too low during the cutting process. In addition, in addition to using hydrogen as the implantation gas, helium or other gases can also be used, but one limitation is that the gas that will chemically change with the substrate at high temperatures must not be selected. For example, in the cutting process of Shixi substrate, oxygen cannot be used as the implantation gas. Otherwise, oxygen will be combined with the silicon substrate at high temperature. This paper will be used to correct the material. (CNS} Α4 ^ (210χψ ^) f Please read the back The matters needing attention should be done again) Order the printed 434701 i Al printed by the Intellectual Property Bureau of the Ministry of Economic Affairs of the Consumer Cooperative I. -------------- 5. Description of the invention (1) ~ '-into silicon dioxide. Because the present invention uses a mask to allow the ion implanter to produce {Please read the precautions on the back before filling this page) gas ions are accurately implanted into the cutting path of the substrate, and then the plate is cut by heat treatment. The road is cracked, so the width design of the cutting track can be reduced to a level of micro-2 or less, and the roughness of the cutting surface can also be reduced to a nanometer level. Therefore, cutting the substrate by using the method disclosed in the present invention has the following advantages: 1. The width of the dicing path can be reduced to a level below the micron, so that the semiconductor device can save the width of the dicing path when designing and arranging, and is relatively large. As the area of the die is used, such a large increase in the number of die that can be produced on a single wafer can reduce manufacturing costs and improve product competitiveness. 2. The coarse chain degree of the cutting surface can also be reduced to nanometer level, so the yield of the cutting process can be improved. 3. The substrate cutting process will not cause the substrate to be cracked or broken due to the excessive stress caused by the film and pattern on the substrate, which can further improve the yield of the cutting process. Printed by the Consumer Cooperative of Intellectual Property Bureau of the Ministry of Economic Affairs 4. The method disclosed in the present invention can complete the cutting of a whole substrate at a time, unlike traditional wafer cutting by mechanical grinding, which must be cut line by line, line by line, so the invention can Significantly increase production. 5. Using this method can avoid dust and particle pollution, and can further improve the yield of cutting process. The above is a detailed description of the invention using a preferred embodiment, rather than limiting the scope of the invention, and those skilled in the art will also understand that the appropriate paper size is suitable for Guancai County 434701 A7 __B7__ 5 、 Explanation of the invention ((0) = And making minor changes and adjustments will still not lose the essence of the invention, nor depart from the spirit and scope of the invention. (Please read the precautions on the back before filling this page) Economy Printed on paper produced by the Ministry of Intellectual Property Bureau's Consumer Cooperatives, the paper size applies to Chinese National Standard (CNS) A4 (210X2pf mm)