TW431114B - Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding - Google Patents

Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding

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Publication number
TW431114B
TW431114B TW88105720A TW88105720A TW431114B TW 431114 B TW431114 B TW 431114B TW 88105720 A TW88105720 A TW 88105720A TW 88105720 A TW88105720 A TW 88105720A TW 431114 B TW431114 B TW 431114B
Authority
TW
Taiwan
Prior art keywords
fifo registers
adder
hardware structure
inverse quantization
subtractor
Prior art date
Application number
TW88105720A
Other languages
Chinese (zh)
Inventor
Liang-Ji Chen
Tzung-Han Tsai
Original Assignee
Nat Science Council
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nat Science Council filed Critical Nat Science Council
Priority to TW88105720A priority Critical patent/TW431114B/en
Application granted granted Critical
Publication of TW431114B publication Critical patent/TW431114B/en

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Abstract

The present invention relates to a hardware structure, consisting of 5 sets of serial FIFO registers, a multiplier, a single register, and two adder-subtractors, suitable for inverse quantization and multi-channel processing of MPEG-II audio signal decoding. The first set of FIFO registers is used to receive outputs of the first adder-subtractor and the second set of FIFO registers is used to receive outputs of either the second adder-subtractor or the first set of FIFO registers. The third set of FIFO registers is used to receive outputs of either the single register or the second set of FIFO registers. The single register is used to receive the calculation result of the multiplier and output the calculation result to a buffer zone, the first adder-subtractor, the second adder-subtractor, or the third set of FIFO registers. Based on the hardware structure, inverse quantization can achieve a high output rate and, through efficient and flexible allocation of the multi-channel data, multi-channel processing allows the hardware structure to have a fixed output volume that will not vary along with various dematrixing models.
TW88105720A 1999-04-09 1999-04-09 Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding TW431114B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW88105720A TW431114B (en) 1999-04-09 1999-04-09 Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW88105720A TW431114B (en) 1999-04-09 1999-04-09 Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding

Publications (1)

Publication Number Publication Date
TW431114B true TW431114B (en) 2001-04-21

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
TW88105720A TW431114B (en) 1999-04-09 1999-04-09 Hardware structure and formation for inverse quantization and multi-channel processing of MPEG-II audio signal decoding

Country Status (1)

Country Link
TW (1) TW431114B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202017102446U1 (en) 2016-05-17 2017-06-09 Lee Chi Enterprises Co., Ltd. Seatpost with connecting bracket and connecting bracket for the same

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE202017102446U1 (en) 2016-05-17 2017-06-09 Lee Chi Enterprises Co., Ltd. Seatpost with connecting bracket and connecting bracket for the same

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